| T1064 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.651645184 |
|
|
Jan 21 05:03:25 PM PST 24 |
Jan 21 05:12:33 PM PST 24 |
7158990600 ps |
| T842 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.2164531239 |
|
|
Jan 21 06:16:22 PM PST 24 |
Jan 21 06:29:32 PM PST 24 |
5432027530 ps |
| T333 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.164747673 |
|
|
Jan 21 05:22:40 PM PST 24 |
Jan 21 05:34:48 PM PST 24 |
7233743400 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1757575797 |
|
|
Jan 21 04:42:01 PM PST 24 |
Jan 21 04:52:12 PM PST 24 |
4431107400 ps |
| T1066 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1893681402 |
|
|
Jan 21 05:29:41 PM PST 24 |
Jan 21 05:37:15 PM PST 24 |
4179052943 ps |
| T748 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.3273259378 |
|
|
Jan 21 04:41:55 PM PST 24 |
Jan 21 04:47:27 PM PST 24 |
3457472314 ps |
| T1067 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.4168737062 |
|
|
Jan 21 04:18:52 PM PST 24 |
Jan 21 05:09:48 PM PST 24 |
12594690839 ps |
| T227 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.2514748661 |
|
|
Jan 21 05:02:30 PM PST 24 |
Jan 21 05:16:40 PM PST 24 |
5332844648 ps |
| T1068 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.758304934 |
|
|
Jan 21 04:51:47 PM PST 24 |
Jan 21 05:01:31 PM PST 24 |
6181721880 ps |
| T1069 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.2085141150 |
|
|
Jan 21 04:19:37 PM PST 24 |
Jan 21 04:58:16 PM PST 24 |
34446246420 ps |
| T706 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.275191887 |
|
|
Jan 21 04:26:14 PM PST 24 |
Jan 21 04:33:58 PM PST 24 |
3961553216 ps |
| T1070 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.4123685340 |
|
|
Jan 21 04:23:21 PM PST 24 |
Jan 21 04:58:19 PM PST 24 |
7619872436 ps |
| T1071 |
/workspace/coverage/default/1.chip_sw_kmac_idle.1226185767 |
|
|
Jan 21 04:41:22 PM PST 24 |
Jan 21 04:46:25 PM PST 24 |
3502973750 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.1500940332 |
|
|
Jan 21 05:07:56 PM PST 24 |
Jan 21 05:11:33 PM PST 24 |
2888495896 ps |
| T65 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.2042362906 |
|
|
Jan 21 04:55:45 PM PST 24 |
Jan 21 05:02:56 PM PST 24 |
3948729635 ps |
| T1073 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.36755214 |
|
|
Jan 21 04:42:44 PM PST 24 |
Jan 21 04:49:24 PM PST 24 |
3198865122 ps |
| T1074 |
/workspace/coverage/default/1.chip_sw_uart_smoketest_signed.1668581672 |
|
|
Jan 21 04:49:25 PM PST 24 |
Jan 21 05:31:34 PM PST 24 |
9249472076 ps |
| T831 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.3017395027 |
|
|
Jan 21 05:11:10 PM PST 24 |
Jan 21 05:25:58 PM PST 24 |
5442675860 ps |
| T707 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.185655480 |
|
|
Jan 21 04:43:23 PM PST 24 |
Jan 21 04:55:18 PM PST 24 |
5785124706 ps |
| T1075 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.1991435871 |
|
|
Jan 21 05:04:37 PM PST 24 |
Jan 21 05:46:48 PM PST 24 |
8859874728 ps |
| T345 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.732944604 |
|
|
Jan 21 04:34:38 PM PST 24 |
Jan 21 05:34:40 PM PST 24 |
11530259018 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.425323240 |
|
|
Jan 21 04:27:48 PM PST 24 |
Jan 21 04:32:15 PM PST 24 |
2939061564 ps |
| T1076 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.994123478 |
|
|
Jan 21 05:03:40 PM PST 24 |
Jan 21 05:07:10 PM PST 24 |
2831862361 ps |
| T1077 |
/workspace/coverage/default/4.chip_tap_straps_dev.3925355297 |
|
|
Jan 21 05:26:43 PM PST 24 |
Jan 21 06:06:04 PM PST 24 |
17984427006 ps |
| T844 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.1997613136 |
|
|
Jan 21 05:19:04 PM PST 24 |
Jan 21 05:27:17 PM PST 24 |
3381012136 ps |
| T1078 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.217814022 |
|
|
Jan 21 04:39:31 PM PST 24 |
Jan 21 06:09:36 PM PST 24 |
14941153100 ps |
| T1079 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3382488703 |
|
|
Jan 21 06:17:26 PM PST 24 |
Jan 21 06:26:11 PM PST 24 |
5810508194 ps |
| T837 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.3372813374 |
|
|
Jan 21 05:18:06 PM PST 24 |
Jan 21 05:30:14 PM PST 24 |
4739699760 ps |
| T203 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.3719290603 |
|
|
Jan 21 07:25:00 PM PST 24 |
Jan 21 07:32:52 PM PST 24 |
4564658438 ps |
| T1080 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.3312564107 |
|
|
Jan 21 04:36:20 PM PST 24 |
Jan 21 04:54:47 PM PST 24 |
6009644853 ps |
| T75 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.42234810 |
|
|
Jan 21 06:43:03 PM PST 24 |
Jan 21 06:51:20 PM PST 24 |
3098038340 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.2144335118 |
|
|
Jan 21 04:53:29 PM PST 24 |
Jan 21 05:26:25 PM PST 24 |
7054098608 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.3458790069 |
|
|
Jan 21 05:54:58 PM PST 24 |
Jan 21 05:58:59 PM PST 24 |
3227722456 ps |
| T228 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.653495128 |
|
|
Jan 21 04:40:09 PM PST 24 |
Jan 21 04:50:37 PM PST 24 |
3463607116 ps |
| T847 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.2688564402 |
|
|
Jan 21 07:30:03 PM PST 24 |
Jan 21 07:40:21 PM PST 24 |
5276624840 ps |
| T1083 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.3558619374 |
|
|
Jan 21 04:23:16 PM PST 24 |
Jan 21 04:26:40 PM PST 24 |
2728159280 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3262879841 |
|
|
Jan 21 04:27:06 PM PST 24 |
Jan 21 04:30:53 PM PST 24 |
3039399386 ps |
| T1085 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.588450055 |
|
|
Jan 21 04:47:18 PM PST 24 |
Jan 21 04:54:55 PM PST 24 |
5600996396 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.1861391155 |
|
|
Jan 21 04:38:31 PM PST 24 |
Jan 21 04:46:49 PM PST 24 |
4307203228 ps |
| T1087 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.2340766282 |
|
|
Jan 21 05:59:45 PM PST 24 |
Jan 21 06:12:51 PM PST 24 |
5128902728 ps |
| T141 |
/workspace/coverage/default/2.chip_sw_spi_device_tx_rx.2938756414 |
|
|
Jan 21 04:47:13 PM PST 24 |
Jan 21 04:55:04 PM PST 24 |
3887188854 ps |
| T1088 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.1701733459 |
|
|
Jan 21 05:06:32 PM PST 24 |
Jan 21 05:22:19 PM PST 24 |
11464946429 ps |
| T830 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.132254914 |
|
|
Jan 21 05:16:13 PM PST 24 |
Jan 21 05:23:31 PM PST 24 |
4019022466 ps |
| T1089 |
/workspace/coverage/default/1.chip_sw_aes_enc.499350987 |
|
|
Jan 21 04:57:03 PM PST 24 |
Jan 21 05:01:09 PM PST 24 |
2858627920 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.1085491625 |
|
|
Jan 21 04:48:56 PM PST 24 |
Jan 21 05:13:28 PM PST 24 |
8521733000 ps |
| T1091 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.888445852 |
|
|
Jan 21 05:35:47 PM PST 24 |
Jan 21 05:48:48 PM PST 24 |
5353313560 ps |
| T1092 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.2230882982 |
|
|
Jan 21 06:25:39 PM PST 24 |
Jan 21 06:57:06 PM PST 24 |
7019168160 ps |
| T1093 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.2931360570 |
|
|
Jan 21 05:03:52 PM PST 24 |
Jan 21 06:45:46 PM PST 24 |
22941222100 ps |
| T1094 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.866362120 |
|
|
Jan 21 05:15:31 PM PST 24 |
Jan 21 05:21:56 PM PST 24 |
3133129832 ps |
| T755 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.3352746277 |
|
|
Jan 21 04:40:54 PM PST 24 |
Jan 21 04:51:51 PM PST 24 |
4283680744 ps |
| T1095 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.902488692 |
|
|
Jan 21 04:22:51 PM PST 24 |
Jan 21 05:31:40 PM PST 24 |
19236069189 ps |
| T774 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2315876372 |
|
|
Jan 21 04:50:56 PM PST 24 |
Jan 21 05:22:14 PM PST 24 |
20438665704 ps |
| T200 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2939831046 |
|
|
Jan 21 05:37:37 PM PST 24 |
Jan 21 05:42:57 PM PST 24 |
3296749836 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.3902365272 |
|
|
Jan 21 04:37:18 PM PST 24 |
Jan 21 04:58:47 PM PST 24 |
6435250296 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3736243676 |
|
|
Jan 21 04:25:41 PM PST 24 |
Jan 21 04:32:37 PM PST 24 |
3533714936 ps |
| T1098 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.2863583876 |
|
|
Jan 21 04:18:14 PM PST 24 |
Jan 21 04:34:10 PM PST 24 |
5466123752 ps |
| T1099 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.2672031786 |
|
|
Jan 21 05:06:05 PM PST 24 |
Jan 21 05:12:43 PM PST 24 |
4496378095 ps |
| T1100 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.1932941218 |
|
|
Jan 21 04:49:23 PM PST 24 |
Jan 21 04:56:05 PM PST 24 |
3767978398 ps |
| T1101 |
/workspace/coverage/default/2.rom_raw_unlock.254202297 |
|
|
Jan 21 05:25:07 PM PST 24 |
Jan 21 06:06:12 PM PST 24 |
15750312262 ps |
| T301 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.1326372328 |
|
|
Jan 21 04:23:23 PM PST 24 |
Jan 21 04:29:39 PM PST 24 |
3502390073 ps |
| T1102 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2803708303 |
|
|
Jan 21 06:05:21 PM PST 24 |
Jan 21 06:21:21 PM PST 24 |
5678273209 ps |
| T407 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1321045623 |
|
|
Jan 21 05:29:20 PM PST 24 |
Jan 21 07:09:46 PM PST 24 |
15966276624 ps |
| T6 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.2130998218 |
|
|
Jan 21 04:19:04 PM PST 24 |
Jan 21 04:23:35 PM PST 24 |
3036921159 ps |
| T1103 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.1722801900 |
|
|
Jan 21 04:58:54 PM PST 24 |
Jan 21 05:02:25 PM PST 24 |
2944877308 ps |
| T192 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.4151165744 |
|
|
Jan 21 04:21:41 PM PST 24 |
Jan 21 04:26:08 PM PST 24 |
2976088818 ps |
| T1104 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.733441119 |
|
|
Jan 21 04:52:08 PM PST 24 |
Jan 21 05:02:50 PM PST 24 |
8007570776 ps |
| T175 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.3660284955 |
|
|
Jan 21 04:19:51 PM PST 24 |
Jan 21 04:22:50 PM PST 24 |
3771732856 ps |
| T1105 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.3601599373 |
|
|
Jan 21 04:58:22 PM PST 24 |
Jan 21 05:02:11 PM PST 24 |
2585473256 ps |
| T229 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2068357570 |
|
|
Jan 21 05:28:36 PM PST 24 |
Jan 21 05:38:16 PM PST 24 |
5562864264 ps |
| T812 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.3182466052 |
|
|
Jan 21 05:09:51 PM PST 24 |
Jan 21 05:22:05 PM PST 24 |
5581605000 ps |
| T1106 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.716611667 |
|
|
Jan 21 05:56:51 PM PST 24 |
Jan 21 06:50:54 PM PST 24 |
12699291954 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.2571633639 |
|
|
Jan 21 06:30:02 PM PST 24 |
Jan 21 06:37:27 PM PST 24 |
4963708036 ps |
| T306 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.2314926170 |
|
|
Jan 21 07:29:01 PM PST 24 |
Jan 21 07:39:21 PM PST 24 |
5168123820 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.1372917831 |
|
|
Jan 21 04:41:38 PM PST 24 |
Jan 21 04:52:14 PM PST 24 |
4404725528 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.2127364319 |
|
|
Jan 21 04:23:29 PM PST 24 |
Jan 21 04:33:12 PM PST 24 |
4688701030 ps |
| T312 |
/workspace/coverage/default/2.chip_sival_flash_info_access.4007587168 |
|
|
Jan 21 05:15:27 PM PST 24 |
Jan 21 05:23:22 PM PST 24 |
4188776350 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1408647053 |
|
|
Jan 21 04:21:39 PM PST 24 |
Jan 21 04:30:17 PM PST 24 |
5273731118 ps |
| T1111 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.568976488 |
|
|
Jan 21 04:34:06 PM PST 24 |
Jan 21 04:38:27 PM PST 24 |
3114196112 ps |
| T1112 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1423386138 |
|
|
Jan 21 05:06:10 PM PST 24 |
Jan 21 05:12:06 PM PST 24 |
3185724331 ps |
| T803 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.3705824606 |
|
|
Jan 21 05:19:06 PM PST 24 |
Jan 21 05:33:17 PM PST 24 |
5126380834 ps |
| T813 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2782329166 |
|
|
Jan 21 05:12:53 PM PST 24 |
Jan 21 05:26:15 PM PST 24 |
5401420328 ps |
| T334 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2898428277 |
|
|
Jan 21 07:15:31 PM PST 24 |
Jan 21 07:26:21 PM PST 24 |
5499972278 ps |
| T1113 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2318188714 |
|
|
Jan 21 05:10:28 PM PST 24 |
Jan 21 05:17:27 PM PST 24 |
6182732611 ps |
| T1114 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.756712696 |
|
|
Jan 21 04:26:40 PM PST 24 |
Jan 21 04:43:12 PM PST 24 |
7383775810 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3563765653 |
|
|
Jan 21 04:27:53 PM PST 24 |
Jan 21 04:32:28 PM PST 24 |
3509874816 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.330927022 |
|
|
Jan 21 04:19:43 PM PST 24 |
Jan 21 04:21:45 PM PST 24 |
2416559968 ps |
| T348 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.2447671407 |
|
|
Jan 21 06:41:38 PM PST 24 |
Jan 21 06:46:39 PM PST 24 |
2860948430 ps |
| T1116 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.3258145487 |
|
|
Jan 21 04:44:14 PM PST 24 |
Jan 21 05:04:30 PM PST 24 |
5519730040 ps |
| T331 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.74979818 |
|
|
Jan 21 04:26:11 PM PST 24 |
Jan 21 04:34:04 PM PST 24 |
4791410360 ps |
| T1117 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.2045961667 |
|
|
Jan 21 05:03:55 PM PST 24 |
Jan 21 05:24:14 PM PST 24 |
5919946228 ps |
| T291 |
/workspace/coverage/default/1.chip_sw_spi_device_tx_rx.2793054999 |
|
|
Jan 21 05:17:14 PM PST 24 |
Jan 21 05:24:56 PM PST 24 |
3393772230 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.4002298735 |
|
|
Jan 21 04:42:54 PM PST 24 |
Jan 21 04:48:11 PM PST 24 |
3406600494 ps |
| T784 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.3386214490 |
|
|
Jan 21 06:57:02 PM PST 24 |
Jan 21 07:08:44 PM PST 24 |
5589343548 ps |
| T1118 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.1613277651 |
|
|
Jan 21 06:09:08 PM PST 24 |
Jan 21 06:22:07 PM PST 24 |
9409850648 ps |
| T351 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.886107542 |
|
|
Jan 21 04:35:32 PM PST 24 |
Jan 21 04:41:39 PM PST 24 |
3528993352 ps |
| T1119 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2845950027 |
|
|
Jan 21 05:02:56 PM PST 24 |
Jan 21 05:09:42 PM PST 24 |
3563866278 ps |
| T1120 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.1477973329 |
|
|
Jan 21 04:47:30 PM PST 24 |
Jan 21 05:11:35 PM PST 24 |
6964817896 ps |
| T861 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.1179262278 |
|
|
Jan 21 05:16:58 PM PST 24 |
Jan 21 05:27:22 PM PST 24 |
5162661800 ps |
| T857 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.2473925204 |
|
|
Jan 21 06:18:44 PM PST 24 |
Jan 21 06:29:08 PM PST 24 |
4289813824 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.3160820239 |
|
|
Jan 21 04:21:55 PM PST 24 |
Jan 21 04:32:59 PM PST 24 |
7312757928 ps |
| T14 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1638746261 |
|
|
Jan 21 04:35:00 PM PST 24 |
Jan 21 04:57:33 PM PST 24 |
12576397714 ps |
| T1122 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.1021400915 |
|
|
Jan 21 05:06:28 PM PST 24 |
Jan 21 05:14:31 PM PST 24 |
6444649175 ps |
| T119 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3919260811 |
|
|
Jan 21 04:23:30 PM PST 24 |
Jan 21 04:30:57 PM PST 24 |
4797505600 ps |
| T1123 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.954473236 |
|
|
Jan 21 05:35:46 PM PST 24 |
Jan 21 05:40:19 PM PST 24 |
3422077256 ps |
| T1124 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.3888945015 |
|
|
Jan 21 04:24:09 PM PST 24 |
Jan 21 04:27:32 PM PST 24 |
2550513324 ps |
| T852 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.1243368747 |
|
|
Jan 21 05:35:00 PM PST 24 |
Jan 21 05:45:25 PM PST 24 |
3955554904 ps |
| T137 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3239493240 |
|
|
Jan 21 04:48:52 PM PST 24 |
Jan 21 05:06:03 PM PST 24 |
7115661306 ps |
| T1125 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3417743566 |
|
|
Jan 21 05:06:05 PM PST 24 |
Jan 21 06:38:15 PM PST 24 |
23438949896 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3693461423 |
|
|
Jan 21 06:01:40 PM PST 24 |
Jan 21 06:07:54 PM PST 24 |
4481384104 ps |
| T1127 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.3744410917 |
|
|
Jan 21 07:26:11 PM PST 24 |
Jan 21 07:36:46 PM PST 24 |
4271337520 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_aes_entropy.2663800355 |
|
|
Jan 21 04:22:25 PM PST 24 |
Jan 21 04:26:30 PM PST 24 |
3305667304 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_example_rom.157438597 |
|
|
Jan 21 05:27:40 PM PST 24 |
Jan 21 05:29:54 PM PST 24 |
2262534048 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.40926756 |
|
|
Jan 21 06:39:55 PM PST 24 |
Jan 21 06:47:20 PM PST 24 |
4937603980 ps |
| T1131 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.1798983052 |
|
|
Jan 21 04:48:52 PM PST 24 |
Jan 21 05:26:00 PM PST 24 |
24016928480 ps |
| T1132 |
/workspace/coverage/default/0.chip_sw_kmac_idle.815149884 |
|
|
Jan 21 04:24:24 PM PST 24 |
Jan 21 04:28:30 PM PST 24 |
2840340584 ps |
| T1133 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.797380591 |
|
|
Jan 21 04:23:05 PM PST 24 |
Jan 21 04:32:47 PM PST 24 |
5434377422 ps |
| T838 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.373635569 |
|
|
Jan 21 05:12:37 PM PST 24 |
Jan 21 05:19:58 PM PST 24 |
3819430568 ps |
| T1134 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.1736614317 |
|
|
Jan 21 05:03:29 PM PST 24 |
Jan 21 05:17:49 PM PST 24 |
4300325734 ps |
| T1135 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.1690739564 |
|
|
Jan 21 05:44:07 PM PST 24 |
Jan 21 06:05:03 PM PST 24 |
6492535684 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.3450445057 |
|
|
Jan 21 04:56:51 PM PST 24 |
Jan 21 05:07:07 PM PST 24 |
8357245241 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.3395341482 |
|
|
Jan 21 05:02:35 PM PST 24 |
Jan 21 05:10:52 PM PST 24 |
6056316360 ps |
| T1138 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.966885402 |
|
|
Jan 21 04:42:48 PM PST 24 |
Jan 21 04:53:13 PM PST 24 |
3365554198 ps |
| T866 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.3028636389 |
|
|
Jan 21 05:11:40 PM PST 24 |
Jan 21 05:22:33 PM PST 24 |
5053722696 ps |
| T310 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3893738974 |
|
|
Jan 21 05:02:12 PM PST 24 |
Jan 21 05:21:28 PM PST 24 |
6008829057 ps |
| T777 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.1147546601 |
|
|
Jan 21 05:42:41 PM PST 24 |
Jan 21 05:54:35 PM PST 24 |
5757500984 ps |
| T1139 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1161657208 |
|
|
Jan 21 04:41:29 PM PST 24 |
Jan 21 05:10:35 PM PST 24 |
13238242632 ps |
| T1140 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.412088930 |
|
|
Jan 21 04:34:11 PM PST 24 |
Jan 21 05:43:19 PM PST 24 |
11706561754 ps |
| T360 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.2098127189 |
|
|
Jan 21 04:59:03 PM PST 24 |
Jan 21 05:08:00 PM PST 24 |
4754500040 ps |
| T711 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.405292458 |
|
|
Jan 21 04:19:46 PM PST 24 |
Jan 21 04:23:37 PM PST 24 |
3270670941 ps |
| T1141 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1569285745 |
|
|
Jan 21 04:38:01 PM PST 24 |
Jan 21 04:45:49 PM PST 24 |
5319060616 ps |
| T1142 |
/workspace/coverage/default/2.chip_sw_entropy_src_fuse_en_fw_read_test.597453158 |
|
|
Jan 21 04:54:31 PM PST 24 |
Jan 21 05:02:14 PM PST 24 |
3808213688 ps |
| T1143 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.3241888771 |
|
|
Jan 21 04:50:57 PM PST 24 |
Jan 21 05:17:24 PM PST 24 |
8078300078 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.4135113167 |
|
|
Jan 21 04:18:34 PM PST 24 |
Jan 21 04:34:52 PM PST 24 |
5113516960 ps |
| T840 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.1331466725 |
|
|
Jan 21 05:52:03 PM PST 24 |
Jan 21 05:59:52 PM PST 24 |
4369311120 ps |
| T1144 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.1904482996 |
|
|
Jan 21 07:05:51 PM PST 24 |
Jan 21 07:12:09 PM PST 24 |
2899870581 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.3135144745 |
|
|
Jan 21 04:20:18 PM PST 24 |
Jan 21 04:27:10 PM PST 24 |
3783988379 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.3105007852 |
|
|
Jan 21 04:50:06 PM PST 24 |
Jan 21 05:23:39 PM PST 24 |
11265511404 ps |
| T1146 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1355404088 |
|
|
Jan 21 04:40:40 PM PST 24 |
Jan 21 04:52:37 PM PST 24 |
6244677196 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.4095933478 |
|
|
Jan 21 05:04:38 PM PST 24 |
Jan 21 05:14:51 PM PST 24 |
4689820940 ps |
| T1148 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2615129043 |
|
|
Jan 21 05:05:36 PM PST 24 |
Jan 21 05:15:09 PM PST 24 |
6725428473 ps |
| T1149 |
/workspace/coverage/default/1.chip_sw_example_concurrency.4012693392 |
|
|
Jan 21 05:24:56 PM PST 24 |
Jan 21 05:28:37 PM PST 24 |
1990323680 ps |
| T1150 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3791859593 |
|
|
Jan 21 07:20:41 PM PST 24 |
Jan 21 07:30:52 PM PST 24 |
3742231050 ps |
| T392 |
/workspace/coverage/default/2.chip_sw_flash_init.771132005 |
|
|
Jan 21 04:47:49 PM PST 24 |
Jan 21 05:23:54 PM PST 24 |
23184582153 ps |
| T158 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.2530304522 |
|
|
Jan 21 04:35:32 PM PST 24 |
Jan 21 04:39:16 PM PST 24 |
2421118014 ps |
| T802 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.1211300619 |
|
|
Jan 21 05:43:27 PM PST 24 |
Jan 21 05:49:42 PM PST 24 |
3857081480 ps |
| T1151 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.2599144115 |
|
|
Jan 21 04:25:40 PM PST 24 |
Jan 21 04:34:54 PM PST 24 |
4490425356 ps |
| T309 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.760090863 |
|
|
Jan 21 04:50:56 PM PST 24 |
Jan 21 04:55:57 PM PST 24 |
2730256068 ps |
| T1152 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3804295059 |
|
|
Jan 21 04:23:55 PM PST 24 |
Jan 21 04:45:59 PM PST 24 |
11385036176 ps |
| T1153 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.1894606381 |
|
|
Jan 21 05:03:12 PM PST 24 |
Jan 21 05:08:06 PM PST 24 |
3284827432 ps |
| T1154 |
/workspace/coverage/default/2.chip_sw_power_idle_load.13299996 |
|
|
Jan 21 04:59:30 PM PST 24 |
Jan 21 05:12:19 PM PST 24 |
4194282728 ps |
| T1155 |
/workspace/coverage/default/1.rom_e2e_smoke.2217959580 |
|
|
Jan 21 04:43:44 PM PST 24 |
Jan 21 05:23:42 PM PST 24 |
8411195996 ps |
| T97 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.2515639556 |
|
|
Jan 21 04:27:49 PM PST 24 |
Jan 21 04:37:31 PM PST 24 |
10543106211 ps |
| T1156 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.4059866746 |
|
|
Jan 21 05:56:08 PM PST 24 |
Jan 21 06:05:52 PM PST 24 |
5503840014 ps |
| T1157 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2649796301 |
|
|
Jan 21 04:36:40 PM PST 24 |
Jan 21 04:40:52 PM PST 24 |
2890695640 ps |
| T1158 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1601721726 |
|
|
Jan 21 05:49:29 PM PST 24 |
Jan 21 06:20:54 PM PST 24 |
17990637433 ps |
| T66 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.4127991182 |
|
|
Jan 21 05:54:25 PM PST 24 |
Jan 21 06:01:03 PM PST 24 |
3527241121 ps |
| T1159 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.695691440 |
|
|
Jan 21 04:47:05 PM PST 24 |
Jan 21 05:04:16 PM PST 24 |
5029365624 ps |
| T54 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3198637762 |
|
|
Jan 21 04:18:58 PM PST 24 |
Jan 21 04:23:15 PM PST 24 |
3487694082 ps |
| T779 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1443419168 |
|
|
Jan 21 05:06:21 PM PST 24 |
Jan 21 05:13:56 PM PST 24 |
3015439488 ps |
| T1160 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.15778329 |
|
|
Jan 21 04:46:05 PM PST 24 |
Jan 21 05:07:32 PM PST 24 |
8012440048 ps |
| T153 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3552588678 |
|
|
Jan 21 04:41:49 PM PST 24 |
Jan 21 04:55:26 PM PST 24 |
4414913132 ps |
| T809 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.2272504024 |
|
|
Jan 21 05:20:20 PM PST 24 |
Jan 21 05:35:24 PM PST 24 |
5978691208 ps |
| T1161 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.4262150956 |
|
|
Jan 21 04:48:16 PM PST 24 |
Jan 21 05:04:11 PM PST 24 |
10610384096 ps |
| T1162 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.142188892 |
|
|
Jan 21 05:38:28 PM PST 24 |
Jan 21 05:50:57 PM PST 24 |
4463009896 ps |
| T1163 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.555261201 |
|
|
Jan 21 04:48:53 PM PST 24 |
Jan 21 05:05:37 PM PST 24 |
4695012056 ps |
| T36 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1409510659 |
|
|
Jan 21 05:02:39 PM PST 24 |
Jan 21 05:09:37 PM PST 24 |
5434274294 ps |
| T1164 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.3524194390 |
|
|
Jan 21 04:41:52 PM PST 24 |
Jan 21 04:48:18 PM PST 24 |
3680191800 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_aes_entropy.2105946505 |
|
|
Jan 21 04:54:12 PM PST 24 |
Jan 21 04:58:59 PM PST 24 |
2418763496 ps |
| T15 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.744131541 |
|
|
Jan 21 04:47:16 PM PST 24 |
Jan 21 04:51:25 PM PST 24 |
3470461826 ps |
| T862 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.3730593182 |
|
|
Jan 21 07:48:36 PM PST 24 |
Jan 21 07:55:37 PM PST 24 |
3690511160 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.2451235930 |
|
|
Jan 21 04:36:33 PM PST 24 |
Jan 21 04:46:01 PM PST 24 |
7440711397 ps |
| T820 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.818237374 |
|
|
Jan 21 05:16:50 PM PST 24 |
Jan 21 05:22:38 PM PST 24 |
3242761240 ps |
| T747 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3782127709 |
|
|
Jan 21 04:46:18 PM PST 24 |
Jan 21 04:51:42 PM PST 24 |
3108724770 ps |
| T1167 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2107732318 |
|
|
Jan 21 04:41:23 PM PST 24 |
Jan 21 04:52:40 PM PST 24 |
3726966006 ps |
| T1168 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.1932595662 |
|
|
Jan 21 04:19:32 PM PST 24 |
Jan 21 05:50:01 PM PST 24 |
23227121960 ps |
| T1169 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2583595979 |
|
|
Jan 21 04:33:11 PM PST 24 |
Jan 21 04:36:13 PM PST 24 |
2103636090 ps |
| T816 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.3126797495 |
|
|
Jan 21 05:52:31 PM PST 24 |
Jan 21 06:04:26 PM PST 24 |
4606659718 ps |
| T1170 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.839677616 |
|
|
Jan 21 05:38:59 PM PST 24 |
Jan 21 06:19:25 PM PST 24 |
25078413420 ps |
| T1171 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.4060376862 |
|
|
Jan 21 04:36:43 PM PST 24 |
Jan 21 04:55:16 PM PST 24 |
7439218496 ps |
| T761 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.1877047819 |
|
|
Jan 21 04:44:03 PM PST 24 |
Jan 21 04:58:55 PM PST 24 |
12009729223 ps |
| T849 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.1417885228 |
|
|
Jan 21 05:07:12 PM PST 24 |
Jan 21 05:15:09 PM PST 24 |
3916793500 ps |
| T843 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.476216372 |
|
|
Jan 21 05:07:12 PM PST 24 |
Jan 21 05:14:19 PM PST 24 |
3521893610 ps |
| T1172 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.1658764074 |
|
|
Jan 21 05:23:33 PM PST 24 |
Jan 21 05:31:11 PM PST 24 |
3425873660 ps |
| T1173 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.729400581 |
|
|
Jan 21 05:01:46 PM PST 24 |
Jan 21 05:06:48 PM PST 24 |
3019859224 ps |
| T1174 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.3056842469 |
|
|
Jan 21 05:10:59 PM PST 24 |
Jan 21 05:24:34 PM PST 24 |
6016208920 ps |
| T1175 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.1317830687 |
|
|
Jan 21 04:21:33 PM PST 24 |
Jan 21 04:29:32 PM PST 24 |
5102264177 ps |
| T262 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.1496383511 |
|
|
Jan 21 05:38:00 PM PST 24 |
Jan 21 05:59:53 PM PST 24 |
6151247382 ps |
| T125 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.289653263 |
|
|
Jan 21 06:48:10 PM PST 24 |
Jan 21 08:21:36 PM PST 24 |
18960831688 ps |
| T724 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3634609159 |
|
|
Jan 21 05:25:21 PM PST 24 |
Jan 21 06:45:24 PM PST 24 |
24393924264 ps |
| T712 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2489288678 |
|
|
Jan 21 05:30:56 PM PST 24 |
Jan 21 05:33:35 PM PST 24 |
2936559368 ps |
| T1176 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.3910860714 |
|
|
Jan 21 04:35:00 PM PST 24 |
Jan 21 05:12:52 PM PST 24 |
9013123231 ps |
| T393 |
/workspace/coverage/default/0.chip_sw_flash_init.2049837651 |
|
|
Jan 21 04:18:51 PM PST 24 |
Jan 21 05:00:12 PM PST 24 |
24081165875 ps |
| T1177 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.1642420907 |
|
|
Jan 21 05:10:26 PM PST 24 |
Jan 21 05:14:27 PM PST 24 |
2854455782 ps |
| T1178 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.2906399020 |
|
|
Jan 21 04:54:19 PM PST 24 |
Jan 21 05:00:16 PM PST 24 |
2894615168 ps |
| T1179 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3670870023 |
|
|
Jan 21 04:22:15 PM PST 24 |
Jan 21 04:48:41 PM PST 24 |
13900509938 ps |
| T865 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.1799090159 |
|
|
Jan 21 05:09:38 PM PST 24 |
Jan 21 05:20:49 PM PST 24 |
5212541664 ps |
| T1180 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.1045793874 |
|
|
Jan 21 04:46:42 PM PST 24 |
Jan 21 05:06:03 PM PST 24 |
5306670750 ps |
| T1181 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.240843048 |
|
|
Jan 21 04:48:22 PM PST 24 |
Jan 21 05:27:59 PM PST 24 |
8973373161 ps |
| T1182 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.793165809 |
|
|
Jan 21 06:57:17 PM PST 24 |
Jan 21 07:03:23 PM PST 24 |
3087482176 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.2477149970 |
|
|
Jan 21 04:20:44 PM PST 24 |
Jan 21 04:37:08 PM PST 24 |
12667408180 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.581203431 |
|
|
Jan 21 04:34:46 PM PST 24 |
Jan 21 04:48:23 PM PST 24 |
5119628716 ps |
| T187 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.1683723180 |
|
|
Jan 21 05:11:11 PM PST 24 |
Jan 21 05:19:19 PM PST 24 |
3357428784 ps |
| T236 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1784593732 |
|
|
Jan 21 05:12:02 PM PST 24 |
Jan 21 05:20:16 PM PST 24 |
3894696360 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.3322265165 |
|
|
Jan 21 04:54:39 PM PST 24 |
Jan 21 05:00:21 PM PST 24 |
2682387052 ps |
| T238 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.4050194591 |
|
|
Jan 21 05:08:02 PM PST 24 |
Jan 21 05:14:09 PM PST 24 |
3239437584 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3608284311 |
|
|
Jan 21 05:26:45 PM PST 24 |
Jan 21 05:36:59 PM PST 24 |
5198201244 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1981069779 |
|
|
Jan 21 04:20:45 PM PST 24 |
Jan 21 04:30:32 PM PST 24 |
8985363665 ps |
| T240 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.1403938949 |
|
|
Jan 21 05:06:32 PM PST 24 |
Jan 21 05:20:03 PM PST 24 |
4105924192 ps |
| T835 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.713738019 |
|
|
Jan 21 05:14:53 PM PST 24 |
Jan 21 05:22:15 PM PST 24 |
3515009100 ps |
| T1184 |
/workspace/coverage/default/1.chip_tap_straps_prod.1138046420 |
|
|
Jan 21 05:57:55 PM PST 24 |
Jan 21 06:00:29 PM PST 24 |
2445475080 ps |
| T76 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3937157695 |
|
|
Jan 21 05:20:31 PM PST 24 |
Jan 21 05:31:14 PM PST 24 |
5559411948 ps |
| T1185 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.275496706 |
|
|
Jan 21 06:20:47 PM PST 24 |
Jan 21 07:20:17 PM PST 24 |
14308135856 ps |
| T1186 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.359806934 |
|
|
Jan 21 04:22:46 PM PST 24 |
Jan 21 04:34:01 PM PST 24 |
5993233736 ps |
| T1187 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2006757458 |
|
|
Jan 21 04:37:35 PM PST 24 |
Jan 21 04:41:47 PM PST 24 |
2825543130 ps |
| T1188 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3452891398 |
|
|
Jan 21 04:27:51 PM PST 24 |
Jan 21 04:37:31 PM PST 24 |
9443143100 ps |
| T845 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.745196483 |
|
|
Jan 21 05:10:08 PM PST 24 |
Jan 21 05:23:32 PM PST 24 |
5456903140 ps |
| T1189 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.3293005032 |
|
|
Jan 21 04:45:35 PM PST 24 |
Jan 21 04:50:00 PM PST 24 |
2476206920 ps |
| T1190 |
/workspace/coverage/default/1.chip_sw_aes_entropy.884118027 |
|
|
Jan 21 04:39:17 PM PST 24 |
Jan 21 04:43:42 PM PST 24 |
3011110334 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.3837525689 |
|
|
Jan 21 04:19:17 PM PST 24 |
Jan 21 04:23:12 PM PST 24 |
3245612310 ps |
| T1191 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.2612823928 |
|
|
Jan 21 05:24:00 PM PST 24 |
Jan 21 05:27:54 PM PST 24 |
2793247672 ps |
| T1192 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.686788066 |
|
|
Jan 21 04:21:12 PM PST 24 |
Jan 21 04:45:22 PM PST 24 |
8850226100 ps |
| T1193 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.3378985577 |
|
|
Jan 21 05:36:26 PM PST 24 |
Jan 21 05:47:38 PM PST 24 |
4357055870 ps |
| T727 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.137571448 |
|
|
Jan 21 04:22:09 PM PST 24 |
Jan 21 04:31:10 PM PST 24 |
3224886944 ps |
| T1194 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.903251543 |
|
|
Jan 21 04:55:50 PM PST 24 |
Jan 21 05:52:54 PM PST 24 |
11815417548 ps |
| T804 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.972665360 |
|
|
Jan 21 05:18:43 PM PST 24 |
Jan 21 05:25:43 PM PST 24 |
3764664900 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2298536839 |
|
|
Jan 21 04:19:17 PM PST 24 |
Jan 21 04:26:58 PM PST 24 |
3679143416 ps |
| T1195 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.3911624287 |
|
|
Jan 21 04:55:56 PM PST 24 |
Jan 21 05:01:57 PM PST 24 |
3003753400 ps |
| T16 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.184069988 |
|
|
Jan 21 04:34:03 PM PST 24 |
Jan 21 04:39:37 PM PST 24 |
3885422000 ps |
| T1196 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2883947111 |
|
|
Jan 21 04:57:49 PM PST 24 |
Jan 21 05:09:01 PM PST 24 |
5455758760 ps |
| T851 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3380604119 |
|
|
Jan 21 06:43:06 PM PST 24 |
Jan 21 06:50:10 PM PST 24 |
4188707984 ps |
| T1197 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.3945572905 |
|
|
Jan 21 06:11:14 PM PST 24 |
Jan 21 06:16:46 PM PST 24 |
3547842100 ps |
| T1198 |
/workspace/coverage/default/2.rom_keymgr_functest.663829503 |
|
|
Jan 21 05:16:51 PM PST 24 |
Jan 21 05:27:05 PM PST 24 |
4832466600 ps |
| T1199 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.2899687790 |
|
|
Jan 21 05:24:39 PM PST 24 |
Jan 21 05:31:57 PM PST 24 |
5033041034 ps |
| T1200 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.2371635167 |
|
|
Jan 21 04:48:40 PM PST 24 |
Jan 21 04:52:20 PM PST 24 |
3381795810 ps |
| T1201 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.2754117928 |
|
|
Jan 21 04:59:19 PM PST 24 |
Jan 21 05:03:41 PM PST 24 |
3294862132 ps |
| T1202 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.899094949 |
|
|
Jan 21 04:25:27 PM PST 24 |
Jan 21 04:36:56 PM PST 24 |
4781017500 ps |
| T1203 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3320670319 |
|
|
Jan 21 05:30:07 PM PST 24 |
Jan 21 05:56:01 PM PST 24 |
11591556744 ps |
| T829 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1671510383 |
|
|
Jan 21 08:16:05 PM PST 24 |
Jan 21 08:28:42 PM PST 24 |
5053523858 ps |
| T859 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.2862323992 |
|
|
Jan 21 05:35:50 PM PST 24 |
Jan 21 05:43:34 PM PST 24 |
4061695676 ps |
| T1204 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.797643876 |
|
|
Jan 21 04:53:47 PM PST 24 |
Jan 21 05:16:18 PM PST 24 |
5639783649 ps |
| T1205 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.1891705093 |
|
|
Jan 21 04:33:49 PM PST 24 |
Jan 21 05:01:15 PM PST 24 |
6889715592 ps |
| T1206 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2300642835 |
|
|
Jan 21 04:27:16 PM PST 24 |
Jan 21 04:31:45 PM PST 24 |
2548441706 ps |
| T1207 |
/workspace/coverage/default/3.chip_tap_straps_dev.2302198176 |
|
|
Jan 21 05:01:53 PM PST 24 |
Jan 21 05:08:58 PM PST 24 |
4639375742 ps |
| T1208 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.366638898 |
|
|
Jan 21 04:48:06 PM PST 24 |
Jan 21 04:53:44 PM PST 24 |
4269592508 ps |
| T1209 |
/workspace/coverage/default/1.chip_sw_example_flash.1145548334 |
|
|
Jan 21 04:33:57 PM PST 24 |
Jan 21 04:39:17 PM PST 24 |
2216875428 ps |
| T823 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3880370292 |
|
|
Jan 21 05:15:45 PM PST 24 |
Jan 21 05:25:44 PM PST 24 |
5379115982 ps |
| T1210 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.3587254884 |
|
|
Jan 21 06:31:32 PM PST 24 |
Jan 21 07:08:30 PM PST 24 |
9370170412 ps |
| T1211 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.905392061 |
|
|
Jan 21 05:00:17 PM PST 24 |
Jan 21 06:08:09 PM PST 24 |
33943514300 ps |
| T1212 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.936798535 |
|
|
Jan 21 04:36:23 PM PST 24 |
Jan 21 04:52:24 PM PST 24 |
5913886120 ps |
| T282 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1093286371 |
|
|
Jan 21 05:44:03 PM PST 24 |
Jan 21 06:04:22 PM PST 24 |
5570844840 ps |