| T766 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.2581522310 |
|
|
Jan 21 04:19:21 PM PST 24 |
Jan 21 04:37:32 PM PST 24 |
5954933752 ps |
| T817 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.158212176 |
|
|
Jan 21 05:11:46 PM PST 24 |
Jan 21 05:18:52 PM PST 24 |
3337226536 ps |
| T1213 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.3624595291 |
|
|
Jan 21 04:57:46 PM PST 24 |
Jan 21 05:01:32 PM PST 24 |
2587974875 ps |
| T1214 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.326640919 |
|
|
Jan 21 04:23:05 PM PST 24 |
Jan 21 04:29:17 PM PST 24 |
4593324781 ps |
| T1215 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.3807186285 |
|
|
Jan 21 04:23:15 PM PST 24 |
Jan 21 04:42:08 PM PST 24 |
4419155736 ps |
| T1216 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.1839911511 |
|
|
Jan 21 05:21:55 PM PST 24 |
Jan 21 05:33:26 PM PST 24 |
6913061464 ps |
| T796 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.3763443198 |
|
|
Jan 21 05:06:05 PM PST 24 |
Jan 21 05:13:53 PM PST 24 |
3335636976 ps |
| T1217 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.4246277660 |
|
|
Jan 21 06:41:03 PM PST 24 |
Jan 21 06:45:24 PM PST 24 |
2769057784 ps |
| T833 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.2646234399 |
|
|
Jan 21 05:15:32 PM PST 24 |
Jan 21 05:23:20 PM PST 24 |
3804877720 ps |
| T1218 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2601920675 |
|
|
Jan 21 04:37:50 PM PST 24 |
Jan 21 04:43:34 PM PST 24 |
2631506632 ps |
| T1219 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.3210100491 |
|
|
Jan 21 04:48:06 PM PST 24 |
Jan 21 05:24:27 PM PST 24 |
9211295302 ps |
| T824 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.3513408125 |
|
|
Jan 21 05:19:08 PM PST 24 |
Jan 21 05:33:20 PM PST 24 |
5783028376 ps |
| T762 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.794749576 |
|
|
Jan 21 05:00:27 PM PST 24 |
Jan 21 05:13:09 PM PST 24 |
11037709555 ps |
| T1220 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.1242614903 |
|
|
Jan 21 05:12:18 PM PST 24 |
Jan 21 05:20:35 PM PST 24 |
3935313264 ps |
| T215 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.1702593803 |
|
|
Jan 21 05:04:39 PM PST 24 |
Jan 21 05:18:49 PM PST 24 |
4552404192 ps |
| T1221 |
/workspace/coverage/default/2.chip_sw_kmac_idle.116204032 |
|
|
Jan 21 05:30:06 PM PST 24 |
Jan 21 05:34:54 PM PST 24 |
3398042720 ps |
| T120 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1024630832 |
|
|
Jan 21 04:41:09 PM PST 24 |
Jan 21 04:48:16 PM PST 24 |
5112366260 ps |
| T1222 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.3515367413 |
|
|
Jan 21 07:34:14 PM PST 24 |
Jan 21 08:34:17 PM PST 24 |
12618488244 ps |
| T800 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3356591963 |
|
|
Jan 21 05:06:41 PM PST 24 |
Jan 21 05:14:37 PM PST 24 |
3714385572 ps |
| T1223 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.3720179130 |
|
|
Jan 21 06:01:48 PM PST 24 |
Jan 21 06:13:47 PM PST 24 |
5036247390 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.248298986 |
|
|
Jan 21 04:43:29 PM PST 24 |
Jan 21 04:48:14 PM PST 24 |
3052416751 ps |
| T1225 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.1233509430 |
|
|
Jan 21 05:16:37 PM PST 24 |
Jan 21 05:27:26 PM PST 24 |
6322126075 ps |
| T814 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1507640860 |
|
|
Jan 21 06:08:10 PM PST 24 |
Jan 21 06:16:26 PM PST 24 |
3916256544 ps |
| T280 |
/workspace/coverage/default/1.chip_sw_gpio.3239207858 |
|
|
Jan 21 05:26:45 PM PST 24 |
Jan 21 05:35:25 PM PST 24 |
3836609655 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2269286100 |
|
|
Jan 21 04:21:13 PM PST 24 |
Jan 21 04:25:37 PM PST 24 |
2230560449 ps |
| T781 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3773085939 |
|
|
Jan 21 07:34:36 PM PST 24 |
Jan 21 07:41:30 PM PST 24 |
4135569352 ps |
| T1227 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2382386085 |
|
|
Jan 21 06:47:04 PM PST 24 |
Jan 21 06:51:26 PM PST 24 |
2466742000 ps |
| T1228 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.1148518385 |
|
|
Jan 21 05:26:00 PM PST 24 |
Jan 21 06:04:13 PM PST 24 |
8571007260 ps |
| T1229 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.4047205080 |
|
|
Jan 21 04:59:58 PM PST 24 |
Jan 21 05:04:20 PM PST 24 |
2886454211 ps |
| T841 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.3657193664 |
|
|
Jan 21 05:13:52 PM PST 24 |
Jan 21 05:22:00 PM PST 24 |
4104633776 ps |
| T1230 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.502633532 |
|
|
Jan 21 04:41:34 PM PST 24 |
Jan 21 04:48:50 PM PST 24 |
4411259542 ps |
| T756 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.757635684 |
|
|
Jan 21 04:55:34 PM PST 24 |
Jan 21 05:02:15 PM PST 24 |
3173957900 ps |
| T1231 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.626162254 |
|
|
Jan 21 04:19:04 PM PST 24 |
Jan 21 04:33:16 PM PST 24 |
4705976064 ps |
| T1232 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.4196471157 |
|
|
Jan 21 04:28:05 PM PST 24 |
Jan 21 04:34:32 PM PST 24 |
3461266404 ps |
| T1233 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.908939998 |
|
|
Jan 21 06:03:27 PM PST 24 |
Jan 21 06:12:13 PM PST 24 |
9977367666 ps |
| T1234 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.3137241808 |
|
|
Jan 21 04:18:58 PM PST 24 |
Jan 21 04:40:26 PM PST 24 |
7740926584 ps |
| T272 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.1329863694 |
|
|
Jan 21 04:50:12 PM PST 24 |
Jan 21 05:19:15 PM PST 24 |
10939038624 ps |
| T285 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1270190946 |
|
|
Jan 21 05:15:29 PM PST 24 |
Jan 21 05:30:58 PM PST 24 |
4907666288 ps |
| T1235 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.2433940844 |
|
|
Jan 21 06:17:33 PM PST 24 |
Jan 21 06:34:21 PM PST 24 |
5965475438 ps |
| T1236 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.1030758896 |
|
|
Jan 21 05:35:02 PM PST 24 |
Jan 21 05:56:00 PM PST 24 |
8176556268 ps |
| T1237 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.3585604425 |
|
|
Jan 21 05:04:35 PM PST 24 |
Jan 21 06:13:02 PM PST 24 |
23959369967 ps |
| T1238 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.203187312 |
|
|
Jan 21 04:39:58 PM PST 24 |
Jan 21 04:56:50 PM PST 24 |
5066243931 ps |
| T1239 |
/workspace/coverage/default/0.chip_tap_straps_dev.1696394960 |
|
|
Jan 21 04:25:51 PM PST 24 |
Jan 21 04:28:44 PM PST 24 |
2514243008 ps |
| T1240 |
/workspace/coverage/default/1.chip_jtag_mem_access.4208944637 |
|
|
Jan 21 04:35:01 PM PST 24 |
Jan 21 05:01:39 PM PST 24 |
13873401362 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.3470116403 |
|
|
Jan 21 05:40:31 PM PST 24 |
Jan 21 05:45:22 PM PST 24 |
2959649246 ps |
| T1242 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.2930061486 |
|
|
Jan 21 04:38:44 PM PST 24 |
Jan 21 06:00:22 PM PST 24 |
18222127661 ps |
| T1243 |
/workspace/coverage/default/2.chip_sw_example_concurrency.1243405468 |
|
|
Jan 21 04:46:59 PM PST 24 |
Jan 21 04:50:49 PM PST 24 |
2338367774 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3305319594 |
|
|
Jan 21 05:25:31 PM PST 24 |
Jan 21 05:33:51 PM PST 24 |
5552221616 ps |
| T1245 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2696314310 |
|
|
Jan 21 05:10:11 PM PST 24 |
Jan 21 05:18:20 PM PST 24 |
3503959944 ps |
| T242 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.908140301 |
|
|
Jan 21 04:42:19 PM PST 24 |
Jan 21 04:48:08 PM PST 24 |
2512879446 ps |
| T1246 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.2162166429 |
|
|
Jan 21 05:38:49 PM PST 24 |
Jan 21 05:49:38 PM PST 24 |
5725577042 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3854376909 |
|
|
Jan 21 04:21:54 PM PST 24 |
Jan 21 04:32:54 PM PST 24 |
6340272996 ps |
| T1248 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3679103171 |
|
|
Jan 21 08:00:28 PM PST 24 |
Jan 21 08:06:12 PM PST 24 |
3730478928 ps |
| T1249 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.3536103050 |
|
|
Jan 21 04:21:46 PM PST 24 |
Jan 21 05:33:53 PM PST 24 |
21004102445 ps |
| T395 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1533482559 |
|
|
Jan 21 04:43:24 PM PST 24 |
Jan 21 05:22:24 PM PST 24 |
24435715395 ps |
| T1250 |
/workspace/coverage/default/2.chip_sw_uart_smoketest_signed.1958682835 |
|
|
Jan 21 05:07:11 PM PST 24 |
Jan 21 05:44:44 PM PST 24 |
8585943298 ps |
| T810 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3020775633 |
|
|
Jan 21 05:09:52 PM PST 24 |
Jan 21 05:17:21 PM PST 24 |
3555811050 ps |
| T1251 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1860371495 |
|
|
Jan 21 04:37:56 PM PST 24 |
Jan 21 04:51:40 PM PST 24 |
19679736844 ps |
| T204 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.4074798834 |
|
|
Jan 21 05:53:15 PM PST 24 |
Jan 21 06:07:48 PM PST 24 |
7344987944 ps |
| T335 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2419234190 |
|
|
Jan 21 04:56:40 PM PST 24 |
Jan 21 05:10:41 PM PST 24 |
6503062192 ps |
| T1252 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1336360315 |
|
|
Jan 21 04:23:41 PM PST 24 |
Jan 21 04:33:07 PM PST 24 |
4448742834 ps |
| T826 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.3816345102 |
|
|
Jan 21 05:07:24 PM PST 24 |
Jan 21 05:21:46 PM PST 24 |
4680095620 ps |
| T1253 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.863006123 |
|
|
Jan 21 05:53:30 PM PST 24 |
Jan 21 06:02:36 PM PST 24 |
3484677080 ps |
| T103 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2426869118 |
|
|
Jan 21 04:29:01 PM PST 24 |
Jan 21 05:51:48 PM PST 24 |
21976106158 ps |
| T1254 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2012366733 |
|
|
Jan 21 07:04:54 PM PST 24 |
Jan 21 07:13:29 PM PST 24 |
4014489200 ps |
| T1255 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.3544470029 |
|
|
Jan 21 05:19:50 PM PST 24 |
Jan 21 05:25:54 PM PST 24 |
2407213922 ps |
| T408 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.1656192021 |
|
|
Jan 21 04:23:16 PM PST 24 |
Jan 21 05:36:42 PM PST 24 |
12063781784 ps |
| T1256 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.3994973050 |
|
|
Jan 21 05:39:56 PM PST 24 |
Jan 21 05:48:02 PM PST 24 |
4015722192 ps |
| T728 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.950963204 |
|
|
Jan 21 04:39:00 PM PST 24 |
Jan 21 04:48:24 PM PST 24 |
2841756914 ps |
| T1257 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.781849865 |
|
|
Jan 21 05:42:53 PM PST 24 |
Jan 21 05:49:04 PM PST 24 |
2436601190 ps |
| T1258 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.1971376626 |
|
|
Jan 21 04:48:11 PM PST 24 |
Jan 21 05:24:36 PM PST 24 |
8946408170 ps |
| T1259 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.2841429229 |
|
|
Jan 21 05:07:42 PM PST 24 |
Jan 21 05:21:42 PM PST 24 |
6092845864 ps |
| T868 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.4005582633 |
|
|
Jan 21 04:46:29 PM PST 24 |
Jan 21 04:53:37 PM PST 24 |
4046421316 ps |
| T1260 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.1630280603 |
|
|
Jan 21 04:40:09 PM PST 24 |
Jan 21 04:44:29 PM PST 24 |
3088690380 ps |
| T1261 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.2513845704 |
|
|
Jan 21 04:26:18 PM PST 24 |
Jan 21 04:33:13 PM PST 24 |
5342548480 ps |
| T1262 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.2100255061 |
|
|
Jan 21 05:24:57 PM PST 24 |
Jan 21 05:48:53 PM PST 24 |
10322478750 ps |
| T1263 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.549131406 |
|
|
Jan 21 05:08:03 PM PST 24 |
Jan 21 06:02:11 PM PST 24 |
13682975798 ps |
| T1264 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3645319900 |
|
|
Jan 21 08:37:15 PM PST 24 |
Jan 21 08:46:21 PM PST 24 |
4123288000 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.1054276579 |
|
|
Jan 21 04:37:11 PM PST 24 |
Jan 21 05:11:25 PM PST 24 |
26937976088 ps |
| T725 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.181320479 |
|
|
Jan 21 04:55:32 PM PST 24 |
Jan 21 06:17:57 PM PST 24 |
24846398047 ps |
| T1266 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.753366970 |
|
|
Jan 21 05:49:14 PM PST 24 |
Jan 21 06:08:29 PM PST 24 |
6542288255 ps |
| T58 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.1548879239 |
|
|
Jan 21 04:19:40 PM PST 24 |
Jan 21 04:31:11 PM PST 24 |
3793464872 ps |
| T1267 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.478096664 |
|
|
Jan 21 04:45:42 PM PST 24 |
Jan 21 04:49:17 PM PST 24 |
2910880306 ps |
| T1268 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3636719538 |
|
|
Jan 21 04:34:56 PM PST 24 |
Jan 21 05:23:35 PM PST 24 |
9748095197 ps |
| T1269 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.3032019217 |
|
|
Jan 21 04:34:29 PM PST 24 |
Jan 21 05:33:05 PM PST 24 |
12203660820 ps |
| T827 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3195394671 |
|
|
Jan 21 06:06:24 PM PST 24 |
Jan 21 06:12:38 PM PST 24 |
4301106480 ps |
| T858 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.65557110 |
|
|
Jan 21 05:15:05 PM PST 24 |
Jan 21 05:26:48 PM PST 24 |
4887250228 ps |
| T275 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.3065753048 |
|
|
Jan 21 04:54:52 PM PST 24 |
Jan 21 05:19:21 PM PST 24 |
6282752680 ps |
| T1270 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.2017897237 |
|
|
Jan 21 04:32:48 PM PST 24 |
Jan 21 05:08:42 PM PST 24 |
8771578350 ps |
| T815 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.977775132 |
|
|
Jan 21 05:08:56 PM PST 24 |
Jan 21 05:22:11 PM PST 24 |
5059779016 ps |
| T1271 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.1398964284 |
|
|
Jan 21 04:37:27 PM PST 24 |
Jan 21 05:09:53 PM PST 24 |
22034782546 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1080002337 |
|
|
Jan 21 04:43:22 PM PST 24 |
Jan 21 04:58:10 PM PST 24 |
7283293044 ps |
| T276 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.2449447812 |
|
|
Jan 21 04:39:47 PM PST 24 |
Jan 21 05:14:07 PM PST 24 |
7372717040 ps |
| T1273 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.759332951 |
|
|
Jan 21 07:12:20 PM PST 24 |
Jan 21 07:20:17 PM PST 24 |
7524633464 ps |
| T1274 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.2898267576 |
|
|
Jan 21 04:19:14 PM PST 24 |
Jan 21 04:33:57 PM PST 24 |
8910712157 ps |
| T1275 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3436584821 |
|
|
Jan 21 04:40:54 PM PST 24 |
Jan 21 04:57:18 PM PST 24 |
8579073384 ps |
| T205 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.2065842473 |
|
|
Jan 21 04:20:09 PM PST 24 |
Jan 21 04:33:58 PM PST 24 |
7488174718 ps |
| T1276 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1594455868 |
|
|
Jan 21 05:03:50 PM PST 24 |
Jan 21 05:41:36 PM PST 24 |
8841296600 ps |
| T1277 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2161295828 |
|
|
Jan 21 04:22:57 PM PST 24 |
Jan 21 04:26:46 PM PST 24 |
2774749152 ps |
| T1278 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.1428650035 |
|
|
Jan 21 04:34:37 PM PST 24 |
Jan 21 05:35:21 PM PST 24 |
11808088072 ps |
| T1279 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1802125240 |
|
|
Jan 21 04:23:21 PM PST 24 |
Jan 21 04:28:01 PM PST 24 |
2640044852 ps |
| T1280 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2919933513 |
|
|
Jan 21 04:48:38 PM PST 24 |
Jan 21 04:54:37 PM PST 24 |
4964198661 ps |
| T1281 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.2029914891 |
|
|
Jan 21 06:00:13 PM PST 24 |
Jan 21 06:05:49 PM PST 24 |
3751603850 ps |
| T1282 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.2563867324 |
|
|
Jan 21 04:40:58 PM PST 24 |
Jan 21 04:46:33 PM PST 24 |
2702025408 ps |
| T1283 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3208893420 |
|
|
Jan 21 06:16:42 PM PST 24 |
Jan 21 06:28:41 PM PST 24 |
3982496670 ps |
| T1284 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.4098971414 |
|
|
Jan 21 06:10:06 PM PST 24 |
Jan 21 07:03:54 PM PST 24 |
12768536184 ps |
| T1285 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.3123812725 |
|
|
Jan 21 04:21:32 PM PST 24 |
Jan 21 04:25:31 PM PST 24 |
3254938981 ps |
| T1286 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.767323210 |
|
|
Jan 21 04:35:08 PM PST 24 |
Jan 21 05:14:11 PM PST 24 |
8189259280 ps |
| T780 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2635177003 |
|
|
Jan 21 04:18:32 PM PST 24 |
Jan 21 04:31:56 PM PST 24 |
6523751320 ps |
| T1287 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3289753033 |
|
|
Jan 21 04:18:33 PM PST 24 |
Jan 21 04:29:56 PM PST 24 |
4603356976 ps |
| T764 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.1085416948 |
|
|
Jan 21 07:36:48 PM PST 24 |
Jan 21 07:46:21 PM PST 24 |
4250329096 ps |
| T165 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.2050700120 |
|
|
Jan 21 04:42:10 PM PST 24 |
Jan 21 04:51:44 PM PST 24 |
4656876540 ps |
| T246 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.2090899312 |
|
|
Jan 21 04:56:08 PM PST 24 |
Jan 21 05:13:32 PM PST 24 |
7064583481 ps |
| T294 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.1664299828 |
|
|
Jan 21 04:49:14 PM PST 24 |
Jan 21 04:54:43 PM PST 24 |
2893542528 ps |
| T782 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.1432373761 |
|
|
Jan 21 07:13:10 PM PST 24 |
Jan 21 07:21:53 PM PST 24 |
4589859416 ps |
| T1288 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.660270203 |
|
|
Jan 21 04:32:54 PM PST 24 |
Jan 21 04:41:03 PM PST 24 |
2920658160 ps |
| T1289 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.925695047 |
|
|
Jan 21 05:47:49 PM PST 24 |
Jan 21 05:55:57 PM PST 24 |
5264394886 ps |
| T856 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.905551126 |
|
|
Jan 21 05:19:29 PM PST 24 |
Jan 21 05:33:33 PM PST 24 |
5964622664 ps |
| T1290 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.2388028683 |
|
|
Jan 21 05:33:36 PM PST 24 |
Jan 21 05:38:08 PM PST 24 |
2590735568 ps |
| T1291 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1302587249 |
|
|
Jan 21 05:02:23 PM PST 24 |
Jan 21 05:06:26 PM PST 24 |
2700375150 ps |
| T850 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.3651566620 |
|
|
Jan 21 05:13:15 PM PST 24 |
Jan 21 05:26:41 PM PST 24 |
4678234424 ps |
| T1292 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.3477604392 |
|
|
Jan 21 05:09:12 PM PST 24 |
Jan 21 05:21:57 PM PST 24 |
4739901504 ps |
| T1293 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3721530793 |
|
|
Jan 21 04:47:45 PM PST 24 |
Jan 21 05:00:17 PM PST 24 |
4790626476 ps |
| T142 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.935896622 |
|
|
Jan 21 04:56:34 PM PST 24 |
Jan 21 05:09:10 PM PST 24 |
4832916816 ps |
| T1294 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2878953729 |
|
|
Jan 21 04:41:26 PM PST 24 |
Jan 21 05:04:11 PM PST 24 |
11040319408 ps |
| T1295 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.1269130140 |
|
|
Jan 21 05:05:04 PM PST 24 |
Jan 21 05:40:54 PM PST 24 |
8513530705 ps |
| T1296 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.2016207484 |
|
|
Jan 21 05:15:36 PM PST 24 |
Jan 21 05:20:52 PM PST 24 |
3201954299 ps |
| T1297 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.4009089662 |
|
|
Jan 21 06:11:39 PM PST 24 |
Jan 21 06:19:35 PM PST 24 |
4041837616 ps |
| T1298 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2645087450 |
|
|
Jan 21 04:25:53 PM PST 24 |
Jan 21 04:36:03 PM PST 24 |
4457788560 ps |
| T1299 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.3962766623 |
|
|
Jan 21 06:14:28 PM PST 24 |
Jan 21 06:21:19 PM PST 24 |
3475766447 ps |
| T1300 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.4098792574 |
|
|
Jan 21 04:21:33 PM PST 24 |
Jan 21 04:31:21 PM PST 24 |
5050835250 ps |
| T808 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2752165284 |
|
|
Jan 21 05:12:56 PM PST 24 |
Jan 21 05:26:33 PM PST 24 |
4620116766 ps |
| T1301 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3990234986 |
|
|
Jan 21 05:59:02 PM PST 24 |
Jan 21 06:07:25 PM PST 24 |
4203734025 ps |
| T332 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.422232891 |
|
|
Jan 21 04:42:22 PM PST 24 |
Jan 21 04:51:53 PM PST 24 |
5942797832 ps |
| T206 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.484948996 |
|
|
Jan 21 07:51:44 PM PST 24 |
Jan 21 08:02:29 PM PST 24 |
5008225044 ps |
| T1302 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.1754249498 |
|
|
Jan 21 05:39:43 PM PST 24 |
Jan 21 07:00:22 PM PST 24 |
16726153198 ps |
| T1303 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.3432614922 |
|
|
Jan 21 06:24:03 PM PST 24 |
Jan 21 06:53:54 PM PST 24 |
6717462031 ps |
| T828 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.215892179 |
|
|
Jan 21 05:10:28 PM PST 24 |
Jan 21 05:16:54 PM PST 24 |
3878272828 ps |
| T1304 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.2852378755 |
|
|
Jan 21 05:18:59 PM PST 24 |
Jan 21 05:59:14 PM PST 24 |
8456899423 ps |
| T1305 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.1156976736 |
|
|
Jan 21 04:35:46 PM PST 24 |
Jan 21 04:39:31 PM PST 24 |
2490847800 ps |
| T855 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.3911870920 |
|
|
Jan 21 05:40:46 PM PST 24 |
Jan 21 05:49:15 PM PST 24 |
3659266360 ps |
| T1306 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.815001375 |
|
|
Jan 21 04:37:17 PM PST 24 |
Jan 21 05:43:16 PM PST 24 |
20511652252 ps |
| T1307 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.737712247 |
|
|
Jan 21 04:22:12 PM PST 24 |
Jan 21 04:28:40 PM PST 24 |
3791434172 ps |
| T797 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.3135434583 |
|
|
Jan 21 05:07:25 PM PST 24 |
Jan 21 05:19:04 PM PST 24 |
4646570916 ps |
| T1308 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.4074181905 |
|
|
Jan 21 04:50:52 PM PST 24 |
Jan 21 04:58:42 PM PST 24 |
3924409818 ps |
| T1309 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1738833835 |
|
|
Jan 21 04:56:44 PM PST 24 |
Jan 21 05:06:58 PM PST 24 |
4499145338 ps |
| T757 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.176276544 |
|
|
Jan 21 06:40:23 PM PST 24 |
Jan 21 06:50:12 PM PST 24 |
5329063090 ps |
| T27 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.2319421959 |
|
|
Jan 21 04:46:49 PM PST 24 |
Jan 21 04:52:44 PM PST 24 |
4440935260 ps |
| T1310 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.1360169660 |
|
|
Jan 21 06:37:47 PM PST 24 |
Jan 21 06:56:54 PM PST 24 |
5459160640 ps |
| T818 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.1634887585 |
|
|
Jan 21 05:20:08 PM PST 24 |
Jan 21 05:32:55 PM PST 24 |
5974113044 ps |
| T1311 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.2739565372 |
|
|
Jan 21 05:03:13 PM PST 24 |
Jan 21 05:21:21 PM PST 24 |
5353714848 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.234761763 |
|
|
Jan 21 05:30:16 PM PST 24 |
Jan 21 05:35:07 PM PST 24 |
2195599374 ps |
| T1312 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.2370187194 |
|
|
Jan 21 05:03:18 PM PST 24 |
Jan 21 05:15:24 PM PST 24 |
3813586172 ps |
| T811 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1131497949 |
|
|
Jan 21 05:12:06 PM PST 24 |
Jan 21 05:20:51 PM PST 24 |
4214808158 ps |
| T273 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.576445305 |
|
|
Jan 21 04:36:21 PM PST 24 |
Jan 21 05:16:52 PM PST 24 |
15269444272 ps |
| T1313 |
/workspace/coverage/default/2.chip_tap_straps_dev.1746223813 |
|
|
Jan 21 05:07:23 PM PST 24 |
Jan 21 05:21:33 PM PST 24 |
8655809754 ps |
| T825 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.2866482775 |
|
|
Jan 21 05:14:31 PM PST 24 |
Jan 21 05:22:16 PM PST 24 |
3493679732 ps |
| T1314 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.3604414550 |
|
|
Jan 21 05:15:33 PM PST 24 |
Jan 21 05:29:12 PM PST 24 |
4809074664 ps |
| T713 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.1481543624 |
|
|
Jan 21 04:21:11 PM PST 24 |
Jan 21 04:23:45 PM PST 24 |
3015016903 ps |
| T832 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3607517664 |
|
|
Jan 21 07:13:10 PM PST 24 |
Jan 21 07:21:05 PM PST 24 |
4194697752 ps |
| T1315 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2979230394 |
|
|
Jan 21 05:54:41 PM PST 24 |
Jan 21 06:12:59 PM PST 24 |
4827366960 ps |
| T1316 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.2722664647 |
|
|
Jan 21 05:22:09 PM PST 24 |
Jan 21 05:34:59 PM PST 24 |
4239212230 ps |
| T1317 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.2662606980 |
|
|
Jan 21 04:48:44 PM PST 24 |
Jan 21 04:54:33 PM PST 24 |
3059211644 ps |
| T1318 |
/workspace/coverage/default/0.rom_e2e_smoke.2653901881 |
|
|
Jan 21 04:50:42 PM PST 24 |
Jan 21 05:29:52 PM PST 24 |
8792715816 ps |
| T807 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.1410749104 |
|
|
Jan 21 06:42:04 PM PST 24 |
Jan 21 06:55:23 PM PST 24 |
5817325012 ps |
| T1319 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.4080830587 |
|
|
Jan 21 05:23:46 PM PST 24 |
Jan 21 05:28:57 PM PST 24 |
2575648240 ps |
| T341 |
/workspace/coverage/default/0.chip_jtag_csr_rw.3194723085 |
|
|
Jan 21 04:56:52 PM PST 24 |
Jan 21 05:45:53 PM PST 24 |
18130485230 ps |
| T1320 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3997578273 |
|
|
Jan 21 06:23:13 PM PST 24 |
Jan 21 06:35:24 PM PST 24 |
5834209426 ps |
| T288 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.2372669604 |
|
|
Jan 21 04:37:48 PM PST 24 |
Jan 21 04:45:22 PM PST 24 |
4078206000 ps |
| T1321 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.3156633148 |
|
|
Jan 21 04:59:18 PM PST 24 |
Jan 21 05:04:06 PM PST 24 |
2743273914 ps |
| T853 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.381626379 |
|
|
Jan 21 06:05:46 PM PST 24 |
Jan 21 06:13:06 PM PST 24 |
3846238002 ps |
| T1322 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.1880465982 |
|
|
Jan 21 06:47:15 PM PST 24 |
Jan 21 07:07:52 PM PST 24 |
6049976310 ps |
| T1323 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.721406467 |
|
|
Jan 21 04:53:23 PM PST 24 |
Jan 21 04:57:03 PM PST 24 |
2892526639 ps |
| T1324 |
/workspace/coverage/default/0.chip_sival_flash_info_access.348717312 |
|
|
Jan 21 04:18:01 PM PST 24 |
Jan 21 04:25:13 PM PST 24 |
3498123062 ps |
| T1325 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.631804818 |
|
|
Jan 21 04:33:32 PM PST 24 |
Jan 21 05:06:10 PM PST 24 |
9565419256 ps |
| T286 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.3909652148 |
|
|
Jan 21 04:35:51 PM PST 24 |
Jan 21 04:45:06 PM PST 24 |
3668786416 ps |
| T1326 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3764882358 |
|
|
Jan 21 04:37:49 PM PST 24 |
Jan 21 04:42:39 PM PST 24 |
3201893000 ps |
| T1327 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.2788878665 |
|
|
Jan 21 05:53:56 PM PST 24 |
Jan 21 06:00:20 PM PST 24 |
3512946021 ps |
| T1328 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.1820075261 |
|
|
Jan 21 04:55:28 PM PST 24 |
Jan 21 05:08:41 PM PST 24 |
7459709484 ps |
| T56 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1154112692 |
|
|
Jan 21 04:19:44 PM PST 24 |
Jan 21 07:04:11 PM PST 24 |
31909478156 ps |
| T1329 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.998848644 |
|
|
Jan 21 05:58:45 PM PST 24 |
Jan 21 06:03:09 PM PST 24 |
2758544280 ps |
| T1330 |
/workspace/coverage/default/0.chip_jtag_mem_access.3692619423 |
|
|
Jan 21 04:19:00 PM PST 24 |
Jan 21 04:44:37 PM PST 24 |
13474394680 ps |
| T350 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.558595679 |
|
|
Jan 21 04:18:09 PM PST 24 |
Jan 21 04:23:25 PM PST 24 |
3289107490 ps |
| T1331 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.3579730264 |
|
|
Jan 21 05:05:00 PM PST 24 |
Jan 21 05:14:27 PM PST 24 |
6309049830 ps |
| T1332 |
/workspace/coverage/default/0.chip_sw_entropy_src_fuse_en_fw_read_test.4237777417 |
|
|
Jan 21 04:23:25 PM PST 24 |
Jan 21 04:35:14 PM PST 24 |
4684443000 ps |
| T1333 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1980174180 |
|
|
Jan 21 04:35:23 PM PST 24 |
Jan 21 04:54:40 PM PST 24 |
5897596900 ps |
| T839 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.1152904741 |
|
|
Jan 21 05:14:02 PM PST 24 |
Jan 21 05:27:31 PM PST 24 |
5180716440 ps |
| T1334 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg.2785175348 |
|
|
Jan 21 04:47:22 PM PST 24 |
Jan 21 04:52:14 PM PST 24 |
3384627500 ps |
| T1335 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3003737859 |
|
|
Jan 21 04:51:45 PM PST 24 |
Jan 21 04:59:23 PM PST 24 |
4420004248 ps |
| T1336 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.1779455182 |
|
|
Jan 21 06:21:57 PM PST 24 |
Jan 21 06:59:39 PM PST 24 |
8320517344 ps |
| T1337 |
/workspace/coverage/default/2.rom_e2e_static_critical.1205853302 |
|
|
Jan 21 05:34:40 PM PST 24 |
Jan 21 06:32:58 PM PST 24 |
10600492980 ps |
| T1338 |
/workspace/coverage/default/0.chip_tap_straps_rma.163688925 |
|
|
Jan 21 07:13:13 PM PST 24 |
Jan 21 07:24:01 PM PST 24 |
6908942041 ps |
| T1339 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.540659710 |
|
|
Jan 21 05:05:11 PM PST 24 |
Jan 21 05:49:03 PM PST 24 |
9150051092 ps |
| T1340 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.391534997 |
|
|
Jan 21 07:10:51 PM PST 24 |
Jan 21 07:15:17 PM PST 24 |
3408601751 ps |
| T1341 |
/workspace/coverage/default/2.chip_tap_straps_prod.1045968654 |
|
|
Jan 21 04:58:42 PM PST 24 |
Jan 21 05:10:37 PM PST 24 |
6885750621 ps |
| T805 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.2026780073 |
|
|
Jan 21 05:56:25 PM PST 24 |
Jan 21 06:08:13 PM PST 24 |
5178427670 ps |
| T1342 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.343489865 |
|
|
Jan 21 04:36:08 PM PST 24 |
Jan 21 05:13:58 PM PST 24 |
8966479157 ps |
| T1343 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.4153534605 |
|
|
Jan 21 06:14:25 PM PST 24 |
Jan 21 06:19:46 PM PST 24 |
2707163888 ps |
| T1344 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.3041313194 |
|
|
Jan 21 04:54:00 PM PST 24 |
Jan 21 04:57:47 PM PST 24 |
2527521168 ps |
| T821 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2828022512 |
|
|
Jan 21 05:14:55 PM PST 24 |
Jan 21 05:28:23 PM PST 24 |
5121267560 ps |
| T1345 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1411603184 |
|
|
Jan 21 04:21:06 PM PST 24 |
Jan 21 04:39:36 PM PST 24 |
5659009110 ps |
| T1346 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2851927273 |
|
|
Jan 21 04:27:39 PM PST 24 |
Jan 21 04:32:47 PM PST 24 |
3397296069 ps |
| T1347 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.1531507448 |
|
|
Jan 21 04:45:18 PM PST 24 |
Jan 21 04:49:56 PM PST 24 |
2942295770 ps |
| T1348 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.2526440099 |
|
|
Jan 21 05:52:51 PM PST 24 |
Jan 21 06:55:29 PM PST 24 |
11837240891 ps |
| T1349 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.53119479 |
|
|
Jan 21 05:02:13 PM PST 24 |
Jan 21 05:06:19 PM PST 24 |
3008846036 ps |
| T860 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.535235825 |
|
|
Jan 21 05:29:35 PM PST 24 |
Jan 21 05:38:25 PM PST 24 |
4203526358 ps |
| T1350 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2113748826 |
|
|
Jan 21 04:25:57 PM PST 24 |
Jan 21 04:37:34 PM PST 24 |
4540969120 ps |
| T1351 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.2711967129 |
|
|
Jan 21 05:01:51 PM PST 24 |
Jan 21 05:19:58 PM PST 24 |
5345210680 ps |
| T1352 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.4222277733 |
|
|
Jan 21 04:41:41 PM PST 24 |
Jan 21 04:52:58 PM PST 24 |
4967253570 ps |
| T1353 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.246903710 |
|
|
Jan 21 04:23:58 PM PST 24 |
Jan 21 04:27:39 PM PST 24 |
2923993575 ps |
| T1354 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.442430373 |
|
|
Jan 21 05:04:14 PM PST 24 |
Jan 21 05:14:29 PM PST 24 |
4163679460 ps |
| T160 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.2459221576 |
|
|
Jan 21 04:48:20 PM PST 24 |
Jan 21 04:52:39 PM PST 24 |
2825479129 ps |
| T325 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.1045080859 |
|
|
Jan 21 05:06:20 PM PST 24 |
Jan 21 05:18:59 PM PST 24 |
4868275200 ps |
| T1355 |
/workspace/coverage/default/2.chip_sw_aes_idle.3959541048 |
|
|
Jan 21 04:52:59 PM PST 24 |
Jan 21 04:57:31 PM PST 24 |
2993986420 ps |
| T1356 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.333245000 |
|
|
Jan 21 07:19:11 PM PST 24 |
Jan 21 07:25:20 PM PST 24 |
4582321936 ps |
| T1357 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1517449117 |
|
|
Jan 21 05:06:28 PM PST 24 |
Jan 21 05:13:33 PM PST 24 |
3714039200 ps |
| T1358 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1612238600 |
|
|
Jan 21 06:06:03 PM PST 24 |
Jan 21 06:17:32 PM PST 24 |
7248118045 ps |
| T281 |
/workspace/coverage/default/0.chip_sw_gpio.3960460119 |
|
|
Jan 21 04:18:54 PM PST 24 |
Jan 21 04:25:27 PM PST 24 |
3276662705 ps |
| T1359 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.3615684037 |
|
|
Jan 21 05:05:06 PM PST 24 |
Jan 21 05:22:27 PM PST 24 |
5579102396 ps |
| T1360 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.4211042337 |
|
|
Jan 21 04:46:42 PM PST 24 |
Jan 21 04:51:28 PM PST 24 |
3042329254 ps |
| T138 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.858994623 |
|
|
Jan 21 05:15:49 PM PST 24 |
Jan 21 05:25:35 PM PST 24 |
3744949381 ps |
| T765 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1626705108 |
|
|
Jan 21 05:20:09 PM PST 24 |
Jan 21 05:31:39 PM PST 24 |
4738832684 ps |
| T1361 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3839613443 |
|
|
Jan 21 05:28:38 PM PST 24 |
Jan 21 05:54:37 PM PST 24 |
11257333217 ps |
| T770 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3272662388 |
|
|
Jan 21 06:54:29 PM PST 24 |
Jan 21 07:07:50 PM PST 24 |
4724343498 ps |
| T1362 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg.4128671304 |
|
|
Jan 21 05:45:41 PM PST 24 |
Jan 21 05:51:54 PM PST 24 |
2797303980 ps |
| T863 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.3134276319 |
|
|
Jan 21 05:22:16 PM PST 24 |
Jan 21 05:35:03 PM PST 24 |
5134554226 ps |
| T1363 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.3963163008 |
|
|
Jan 21 04:19:34 PM PST 24 |
Jan 21 04:37:23 PM PST 24 |
5634709096 ps |
| T247 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.537640793 |
|
|
Jan 21 04:30:22 PM PST 24 |
Jan 21 04:51:08 PM PST 24 |
9454292474 ps |
| T1364 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.660170945 |
|
|
Jan 21 05:48:29 PM PST 24 |
Jan 21 05:59:17 PM PST 24 |
10794041668 ps |
| T1365 |
/workspace/coverage/default/4.chip_tap_straps_prod.3651739423 |
|
|
Jan 21 05:10:41 PM PST 24 |
Jan 21 05:36:05 PM PST 24 |
13087800785 ps |
| T421 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all_with_error.1578250800 |
|
|
Jan 21 07:04:09 PM PST 24 |
Jan 21 07:12:40 PM PST 24 |
10961056810 ps |
| T379 |
/workspace/coverage/cover_reg_top/28.xbar_stress_all_with_rand_reset.4095284596 |
|
|
Jan 21 07:18:22 PM PST 24 |
Jan 21 07:26:53 PM PST 24 |
4288058003 ps |
| T126 |
/workspace/coverage/cover_reg_top/6.chip_csr_rw.571599950 |
|
|
Jan 21 07:23:24 PM PST 24 |
Jan 21 07:30:03 PM PST 24 |
4017664584 ps |
| T869 |
/workspace/coverage/cover_reg_top/87.xbar_access_same_device_slow_rsp.3290241412 |
|
|
Jan 21 07:12:28 PM PST 24 |
Jan 21 07:19:53 PM PST 24 |
25369162939 ps |
| T723 |
/workspace/coverage/cover_reg_top/98.xbar_error_random.2130066368 |
|
|
Jan 21 07:26:32 PM PST 24 |
Jan 21 07:27:36 PM PST 24 |
1688113091 ps |
| T1366 |
/workspace/coverage/cover_reg_top/72.xbar_smoke_slow_rsp.4159431628 |
|
|
Jan 21 07:06:04 PM PST 24 |
Jan 21 07:07:54 PM PST 24 |
5995237758 ps |
| T743 |
/workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.1234645360 |
|
|
Jan 21 07:16:46 PM PST 24 |
Jan 21 07:55:25 PM PST 24 |
123778585721 ps |
| T443 |
/workspace/coverage/cover_reg_top/30.xbar_random.3067159363 |
|
|
Jan 21 06:48:22 PM PST 24 |
Jan 21 06:49:43 PM PST 24 |
2195066035 ps |
| T461 |
/workspace/coverage/cover_reg_top/37.xbar_random_zero_delays.1945689415 |
|
|
Jan 21 06:47:52 PM PST 24 |
Jan 21 06:48:31 PM PST 24 |
424728200 ps |
| T722 |
/workspace/coverage/cover_reg_top/12.xbar_stress_all_with_error.2878957443 |
|
|
Jan 21 07:22:02 PM PST 24 |
Jan 21 07:27:26 PM PST 24 |
8590059757 ps |
| T608 |
/workspace/coverage/cover_reg_top/36.xbar_smoke.4183195091 |
|
|
Jan 21 06:47:00 PM PST 24 |
Jan 21 06:47:14 PM PST 24 |
209022641 ps |
| T127 |
/workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.2653475521 |
|
|
Jan 21 06:26:48 PM PST 24 |
Jan 21 07:00:23 PM PST 24 |
14497042930 ps |
| T1367 |
/workspace/coverage/cover_reg_top/62.xbar_random_zero_delays.2171720274 |
|
|
Jan 21 07:46:10 PM PST 24 |
Jan 21 07:46:24 PM PST 24 |
39385167 ps |
| T470 |
/workspace/coverage/cover_reg_top/13.xbar_same_source.2226945642 |
|
|
Jan 21 07:15:29 PM PST 24 |
Jan 21 07:16:03 PM PST 24 |
882799121 ps |
| T870 |
/workspace/coverage/cover_reg_top/65.xbar_stress_all_with_reset_error.859499162 |
|
|
Jan 21 07:03:15 PM PST 24 |
Jan 21 07:11:50 PM PST 24 |
4400099663 ps |
| T904 |
/workspace/coverage/cover_reg_top/21.xbar_stress_all_with_reset_error.2108244948 |
|
|
Jan 21 06:37:21 PM PST 24 |
Jan 21 06:38:26 PM PST 24 |
234768137 ps |
| T911 |
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.372514759 |
|
|
Jan 21 07:14:17 PM PST 24 |
Jan 21 07:17:05 PM PST 24 |
324044959 ps |
| T566 |
/workspace/coverage/cover_reg_top/80.xbar_random_large_delays.2066370655 |
|
|
Jan 21 07:09:44 PM PST 24 |
Jan 21 07:16:05 PM PST 24 |
31817054352 ps |
| T430 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all.2693810643 |
|
|
Jan 21 06:14:52 PM PST 24 |
Jan 21 06:28:17 PM PST 24 |
18769056420 ps |
| T1368 |
/workspace/coverage/cover_reg_top/98.xbar_smoke.3580129803 |
|
|
Jan 21 07:16:53 PM PST 24 |
Jan 21 07:17:01 PM PST 24 |
46225417 ps |