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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.25 95.38 94.39 95.68 95.08 97.38 99.58


Total test records in report: 2839
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T2514 /workspace/coverage/cover_reg_top/32.xbar_stress_all_with_reset_error.602190030 Apr 16 03:56:46 PM PDT 24 Apr 16 04:00:28 PM PDT 24 952523473 ps
T2515 /workspace/coverage/cover_reg_top/1.xbar_stress_all_with_reset_error.487468025 Apr 16 03:48:01 PM PDT 24 Apr 16 03:56:56 PM PDT 24 4447745842 ps
T2516 /workspace/coverage/cover_reg_top/33.xbar_random_slow_rsp.1331188062 Apr 16 03:56:55 PM PDT 24 Apr 16 04:07:43 PM PDT 24 37026814385 ps
T2517 /workspace/coverage/cover_reg_top/90.xbar_access_same_device.2950671675 Apr 16 04:06:22 PM PDT 24 Apr 16 04:08:52 PM PDT 24 3520963303 ps
T2518 /workspace/coverage/cover_reg_top/29.xbar_smoke_large_delays.2887344119 Apr 16 03:56:10 PM PDT 24 Apr 16 03:56:58 PM PDT 24 4532390060 ps
T2519 /workspace/coverage/cover_reg_top/32.xbar_random.254529647 Apr 16 03:56:38 PM PDT 24 Apr 16 03:57:46 PM PDT 24 1879059034 ps
T2520 /workspace/coverage/cover_reg_top/30.xbar_smoke.2098350526 Apr 16 03:56:14 PM PDT 24 Apr 16 03:56:20 PM PDT 24 44015312 ps
T620 /workspace/coverage/cover_reg_top/50.xbar_stress_all_with_reset_error.3401627626 Apr 16 03:59:40 PM PDT 24 Apr 16 04:08:08 PM PDT 24 5872981338 ps
T2521 /workspace/coverage/cover_reg_top/62.xbar_smoke_slow_rsp.3540337382 Apr 16 04:01:38 PM PDT 24 Apr 16 04:03:03 PM PDT 24 5352145284 ps
T2522 /workspace/coverage/cover_reg_top/87.xbar_random_zero_delays.2031126303 Apr 16 04:05:59 PM PDT 24 Apr 16 04:06:08 PM PDT 24 72877362 ps
T2523 /workspace/coverage/cover_reg_top/58.xbar_smoke_zero_delays.3955274177 Apr 16 04:00:52 PM PDT 24 Apr 16 04:00:58 PM PDT 24 44906780 ps
T2524 /workspace/coverage/cover_reg_top/99.xbar_error_random.2351752004 Apr 16 04:07:55 PM PDT 24 Apr 16 04:08:31 PM PDT 24 381559794 ps
T2525 /workspace/coverage/cover_reg_top/68.xbar_random_large_delays.923330425 Apr 16 04:02:37 PM PDT 24 Apr 16 04:13:11 PM PDT 24 54708793265 ps
T2526 /workspace/coverage/cover_reg_top/10.xbar_error_random.1658947777 Apr 16 03:52:58 PM PDT 24 Apr 16 03:54:12 PM PDT 24 2367860468 ps
T2527 /workspace/coverage/cover_reg_top/88.xbar_random_large_delays.4058260378 Apr 16 04:06:10 PM PDT 24 Apr 16 04:23:30 PM PDT 24 91372469088 ps
T424 /workspace/coverage/cover_reg_top/17.chip_same_csr_outstanding.225190233 Apr 16 03:54:10 PM PDT 24 Apr 16 04:35:38 PM PDT 24 17281519249 ps
T2528 /workspace/coverage/cover_reg_top/72.xbar_stress_all_with_rand_reset.4098398649 Apr 16 04:03:30 PM PDT 24 Apr 16 04:06:16 PM PDT 24 288695763 ps
T2529 /workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.2149128346 Apr 16 03:46:21 PM PDT 24 Apr 16 03:50:50 PM PDT 24 6557712070 ps
T2530 /workspace/coverage/cover_reg_top/33.xbar_error_random.3807234650 Apr 16 03:56:53 PM PDT 24 Apr 16 03:57:36 PM PDT 24 566100859 ps
T2531 /workspace/coverage/cover_reg_top/70.xbar_unmapped_addr.965745756 Apr 16 04:03:02 PM PDT 24 Apr 16 04:03:24 PM PDT 24 463219510 ps
T2532 /workspace/coverage/cover_reg_top/33.xbar_random_large_delays.2320089704 Apr 16 03:56:51 PM PDT 24 Apr 16 03:57:35 PM PDT 24 4197142658 ps
T2533 /workspace/coverage/cover_reg_top/8.xbar_same_source.3506835610 Apr 16 03:51:51 PM PDT 24 Apr 16 03:52:30 PM PDT 24 1379475174 ps
T2534 /workspace/coverage/cover_reg_top/60.xbar_random_zero_delays.1438834299 Apr 16 04:01:15 PM PDT 24 Apr 16 04:02:02 PM PDT 24 504751224 ps
T2535 /workspace/coverage/cover_reg_top/47.xbar_stress_all_with_error.795058842 Apr 16 03:59:06 PM PDT 24 Apr 16 04:00:13 PM PDT 24 824137361 ps
T2536 /workspace/coverage/cover_reg_top/87.xbar_same_source.2493824691 Apr 16 04:05:56 PM PDT 24 Apr 16 04:06:20 PM PDT 24 705314916 ps
T2537 /workspace/coverage/cover_reg_top/71.xbar_stress_all_with_rand_reset.3045620702 Apr 16 04:03:18 PM PDT 24 Apr 16 04:03:31 PM PDT 24 47702626 ps
T2538 /workspace/coverage/cover_reg_top/45.xbar_random_large_delays.2258064131 Apr 16 03:58:44 PM PDT 24 Apr 16 04:06:15 PM PDT 24 41067221439 ps
T2539 /workspace/coverage/cover_reg_top/20.xbar_smoke_slow_rsp.4281424390 Apr 16 03:54:52 PM PDT 24 Apr 16 03:55:55 PM PDT 24 3545322198 ps
T2540 /workspace/coverage/cover_reg_top/3.chip_csr_bit_bash.3359483128 Apr 16 03:48:39 PM PDT 24 Apr 16 04:08:52 PM PDT 24 10778171923 ps
T2541 /workspace/coverage/cover_reg_top/54.xbar_random.2881408650 Apr 16 04:00:16 PM PDT 24 Apr 16 04:00:54 PM PDT 24 1020303504 ps
T2542 /workspace/coverage/cover_reg_top/3.xbar_stress_all_with_rand_reset.1517016667 Apr 16 03:49:14 PM PDT 24 Apr 16 03:55:59 PM PDT 24 3540403425 ps
T2543 /workspace/coverage/cover_reg_top/45.xbar_stress_all_with_reset_error.673936481 Apr 16 03:58:52 PM PDT 24 Apr 16 04:04:20 PM PDT 24 3484799740 ps
T2544 /workspace/coverage/cover_reg_top/87.xbar_random_slow_rsp.3105191960 Apr 16 04:05:57 PM PDT 24 Apr 16 04:24:59 PM PDT 24 59117433223 ps
T381 /workspace/coverage/cover_reg_top/3.chip_same_csr_outstanding.2898609950 Apr 16 03:48:41 PM PDT 24 Apr 16 04:16:55 PM PDT 24 17296497880 ps
T2545 /workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.2595891489 Apr 16 03:47:38 PM PDT 24 Apr 16 03:48:20 PM PDT 24 436571682 ps
T2546 /workspace/coverage/cover_reg_top/32.xbar_smoke_slow_rsp.3598470154 Apr 16 03:56:40 PM PDT 24 Apr 16 03:58:02 PM PDT 24 4927012527 ps
T2547 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_error.1032626049 Apr 16 04:06:15 PM PDT 24 Apr 16 04:07:00 PM PDT 24 540003036 ps
T2548 /workspace/coverage/cover_reg_top/75.xbar_random_large_delays.1194939379 Apr 16 04:03:55 PM PDT 24 Apr 16 04:23:06 PM PDT 24 98780289739 ps
T2549 /workspace/coverage/cover_reg_top/69.xbar_smoke_slow_rsp.2839732452 Apr 16 04:02:47 PM PDT 24 Apr 16 04:04:02 PM PDT 24 4303748626 ps
T2550 /workspace/coverage/cover_reg_top/33.xbar_error_and_unmapped_addr.3706933319 Apr 16 03:56:52 PM PDT 24 Apr 16 03:57:24 PM PDT 24 274585857 ps
T2551 /workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.206458636 Apr 16 03:57:39 PM PDT 24 Apr 16 04:09:05 PM PDT 24 38707621051 ps
T2552 /workspace/coverage/cover_reg_top/20.xbar_access_same_device_slow_rsp.2780273466 Apr 16 03:54:51 PM PDT 24 Apr 16 03:58:05 PM PDT 24 12076278822 ps
T2553 /workspace/coverage/cover_reg_top/53.xbar_smoke.1043353981 Apr 16 03:59:59 PM PDT 24 Apr 16 04:00:09 PM PDT 24 205163779 ps
T2554 /workspace/coverage/cover_reg_top/27.xbar_unmapped_addr.514171330 Apr 16 03:55:56 PM PDT 24 Apr 16 03:56:27 PM PDT 24 645469532 ps
T2555 /workspace/coverage/cover_reg_top/56.xbar_same_source.2845293575 Apr 16 04:00:34 PM PDT 24 Apr 16 04:00:46 PM PDT 24 109735290 ps
T2556 /workspace/coverage/cover_reg_top/65.xbar_smoke_slow_rsp.827173679 Apr 16 04:02:05 PM PDT 24 Apr 16 04:03:05 PM PDT 24 3466900955 ps
T2557 /workspace/coverage/cover_reg_top/48.xbar_error_and_unmapped_addr.2305345869 Apr 16 03:59:22 PM PDT 24 Apr 16 03:59:41 PM PDT 24 379514595 ps
T2558 /workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.1040175664 Apr 16 04:07:17 PM PDT 24 Apr 16 04:09:01 PM PDT 24 5972643836 ps
T2559 /workspace/coverage/cover_reg_top/43.xbar_random_large_delays.1694611108 Apr 16 03:58:31 PM PDT 24 Apr 16 03:59:19 PM PDT 24 5015859536 ps
T2560 /workspace/coverage/cover_reg_top/20.xbar_stress_all_with_error.2252496527 Apr 16 03:54:53 PM PDT 24 Apr 16 04:00:20 PM PDT 24 3555722821 ps
T2561 /workspace/coverage/cover_reg_top/92.xbar_error_and_unmapped_addr.2060189262 Apr 16 04:06:51 PM PDT 24 Apr 16 04:07:35 PM PDT 24 994717587 ps
T2562 /workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.2762494828 Apr 16 04:06:46 PM PDT 24 Apr 16 04:07:15 PM PDT 24 270360389 ps
T2563 /workspace/coverage/cover_reg_top/25.xbar_access_same_device.2509785384 Apr 16 03:55:30 PM PDT 24 Apr 16 03:56:25 PM PDT 24 490885654 ps
T2564 /workspace/coverage/cover_reg_top/13.xbar_random_large_delays.3248932367 Apr 16 03:53:29 PM PDT 24 Apr 16 04:02:07 PM PDT 24 46610629326 ps
T2565 /workspace/coverage/cover_reg_top/18.chip_same_csr_outstanding.912439282 Apr 16 03:54:27 PM PDT 24 Apr 16 04:24:02 PM PDT 24 15120945409 ps
T2566 /workspace/coverage/cover_reg_top/97.xbar_random_large_delays.647658872 Apr 16 04:07:35 PM PDT 24 Apr 16 04:18:19 PM PDT 24 54990810052 ps
T2567 /workspace/coverage/cover_reg_top/74.xbar_stress_all_with_error.1283515446 Apr 16 04:03:52 PM PDT 24 Apr 16 04:07:52 PM PDT 24 3281427757 ps
T2568 /workspace/coverage/cover_reg_top/82.xbar_random_slow_rsp.2455280305 Apr 16 04:05:07 PM PDT 24 Apr 16 04:20:37 PM PDT 24 60765514220 ps
T2569 /workspace/coverage/cover_reg_top/64.xbar_stress_all.820216371 Apr 16 04:01:59 PM PDT 24 Apr 16 04:14:22 PM PDT 24 17947744182 ps
T2570 /workspace/coverage/cover_reg_top/52.xbar_random_zero_delays.892156150 Apr 16 03:59:52 PM PDT 24 Apr 16 04:00:36 PM PDT 24 499979100 ps
T2571 /workspace/coverage/cover_reg_top/66.xbar_access_same_device.966653270 Apr 16 04:02:20 PM PDT 24 Apr 16 04:02:53 PM PDT 24 363842136 ps
T2572 /workspace/coverage/cover_reg_top/81.xbar_random_zero_delays.2869467174 Apr 16 04:04:53 PM PDT 24 Apr 16 04:05:00 PM PDT 24 35720580 ps
T2573 /workspace/coverage/cover_reg_top/8.xbar_error_and_unmapped_addr.442971897 Apr 16 03:52:04 PM PDT 24 Apr 16 03:52:09 PM PDT 24 54645505 ps
T2574 /workspace/coverage/cover_reg_top/23.xbar_random_slow_rsp.90363626 Apr 16 03:55:11 PM PDT 24 Apr 16 04:01:04 PM PDT 24 19917888638 ps
T2575 /workspace/coverage/cover_reg_top/38.xbar_stress_all.1666854388 Apr 16 03:57:45 PM PDT 24 Apr 16 04:01:45 PM PDT 24 7104444574 ps
T2576 /workspace/coverage/cover_reg_top/9.xbar_smoke.1002588049 Apr 16 03:52:20 PM PDT 24 Apr 16 03:52:31 PM PDT 24 211053814 ps
T2577 /workspace/coverage/cover_reg_top/19.xbar_unmapped_addr.641229559 Apr 16 03:54:40 PM PDT 24 Apr 16 03:55:20 PM PDT 24 826532227 ps
T2578 /workspace/coverage/cover_reg_top/19.xbar_smoke_large_delays.3756980766 Apr 16 03:54:41 PM PDT 24 Apr 16 03:56:10 PM PDT 24 8879023138 ps
T2579 /workspace/coverage/cover_reg_top/22.xbar_access_same_device_slow_rsp.493429307 Apr 16 03:55:05 PM PDT 24 Apr 16 04:16:29 PM PDT 24 71812612803 ps
T680 /workspace/coverage/cover_reg_top/80.xbar_stress_all_with_error.1921663938 Apr 16 04:04:52 PM PDT 24 Apr 16 04:10:31 PM PDT 24 9336402227 ps
T2580 /workspace/coverage/cover_reg_top/64.xbar_access_same_device.1630364875 Apr 16 04:01:57 PM PDT 24 Apr 16 04:02:48 PM PDT 24 1330085591 ps
T2581 /workspace/coverage/cover_reg_top/37.xbar_access_same_device.688125479 Apr 16 03:57:25 PM PDT 24 Apr 16 03:58:17 PM PDT 24 1048847933 ps
T2582 /workspace/coverage/cover_reg_top/47.xbar_smoke_slow_rsp.2504043009 Apr 16 03:59:02 PM PDT 24 Apr 16 04:00:32 PM PDT 24 5825139952 ps
T2583 /workspace/coverage/cover_reg_top/0.xbar_smoke_large_delays.167669631 Apr 16 03:46:26 PM PDT 24 Apr 16 03:47:49 PM PDT 24 8366047954 ps
T2584 /workspace/coverage/cover_reg_top/8.xbar_access_same_device_slow_rsp.2411240439 Apr 16 03:51:51 PM PDT 24 Apr 16 04:09:05 PM PDT 24 61126235887 ps
T2585 /workspace/coverage/cover_reg_top/12.chip_csr_rw.1321294208 Apr 16 03:53:29 PM PDT 24 Apr 16 03:57:54 PM PDT 24 3829421205 ps
T2586 /workspace/coverage/cover_reg_top/31.xbar_smoke_zero_delays.1391366365 Apr 16 03:56:25 PM PDT 24 Apr 16 03:56:32 PM PDT 24 56975330 ps
T2587 /workspace/coverage/cover_reg_top/40.xbar_error_and_unmapped_addr.1139514635 Apr 16 03:58:09 PM PDT 24 Apr 16 03:58:37 PM PDT 24 613412814 ps
T2588 /workspace/coverage/cover_reg_top/22.xbar_error_random.12683507 Apr 16 03:55:11 PM PDT 24 Apr 16 03:55:50 PM PDT 24 481851405 ps
T2589 /workspace/coverage/cover_reg_top/84.xbar_random_slow_rsp.1983651103 Apr 16 04:05:33 PM PDT 24 Apr 16 04:23:37 PM PDT 24 52769583105 ps
T2590 /workspace/coverage/cover_reg_top/83.xbar_error_random.431075652 Apr 16 04:05:20 PM PDT 24 Apr 16 04:05:33 PM PDT 24 277257346 ps
T2591 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.1505795558 Apr 16 03:56:24 PM PDT 24 Apr 16 03:57:46 PM PDT 24 162036454 ps
T2592 /workspace/coverage/cover_reg_top/15.xbar_smoke_large_delays.3549808118 Apr 16 03:53:54 PM PDT 24 Apr 16 03:55:26 PM PDT 24 8695007194 ps
T2593 /workspace/coverage/cover_reg_top/5.xbar_unmapped_addr.3371991174 Apr 16 03:50:21 PM PDT 24 Apr 16 03:50:29 PM PDT 24 90651292 ps
T2594 /workspace/coverage/cover_reg_top/31.xbar_smoke_large_delays.663095796 Apr 16 03:56:26 PM PDT 24 Apr 16 03:57:42 PM PDT 24 7307902315 ps
T2595 /workspace/coverage/cover_reg_top/66.xbar_smoke_slow_rsp.948679919 Apr 16 04:02:19 PM PDT 24 Apr 16 04:03:51 PM PDT 24 5547298171 ps
T2596 /workspace/coverage/cover_reg_top/34.xbar_error_random.3077790986 Apr 16 03:57:02 PM PDT 24 Apr 16 03:57:39 PM PDT 24 392827081 ps
T2597 /workspace/coverage/cover_reg_top/67.xbar_same_source.1294223692 Apr 16 04:02:28 PM PDT 24 Apr 16 04:03:28 PM PDT 24 1930568614 ps
T2598 /workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.4007313151 Apr 16 04:07:14 PM PDT 24 Apr 16 04:08:45 PM PDT 24 5496596368 ps
T2599 /workspace/coverage/cover_reg_top/69.xbar_random_slow_rsp.3917222380 Apr 16 04:02:51 PM PDT 24 Apr 16 04:21:39 PM PDT 24 59613612033 ps
T2600 /workspace/coverage/cover_reg_top/56.xbar_smoke_zero_delays.1631514321 Apr 16 04:00:30 PM PDT 24 Apr 16 04:00:38 PM PDT 24 49453024 ps
T2601 /workspace/coverage/cover_reg_top/16.xbar_random.4287026128 Apr 16 03:54:03 PM PDT 24 Apr 16 03:54:34 PM PDT 24 333791156 ps
T2602 /workspace/coverage/cover_reg_top/98.xbar_random_zero_delays.998357237 Apr 16 04:07:47 PM PDT 24 Apr 16 04:08:04 PM PDT 24 160372175 ps
T2603 /workspace/coverage/cover_reg_top/4.xbar_error_random.1993379694 Apr 16 03:49:49 PM PDT 24 Apr 16 03:50:33 PM PDT 24 558282670 ps
T2604 /workspace/coverage/cover_reg_top/94.xbar_access_same_device_slow_rsp.3223486541 Apr 16 04:07:08 PM PDT 24 Apr 16 04:25:37 PM PDT 24 59822378164 ps
T2605 /workspace/coverage/cover_reg_top/1.xbar_error_random.179995499 Apr 16 03:47:52 PM PDT 24 Apr 16 03:49:02 PM PDT 24 2025946483 ps
T2606 /workspace/coverage/cover_reg_top/36.xbar_access_same_device_slow_rsp.571466315 Apr 16 03:57:18 PM PDT 24 Apr 16 04:22:53 PM PDT 24 82503948315 ps
T2607 /workspace/coverage/cover_reg_top/4.chip_csr_bit_bash.3268587512 Apr 16 03:49:28 PM PDT 24 Apr 16 04:07:01 PM PDT 24 10913819786 ps
T2608 /workspace/coverage/cover_reg_top/35.xbar_error_random.1153708250 Apr 16 03:57:12 PM PDT 24 Apr 16 03:57:50 PM PDT 24 446708466 ps
T2609 /workspace/coverage/cover_reg_top/71.xbar_stress_all.2954057775 Apr 16 04:03:17 PM PDT 24 Apr 16 04:05:40 PM PDT 24 4065256256 ps
T2610 /workspace/coverage/cover_reg_top/37.xbar_random_zero_delays.1427342487 Apr 16 03:57:26 PM PDT 24 Apr 16 03:57:33 PM PDT 24 30484447 ps
T2611 /workspace/coverage/cover_reg_top/91.xbar_stress_all.3270816637 Apr 16 04:06:44 PM PDT 24 Apr 16 04:12:41 PM PDT 24 4525050624 ps
T2612 /workspace/coverage/cover_reg_top/55.xbar_access_same_device_slow_rsp.2961838621 Apr 16 04:00:30 PM PDT 24 Apr 16 04:35:54 PM PDT 24 117292728074 ps
T2613 /workspace/coverage/cover_reg_top/2.xbar_smoke_slow_rsp.2972084490 Apr 16 03:48:20 PM PDT 24 Apr 16 03:50:00 PM PDT 24 6204862459 ps
T2614 /workspace/coverage/cover_reg_top/30.xbar_unmapped_addr.833717671 Apr 16 03:56:23 PM PDT 24 Apr 16 03:56:50 PM PDT 24 516366559 ps
T2615 /workspace/coverage/cover_reg_top/45.xbar_stress_all_with_rand_reset.2333150064 Apr 16 03:58:52 PM PDT 24 Apr 16 03:59:52 PM PDT 24 219149579 ps
T2616 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.2048421801 Apr 16 03:59:49 PM PDT 24 Apr 16 03:59:57 PM PDT 24 7675539 ps
T2617 /workspace/coverage/cover_reg_top/31.xbar_error_random.2466466508 Apr 16 03:56:35 PM PDT 24 Apr 16 03:57:26 PM PDT 24 1554486509 ps
T2618 /workspace/coverage/cover_reg_top/0.chip_csr_aliasing.137525715 Apr 16 03:46:17 PM PDT 24 Apr 16 05:11:53 PM PDT 24 28428842376 ps
T2619 /workspace/coverage/cover_reg_top/50.xbar_error_random.82155473 Apr 16 03:59:44 PM PDT 24 Apr 16 03:59:52 PM PDT 24 70176868 ps
T2620 /workspace/coverage/cover_reg_top/41.xbar_error_random.1605226845 Apr 16 03:58:09 PM PDT 24 Apr 16 03:58:35 PM PDT 24 306772012 ps
T2621 /workspace/coverage/cover_reg_top/9.xbar_error_and_unmapped_addr.1930668420 Apr 16 03:52:30 PM PDT 24 Apr 16 03:53:04 PM PDT 24 304881271 ps
T2622 /workspace/coverage/cover_reg_top/43.xbar_stress_all_with_error.72546254 Apr 16 03:58:35 PM PDT 24 Apr 16 04:02:34 PM PDT 24 2860187287 ps
T2623 /workspace/coverage/cover_reg_top/20.xbar_stress_all.2303290358 Apr 16 03:54:48 PM PDT 24 Apr 16 03:56:21 PM PDT 24 1021668881 ps
T2624 /workspace/coverage/cover_reg_top/24.chip_tl_errors.1651190753 Apr 16 03:55:15 PM PDT 24 Apr 16 03:57:46 PM PDT 24 3056504600 ps
T2625 /workspace/coverage/cover_reg_top/34.xbar_random_slow_rsp.2173411555 Apr 16 03:57:02 PM PDT 24 Apr 16 04:00:03 PM PDT 24 9926577782 ps
T425 /workspace/coverage/cover_reg_top/6.chip_same_csr_outstanding.3025569511 Apr 16 03:50:32 PM PDT 24 Apr 16 04:56:56 PM PDT 24 31845568245 ps
T2626 /workspace/coverage/cover_reg_top/60.xbar_smoke.4054626413 Apr 16 04:01:16 PM PDT 24 Apr 16 04:01:23 PM PDT 24 142428099 ps
T2627 /workspace/coverage/cover_reg_top/1.xbar_access_same_device.2870118773 Apr 16 03:47:48 PM PDT 24 Apr 16 03:48:57 PM PDT 24 754182121 ps
T2628 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_rand_reset.2163149496 Apr 16 04:06:11 PM PDT 24 Apr 16 04:06:41 PM PDT 24 281377039 ps
T2629 /workspace/coverage/cover_reg_top/35.xbar_error_and_unmapped_addr.3199892980 Apr 16 03:57:14 PM PDT 24 Apr 16 03:57:23 PM PDT 24 156494100 ps
T2630 /workspace/coverage/cover_reg_top/20.xbar_access_same_device.1796613156 Apr 16 03:54:49 PM PDT 24 Apr 16 03:55:28 PM PDT 24 856843120 ps
T2631 /workspace/coverage/cover_reg_top/14.xbar_access_same_device.3923935164 Apr 16 03:53:57 PM PDT 24 Apr 16 03:54:58 PM PDT 24 866541895 ps
T2632 /workspace/coverage/cover_reg_top/51.xbar_smoke.4185556837 Apr 16 03:59:44 PM PDT 24 Apr 16 03:59:54 PM PDT 24 191418418 ps
T2633 /workspace/coverage/cover_reg_top/6.xbar_error_and_unmapped_addr.1878478897 Apr 16 03:50:55 PM PDT 24 Apr 16 03:51:45 PM PDT 24 1217585119 ps
T2634 /workspace/coverage/cover_reg_top/85.xbar_smoke.1801353079 Apr 16 04:05:36 PM PDT 24 Apr 16 04:05:45 PM PDT 24 191086271 ps
T2635 /workspace/coverage/cover_reg_top/9.xbar_error_random.1610656641 Apr 16 03:52:28 PM PDT 24 Apr 16 03:52:40 PM PDT 24 121184856 ps
T2636 /workspace/coverage/cover_reg_top/98.xbar_error_random.3824042882 Apr 16 04:07:47 PM PDT 24 Apr 16 04:08:05 PM PDT 24 380610603 ps
T2637 /workspace/coverage/cover_reg_top/24.xbar_random.4089193086 Apr 16 03:55:22 PM PDT 24 Apr 16 03:55:48 PM PDT 24 590699023 ps
T2638 /workspace/coverage/cover_reg_top/46.xbar_random_large_delays.3595487736 Apr 16 03:58:51 PM PDT 24 Apr 16 04:16:05 PM PDT 24 90327669040 ps
T2639 /workspace/coverage/cover_reg_top/42.xbar_random.2791809632 Apr 16 03:58:19 PM PDT 24 Apr 16 03:58:35 PM PDT 24 171533718 ps
T2640 /workspace/coverage/cover_reg_top/25.xbar_stress_all.2808217234 Apr 16 03:55:30 PM PDT 24 Apr 16 03:58:54 PM PDT 24 2400316977 ps
T2641 /workspace/coverage/cover_reg_top/70.xbar_error_random.1306441401 Apr 16 04:03:05 PM PDT 24 Apr 16 04:03:22 PM PDT 24 170655487 ps
T2642 /workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.920808152 Apr 16 04:06:31 PM PDT 24 Apr 16 04:06:38 PM PDT 24 52026383 ps
T2643 /workspace/coverage/cover_reg_top/83.xbar_access_same_device_slow_rsp.2645871895 Apr 16 04:05:17 PM PDT 24 Apr 16 04:19:58 PM PDT 24 45749930970 ps
T2644 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_reset_error.447357284 Apr 16 03:53:39 PM PDT 24 Apr 16 03:57:47 PM PDT 24 838357767 ps
T2645 /workspace/coverage/cover_reg_top/75.xbar_stress_all_with_rand_reset.664458610 Apr 16 04:04:04 PM PDT 24 Apr 16 04:09:28 PM PDT 24 9042835552 ps
T2646 /workspace/coverage/cover_reg_top/36.xbar_error_and_unmapped_addr.2383549805 Apr 16 03:57:22 PM PDT 24 Apr 16 03:57:59 PM PDT 24 761105285 ps
T2647 /workspace/coverage/cover_reg_top/93.xbar_random_zero_delays.4113955331 Apr 16 04:06:55 PM PDT 24 Apr 16 04:07:11 PM PDT 24 133817275 ps
T2648 /workspace/coverage/cover_reg_top/18.xbar_random.3007211652 Apr 16 03:54:27 PM PDT 24 Apr 16 03:55:09 PM PDT 24 498229877 ps
T454 /workspace/coverage/cover_reg_top/35.xbar_stress_all.2169835427 Apr 16 03:57:15 PM PDT 24 Apr 16 04:04:39 PM PDT 24 10785044713 ps
T2649 /workspace/coverage/cover_reg_top/63.xbar_stress_all_with_reset_error.2958764191 Apr 16 04:01:57 PM PDT 24 Apr 16 04:04:19 PM PDT 24 560541507 ps
T2650 /workspace/coverage/cover_reg_top/75.xbar_error_and_unmapped_addr.2061512548 Apr 16 04:04:02 PM PDT 24 Apr 16 04:04:42 PM PDT 24 1096746976 ps
T2651 /workspace/coverage/cover_reg_top/31.xbar_unmapped_addr.586041341 Apr 16 03:56:36 PM PDT 24 Apr 16 03:57:20 PM PDT 24 922684446 ps
T2652 /workspace/coverage/cover_reg_top/24.xbar_random_large_delays.2048435437 Apr 16 03:55:22 PM PDT 24 Apr 16 04:15:09 PM PDT 24 105493418011 ps
T2653 /workspace/coverage/cover_reg_top/74.xbar_access_same_device.3407882981 Apr 16 04:03:44 PM PDT 24 Apr 16 04:04:46 PM PDT 24 840244282 ps
T2654 /workspace/coverage/cover_reg_top/88.xbar_error_and_unmapped_addr.336211901 Apr 16 04:06:12 PM PDT 24 Apr 16 04:06:44 PM PDT 24 294928824 ps
T2655 /workspace/coverage/cover_reg_top/65.xbar_access_same_device_slow_rsp.1219962230 Apr 16 04:02:10 PM PDT 24 Apr 16 04:08:01 PM PDT 24 20292729052 ps
T2656 /workspace/coverage/cover_reg_top/86.xbar_stress_all_with_reset_error.2863233745 Apr 16 04:05:53 PM PDT 24 Apr 16 04:06:56 PM PDT 24 171885852 ps
T2657 /workspace/coverage/cover_reg_top/73.xbar_error_random.3447893383 Apr 16 04:03:32 PM PDT 24 Apr 16 04:04:32 PM PDT 24 1662442009 ps
T2658 /workspace/coverage/cover_reg_top/8.xbar_stress_all_with_rand_reset.2920530696 Apr 16 03:52:05 PM PDT 24 Apr 16 03:56:03 PM PDT 24 1566413158 ps
T2659 /workspace/coverage/cover_reg_top/15.chip_csr_rw.957081411 Apr 16 03:53:58 PM PDT 24 Apr 16 03:59:27 PM PDT 24 4047948073 ps
T2660 /workspace/coverage/cover_reg_top/2.chip_same_csr_outstanding.1456938295 Apr 16 03:48:05 PM PDT 24 Apr 16 05:00:59 PM PDT 24 31204186355 ps
T2661 /workspace/coverage/cover_reg_top/7.xbar_error_random.2420190445 Apr 16 03:51:16 PM PDT 24 Apr 16 03:52:03 PM PDT 24 1165392191 ps
T2662 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_rand_reset.4234425440 Apr 16 03:55:40 PM PDT 24 Apr 16 03:57:44 PM PDT 24 1939597995 ps
T2663 /workspace/coverage/cover_reg_top/26.xbar_unmapped_addr.2631313400 Apr 16 03:55:38 PM PDT 24 Apr 16 03:55:57 PM PDT 24 391939431 ps
T2664 /workspace/coverage/cover_reg_top/7.xbar_stress_all.1751442812 Apr 16 03:51:17 PM PDT 24 Apr 16 03:51:59 PM PDT 24 549875097 ps
T2665 /workspace/coverage/cover_reg_top/29.chip_tl_errors.2311987633 Apr 16 03:56:09 PM PDT 24 Apr 16 03:59:59 PM PDT 24 2888034664 ps
T2666 /workspace/coverage/cover_reg_top/57.xbar_stress_all_with_rand_reset.2978424604 Apr 16 04:00:47 PM PDT 24 Apr 16 04:10:01 PM PDT 24 10626114957 ps
T2667 /workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.1492028545 Apr 16 03:51:42 PM PDT 24 Apr 16 03:52:16 PM PDT 24 385076187 ps
T2668 /workspace/coverage/cover_reg_top/32.xbar_stress_all.1273430655 Apr 16 03:56:40 PM PDT 24 Apr 16 03:59:12 PM PDT 24 1892125492 ps
T2669 /workspace/coverage/cover_reg_top/68.xbar_stress_all_with_reset_error.1891645168 Apr 16 04:02:41 PM PDT 24 Apr 16 04:04:36 PM PDT 24 450428305 ps
T2670 /workspace/coverage/cover_reg_top/79.xbar_error_and_unmapped_addr.2338912128 Apr 16 04:04:41 PM PDT 24 Apr 16 04:05:24 PM PDT 24 1083734813 ps
T2671 /workspace/coverage/cover_reg_top/26.xbar_random_slow_rsp.736644279 Apr 16 03:55:35 PM PDT 24 Apr 16 04:03:43 PM PDT 24 28275030085 ps
T2672 /workspace/coverage/cover_reg_top/59.xbar_random.1930988734 Apr 16 04:01:04 PM PDT 24 Apr 16 04:02:13 PM PDT 24 1826878792 ps
T2673 /workspace/coverage/cover_reg_top/73.xbar_unmapped_addr.3470072400 Apr 16 04:03:33 PM PDT 24 Apr 16 04:03:54 PM PDT 24 145171961 ps
T2674 /workspace/coverage/cover_reg_top/76.xbar_random_zero_delays.2804433431 Apr 16 04:04:05 PM PDT 24 Apr 16 04:04:58 PM PDT 24 579878030 ps
T2675 /workspace/coverage/cover_reg_top/91.xbar_access_same_device.3805311055 Apr 16 04:06:37 PM PDT 24 Apr 16 04:08:04 PM PDT 24 1011499905 ps
T2676 /workspace/coverage/cover_reg_top/39.xbar_random_large_delays.3043843566 Apr 16 03:57:48 PM PDT 24 Apr 16 04:03:04 PM PDT 24 26784588041 ps
T2677 /workspace/coverage/cover_reg_top/38.xbar_unmapped_addr.2213150153 Apr 16 03:57:38 PM PDT 24 Apr 16 03:58:02 PM PDT 24 436352129 ps
T2678 /workspace/coverage/cover_reg_top/17.xbar_smoke_zero_delays.2144156013 Apr 16 03:54:15 PM PDT 24 Apr 16 03:54:23 PM PDT 24 48757956 ps
T2679 /workspace/coverage/cover_reg_top/24.xbar_access_same_device.4087695161 Apr 16 03:55:22 PM PDT 24 Apr 16 03:55:38 PM PDT 24 134171855 ps
T2680 /workspace/coverage/cover_reg_top/64.xbar_smoke.1476415857 Apr 16 04:02:00 PM PDT 24 Apr 16 04:02:10 PM PDT 24 204937985 ps
T2681 /workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.2936157198 Apr 16 03:47:29 PM PDT 24 Apr 16 05:02:24 PM PDT 24 28774018546 ps
T2682 /workspace/coverage/cover_reg_top/67.xbar_smoke.1175651354 Apr 16 04:02:22 PM PDT 24 Apr 16 04:02:29 PM PDT 24 49459742 ps
T2683 /workspace/coverage/cover_reg_top/51.xbar_error_and_unmapped_addr.2825616298 Apr 16 03:59:50 PM PDT 24 Apr 16 04:00:17 PM PDT 24 615689920 ps
T2684 /workspace/coverage/cover_reg_top/91.xbar_error_random.507335431 Apr 16 04:06:47 PM PDT 24 Apr 16 04:07:55 PM PDT 24 1998286608 ps
T2685 /workspace/coverage/cover_reg_top/13.xbar_smoke.4054689743 Apr 16 03:53:25 PM PDT 24 Apr 16 03:53:32 PM PDT 24 43363412 ps
T2686 /workspace/coverage/cover_reg_top/52.xbar_smoke_slow_rsp.3687046801 Apr 16 03:59:58 PM PDT 24 Apr 16 04:01:13 PM PDT 24 4442308857 ps
T2687 /workspace/coverage/cover_reg_top/1.xbar_random_large_delays.3295078049 Apr 16 03:47:37 PM PDT 24 Apr 16 04:07:30 PM PDT 24 109706190262 ps
T2688 /workspace/coverage/cover_reg_top/78.xbar_random.389011197 Apr 16 04:04:26 PM PDT 24 Apr 16 04:05:53 PM PDT 24 2127805514 ps
T2689 /workspace/coverage/cover_reg_top/46.xbar_access_same_device_slow_rsp.3134893695 Apr 16 03:58:57 PM PDT 24 Apr 16 04:38:42 PM PDT 24 124787011832 ps
T2690 /workspace/coverage/cover_reg_top/65.xbar_smoke.2253214009 Apr 16 04:02:06 PM PDT 24 Apr 16 04:02:15 PM PDT 24 205821483 ps
T2691 /workspace/coverage/cover_reg_top/24.xbar_same_source.197771599 Apr 16 03:55:21 PM PDT 24 Apr 16 03:56:39 PM PDT 24 2556061579 ps
T2692 /workspace/coverage/cover_reg_top/10.xbar_access_same_device.1591659630 Apr 16 03:52:55 PM PDT 24 Apr 16 03:54:46 PM PDT 24 2428363764 ps
T2693 /workspace/coverage/cover_reg_top/14.xbar_access_same_device_slow_rsp.10618348 Apr 16 03:53:45 PM PDT 24 Apr 16 04:22:08 PM PDT 24 92211153271 ps
T2694 /workspace/coverage/cover_reg_top/37.xbar_error_random.2249450899 Apr 16 03:57:30 PM PDT 24 Apr 16 03:58:48 PM PDT 24 1979117856 ps
T2695 /workspace/coverage/cover_reg_top/19.xbar_access_same_device.1305301766 Apr 16 03:54:41 PM PDT 24 Apr 16 03:56:03 PM PDT 24 1917305871 ps
T2696 /workspace/coverage/cover_reg_top/28.xbar_smoke_slow_rsp.2551391390 Apr 16 03:55:56 PM PDT 24 Apr 16 03:57:36 PM PDT 24 5654135901 ps
T2697 /workspace/coverage/cover_reg_top/62.xbar_random.2559974850 Apr 16 04:01:37 PM PDT 24 Apr 16 04:01:56 PM PDT 24 443392230 ps
T2698 /workspace/coverage/cover_reg_top/77.xbar_error_random.537142579 Apr 16 04:04:22 PM PDT 24 Apr 16 04:04:58 PM PDT 24 387718674 ps
T421 /workspace/coverage/cover_reg_top/14.chip_same_csr_outstanding.2064633028 Apr 16 03:53:42 PM PDT 24 Apr 16 05:09:36 PM PDT 24 32590001116 ps
T2699 /workspace/coverage/cover_reg_top/48.xbar_random_zero_delays.3623074948 Apr 16 03:59:28 PM PDT 24 Apr 16 03:59:47 PM PDT 24 225144735 ps
T2700 /workspace/coverage/cover_reg_top/9.xbar_unmapped_addr.2363510695 Apr 16 03:52:30 PM PDT 24 Apr 16 03:53:00 PM PDT 24 261977281 ps
T2701 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_reset_error.1928367682 Apr 16 04:03:38 PM PDT 24 Apr 16 04:04:07 PM PDT 24 40623421 ps
T2702 /workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.2763254165 Apr 16 04:07:58 PM PDT 24 Apr 16 04:52:54 PM PDT 24 137115341690 ps
T2703 /workspace/coverage/cover_reg_top/6.xbar_smoke.3098025337 Apr 16 03:50:36 PM PDT 24 Apr 16 03:50:46 PM PDT 24 247093171 ps
T2704 /workspace/coverage/cover_reg_top/43.xbar_random_slow_rsp.252117699 Apr 16 03:58:30 PM PDT 24 Apr 16 04:01:17 PM PDT 24 9712797733 ps
T2705 /workspace/coverage/cover_reg_top/55.xbar_error_random.2327403627 Apr 16 04:00:25 PM PDT 24 Apr 16 04:01:05 PM PDT 24 1058595153 ps
T2706 /workspace/coverage/cover_reg_top/8.xbar_stress_all_with_error.818665426 Apr 16 03:52:07 PM PDT 24 Apr 16 03:52:34 PM PDT 24 377596825 ps
T2707 /workspace/coverage/cover_reg_top/13.xbar_random.314636715 Apr 16 03:53:28 PM PDT 24 Apr 16 03:54:54 PM PDT 24 2113231348 ps
T2708 /workspace/coverage/cover_reg_top/78.xbar_smoke.2333494202 Apr 16 04:04:21 PM PDT 24 Apr 16 04:04:32 PM PDT 24 225839829 ps
T2709 /workspace/coverage/cover_reg_top/82.xbar_random_large_delays.2573753541 Apr 16 04:05:07 PM PDT 24 Apr 16 04:26:08 PM PDT 24 106683970674 ps
T2710 /workspace/coverage/cover_reg_top/11.xbar_stress_all.97402753 Apr 16 03:53:13 PM PDT 24 Apr 16 03:55:10 PM PDT 24 1434502952 ps
T2711 /workspace/coverage/cover_reg_top/93.xbar_stress_all_with_reset_error.1155363426 Apr 16 04:07:00 PM PDT 24 Apr 16 04:16:41 PM PDT 24 4840092065 ps
T2712 /workspace/coverage/cover_reg_top/18.xbar_access_same_device.2388309378 Apr 16 03:54:30 PM PDT 24 Apr 16 03:54:52 PM PDT 24 602773768 ps
T2713 /workspace/coverage/cover_reg_top/22.xbar_stress_all_with_rand_reset.3178341895 Apr 16 03:55:08 PM PDT 24 Apr 16 04:02:12 PM PDT 24 2631712363 ps
T2714 /workspace/coverage/cover_reg_top/12.xbar_same_source.3235272360 Apr 16 03:53:24 PM PDT 24 Apr 16 03:54:03 PM PDT 24 573586314 ps
T2715 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_error.2464702172 Apr 16 04:03:38 PM PDT 24 Apr 16 04:09:35 PM PDT 24 11255149125 ps
T2716 /workspace/coverage/cover_reg_top/7.chip_tl_errors.2260682191 Apr 16 03:51:07 PM PDT 24 Apr 16 03:55:10 PM PDT 24 3692444763 ps
T2717 /workspace/coverage/cover_reg_top/15.xbar_stress_all.3258107162 Apr 16 03:54:09 PM PDT 24 Apr 16 03:58:16 PM PDT 24 6083469733 ps
T2718 /workspace/coverage/cover_reg_top/2.xbar_same_source.1263917940 Apr 16 03:48:29 PM PDT 24 Apr 16 03:49:14 PM PDT 24 1416925608 ps
T2719 /workspace/coverage/cover_reg_top/12.xbar_unmapped_addr.3949529698 Apr 16 03:53:35 PM PDT 24 Apr 16 03:53:55 PM PDT 24 188773715 ps
T2720 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_error.825340053 Apr 16 03:55:18 PM PDT 24 Apr 16 03:56:54 PM PDT 24 2760600234 ps
T2721 /workspace/coverage/cover_reg_top/15.xbar_access_same_device.2503773014 Apr 16 03:53:59 PM PDT 24 Apr 16 03:54:35 PM PDT 24 784838475 ps
T2722 /workspace/coverage/cover_reg_top/70.xbar_same_source.3698239479 Apr 16 04:03:04 PM PDT 24 Apr 16 04:03:36 PM PDT 24 968050311 ps
T2723 /workspace/coverage/cover_reg_top/80.xbar_same_source.1923310495 Apr 16 04:04:48 PM PDT 24 Apr 16 04:05:02 PM PDT 24 183527106 ps
T2724 /workspace/coverage/cover_reg_top/18.xbar_unmapped_addr.260689863 Apr 16 03:54:27 PM PDT 24 Apr 16 03:55:25 PM PDT 24 1333610508 ps
T2725 /workspace/coverage/cover_reg_top/13.xbar_smoke_zero_delays.975114530 Apr 16 03:53:41 PM PDT 24 Apr 16 03:53:47 PM PDT 24 42939816 ps
T2726 /workspace/coverage/cover_reg_top/26.xbar_same_source.3677961099 Apr 16 03:55:37 PM PDT 24 Apr 16 03:55:44 PM PDT 24 51316138 ps
T2727 /workspace/coverage/cover_reg_top/86.xbar_smoke.1867061407 Apr 16 04:05:43 PM PDT 24 Apr 16 04:05:53 PM PDT 24 229091410 ps
T2728 /workspace/coverage/cover_reg_top/73.xbar_stress_all.1993429808 Apr 16 04:03:38 PM PDT 24 Apr 16 04:11:50 PM PDT 24 13117254313 ps
T2729 /workspace/coverage/cover_reg_top/33.xbar_random.287327906 Apr 16 03:56:48 PM PDT 24 Apr 16 03:57:14 PM PDT 24 760856470 ps
T2730 /workspace/coverage/cover_reg_top/35.xbar_random_large_delays.3390656669 Apr 16 03:57:12 PM PDT 24 Apr 16 04:17:38 PM PDT 24 101186466188 ps
T2731 /workspace/coverage/cover_reg_top/2.xbar_random_zero_delays.2433360569 Apr 16 03:48:22 PM PDT 24 Apr 16 03:48:30 PM PDT 24 67546975 ps
T2732 /workspace/coverage/cover_reg_top/2.chip_csr_bit_bash.2766071030 Apr 16 03:48:04 PM PDT 24 Apr 16 03:56:25 PM PDT 24 5534988494 ps
T2733 /workspace/coverage/cover_reg_top/77.xbar_smoke.2373287769 Apr 16 04:04:10 PM PDT 24 Apr 16 04:04:19 PM PDT 24 169244044 ps
T2734 /workspace/coverage/cover_reg_top/45.xbar_stress_all_with_error.1676286015 Apr 16 03:58:53 PM PDT 24 Apr 16 04:03:02 PM PDT 24 3573635369 ps
T2735 /workspace/coverage/cover_reg_top/40.xbar_smoke_large_delays.2616745482 Apr 16 03:57:53 PM PDT 24 Apr 16 03:58:55 PM PDT 24 5954881680 ps
T2736 /workspace/coverage/cover_reg_top/25.chip_tl_errors.2550661654 Apr 16 03:55:19 PM PDT 24 Apr 16 03:56:47 PM PDT 24 2819577160 ps
T2737 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_rand_reset.3999288020 Apr 16 04:05:24 PM PDT 24 Apr 16 04:09:27 PM PDT 24 880837360 ps
T2738 /workspace/coverage/cover_reg_top/60.xbar_error_and_unmapped_addr.2124680322 Apr 16 04:01:22 PM PDT 24 Apr 16 04:01:58 PM PDT 24 321708128 ps
T2739 /workspace/coverage/cover_reg_top/77.xbar_stress_all_with_rand_reset.1472903201 Apr 16 04:04:21 PM PDT 24 Apr 16 04:11:29 PM PDT 24 3030771335 ps
T2740 /workspace/coverage/cover_reg_top/85.xbar_smoke_slow_rsp.2256370496 Apr 16 04:05:37 PM PDT 24 Apr 16 04:07:07 PM PDT 24 5151974651 ps
T2741 /workspace/coverage/cover_reg_top/58.xbar_random_zero_delays.109885477 Apr 16 04:00:51 PM PDT 24 Apr 16 04:01:35 PM PDT 24 545070717 ps
T2742 /workspace/coverage/cover_reg_top/73.xbar_same_source.2617348315 Apr 16 04:03:42 PM PDT 24 Apr 16 04:03:56 PM PDT 24 379977917 ps
T2743 /workspace/coverage/cover_reg_top/65.xbar_access_same_device.3781545644 Apr 16 04:02:09 PM PDT 24 Apr 16 04:03:55 PM PDT 24 2590840915 ps
T2744 /workspace/coverage/cover_reg_top/15.chip_same_csr_outstanding.329911889 Apr 16 03:53:50 PM PDT 24 Apr 16 04:29:28 PM PDT 24 15923225796 ps
T2745 /workspace/coverage/cover_reg_top/51.xbar_random_slow_rsp.3748080633 Apr 16 03:59:50 PM PDT 24 Apr 16 04:12:07 PM PDT 24 44496484073 ps
T2746 /workspace/coverage/cover_reg_top/56.xbar_random_zero_delays.1107054888 Apr 16 04:00:31 PM PDT 24 Apr 16 04:01:12 PM PDT 24 398525486 ps
T2747 /workspace/coverage/cover_reg_top/68.xbar_stress_all_with_error.831119856 Apr 16 04:02:42 PM PDT 24 Apr 16 04:12:37 PM PDT 24 14202866954 ps
T2748 /workspace/coverage/cover_reg_top/41.xbar_random_slow_rsp.1614570707 Apr 16 03:58:10 PM PDT 24 Apr 16 04:13:29 PM PDT 24 51444842762 ps
T2749 /workspace/coverage/cover_reg_top/84.xbar_unmapped_addr.135187341 Apr 16 04:05:36 PM PDT 24 Apr 16 04:06:10 PM PDT 24 289860551 ps
T2750 /workspace/coverage/cover_reg_top/19.xbar_error_and_unmapped_addr.710768385 Apr 16 03:54:41 PM PDT 24 Apr 16 03:55:04 PM PDT 24 551717686 ps
T2751 /workspace/coverage/cover_reg_top/49.xbar_random_slow_rsp.3335214243 Apr 16 03:59:24 PM PDT 24 Apr 16 04:17:13 PM PDT 24 60714307623 ps
T2752 /workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.4124232050 Apr 16 03:53:07 PM PDT 24 Apr 16 04:34:51 PM PDT 24 16401068717 ps
T2753 /workspace/coverage/cover_reg_top/9.xbar_same_source.1546285531 Apr 16 03:52:23 PM PDT 24 Apr 16 03:52:57 PM PDT 24 374922025 ps
T2754 /workspace/coverage/cover_reg_top/27.xbar_smoke_large_delays.4076537032 Apr 16 03:55:46 PM PDT 24 Apr 16 03:57:17 PM PDT 24 9005768403 ps
T2755 /workspace/coverage/cover_reg_top/33.xbar_smoke_zero_delays.3239165510 Apr 16 03:56:46 PM PDT 24 Apr 16 03:56:52 PM PDT 24 39805668 ps
T2756 /workspace/coverage/cover_reg_top/17.xbar_stress_all_with_reset_error.1105149392 Apr 16 03:54:21 PM PDT 24 Apr 16 03:55:47 PM PDT 24 277830061 ps
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