| T870 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.902987867 |
|
|
Apr 23 04:36:11 PM PDT 24 |
Apr 23 04:45:59 PM PDT 24 |
4801196810 ps |
| T656 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2965762992 |
|
|
Apr 23 04:30:19 PM PDT 24 |
Apr 23 04:40:26 PM PDT 24 |
5240261800 ps |
| T661 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.258138258 |
|
|
Apr 23 04:29:29 PM PDT 24 |
Apr 23 04:37:44 PM PDT 24 |
4457732836 ps |
| T660 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.722401691 |
|
|
Apr 23 04:32:16 PM PDT 24 |
Apr 23 04:44:03 PM PDT 24 |
3995522940 ps |
| T871 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.1790754349 |
|
|
Apr 23 04:27:10 PM PDT 24 |
Apr 23 04:36:16 PM PDT 24 |
3915260220 ps |
| T872 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.2015276543 |
|
|
Apr 23 04:09:35 PM PDT 24 |
Apr 23 04:15:29 PM PDT 24 |
3110750794 ps |
| T314 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.4203886527 |
|
|
Apr 23 04:15:30 PM PDT 24 |
Apr 23 04:29:14 PM PDT 24 |
4969458040 ps |
| T873 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.4110300964 |
|
|
Apr 23 04:23:26 PM PDT 24 |
Apr 23 04:27:01 PM PDT 24 |
3438371014 ps |
| T874 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.3215160394 |
|
|
Apr 23 04:20:16 PM PDT 24 |
Apr 23 04:27:00 PM PDT 24 |
6779193526 ps |
| T184 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2260704687 |
|
|
Apr 23 04:08:48 PM PDT 24 |
Apr 23 04:17:29 PM PDT 24 |
5570558369 ps |
| T120 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.924524212 |
|
|
Apr 23 04:19:40 PM PDT 24 |
Apr 23 05:14:35 PM PDT 24 |
18853953215 ps |
| T718 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.4195054137 |
|
|
Apr 23 04:31:50 PM PDT 24 |
Apr 23 04:37:37 PM PDT 24 |
3481773168 ps |
| T670 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.2681844649 |
|
|
Apr 23 04:10:24 PM PDT 24 |
Apr 23 04:17:45 PM PDT 24 |
3889886846 ps |
| T875 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.104491971 |
|
|
Apr 23 03:53:27 PM PDT 24 |
Apr 23 04:32:29 PM PDT 24 |
28194247309 ps |
| T732 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.2797619270 |
|
|
Apr 23 04:28:28 PM PDT 24 |
Apr 23 04:34:21 PM PDT 24 |
3170507708 ps |
| T876 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.1337039396 |
|
|
Apr 23 04:28:26 PM PDT 24 |
Apr 23 04:32:53 PM PDT 24 |
3627184200 ps |
| T877 |
/workspace/coverage/default/1.chip_sw_kmac_idle.869747399 |
|
|
Apr 23 04:09:32 PM PDT 24 |
Apr 23 04:14:53 PM PDT 24 |
2625088126 ps |
| T350 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.1917235610 |
|
|
Apr 23 04:32:21 PM PDT 24 |
Apr 23 04:37:22 PM PDT 24 |
3834481282 ps |
| T355 |
/workspace/coverage/default/1.chip_sw_edn_kat.3814394695 |
|
|
Apr 23 04:08:42 PM PDT 24 |
Apr 23 04:17:13 PM PDT 24 |
3807666952 ps |
| T356 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.1257687648 |
|
|
Apr 23 03:53:30 PM PDT 24 |
Apr 23 04:09:17 PM PDT 24 |
6946343330 ps |
| T357 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.3280919124 |
|
|
Apr 23 04:06:35 PM PDT 24 |
Apr 23 04:23:47 PM PDT 24 |
8480814974 ps |
| T199 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.1870582776 |
|
|
Apr 23 04:15:14 PM PDT 24 |
Apr 23 07:37:14 PM PDT 24 |
63472397162 ps |
| T358 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1984043045 |
|
|
Apr 23 04:17:03 PM PDT 24 |
Apr 23 04:31:43 PM PDT 24 |
9913462088 ps |
| T359 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2769317728 |
|
|
Apr 23 03:52:48 PM PDT 24 |
Apr 23 03:55:29 PM PDT 24 |
2338820030 ps |
| T360 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3451528564 |
|
|
Apr 23 04:26:35 PM PDT 24 |
Apr 23 04:38:31 PM PDT 24 |
4255562068 ps |
| T361 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.2123701549 |
|
|
Apr 23 04:04:28 PM PDT 24 |
Apr 23 04:13:27 PM PDT 24 |
4581411180 ps |
| T362 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.3688754667 |
|
|
Apr 23 04:27:15 PM PDT 24 |
Apr 23 04:36:35 PM PDT 24 |
4632831256 ps |
| T878 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.1808479479 |
|
|
Apr 23 04:30:54 PM PDT 24 |
Apr 23 05:05:45 PM PDT 24 |
12975946590 ps |
| T627 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.563580319 |
|
|
Apr 23 04:05:59 PM PDT 24 |
Apr 23 04:09:43 PM PDT 24 |
2765452078 ps |
| T342 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3042763639 |
|
|
Apr 23 04:06:31 PM PDT 24 |
Apr 23 04:43:13 PM PDT 24 |
17873821675 ps |
| T19 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.3623789652 |
|
|
Apr 23 04:06:15 PM PDT 24 |
Apr 23 04:28:38 PM PDT 24 |
20496309958 ps |
| T79 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.1779106235 |
|
|
Apr 23 03:51:48 PM PDT 24 |
Apr 23 03:55:41 PM PDT 24 |
2309299880 ps |
| T142 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.3975102041 |
|
|
Apr 23 04:29:02 PM PDT 24 |
Apr 23 04:45:12 PM PDT 24 |
8774138232 ps |
| T879 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.708698833 |
|
|
Apr 23 04:22:27 PM PDT 24 |
Apr 23 04:27:02 PM PDT 24 |
2976095182 ps |
| T880 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.3967896556 |
|
|
Apr 23 03:51:07 PM PDT 24 |
Apr 23 03:54:15 PM PDT 24 |
2556997774 ps |
| T881 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.3543598202 |
|
|
Apr 23 04:12:23 PM PDT 24 |
Apr 23 04:15:02 PM PDT 24 |
2430549113 ps |
| T671 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.387984821 |
|
|
Apr 23 04:11:26 PM PDT 24 |
Apr 23 04:26:35 PM PDT 24 |
7202968624 ps |
| T25 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.208112803 |
|
|
Apr 23 04:26:47 PM PDT 24 |
Apr 23 04:32:20 PM PDT 24 |
3274423864 ps |
| T882 |
/workspace/coverage/default/0.chip_sw_edn_kat.434282354 |
|
|
Apr 23 03:53:48 PM PDT 24 |
Apr 23 04:02:28 PM PDT 24 |
3318363322 ps |
| T883 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1589058200 |
|
|
Apr 23 04:03:20 PM PDT 24 |
Apr 23 04:11:55 PM PDT 24 |
4486636176 ps |
| T161 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.592175651 |
|
|
Apr 23 04:14:09 PM PDT 24 |
Apr 23 04:22:29 PM PDT 24 |
3630399720 ps |
| T884 |
/workspace/coverage/default/3.chip_tap_straps_rma.2433807879 |
|
|
Apr 23 04:26:14 PM PDT 24 |
Apr 23 04:29:15 PM PDT 24 |
2809510425 ps |
| T885 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.311514307 |
|
|
Apr 23 04:06:58 PM PDT 24 |
Apr 23 04:13:58 PM PDT 24 |
3703311960 ps |
| T193 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3773980289 |
|
|
Apr 23 03:54:07 PM PDT 24 |
Apr 23 04:05:33 PM PDT 24 |
4995605907 ps |
| T329 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.3681538567 |
|
|
Apr 23 04:34:23 PM PDT 24 |
Apr 23 04:46:54 PM PDT 24 |
4619075012 ps |
| T301 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1221855575 |
|
|
Apr 23 04:25:35 PM PDT 24 |
Apr 23 04:36:38 PM PDT 24 |
4244619816 ps |
| T26 |
/workspace/coverage/default/2.chip_sw_gpio.682214575 |
|
|
Apr 23 04:16:11 PM PDT 24 |
Apr 23 04:24:08 PM PDT 24 |
4216498343 ps |
| T149 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.411586146 |
|
|
Apr 23 03:51:45 PM PDT 24 |
Apr 23 03:58:21 PM PDT 24 |
8944751384 ps |
| T886 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.759958732 |
|
|
Apr 23 04:13:20 PM PDT 24 |
Apr 23 04:21:53 PM PDT 24 |
5435542364 ps |
| T743 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.3797800597 |
|
|
Apr 23 04:37:39 PM PDT 24 |
Apr 23 04:47:25 PM PDT 24 |
5004021734 ps |
| T887 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.841698873 |
|
|
Apr 23 03:51:32 PM PDT 24 |
Apr 23 03:59:46 PM PDT 24 |
4370216240 ps |
| T51 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.2184187675 |
|
|
Apr 23 04:15:56 PM PDT 24 |
Apr 23 04:20:38 PM PDT 24 |
3235890876 ps |
| T388 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.3109535900 |
|
|
Apr 23 04:11:35 PM PDT 24 |
Apr 23 04:15:31 PM PDT 24 |
2549290547 ps |
| T389 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2618755312 |
|
|
Apr 23 03:53:12 PM PDT 24 |
Apr 23 04:00:53 PM PDT 24 |
4188309510 ps |
| T390 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.760395328 |
|
|
Apr 23 04:15:03 PM PDT 24 |
Apr 23 04:24:25 PM PDT 24 |
3701982712 ps |
| T311 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.33912782 |
|
|
Apr 23 04:08:58 PM PDT 24 |
Apr 23 04:35:41 PM PDT 24 |
7450325416 ps |
| T391 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2860277786 |
|
|
Apr 23 04:16:37 PM PDT 24 |
Apr 23 04:27:48 PM PDT 24 |
5127374980 ps |
| T216 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.2613301584 |
|
|
Apr 23 04:17:23 PM PDT 24 |
Apr 23 05:39:30 PM PDT 24 |
48174490539 ps |
| T392 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.2813321726 |
|
|
Apr 23 04:08:03 PM PDT 24 |
Apr 23 04:27:40 PM PDT 24 |
6040795324 ps |
| T165 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.192753282 |
|
|
Apr 23 04:07:49 PM PDT 24 |
Apr 23 04:12:42 PM PDT 24 |
3563973352 ps |
| T239 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.1878382572 |
|
|
Apr 23 04:17:30 PM PDT 24 |
Apr 23 04:33:42 PM PDT 24 |
7206754008 ps |
| T888 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.1149973714 |
|
|
Apr 23 04:09:06 PM PDT 24 |
Apr 23 04:36:52 PM PDT 24 |
8673006264 ps |
| T889 |
/workspace/coverage/default/1.chip_sw_power_idle_load.3190362202 |
|
|
Apr 23 04:12:12 PM PDT 24 |
Apr 23 04:22:16 PM PDT 24 |
4102463584 ps |
| T747 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.54809679 |
|
|
Apr 23 04:30:32 PM PDT 24 |
Apr 23 04:39:08 PM PDT 24 |
4751005488 ps |
| T890 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.2171209456 |
|
|
Apr 23 04:28:19 PM PDT 24 |
Apr 23 04:37:07 PM PDT 24 |
4279037570 ps |
| T891 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3272989163 |
|
|
Apr 23 04:06:56 PM PDT 24 |
Apr 23 05:08:50 PM PDT 24 |
18959744899 ps |
| T892 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.792063064 |
|
|
Apr 23 04:29:27 PM PDT 24 |
Apr 23 04:44:36 PM PDT 24 |
9050690229 ps |
| T893 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1255407437 |
|
|
Apr 23 04:08:20 PM PDT 24 |
Apr 23 04:14:57 PM PDT 24 |
6450337930 ps |
| T748 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.120737656 |
|
|
Apr 23 04:29:28 PM PDT 24 |
Apr 23 04:40:08 PM PDT 24 |
5469095528 ps |
| T894 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2266491000 |
|
|
Apr 23 03:53:46 PM PDT 24 |
Apr 23 04:04:01 PM PDT 24 |
5296950162 ps |
| T124 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.1244685670 |
|
|
Apr 23 04:08:52 PM PDT 24 |
Apr 23 04:15:46 PM PDT 24 |
3795899352 ps |
| T895 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.876900330 |
|
|
Apr 23 04:27:55 PM PDT 24 |
Apr 23 04:54:35 PM PDT 24 |
11564752828 ps |
| T58 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.2403204736 |
|
|
Apr 23 03:50:50 PM PDT 24 |
Apr 23 03:55:39 PM PDT 24 |
4491625032 ps |
| T381 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.2320359484 |
|
|
Apr 23 04:14:55 PM PDT 24 |
Apr 23 04:44:02 PM PDT 24 |
8356129960 ps |
| T382 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.3427530597 |
|
|
Apr 23 04:19:40 PM PDT 24 |
Apr 23 04:36:28 PM PDT 24 |
9371360104 ps |
| T383 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2398903438 |
|
|
Apr 23 04:24:29 PM PDT 24 |
Apr 23 04:31:06 PM PDT 24 |
3367042580 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.193389754 |
|
|
Apr 23 03:51:11 PM PDT 24 |
Apr 23 03:59:02 PM PDT 24 |
4258799868 ps |
| T384 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2912212134 |
|
|
Apr 23 04:28:18 PM PDT 24 |
Apr 23 04:38:48 PM PDT 24 |
4301291652 ps |
| T385 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.171249716 |
|
|
Apr 23 04:35:16 PM PDT 24 |
Apr 23 04:41:33 PM PDT 24 |
3396029210 ps |
| T386 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.2483835885 |
|
|
Apr 23 04:33:21 PM PDT 24 |
Apr 23 04:45:33 PM PDT 24 |
5223767712 ps |
| T248 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.1862264853 |
|
|
Apr 23 04:17:03 PM PDT 24 |
Apr 23 04:18:37 PM PDT 24 |
2789408038 ps |
| T387 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.261229552 |
|
|
Apr 23 03:56:56 PM PDT 24 |
Apr 23 04:10:51 PM PDT 24 |
5886362744 ps |
| T896 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.3263589204 |
|
|
Apr 23 04:14:52 PM PDT 24 |
Apr 23 04:18:38 PM PDT 24 |
2840267306 ps |
| T897 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.2991287527 |
|
|
Apr 23 04:15:16 PM PDT 24 |
Apr 23 04:33:15 PM PDT 24 |
6616567357 ps |
| T680 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.1734081409 |
|
|
Apr 23 04:31:46 PM PDT 24 |
Apr 23 04:41:42 PM PDT 24 |
5145350748 ps |
| T898 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.2391946405 |
|
|
Apr 23 04:14:43 PM PDT 24 |
Apr 23 04:17:20 PM PDT 24 |
2674709772 ps |
| T38 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.931660563 |
|
|
Apr 23 03:52:15 PM PDT 24 |
Apr 23 03:59:04 PM PDT 24 |
5099741552 ps |
| T899 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2269588208 |
|
|
Apr 23 04:03:31 PM PDT 24 |
Apr 23 04:08:55 PM PDT 24 |
2757662284 ps |
| T900 |
/workspace/coverage/default/1.chip_sw_example_flash.596847158 |
|
|
Apr 23 04:02:59 PM PDT 24 |
Apr 23 04:08:32 PM PDT 24 |
2996540114 ps |
| T238 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.4292600418 |
|
|
Apr 23 04:22:15 PM PDT 24 |
Apr 23 04:31:14 PM PDT 24 |
3071300200 ps |
| T628 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.3789840483 |
|
|
Apr 23 04:18:28 PM PDT 24 |
Apr 23 04:23:25 PM PDT 24 |
2811417170 ps |
| T240 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.835719028 |
|
|
Apr 23 04:08:49 PM PDT 24 |
Apr 23 04:21:25 PM PDT 24 |
5456719616 ps |
| T333 |
/workspace/coverage/default/1.chip_sival_flash_info_access.2676641871 |
|
|
Apr 23 04:03:19 PM PDT 24 |
Apr 23 04:06:26 PM PDT 24 |
2727162064 ps |
| T901 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3254065528 |
|
|
Apr 23 04:28:59 PM PDT 24 |
Apr 23 04:35:38 PM PDT 24 |
3544829312 ps |
| T719 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1356723818 |
|
|
Apr 23 04:32:38 PM PDT 24 |
Apr 23 04:38:56 PM PDT 24 |
3914173768 ps |
| T702 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.109346453 |
|
|
Apr 23 04:32:01 PM PDT 24 |
Apr 23 04:41:06 PM PDT 24 |
5439134040 ps |
| T902 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.1783047459 |
|
|
Apr 23 03:53:57 PM PDT 24 |
Apr 23 04:00:52 PM PDT 24 |
4604083446 ps |
| T611 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3445788473 |
|
|
Apr 23 04:23:56 PM PDT 24 |
Apr 23 05:19:50 PM PDT 24 |
24814205404 ps |
| T903 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3605426984 |
|
|
Apr 23 04:21:15 PM PDT 24 |
Apr 23 04:38:19 PM PDT 24 |
5617900106 ps |
| T703 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2871552824 |
|
|
Apr 23 04:32:41 PM PDT 24 |
Apr 23 04:41:46 PM PDT 24 |
4584822092 ps |
| T11 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.619967976 |
|
|
Apr 23 04:03:47 PM PDT 24 |
Apr 23 04:09:45 PM PDT 24 |
4564396257 ps |
| T904 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.3782715492 |
|
|
Apr 23 03:49:41 PM PDT 24 |
Apr 23 03:56:55 PM PDT 24 |
3855479272 ps |
| T313 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.4013210942 |
|
|
Apr 23 03:50:38 PM PDT 24 |
Apr 23 04:02:15 PM PDT 24 |
4739520400 ps |
| T905 |
/workspace/coverage/default/1.chip_tap_straps_prod.771003498 |
|
|
Apr 23 04:10:55 PM PDT 24 |
Apr 23 04:20:15 PM PDT 24 |
6777529189 ps |
| T162 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.4121995055 |
|
|
Apr 23 03:52:31 PM PDT 24 |
Apr 23 04:00:17 PM PDT 24 |
3638260460 ps |
| T669 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3099684861 |
|
|
Apr 23 03:51:05 PM PDT 24 |
Apr 23 04:00:42 PM PDT 24 |
5269752860 ps |
| T906 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.3220818551 |
|
|
Apr 23 04:23:06 PM PDT 24 |
Apr 23 04:27:44 PM PDT 24 |
2636020348 ps |
| T907 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.658176735 |
|
|
Apr 23 04:07:15 PM PDT 24 |
Apr 23 04:33:54 PM PDT 24 |
17396238383 ps |
| T908 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2518789960 |
|
|
Apr 23 04:24:19 PM PDT 24 |
Apr 23 04:31:48 PM PDT 24 |
5296239400 ps |
| T909 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.3121717947 |
|
|
Apr 23 04:15:59 PM PDT 24 |
Apr 23 04:35:22 PM PDT 24 |
4796146006 ps |
| T910 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.3753231436 |
|
|
Apr 23 04:14:03 PM PDT 24 |
Apr 23 04:18:20 PM PDT 24 |
3078694584 ps |
| T911 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3781568039 |
|
|
Apr 23 03:52:56 PM PDT 24 |
Apr 23 03:59:58 PM PDT 24 |
4423055900 ps |
| T169 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.3000338181 |
|
|
Apr 23 04:33:06 PM PDT 24 |
Apr 23 04:41:48 PM PDT 24 |
5249626192 ps |
| T912 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.3939308274 |
|
|
Apr 23 04:09:44 PM PDT 24 |
Apr 23 04:15:30 PM PDT 24 |
4342261042 ps |
| T913 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.4037763847 |
|
|
Apr 23 04:05:13 PM PDT 24 |
Apr 23 04:19:44 PM PDT 24 |
10333873415 ps |
| T230 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1952422390 |
|
|
Apr 23 04:26:17 PM PDT 24 |
Apr 23 04:37:32 PM PDT 24 |
4696324950 ps |
| T213 |
/workspace/coverage/default/2.chip_sw_flash_init.29238027 |
|
|
Apr 23 04:16:09 PM PDT 24 |
Apr 23 04:52:28 PM PDT 24 |
24005348035 ps |
| T695 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1950434987 |
|
|
Apr 23 04:30:35 PM PDT 24 |
Apr 23 04:37:21 PM PDT 24 |
3491754344 ps |
| T183 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.249098607 |
|
|
Apr 23 04:24:25 PM PDT 24 |
Apr 23 04:28:18 PM PDT 24 |
2665518334 ps |
| T686 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.4188552896 |
|
|
Apr 23 04:31:01 PM PDT 24 |
Apr 23 04:38:17 PM PDT 24 |
4176972960 ps |
| T220 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.486039108 |
|
|
Apr 23 04:21:40 PM PDT 24 |
Apr 23 04:42:16 PM PDT 24 |
5935586320 ps |
| T20 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.94647850 |
|
|
Apr 23 04:19:21 PM PDT 24 |
Apr 23 04:47:01 PM PDT 24 |
22420396188 ps |
| T914 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.3321542481 |
|
|
Apr 23 04:02:30 PM PDT 24 |
Apr 23 04:04:45 PM PDT 24 |
3207352794 ps |
| T915 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.1129310473 |
|
|
Apr 23 04:03:07 PM PDT 24 |
Apr 23 04:10:35 PM PDT 24 |
5240525984 ps |
| T691 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3602311067 |
|
|
Apr 23 04:28:53 PM PDT 24 |
Apr 23 04:37:36 PM PDT 24 |
5356926950 ps |
| T916 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.87586494 |
|
|
Apr 23 03:52:18 PM PDT 24 |
Apr 23 03:57:59 PM PDT 24 |
4855193482 ps |
| T80 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.482181456 |
|
|
Apr 23 04:14:09 PM PDT 24 |
Apr 23 04:20:59 PM PDT 24 |
5895731012 ps |
| T917 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.2149265780 |
|
|
Apr 23 03:52:08 PM PDT 24 |
Apr 23 04:36:51 PM PDT 24 |
10961057080 ps |
| T918 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2744067773 |
|
|
Apr 23 03:52:32 PM PDT 24 |
Apr 23 04:02:19 PM PDT 24 |
4018031960 ps |
| T354 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.4239442276 |
|
|
Apr 23 03:53:15 PM PDT 24 |
Apr 23 04:01:46 PM PDT 24 |
6748683850 ps |
| T919 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.2149615524 |
|
|
Apr 23 03:53:12 PM PDT 24 |
Apr 23 04:14:20 PM PDT 24 |
7327598220 ps |
| T221 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.485385214 |
|
|
Apr 23 04:09:14 PM PDT 24 |
Apr 23 04:22:33 PM PDT 24 |
5946304261 ps |
| T920 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2742953273 |
|
|
Apr 23 04:15:02 PM PDT 24 |
Apr 23 04:25:38 PM PDT 24 |
4584445600 ps |
| T330 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.4210166057 |
|
|
Apr 23 04:32:16 PM PDT 24 |
Apr 23 04:43:27 PM PDT 24 |
4912611800 ps |
| T921 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.1287692153 |
|
|
Apr 23 03:50:27 PM PDT 24 |
Apr 23 03:57:36 PM PDT 24 |
3729921880 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3791769866 |
|
|
Apr 23 03:51:22 PM PDT 24 |
Apr 23 03:56:06 PM PDT 24 |
2484437090 ps |
| T922 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3346529552 |
|
|
Apr 23 04:16:22 PM PDT 24 |
Apr 23 04:39:59 PM PDT 24 |
9638057400 ps |
| T923 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.1005605302 |
|
|
Apr 23 04:29:01 PM PDT 24 |
Apr 23 04:37:25 PM PDT 24 |
3354244908 ps |
| T924 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.3875417710 |
|
|
Apr 23 04:02:44 PM PDT 24 |
Apr 23 04:10:40 PM PDT 24 |
4663619158 ps |
| T249 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.303906167 |
|
|
Apr 23 04:05:31 PM PDT 24 |
Apr 23 04:07:13 PM PDT 24 |
2689469074 ps |
| T925 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.912311897 |
|
|
Apr 23 03:51:52 PM PDT 24 |
Apr 23 04:10:14 PM PDT 24 |
5882332916 ps |
| T926 |
/workspace/coverage/default/0.chip_sw_coremark.2366155929 |
|
|
Apr 23 03:52:49 PM PDT 24 |
Apr 23 06:41:59 PM PDT 24 |
50512981934 ps |
| T927 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.3722734496 |
|
|
Apr 23 04:26:26 PM PDT 24 |
Apr 23 04:36:06 PM PDT 24 |
4585296244 ps |
| T630 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.2052497545 |
|
|
Apr 23 04:24:12 PM PDT 24 |
Apr 23 04:28:24 PM PDT 24 |
2393777724 ps |
| T279 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1342213921 |
|
|
Apr 23 04:22:41 PM PDT 24 |
Apr 23 04:35:20 PM PDT 24 |
7299991423 ps |
| T613 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.2824752814 |
|
|
Apr 23 03:51:53 PM PDT 24 |
Apr 23 04:05:18 PM PDT 24 |
4237354016 ps |
| T331 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.352494995 |
|
|
Apr 23 04:19:51 PM PDT 24 |
Apr 23 04:29:50 PM PDT 24 |
4134691286 ps |
| T928 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.1579338791 |
|
|
Apr 23 04:03:35 PM PDT 24 |
Apr 23 04:13:15 PM PDT 24 |
3998834304 ps |
| T929 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.2409937307 |
|
|
Apr 23 04:21:47 PM PDT 24 |
Apr 23 04:26:25 PM PDT 24 |
2809195880 ps |
| T750 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.1393934209 |
|
|
Apr 23 04:30:41 PM PDT 24 |
Apr 23 04:37:52 PM PDT 24 |
3586473220 ps |
| T724 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.412342648 |
|
|
Apr 23 04:30:56 PM PDT 24 |
Apr 23 04:39:26 PM PDT 24 |
4906852604 ps |
| T116 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.4122417386 |
|
|
Apr 23 04:25:45 PM PDT 24 |
Apr 23 05:10:49 PM PDT 24 |
19583630432 ps |
| T156 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.2422117905 |
|
|
Apr 23 04:03:49 PM PDT 24 |
Apr 23 07:02:00 PM PDT 24 |
57511796143 ps |
| T930 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.2977382048 |
|
|
Apr 23 03:53:00 PM PDT 24 |
Apr 23 04:03:11 PM PDT 24 |
7106386566 ps |
| T931 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.1768233845 |
|
|
Apr 23 03:53:53 PM PDT 24 |
Apr 23 04:06:13 PM PDT 24 |
7037041422 ps |
| T117 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.3275708520 |
|
|
Apr 23 03:56:06 PM PDT 24 |
Apr 23 04:58:44 PM PDT 24 |
21462088243 ps |
| T932 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.1432638633 |
|
|
Apr 23 04:32:39 PM PDT 24 |
Apr 23 04:42:04 PM PDT 24 |
4200437800 ps |
| T276 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.3898907566 |
|
|
Apr 23 04:11:13 PM PDT 24 |
Apr 23 04:13:46 PM PDT 24 |
2493762745 ps |
| T236 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2209664971 |
|
|
Apr 23 03:57:46 PM PDT 24 |
Apr 23 04:05:36 PM PDT 24 |
4004548054 ps |
| T40 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.3484666536 |
|
|
Apr 23 04:15:04 PM PDT 24 |
Apr 23 04:20:32 PM PDT 24 |
3051066537 ps |
| T607 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.3287123326 |
|
|
Apr 23 03:53:35 PM PDT 24 |
Apr 23 03:55:49 PM PDT 24 |
2379546103 ps |
| T52 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.1215731891 |
|
|
Apr 23 03:55:46 PM PDT 24 |
Apr 23 04:22:12 PM PDT 24 |
20234423480 ps |
| T933 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.1882030773 |
|
|
Apr 23 04:31:04 PM PDT 24 |
Apr 23 04:40:57 PM PDT 24 |
5567448860 ps |
| T934 |
/workspace/coverage/default/0.chip_sw_aes_enc.1454600126 |
|
|
Apr 23 03:51:57 PM PDT 24 |
Apr 23 03:54:59 PM PDT 24 |
2692020616 ps |
| T935 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.442706231 |
|
|
Apr 23 04:06:30 PM PDT 24 |
Apr 23 04:17:00 PM PDT 24 |
6735533494 ps |
| T936 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.4002802502 |
|
|
Apr 23 03:54:48 PM PDT 24 |
Apr 23 03:58:14 PM PDT 24 |
2486448038 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.2383357906 |
|
|
Apr 23 03:51:42 PM PDT 24 |
Apr 23 05:48:25 PM PDT 24 |
31426885308 ps |
| T937 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.4134755103 |
|
|
Apr 23 04:16:40 PM PDT 24 |
Apr 23 04:38:01 PM PDT 24 |
7443124060 ps |
| T93 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.4102090563 |
|
|
Apr 23 04:32:53 PM PDT 24 |
Apr 23 04:38:30 PM PDT 24 |
3027182552 ps |
| T251 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.4202475951 |
|
|
Apr 23 04:28:03 PM PDT 24 |
Apr 23 04:40:04 PM PDT 24 |
5044684858 ps |
| T12 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.686695121 |
|
|
Apr 23 04:15:46 PM PDT 24 |
Apr 23 04:23:44 PM PDT 24 |
4931382012 ps |
| T55 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.1086100815 |
|
|
Apr 23 04:03:25 PM PDT 24 |
Apr 23 04:07:16 PM PDT 24 |
3667389558 ps |
| T253 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.594033172 |
|
|
Apr 23 03:55:17 PM PDT 24 |
Apr 23 04:04:38 PM PDT 24 |
4739171690 ps |
| T254 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.3758694724 |
|
|
Apr 23 03:53:30 PM PDT 24 |
Apr 23 03:57:58 PM PDT 24 |
4494891354 ps |
| T255 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2461512292 |
|
|
Apr 23 03:52:17 PM PDT 24 |
Apr 23 03:57:50 PM PDT 24 |
2993310333 ps |
| T256 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.1240285593 |
|
|
Apr 23 04:04:55 PM PDT 24 |
Apr 23 08:34:17 PM PDT 24 |
79072680048 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3958500108 |
|
|
Apr 23 04:17:55 PM PDT 24 |
Apr 23 04:21:13 PM PDT 24 |
2343486720 ps |
| T258 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.3067000475 |
|
|
Apr 23 04:28:49 PM PDT 24 |
Apr 23 04:55:01 PM PDT 24 |
8498534152 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.1653351613 |
|
|
Apr 23 04:01:52 PM PDT 24 |
Apr 23 04:07:26 PM PDT 24 |
5055764260 ps |
| T379 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.171299084 |
|
|
Apr 23 03:51:30 PM PDT 24 |
Apr 23 04:00:17 PM PDT 24 |
5227223592 ps |
| T380 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.613972114 |
|
|
Apr 23 04:28:33 PM PDT 24 |
Apr 23 04:41:59 PM PDT 24 |
9079901865 ps |
| T938 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.2440484481 |
|
|
Apr 23 04:20:29 PM PDT 24 |
Apr 23 04:25:35 PM PDT 24 |
2933401829 ps |
| T939 |
/workspace/coverage/default/2.rom_keymgr_functest.1674026974 |
|
|
Apr 23 04:28:34 PM PDT 24 |
Apr 23 04:38:31 PM PDT 24 |
5343252400 ps |
| T138 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2175774156 |
|
|
Apr 23 04:10:28 PM PDT 24 |
Apr 23 04:17:24 PM PDT 24 |
4778779972 ps |
| T940 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.3871045216 |
|
|
Apr 23 04:05:36 PM PDT 24 |
Apr 23 04:27:30 PM PDT 24 |
6908488640 ps |
| T941 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.2110806689 |
|
|
Apr 23 04:06:54 PM PDT 24 |
Apr 23 04:10:07 PM PDT 24 |
2981726231 ps |
| T942 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3487978499 |
|
|
Apr 23 03:57:14 PM PDT 24 |
Apr 23 04:06:11 PM PDT 24 |
4973721384 ps |
| T56 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.107221561 |
|
|
Apr 23 03:50:46 PM PDT 24 |
Apr 23 03:55:10 PM PDT 24 |
4143059146 ps |
| T721 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.2591903153 |
|
|
Apr 23 04:28:34 PM PDT 24 |
Apr 23 04:34:54 PM PDT 24 |
4131986392 ps |
| T943 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2733555260 |
|
|
Apr 23 04:24:40 PM PDT 24 |
Apr 23 04:37:53 PM PDT 24 |
5258974708 ps |
| T944 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.2268268957 |
|
|
Apr 23 04:21:39 PM PDT 24 |
Apr 23 04:25:02 PM PDT 24 |
2631385076 ps |
| T21 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.25016944 |
|
|
Apr 23 03:51:33 PM PDT 24 |
Apr 23 04:23:07 PM PDT 24 |
21731036296 ps |
| T170 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2547098604 |
|
|
Apr 23 04:33:10 PM PDT 24 |
Apr 23 04:43:52 PM PDT 24 |
5651606558 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3940205879 |
|
|
Apr 23 03:51:39 PM PDT 24 |
Apr 23 07:29:32 PM PDT 24 |
254553635904 ps |
| T343 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2331202362 |
|
|
Apr 23 04:05:58 PM PDT 24 |
Apr 23 04:22:34 PM PDT 24 |
12512894027 ps |
| T946 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.719322772 |
|
|
Apr 23 03:53:32 PM PDT 24 |
Apr 23 03:58:08 PM PDT 24 |
4751533792 ps |
| T53 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2748816068 |
|
|
Apr 23 04:11:03 PM PDT 24 |
Apr 23 04:17:59 PM PDT 24 |
4813680124 ps |
| T394 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.477001892 |
|
|
Apr 23 04:34:20 PM PDT 24 |
Apr 23 04:45:25 PM PDT 24 |
5833716280 ps |
| T395 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1950498445 |
|
|
Apr 23 04:17:47 PM PDT 24 |
Apr 23 04:26:04 PM PDT 24 |
5377774206 ps |
| T396 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.3795046388 |
|
|
Apr 23 04:14:00 PM PDT 24 |
Apr 23 04:17:30 PM PDT 24 |
2869279632 ps |
| T397 |
/workspace/coverage/default/2.chip_tap_straps_dev.454780961 |
|
|
Apr 23 04:23:05 PM PDT 24 |
Apr 23 04:41:31 PM PDT 24 |
10171864715 ps |
| T398 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.1598074245 |
|
|
Apr 23 04:31:43 PM PDT 24 |
Apr 23 04:43:29 PM PDT 24 |
4856479022 ps |
| T340 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1924740362 |
|
|
Apr 23 04:20:04 PM PDT 24 |
Apr 23 04:29:40 PM PDT 24 |
18618788298 ps |
| T399 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.2123625269 |
|
|
Apr 23 04:32:28 PM PDT 24 |
Apr 23 04:41:07 PM PDT 24 |
4949901254 ps |
| T400 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3514881626 |
|
|
Apr 23 04:32:49 PM PDT 24 |
Apr 23 04:38:37 PM PDT 24 |
4206547032 ps |
| T401 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3448648276 |
|
|
Apr 23 04:05:29 PM PDT 24 |
Apr 23 04:21:30 PM PDT 24 |
5916719912 ps |
| T947 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.2211953290 |
|
|
Apr 23 03:54:29 PM PDT 24 |
Apr 23 03:58:37 PM PDT 24 |
3207413377 ps |
| T948 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3431737948 |
|
|
Apr 23 03:57:15 PM PDT 24 |
Apr 23 04:03:45 PM PDT 24 |
4456154062 ps |
| T949 |
/workspace/coverage/default/2.chip_sw_aes_idle.3153354809 |
|
|
Apr 23 04:21:18 PM PDT 24 |
Apr 23 04:25:25 PM PDT 24 |
2463790748 ps |
| T734 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.3689427018 |
|
|
Apr 23 04:30:48 PM PDT 24 |
Apr 23 04:42:45 PM PDT 24 |
5261566686 ps |
| T950 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1659323573 |
|
|
Apr 23 04:05:23 PM PDT 24 |
Apr 23 04:10:26 PM PDT 24 |
3366806118 ps |
| T951 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.970336501 |
|
|
Apr 23 04:09:25 PM PDT 24 |
Apr 23 04:19:17 PM PDT 24 |
4935714890 ps |
| T952 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.909927416 |
|
|
Apr 23 04:08:52 PM PDT 24 |
Apr 23 04:20:38 PM PDT 24 |
4859514824 ps |
| T206 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1430792808 |
|
|
Apr 23 03:54:50 PM PDT 24 |
Apr 23 04:00:41 PM PDT 24 |
4942498296 ps |
| T345 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.3177524849 |
|
|
Apr 23 04:21:52 PM PDT 24 |
Apr 23 04:26:55 PM PDT 24 |
2584781635 ps |
| T692 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2476251623 |
|
|
Apr 23 04:28:46 PM PDT 24 |
Apr 23 04:33:29 PM PDT 24 |
4014556564 ps |
| T608 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.533876776 |
|
|
Apr 23 03:51:35 PM PDT 24 |
Apr 23 03:53:20 PM PDT 24 |
2313770845 ps |
| T351 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.3316705975 |
|
|
Apr 23 04:32:01 PM PDT 24 |
Apr 23 04:41:10 PM PDT 24 |
4148078170 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.661740629 |
|
|
Apr 23 04:27:20 PM PDT 24 |
Apr 23 04:30:54 PM PDT 24 |
2198436480 ps |
| T954 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3477669904 |
|
|
Apr 23 04:11:26 PM PDT 24 |
Apr 23 05:10:47 PM PDT 24 |
18645028313 ps |
| T698 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1783970961 |
|
|
Apr 23 04:28:17 PM PDT 24 |
Apr 23 04:33:35 PM PDT 24 |
4173557700 ps |
| T232 |
/workspace/coverage/default/1.chip_jtag_mem_access.2911576243 |
|
|
Apr 23 04:03:43 PM PDT 24 |
Apr 23 04:24:02 PM PDT 24 |
13460553111 ps |
| T105 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.4167087056 |
|
|
Apr 23 04:11:52 PM PDT 24 |
Apr 23 04:34:50 PM PDT 24 |
21067703080 ps |
| T735 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.1302092986 |
|
|
Apr 23 04:37:08 PM PDT 24 |
Apr 23 04:46:34 PM PDT 24 |
4626294630 ps |
| T955 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.498023932 |
|
|
Apr 23 04:19:06 PM PDT 24 |
Apr 23 04:33:33 PM PDT 24 |
5517406700 ps |
| T672 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1808415202 |
|
|
Apr 23 04:38:43 PM PDT 24 |
Apr 23 04:44:20 PM PDT 24 |
3504640622 ps |
| T744 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.4096234781 |
|
|
Apr 23 04:28:17 PM PDT 24 |
Apr 23 04:37:12 PM PDT 24 |
5268709970 ps |
| T609 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.4083383180 |
|
|
Apr 23 04:13:25 PM PDT 24 |
Apr 23 04:15:02 PM PDT 24 |
1959174261 ps |
| T956 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2772274989 |
|
|
Apr 23 04:13:42 PM PDT 24 |
Apr 23 04:17:28 PM PDT 24 |
2672455880 ps |
| T309 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.195628479 |
|
|
Apr 23 03:52:37 PM PDT 24 |
Apr 23 04:01:13 PM PDT 24 |
4264211848 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.1495531264 |
|
|
Apr 23 04:08:52 PM PDT 24 |
Apr 23 04:19:26 PM PDT 24 |
7074540002 ps |
| T958 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2231206964 |
|
|
Apr 23 03:53:36 PM PDT 24 |
Apr 23 04:19:54 PM PDT 24 |
13209971251 ps |
| T678 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.2429521875 |
|
|
Apr 23 04:33:02 PM PDT 24 |
Apr 23 04:37:37 PM PDT 24 |
3293467756 ps |
| T959 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.825099608 |
|
|
Apr 23 04:19:53 PM PDT 24 |
Apr 23 04:41:26 PM PDT 24 |
16609522696 ps |
| T711 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3238325542 |
|
|
Apr 23 04:32:31 PM PDT 24 |
Apr 23 04:38:15 PM PDT 24 |
3750432744 ps |
| T260 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.1117450241 |
|
|
Apr 23 04:28:16 PM PDT 24 |
Apr 23 04:39:42 PM PDT 24 |
5592968088 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.208748113 |
|
|
Apr 23 04:14:03 PM PDT 24 |
Apr 23 04:24:07 PM PDT 24 |
5680318468 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.2561631096 |
|
|
Apr 23 03:53:43 PM PDT 24 |
Apr 23 04:00:23 PM PDT 24 |
5059274988 ps |
| T961 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.3060335731 |
|
|
Apr 23 04:08:00 PM PDT 24 |
Apr 23 04:17:20 PM PDT 24 |
4767547656 ps |
| T706 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.102383282 |
|
|
Apr 23 04:35:54 PM PDT 24 |
Apr 23 04:46:46 PM PDT 24 |
6009072668 ps |
| T962 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.2961336285 |
|
|
Apr 23 04:17:11 PM PDT 24 |
Apr 23 04:20:31 PM PDT 24 |
2532323560 ps |
| T963 |
/workspace/coverage/default/2.chip_sw_example_rom.2108196132 |
|
|
Apr 23 04:13:55 PM PDT 24 |
Apr 23 04:15:53 PM PDT 24 |
2272943580 ps |
| T684 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.2413113675 |
|
|
Apr 23 04:31:35 PM PDT 24 |
Apr 23 04:40:51 PM PDT 24 |
4794740136 ps |
| T964 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2080608915 |
|
|
Apr 23 04:01:41 PM PDT 24 |
Apr 23 04:05:56 PM PDT 24 |
2968037134 ps |
| T965 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.809981376 |
|
|
Apr 23 04:18:04 PM PDT 24 |
Apr 23 05:19:51 PM PDT 24 |
36512000586 ps |
| T966 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.2135972587 |
|
|
Apr 23 04:14:00 PM PDT 24 |
Apr 23 04:17:32 PM PDT 24 |
2791778984 ps |
| T967 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.4148751039 |
|
|
Apr 23 04:24:52 PM PDT 24 |
Apr 23 04:27:55 PM PDT 24 |
2233238739 ps |
| T318 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3729043734 |
|
|
Apr 23 04:10:40 PM PDT 24 |
Apr 23 04:21:25 PM PDT 24 |
4909458960 ps |
| T968 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.3027973243 |
|
|
Apr 23 04:11:40 PM PDT 24 |
Apr 23 04:17:19 PM PDT 24 |
5188222320 ps |
| T704 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.108908157 |
|
|
Apr 23 04:32:07 PM PDT 24 |
Apr 23 04:40:32 PM PDT 24 |
3469431384 ps |