| T241 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.3565994203 |
|
|
Apr 23 04:32:13 PM PDT 24 |
Apr 23 04:42:18 PM PDT 24 |
4952820664 ps |
| T39 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3901129646 |
|
|
Apr 23 04:07:07 PM PDT 24 |
Apr 23 04:14:06 PM PDT 24 |
4734143900 ps |
| T969 |
/workspace/coverage/default/4.chip_tap_straps_dev.3038093774 |
|
|
Apr 23 04:26:17 PM PDT 24 |
Apr 23 04:31:48 PM PDT 24 |
3812438326 ps |
| T499 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.717846966 |
|
|
Apr 23 04:19:26 PM PDT 24 |
Apr 23 04:48:00 PM PDT 24 |
13627304068 ps |
| T262 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.3194142357 |
|
|
Apr 23 04:20:04 PM PDT 24 |
Apr 23 04:28:22 PM PDT 24 |
3549693304 ps |
| T186 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1796165560 |
|
|
Apr 23 03:52:55 PM PDT 24 |
Apr 23 04:02:51 PM PDT 24 |
3742653530 ps |
| T970 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.4077130894 |
|
|
Apr 23 04:23:56 PM PDT 24 |
Apr 23 04:37:32 PM PDT 24 |
4568436216 ps |
| T971 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.4099551518 |
|
|
Apr 23 04:23:21 PM PDT 24 |
Apr 23 05:01:04 PM PDT 24 |
22391993991 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.2982511031 |
|
|
Apr 23 04:03:02 PM PDT 24 |
Apr 23 04:07:05 PM PDT 24 |
2919147016 ps |
| T973 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.65892890 |
|
|
Apr 23 03:52:15 PM PDT 24 |
Apr 23 03:57:26 PM PDT 24 |
3439253304 ps |
| T54 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.2642504340 |
|
|
Apr 23 03:57:51 PM PDT 24 |
Apr 23 04:03:47 PM PDT 24 |
3483163360 ps |
| T974 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2273844551 |
|
|
Apr 23 04:18:57 PM PDT 24 |
Apr 23 04:27:20 PM PDT 24 |
9374074248 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.3084450029 |
|
|
Apr 23 03:53:08 PM PDT 24 |
Apr 23 04:22:37 PM PDT 24 |
24730605392 ps |
| T976 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3450743127 |
|
|
Apr 23 03:53:45 PM PDT 24 |
Apr 23 03:56:46 PM PDT 24 |
3380364229 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3497973625 |
|
|
Apr 23 04:16:42 PM PDT 24 |
Apr 23 04:27:55 PM PDT 24 |
4193654486 ps |
| T978 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.4034659187 |
|
|
Apr 23 03:57:47 PM PDT 24 |
Apr 23 04:14:03 PM PDT 24 |
11715116612 ps |
| T979 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.780732716 |
|
|
Apr 23 03:53:30 PM PDT 24 |
Apr 23 04:01:24 PM PDT 24 |
7516025470 ps |
| T980 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.1759858559 |
|
|
Apr 23 04:27:35 PM PDT 24 |
Apr 23 04:30:30 PM PDT 24 |
2704024656 ps |
| T694 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.1960906832 |
|
|
Apr 23 04:32:55 PM PDT 24 |
Apr 23 04:42:07 PM PDT 24 |
4204761564 ps |
| T699 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.2676006804 |
|
|
Apr 23 04:33:11 PM PDT 24 |
Apr 23 04:42:03 PM PDT 24 |
4461285800 ps |
| T720 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1994997520 |
|
|
Apr 23 04:36:56 PM PDT 24 |
Apr 23 04:47:38 PM PDT 24 |
4240339400 ps |
| T981 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.413359734 |
|
|
Apr 23 03:54:25 PM PDT 24 |
Apr 23 03:57:56 PM PDT 24 |
2623301107 ps |
| T217 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.1651518008 |
|
|
Apr 23 04:05:10 PM PDT 24 |
Apr 23 04:11:25 PM PDT 24 |
4722515040 ps |
| T610 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.2614371853 |
|
|
Apr 23 04:01:35 PM PDT 24 |
Apr 23 04:03:16 PM PDT 24 |
2376911818 ps |
| T982 |
/workspace/coverage/default/2.chip_tap_straps_prod.3000407485 |
|
|
Apr 23 04:24:41 PM PDT 24 |
Apr 23 04:36:43 PM PDT 24 |
7829330346 ps |
| T983 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1063034403 |
|
|
Apr 23 04:28:03 PM PDT 24 |
Apr 23 04:39:32 PM PDT 24 |
4017667840 ps |
| T984 |
/workspace/coverage/default/0.chip_tap_straps_dev.444781591 |
|
|
Apr 23 03:52:55 PM PDT 24 |
Apr 23 03:54:51 PM PDT 24 |
1975943532 ps |
| T985 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.3617302542 |
|
|
Apr 23 04:28:50 PM PDT 24 |
Apr 23 04:33:12 PM PDT 24 |
2688143880 ps |
| T986 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.4170399569 |
|
|
Apr 23 03:54:51 PM PDT 24 |
Apr 23 04:05:01 PM PDT 24 |
7385354966 ps |
| T987 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.1847269452 |
|
|
Apr 23 04:08:44 PM PDT 24 |
Apr 23 04:13:35 PM PDT 24 |
3552871788 ps |
| T302 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.3326360944 |
|
|
Apr 23 04:15:16 PM PDT 24 |
Apr 23 04:24:09 PM PDT 24 |
4167736038 ps |
| T646 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.1660684219 |
|
|
Apr 23 04:20:36 PM PDT 24 |
Apr 23 05:18:43 PM PDT 24 |
20535198361 ps |
| T500 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.2937485195 |
|
|
Apr 23 03:51:20 PM PDT 24 |
Apr 23 04:17:10 PM PDT 24 |
12440120141 ps |
| T319 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.2728117955 |
|
|
Apr 23 03:50:31 PM PDT 24 |
Apr 23 03:54:26 PM PDT 24 |
2587776216 ps |
| T988 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.1619127324 |
|
|
Apr 23 04:12:52 PM PDT 24 |
Apr 23 04:29:50 PM PDT 24 |
6029154094 ps |
| T989 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2991265457 |
|
|
Apr 23 04:31:45 PM PDT 24 |
Apr 23 04:38:23 PM PDT 24 |
3042404072 ps |
| T990 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.291012743 |
|
|
Apr 23 04:08:50 PM PDT 24 |
Apr 23 07:39:40 PM PDT 24 |
254293050246 ps |
| T687 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2558135743 |
|
|
Apr 23 04:29:23 PM PDT 24 |
Apr 23 04:38:54 PM PDT 24 |
5936901660 ps |
| T64 |
/workspace/coverage/default/0.chip_sw_alert_test.585098634 |
|
|
Apr 23 03:52:56 PM PDT 24 |
Apr 23 03:57:31 PM PDT 24 |
2908825496 ps |
| T306 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2383683487 |
|
|
Apr 23 04:11:37 PM PDT 24 |
Apr 23 04:22:54 PM PDT 24 |
4443712001 ps |
| T991 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.1611557024 |
|
|
Apr 23 04:01:39 PM PDT 24 |
Apr 23 04:06:20 PM PDT 24 |
2904311000 ps |
| T690 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2193959709 |
|
|
Apr 23 04:30:00 PM PDT 24 |
Apr 23 04:40:39 PM PDT 24 |
5073633030 ps |
| T992 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.808648394 |
|
|
Apr 23 04:25:52 PM PDT 24 |
Apr 23 04:31:11 PM PDT 24 |
5010870014 ps |
| T681 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1821632277 |
|
|
Apr 23 04:31:37 PM PDT 24 |
Apr 23 04:40:18 PM PDT 24 |
4917865424 ps |
| T187 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.2284966254 |
|
|
Apr 23 04:22:22 PM PDT 24 |
Apr 23 04:35:09 PM PDT 24 |
5576922596 ps |
| T635 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.4025133162 |
|
|
Apr 23 04:26:25 PM PDT 24 |
Apr 23 04:31:45 PM PDT 24 |
4649716360 ps |
| T8 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2145704406 |
|
|
Apr 23 04:03:33 PM PDT 24 |
Apr 23 04:08:26 PM PDT 24 |
2806200321 ps |
| T218 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.974325576 |
|
|
Apr 23 04:15:06 PM PDT 24 |
Apr 23 04:20:53 PM PDT 24 |
3643591243 ps |
| T993 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.4410027 |
|
|
Apr 23 03:53:02 PM PDT 24 |
Apr 23 04:04:50 PM PDT 24 |
5806153226 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.2223577681 |
|
|
Apr 23 04:20:44 PM PDT 24 |
Apr 23 04:29:45 PM PDT 24 |
5595100640 ps |
| T995 |
/workspace/coverage/default/4.chip_tap_straps_prod.1874432157 |
|
|
Apr 23 04:28:21 PM PDT 24 |
Apr 23 04:34:07 PM PDT 24 |
4704489392 ps |
| T204 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.651945476 |
|
|
Apr 23 03:49:42 PM PDT 24 |
Apr 23 03:56:10 PM PDT 24 |
4366415787 ps |
| T996 |
/workspace/coverage/default/1.chip_tap_straps_dev.3825904879 |
|
|
Apr 23 04:10:23 PM PDT 24 |
Apr 23 04:32:28 PM PDT 24 |
11578073286 ps |
| T498 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.1123847704 |
|
|
Apr 23 04:20:02 PM PDT 24 |
Apr 23 04:35:06 PM PDT 24 |
4962453338 ps |
| T751 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.3563022380 |
|
|
Apr 23 04:32:29 PM PDT 24 |
Apr 23 04:39:39 PM PDT 24 |
4586430052 ps |
| T267 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.229489280 |
|
|
Apr 23 04:30:30 PM PDT 24 |
Apr 23 04:36:04 PM PDT 24 |
3993652728 ps |
| T242 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.3078125663 |
|
|
Apr 23 04:30:28 PM PDT 24 |
Apr 23 04:43:47 PM PDT 24 |
4464723890 ps |
| T997 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3727597721 |
|
|
Apr 23 04:10:14 PM PDT 24 |
Apr 23 04:17:37 PM PDT 24 |
7997063528 ps |
| T722 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1745128909 |
|
|
Apr 23 04:33:39 PM PDT 24 |
Apr 23 04:39:48 PM PDT 24 |
3693583424 ps |
| T219 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.42764199 |
|
|
Apr 23 04:06:20 PM PDT 24 |
Apr 23 05:35:06 PM PDT 24 |
47968627320 ps |
| T998 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.3349483298 |
|
|
Apr 23 03:55:07 PM PDT 24 |
Apr 23 04:03:51 PM PDT 24 |
5541460800 ps |
| T999 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.546800106 |
|
|
Apr 23 04:31:02 PM PDT 24 |
Apr 23 04:50:36 PM PDT 24 |
8419687925 ps |
| T215 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1862573591 |
|
|
Apr 23 04:11:07 PM PDT 24 |
Apr 23 04:46:38 PM PDT 24 |
25771743043 ps |
| T1000 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.1182426599 |
|
|
Apr 23 04:23:38 PM PDT 24 |
Apr 23 04:32:10 PM PDT 24 |
6255169400 ps |
| T730 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1812983731 |
|
|
Apr 23 04:29:27 PM PDT 24 |
Apr 23 04:36:09 PM PDT 24 |
3794361000 ps |
| T1001 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.1403802902 |
|
|
Apr 23 03:53:05 PM PDT 24 |
Apr 23 04:04:11 PM PDT 24 |
7852839524 ps |
| T1002 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.1032478813 |
|
|
Apr 23 04:26:01 PM PDT 24 |
Apr 23 04:27:46 PM PDT 24 |
2130496161 ps |
| T658 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.2802150554 |
|
|
Apr 23 04:32:33 PM PDT 24 |
Apr 23 04:41:46 PM PDT 24 |
5649302404 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.383578190 |
|
|
Apr 23 03:52:13 PM PDT 24 |
Apr 23 04:10:06 PM PDT 24 |
8517889000 ps |
| T1004 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.3940557045 |
|
|
Apr 23 03:51:34 PM PDT 24 |
Apr 23 04:01:33 PM PDT 24 |
5675019050 ps |
| T1005 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3112824388 |
|
|
Apr 23 03:51:42 PM PDT 24 |
Apr 23 04:22:28 PM PDT 24 |
27304974230 ps |
| T647 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.784646347 |
|
|
Apr 23 04:06:36 PM PDT 24 |
Apr 23 04:53:30 PM PDT 24 |
20486896933 ps |
| T654 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.679373310 |
|
|
Apr 23 04:32:10 PM PDT 24 |
Apr 23 04:42:18 PM PDT 24 |
4715298836 ps |
| T316 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.548806150 |
|
|
Apr 23 03:51:10 PM PDT 24 |
Apr 23 04:05:23 PM PDT 24 |
5694533862 ps |
| T1006 |
/workspace/coverage/default/2.chip_sival_flash_info_access.4145786810 |
|
|
Apr 23 04:14:14 PM PDT 24 |
Apr 23 04:18:25 PM PDT 24 |
3136909030 ps |
| T1007 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.4055349538 |
|
|
Apr 23 04:26:55 PM PDT 24 |
Apr 23 04:33:32 PM PDT 24 |
6361369646 ps |
| T1008 |
/workspace/coverage/default/1.rom_keymgr_functest.981648145 |
|
|
Apr 23 04:18:11 PM PDT 24 |
Apr 23 04:26:39 PM PDT 24 |
4767606290 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.2102391992 |
|
|
Apr 23 04:22:39 PM PDT 24 |
Apr 23 04:26:37 PM PDT 24 |
2247483000 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.1620499487 |
|
|
Apr 23 04:26:06 PM PDT 24 |
Apr 23 04:30:18 PM PDT 24 |
2367276386 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.2911972850 |
|
|
Apr 23 04:21:12 PM PDT 24 |
Apr 23 04:48:00 PM PDT 24 |
8752189952 ps |
| T1012 |
/workspace/coverage/default/2.chip_sw_edn_kat.1509037601 |
|
|
Apr 23 04:21:44 PM PDT 24 |
Apr 23 04:32:02 PM PDT 24 |
3165234160 ps |
| T27 |
/workspace/coverage/default/1.chip_sw_gpio.3701166659 |
|
|
Apr 23 04:04:29 PM PDT 24 |
Apr 23 04:13:21 PM PDT 24 |
3653701340 ps |
| T1013 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.3309401344 |
|
|
Apr 23 04:09:09 PM PDT 24 |
Apr 23 04:42:19 PM PDT 24 |
7906241444 ps |
| T1014 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.1677261455 |
|
|
Apr 23 04:27:25 PM PDT 24 |
Apr 23 04:37:11 PM PDT 24 |
5033373220 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.1890425541 |
|
|
Apr 23 03:53:44 PM PDT 24 |
Apr 23 03:59:06 PM PDT 24 |
2989978234 ps |
| T709 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.1204111325 |
|
|
Apr 23 04:37:37 PM PDT 24 |
Apr 23 04:44:17 PM PDT 24 |
3559130680 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2791909475 |
|
|
Apr 23 03:55:20 PM PDT 24 |
Apr 23 04:10:27 PM PDT 24 |
6903197451 ps |
| T252 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.414046825 |
|
|
Apr 23 03:51:45 PM PDT 24 |
Apr 23 04:03:20 PM PDT 24 |
6135302454 ps |
| T1017 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.1606343438 |
|
|
Apr 23 04:28:59 PM PDT 24 |
Apr 23 04:37:37 PM PDT 24 |
4574889940 ps |
| T733 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2309657935 |
|
|
Apr 23 04:30:37 PM PDT 24 |
Apr 23 04:37:54 PM PDT 24 |
3706027500 ps |
| T1018 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.3589689434 |
|
|
Apr 23 04:23:51 PM PDT 24 |
Apr 23 04:27:44 PM PDT 24 |
2523069639 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3965796141 |
|
|
Apr 23 04:20:18 PM PDT 24 |
Apr 23 04:25:24 PM PDT 24 |
2684781638 ps |
| T728 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3967450380 |
|
|
Apr 23 04:31:34 PM PDT 24 |
Apr 23 04:37:34 PM PDT 24 |
4255262936 ps |
| T1020 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.1727846553 |
|
|
Apr 23 04:15:02 PM PDT 24 |
Apr 23 04:18:19 PM PDT 24 |
3206286024 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1352753669 |
|
|
Apr 23 03:52:35 PM PDT 24 |
Apr 23 03:55:29 PM PDT 24 |
3455330201 ps |
| T1022 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2742480712 |
|
|
Apr 23 04:24:40 PM PDT 24 |
Apr 23 04:34:26 PM PDT 24 |
5042967390 ps |
| T1023 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3215918743 |
|
|
Apr 23 04:19:17 PM PDT 24 |
Apr 23 04:21:16 PM PDT 24 |
2715561616 ps |
| T263 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1853051796 |
|
|
Apr 23 03:55:29 PM PDT 24 |
Apr 23 04:04:25 PM PDT 24 |
5526653992 ps |
| T1024 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.615236323 |
|
|
Apr 23 04:02:22 PM PDT 24 |
Apr 23 04:06:28 PM PDT 24 |
2753161192 ps |
| T1025 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.961227112 |
|
|
Apr 23 04:09:40 PM PDT 24 |
Apr 23 04:14:28 PM PDT 24 |
3115619136 ps |
| T303 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2921598899 |
|
|
Apr 23 03:55:06 PM PDT 24 |
Apr 23 04:04:47 PM PDT 24 |
5043703552 ps |
| T737 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.2940105218 |
|
|
Apr 23 04:28:09 PM PDT 24 |
Apr 23 04:38:38 PM PDT 24 |
4786172232 ps |
| T715 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.161987209 |
|
|
Apr 23 04:31:12 PM PDT 24 |
Apr 23 04:39:31 PM PDT 24 |
3673607800 ps |
| T1026 |
/workspace/coverage/default/1.chip_sw_aes_entropy.812600200 |
|
|
Apr 23 04:07:28 PM PDT 24 |
Apr 23 04:11:48 PM PDT 24 |
3167445888 ps |
| T1027 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.2204464182 |
|
|
Apr 23 04:03:30 PM PDT 24 |
Apr 23 04:53:57 PM PDT 24 |
13268065944 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.835360015 |
|
|
Apr 23 04:25:38 PM PDT 24 |
Apr 23 04:33:12 PM PDT 24 |
4685385420 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.3587731344 |
|
|
Apr 23 04:07:25 PM PDT 24 |
Apr 23 04:10:33 PM PDT 24 |
2487093124 ps |
| T679 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.2350536747 |
|
|
Apr 23 04:30:44 PM PDT 24 |
Apr 23 04:37:04 PM PDT 24 |
3342010464 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.3119554027 |
|
|
Apr 23 03:53:59 PM PDT 24 |
Apr 23 04:21:44 PM PDT 24 |
17355769051 ps |
| T1029 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.3774700611 |
|
|
Apr 23 04:02:07 PM PDT 24 |
Apr 23 04:07:09 PM PDT 24 |
2922100012 ps |
| T1030 |
/workspace/coverage/default/0.chip_sw_kmac_idle.2026390177 |
|
|
Apr 23 03:54:07 PM PDT 24 |
Apr 23 03:58:26 PM PDT 24 |
2587607768 ps |
| T1031 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3088253011 |
|
|
Apr 23 04:16:10 PM PDT 24 |
Apr 23 08:41:28 PM PDT 24 |
79096068237 ps |
| T406 |
/workspace/coverage/default/2.chip_jtag_mem_access.3101742441 |
|
|
Apr 23 04:16:36 PM PDT 24 |
Apr 23 04:41:27 PM PDT 24 |
13555249908 ps |
| T372 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2342629031 |
|
|
Apr 23 03:53:30 PM PDT 24 |
Apr 23 03:57:37 PM PDT 24 |
3037345001 ps |
| T297 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.2822519889 |
|
|
Apr 23 04:19:02 PM PDT 24 |
Apr 23 04:46:58 PM PDT 24 |
10569416766 ps |
| T1032 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.10303383 |
|
|
Apr 23 04:02:56 PM PDT 24 |
Apr 23 04:06:30 PM PDT 24 |
2328410662 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.329771508 |
|
|
Apr 23 04:27:41 PM PDT 24 |
Apr 23 04:32:57 PM PDT 24 |
3510258068 ps |
| T207 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.83254107 |
|
|
Apr 23 04:09:44 PM PDT 24 |
Apr 23 04:16:20 PM PDT 24 |
3743850820 ps |
| T154 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1721525604 |
|
|
Apr 23 03:51:13 PM PDT 24 |
Apr 23 04:18:04 PM PDT 24 |
7301458410 ps |
| T639 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.1351529020 |
|
|
Apr 23 04:07:28 PM PDT 24 |
Apr 23 04:19:35 PM PDT 24 |
4915474180 ps |
| T44 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.147967084 |
|
|
Apr 23 04:05:22 PM PDT 24 |
Apr 24 12:34:42 AM PDT 24 |
152751739624 ps |
| T106 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1565981130 |
|
|
Apr 23 03:55:40 PM PDT 24 |
Apr 23 04:20:26 PM PDT 24 |
19488985394 ps |
| T286 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.2587284742 |
|
|
Apr 23 04:28:19 PM PDT 24 |
Apr 23 04:36:42 PM PDT 24 |
5123921528 ps |
| T705 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.311712474 |
|
|
Apr 23 04:31:42 PM PDT 24 |
Apr 23 04:38:52 PM PDT 24 |
4256958422 ps |
| T1034 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.1327382153 |
|
|
Apr 23 04:05:46 PM PDT 24 |
Apr 23 04:16:20 PM PDT 24 |
6630179422 ps |
| T1035 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.305698288 |
|
|
Apr 23 03:50:14 PM PDT 24 |
Apr 23 03:52:49 PM PDT 24 |
2812730956 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2131625843 |
|
|
Apr 23 04:13:07 PM PDT 24 |
Apr 23 04:17:30 PM PDT 24 |
3791877632 ps |
| T264 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.461354590 |
|
|
Apr 23 03:54:24 PM PDT 24 |
Apr 23 04:02:54 PM PDT 24 |
5338965735 ps |
| T35 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.1505064194 |
|
|
Apr 23 04:03:45 PM PDT 24 |
Apr 23 04:07:58 PM PDT 24 |
3263930698 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.851324328 |
|
|
Apr 23 04:19:46 PM PDT 24 |
Apr 23 04:27:27 PM PDT 24 |
4621870328 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.1050777479 |
|
|
Apr 23 04:10:14 PM PDT 24 |
Apr 23 04:12:49 PM PDT 24 |
2321066000 ps |
| T1039 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2418914536 |
|
|
Apr 23 03:55:28 PM PDT 24 |
Apr 23 03:57:53 PM PDT 24 |
2894875821 ps |
| T1040 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2636595527 |
|
|
Apr 23 04:26:21 PM PDT 24 |
Apr 23 05:06:26 PM PDT 24 |
12991341186 ps |
| T1041 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.4248670010 |
|
|
Apr 23 03:55:29 PM PDT 24 |
Apr 23 05:01:23 PM PDT 24 |
18298175258 ps |
| T1042 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.135684549 |
|
|
Apr 23 04:16:07 PM PDT 24 |
Apr 23 04:29:09 PM PDT 24 |
10320510818 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.328394394 |
|
|
Apr 23 04:04:31 PM PDT 24 |
Apr 23 04:14:41 PM PDT 24 |
4386601210 ps |
| T373 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.2798238977 |
|
|
Apr 23 04:24:12 PM PDT 24 |
Apr 23 04:29:41 PM PDT 24 |
4893869512 ps |
| T1043 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3180961686 |
|
|
Apr 23 03:52:25 PM PDT 24 |
Apr 23 04:01:10 PM PDT 24 |
4013047976 ps |
| T1044 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.1655318766 |
|
|
Apr 23 04:25:41 PM PDT 24 |
Apr 23 04:35:52 PM PDT 24 |
4283508352 ps |
| T205 |
/workspace/coverage/default/0.chip_jtag_csr_rw.4104504628 |
|
|
Apr 23 03:46:00 PM PDT 24 |
Apr 23 04:02:25 PM PDT 24 |
10604464711 ps |
| T363 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.3442712233 |
|
|
Apr 23 03:53:35 PM PDT 24 |
Apr 23 03:55:28 PM PDT 24 |
2367262330 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1332337326 |
|
|
Apr 23 04:08:00 PM PDT 24 |
Apr 23 04:16:50 PM PDT 24 |
18461998824 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.4005654653 |
|
|
Apr 23 03:54:30 PM PDT 24 |
Apr 23 03:58:22 PM PDT 24 |
2685962904 ps |
| T1047 |
/workspace/coverage/default/2.chip_sw_aes_enc.2552951133 |
|
|
Apr 23 04:23:25 PM PDT 24 |
Apr 23 04:28:47 PM PDT 24 |
2625591268 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3001857436 |
|
|
Apr 23 04:21:06 PM PDT 24 |
Apr 23 04:32:16 PM PDT 24 |
5869350070 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_kmac_idle.1131362188 |
|
|
Apr 23 04:23:16 PM PDT 24 |
Apr 23 04:26:50 PM PDT 24 |
3300218546 ps |
| T45 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.1903323535 |
|
|
Apr 23 04:03:29 PM PDT 24 |
Apr 23 08:29:35 PM PDT 24 |
80236101368 ps |
| T277 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.3227798854 |
|
|
Apr 23 04:13:57 PM PDT 24 |
Apr 23 04:18:45 PM PDT 24 |
2196472132 ps |
| T1050 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.2043840843 |
|
|
Apr 23 04:23:27 PM PDT 24 |
Apr 23 04:33:14 PM PDT 24 |
4646954130 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.1534732190 |
|
|
Apr 23 04:06:44 PM PDT 24 |
Apr 23 05:30:54 PM PDT 24 |
49385359851 ps |
| T9 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.1342482314 |
|
|
Apr 23 03:50:17 PM PDT 24 |
Apr 23 03:53:57 PM PDT 24 |
2829352713 ps |
| T1052 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.2191515523 |
|
|
Apr 23 04:22:05 PM PDT 24 |
Apr 23 04:41:33 PM PDT 24 |
5517778829 ps |
| T1053 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.699165873 |
|
|
Apr 23 04:02:03 PM PDT 24 |
Apr 23 09:15:17 PM PDT 24 |
77563072500 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.819289534 |
|
|
Apr 23 04:05:31 PM PDT 24 |
Apr 23 04:37:40 PM PDT 24 |
8568290780 ps |
| T1055 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.748579460 |
|
|
Apr 23 04:02:48 PM PDT 24 |
Apr 23 04:15:07 PM PDT 24 |
5973476432 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.69153996 |
|
|
Apr 23 04:26:47 PM PDT 24 |
Apr 23 04:29:46 PM PDT 24 |
2957386550 ps |
| T1057 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.242780653 |
|
|
Apr 23 04:07:02 PM PDT 24 |
Apr 23 04:12:52 PM PDT 24 |
5098969288 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.479111225 |
|
|
Apr 23 04:23:44 PM PDT 24 |
Apr 23 04:38:57 PM PDT 24 |
7363767100 ps |
| T1059 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.356403211 |
|
|
Apr 23 04:17:17 PM PDT 24 |
Apr 23 04:24:16 PM PDT 24 |
4611301556 ps |
| T208 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1387889948 |
|
|
Apr 23 04:10:41 PM PDT 24 |
Apr 23 05:09:26 PM PDT 24 |
14296729578 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1491095704 |
|
|
Apr 23 04:05:02 PM PDT 24 |
Apr 23 04:22:48 PM PDT 24 |
5859983557 ps |
| T1061 |
/workspace/coverage/default/3.chip_tap_straps_dev.2133086643 |
|
|
Apr 23 04:26:55 PM PDT 24 |
Apr 23 04:42:27 PM PDT 24 |
9559080105 ps |
| T1062 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.1598848020 |
|
|
Apr 23 04:06:10 PM PDT 24 |
Apr 23 04:10:57 PM PDT 24 |
3989681176 ps |
| T332 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.112320638 |
|
|
Apr 23 04:06:04 PM PDT 24 |
Apr 23 04:15:35 PM PDT 24 |
4190669862 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.2120061872 |
|
|
Apr 23 03:51:16 PM PDT 24 |
Apr 23 03:55:32 PM PDT 24 |
3211201186 ps |
| T1064 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.4194415144 |
|
|
Apr 23 03:52:02 PM PDT 24 |
Apr 23 03:56:20 PM PDT 24 |
2658585300 ps |
| T649 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.870059838 |
|
|
Apr 23 04:28:17 PM PDT 24 |
Apr 23 04:39:58 PM PDT 24 |
5767132460 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.3988329772 |
|
|
Apr 23 04:13:41 PM PDT 24 |
Apr 23 04:43:09 PM PDT 24 |
7996905146 ps |
| T606 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.3425527855 |
|
|
Apr 23 04:24:10 PM PDT 24 |
Apr 23 04:33:49 PM PDT 24 |
6001143718 ps |
| T1066 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.2564792484 |
|
|
Apr 23 04:29:01 PM PDT 24 |
Apr 23 04:39:06 PM PDT 24 |
4954156840 ps |
| T163 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.3190926885 |
|
|
Apr 23 04:28:01 PM PDT 24 |
Apr 23 04:38:00 PM PDT 24 |
4197508980 ps |
| T1067 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.1600361185 |
|
|
Apr 23 04:01:09 PM PDT 24 |
Apr 23 04:03:27 PM PDT 24 |
2198916424 ps |
| T1068 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.500362578 |
|
|
Apr 23 04:06:50 PM PDT 24 |
Apr 23 04:59:30 PM PDT 24 |
39259869602 ps |
| T653 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.2828533230 |
|
|
Apr 23 04:35:09 PM PDT 24 |
Apr 23 04:42:49 PM PDT 24 |
3574365800 ps |
| T1069 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.1566093697 |
|
|
Apr 23 03:56:29 PM PDT 24 |
Apr 23 04:05:13 PM PDT 24 |
10774396348 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.2480027046 |
|
|
Apr 23 04:20:25 PM PDT 24 |
Apr 23 04:26:14 PM PDT 24 |
2612258048 ps |
| T1071 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3051041191 |
|
|
Apr 23 03:55:57 PM PDT 24 |
Apr 23 03:59:26 PM PDT 24 |
2621754280 ps |
| T94 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.2185456361 |
|
|
Apr 23 04:31:57 PM PDT 24 |
Apr 23 04:38:15 PM PDT 24 |
3769415752 ps |
| T716 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.244625262 |
|
|
Apr 23 04:32:27 PM PDT 24 |
Apr 23 04:38:46 PM PDT 24 |
4049376656 ps |
| T287 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.476549646 |
|
|
Apr 23 04:33:18 PM PDT 24 |
Apr 23 04:38:41 PM PDT 24 |
3682597240 ps |
| T1072 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.2877453330 |
|
|
Apr 23 04:26:27 PM PDT 24 |
Apr 23 04:35:53 PM PDT 24 |
7155622977 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.2158465522 |
|
|
Apr 23 03:52:08 PM PDT 24 |
Apr 23 04:43:53 PM PDT 24 |
21172914672 ps |
| T727 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1848037085 |
|
|
Apr 23 04:36:58 PM PDT 24 |
Apr 23 04:42:10 PM PDT 24 |
3540510732 ps |
| T1074 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.2749379796 |
|
|
Apr 23 04:31:05 PM PDT 24 |
Apr 23 05:05:17 PM PDT 24 |
8638617870 ps |
| T1075 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.563710052 |
|
|
Apr 23 04:30:18 PM PDT 24 |
Apr 23 04:34:50 PM PDT 24 |
2552868910 ps |
| T1076 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.730082249 |
|
|
Apr 23 03:51:08 PM PDT 24 |
Apr 23 03:58:05 PM PDT 24 |
4022522201 ps |
| T736 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3888387222 |
|
|
Apr 23 04:29:31 PM PDT 24 |
Apr 23 04:35:17 PM PDT 24 |
3257051212 ps |
| T696 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.4208958706 |
|
|
Apr 23 04:32:31 PM PDT 24 |
Apr 23 04:39:17 PM PDT 24 |
4112120430 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_example_concurrency.1343576391 |
|
|
Apr 23 03:50:17 PM PDT 24 |
Apr 23 03:54:04 PM PDT 24 |
3198027880 ps |
| T1078 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.4139699884 |
|
|
Apr 23 04:20:10 PM PDT 24 |
Apr 23 04:30:37 PM PDT 24 |
6674930800 ps |
| T1079 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3003198019 |
|
|
Apr 23 04:36:03 PM PDT 24 |
Apr 23 04:43:26 PM PDT 24 |
5067181908 ps |
| T1080 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1690474594 |
|
|
Apr 23 04:27:49 PM PDT 24 |
Apr 23 04:35:07 PM PDT 24 |
3607695424 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.1034378530 |
|
|
Apr 23 04:26:15 PM PDT 24 |
Apr 23 04:30:34 PM PDT 24 |
2569086092 ps |
| T320 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.3910939357 |
|
|
Apr 23 04:05:05 PM PDT 24 |
Apr 23 04:08:36 PM PDT 24 |
2616245630 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_example_rom.2414404709 |
|
|
Apr 23 04:01:50 PM PDT 24 |
Apr 23 04:03:41 PM PDT 24 |
2143476456 ps |
| T752 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.565530088 |
|
|
Apr 23 04:29:14 PM PDT 24 |
Apr 23 04:41:41 PM PDT 24 |
5300262148 ps |
| T745 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.944371116 |
|
|
Apr 23 04:03:32 PM PDT 24 |
Apr 23 04:15:42 PM PDT 24 |
4753778604 ps |
| T1083 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.1995013799 |
|
|
Apr 23 03:53:37 PM PDT 24 |
Apr 23 05:17:57 PM PDT 24 |
45975325840 ps |
| T1084 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.1667144849 |
|
|
Apr 23 04:04:26 PM PDT 24 |
Apr 23 07:38:32 PM PDT 24 |
64487944020 ps |
| T296 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.757048340 |
|
|
Apr 23 03:52:22 PM PDT 24 |
Apr 23 04:21:24 PM PDT 24 |
12909797200 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.486895711 |
|
|
Apr 23 03:50:06 PM PDT 24 |
Apr 23 05:18:55 PM PDT 24 |
44131516963 ps |
| T1086 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.552970386 |
|
|
Apr 23 04:17:17 PM PDT 24 |
Apr 23 04:41:54 PM PDT 24 |
8445605408 ps |
| T59 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3644032216 |
|
|
Apr 23 04:05:40 PM PDT 24 |
Apr 23 04:08:27 PM PDT 24 |
3056998072 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.2389503725 |
|
|
Apr 23 04:10:54 PM PDT 24 |
Apr 23 04:13:02 PM PDT 24 |
2214691730 ps |
| T1088 |
/workspace/coverage/default/1.chip_sw_aes_idle.1436104064 |
|
|
Apr 23 04:08:01 PM PDT 24 |
Apr 23 04:11:20 PM PDT 24 |
2468854420 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.318869397 |
|
|
Apr 23 04:21:02 PM PDT 24 |
Apr 23 04:46:16 PM PDT 24 |
6633084216 ps |
| T1090 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.4074006036 |
|
|
Apr 23 03:55:06 PM PDT 24 |
Apr 23 04:00:00 PM PDT 24 |
3769480814 ps |
| T1091 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.981121596 |
|
|
Apr 23 03:51:35 PM PDT 24 |
Apr 23 04:06:45 PM PDT 24 |
6104070620 ps |
| T166 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.175171024 |
|
|
Apr 23 04:18:30 PM PDT 24 |
Apr 23 04:20:10 PM PDT 24 |
1745923166 ps |
| T619 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.863482999 |
|
|
Apr 23 04:32:56 PM PDT 24 |
Apr 23 04:44:27 PM PDT 24 |
5479156756 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1300748780 |
|
|
Apr 23 04:12:42 PM PDT 24 |
Apr 23 04:21:16 PM PDT 24 |
4740975879 ps |
| T1093 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2385787484 |
|
|
Apr 23 04:01:38 PM PDT 24 |
Apr 23 04:07:20 PM PDT 24 |
2688513950 ps |
| T1094 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.1599597437 |
|
|
Apr 23 04:06:03 PM PDT 24 |
Apr 23 04:12:27 PM PDT 24 |
4522226480 ps |
| T1095 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2401799077 |
|
|
Apr 23 04:10:08 PM PDT 24 |
Apr 23 04:20:01 PM PDT 24 |
4590713660 ps |
| T740 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.4200403812 |
|
|
Apr 23 04:32:47 PM PDT 24 |
Apr 23 04:41:12 PM PDT 24 |
5522031174 ps |
| T288 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.401969489 |
|
|
Apr 23 04:35:19 PM PDT 24 |
Apr 23 04:43:36 PM PDT 24 |
3984699848 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.3175883541 |
|
|
Apr 23 04:06:19 PM PDT 24 |
Apr 23 04:28:28 PM PDT 24 |
7588307480 ps |
| T1097 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.3708372571 |
|
|
Apr 23 04:09:06 PM PDT 24 |
Apr 23 04:31:16 PM PDT 24 |
7849596398 ps |
| T72 |
/workspace/coverage/default/0.chip_tap_straps_rma.3776948030 |
|
|
Apr 23 03:54:05 PM PDT 24 |
Apr 23 04:02:40 PM PDT 24 |
6812423466 ps |
| T1098 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.2222459525 |
|
|
Apr 23 03:53:14 PM PDT 24 |
Apr 23 04:01:25 PM PDT 24 |
3923313792 ps |
| T1099 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.373149996 |
|
|
Apr 23 04:23:41 PM PDT 24 |
Apr 23 04:32:50 PM PDT 24 |
4506545260 ps |
| T41 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.530024320 |
|
|
Apr 23 03:50:07 PM PDT 24 |
Apr 23 03:55:37 PM PDT 24 |
3425725587 ps |
| T1100 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1119378592 |
|
|
Apr 23 04:29:03 PM PDT 24 |
Apr 23 04:37:08 PM PDT 24 |
5955243887 ps |
| T300 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.4261781258 |
|
|
Apr 23 04:28:12 PM PDT 24 |
Apr 23 04:40:56 PM PDT 24 |
4656811104 ps |
| T1101 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.444124949 |
|
|
Apr 23 04:24:21 PM PDT 24 |
Apr 23 04:35:12 PM PDT 24 |
4203779820 ps |
| T185 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.1935845119 |
|
|
Apr 23 04:20:45 PM PDT 24 |
Apr 23 05:42:45 PM PDT 24 |
43000363399 ps |
| T1102 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.822747118 |
|
|
Apr 23 04:17:57 PM PDT 24 |
Apr 23 04:23:21 PM PDT 24 |
3336250648 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.3815793003 |
|
|
Apr 23 04:05:57 PM PDT 24 |
Apr 23 04:10:16 PM PDT 24 |
2354123518 ps |
| T1104 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.2359038729 |
|
|
Apr 23 04:20:20 PM PDT 24 |
Apr 23 04:22:47 PM PDT 24 |
3045892234 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.853584818 |
|
|
Apr 23 03:52:13 PM PDT 24 |
Apr 23 04:04:10 PM PDT 24 |
8044703762 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2164715005 |
|
|
Apr 23 04:10:41 PM PDT 24 |
Apr 23 04:16:57 PM PDT 24 |
4704311839 ps |
| T243 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.4294300448 |
|
|
Apr 23 04:28:12 PM PDT 24 |
Apr 23 04:38:04 PM PDT 24 |
5271092440 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.1693135089 |
|
|
Apr 23 03:55:16 PM PDT 24 |
Apr 23 05:07:55 PM PDT 24 |
17793016408 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.3421184496 |
|
|
Apr 23 04:08:13 PM PDT 24 |
Apr 23 04:12:14 PM PDT 24 |
3130536318 ps |
| T1108 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.521851412 |
|
|
Apr 23 04:31:21 PM PDT 24 |
Apr 23 04:40:57 PM PDT 24 |
4361265284 ps |
| T1109 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.1521679973 |
|
|
Apr 23 04:16:21 PM PDT 24 |
Apr 23 04:26:25 PM PDT 24 |
3981041996 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.390107753 |
|
|
Apr 23 03:51:30 PM PDT 24 |
Apr 23 03:56:55 PM PDT 24 |
3503378050 ps |
| T1111 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1190982013 |
|
|
Apr 23 04:10:44 PM PDT 24 |
Apr 23 04:16:32 PM PDT 24 |
3481725905 ps |
| T1112 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.3386598734 |
|
|
Apr 23 04:10:37 PM PDT 24 |
Apr 23 04:14:29 PM PDT 24 |
3269128938 ps |
| T1113 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.1561372259 |
|
|
Apr 23 04:14:21 PM PDT 24 |
Apr 23 04:17:43 PM PDT 24 |
3071675732 ps |
| T1114 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.4208713290 |
|
|
Apr 23 04:27:18 PM PDT 24 |
Apr 23 04:36:01 PM PDT 24 |
4839288362 ps |
| T1115 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.2615989336 |
|
|
Apr 23 04:20:04 PM PDT 24 |
Apr 23 05:57:09 PM PDT 24 |
45630678345 ps |
| T1116 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3073324528 |
|
|
Apr 23 04:25:00 PM PDT 24 |
Apr 23 04:36:25 PM PDT 24 |
5143616180 ps |
| T685 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.2194946617 |
|
|
Apr 23 04:31:02 PM PDT 24 |
Apr 23 04:43:46 PM PDT 24 |
4911815000 ps |
| T321 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.1074859982 |
|
|
Apr 23 04:15:34 PM PDT 24 |
Apr 23 04:19:24 PM PDT 24 |
3134070356 ps |
| T1117 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.310847810 |
|
|
Apr 23 03:51:45 PM PDT 24 |
Apr 23 03:59:34 PM PDT 24 |
18181719120 ps |
| T1118 |
/workspace/coverage/default/0.chip_sw_example_flash.1003293920 |
|
|
Apr 23 03:50:36 PM PDT 24 |
Apr 23 03:53:15 PM PDT 24 |
2700556404 ps |
| T1119 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.2953313309 |
|
|
Apr 23 03:53:29 PM PDT 24 |
Apr 23 05:42:33 PM PDT 24 |
47788325185 ps |
| T1120 |
/workspace/coverage/default/2.chip_tap_straps_rma.3823001005 |
|
|
Apr 23 04:24:46 PM PDT 24 |
Apr 23 04:32:18 PM PDT 24 |
5537971889 ps |
| T268 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.251554054 |
|
|
Apr 23 04:31:22 PM PDT 24 |
Apr 23 04:36:45 PM PDT 24 |
4349774818 ps |