| T708 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2461908041 |
|
|
Jun 13 03:36:44 PM PDT 24 |
Jun 13 03:42:49 PM PDT 24 |
3134940397 ps |
| T709 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1717396319 |
|
|
Jun 13 03:39:14 PM PDT 24 |
Jun 13 04:36:57 PM PDT 24 |
21049156035 ps |
| T387 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1412354887 |
|
|
Jun 13 03:53:19 PM PDT 24 |
Jun 13 03:57:56 PM PDT 24 |
2296552160 ps |
| T555 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.3115959657 |
|
|
Jun 13 04:11:24 PM PDT 24 |
Jun 13 04:17:49 PM PDT 24 |
3791321188 ps |
| T710 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.2294428035 |
|
|
Jun 13 03:53:31 PM PDT 24 |
Jun 13 04:15:09 PM PDT 24 |
9379224310 ps |
| T711 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.1786088030 |
|
|
Jun 13 03:57:59 PM PDT 24 |
Jun 13 04:04:38 PM PDT 24 |
3805223460 ps |
| T712 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.4116414110 |
|
|
Jun 13 03:49:50 PM PDT 24 |
Jun 13 03:54:35 PM PDT 24 |
3459677740 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.4290361273 |
|
|
Jun 13 03:36:39 PM PDT 24 |
Jun 13 03:43:32 PM PDT 24 |
5451983012 ps |
| T385 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.2701713424 |
|
|
Jun 13 04:11:45 PM PDT 24 |
Jun 13 04:21:08 PM PDT 24 |
5671480226 ps |
| T713 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.310375753 |
|
|
Jun 13 03:43:36 PM PDT 24 |
Jun 13 03:53:44 PM PDT 24 |
6883358607 ps |
| T714 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.2364038002 |
|
|
Jun 13 04:07:17 PM PDT 24 |
Jun 13 05:28:18 PM PDT 24 |
22353449290 ps |
| T494 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.3325206169 |
|
|
Jun 13 04:13:49 PM PDT 24 |
Jun 13 04:21:34 PM PDT 24 |
3923742438 ps |
| T715 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.1698255137 |
|
|
Jun 13 03:46:10 PM PDT 24 |
Jun 13 03:57:14 PM PDT 24 |
5503559752 ps |
| T716 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.1753968098 |
|
|
Jun 13 03:39:47 PM PDT 24 |
Jun 13 03:42:56 PM PDT 24 |
2720493133 ps |
| T251 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.3998401488 |
|
|
Jun 13 03:36:41 PM PDT 24 |
Jun 13 03:42:50 PM PDT 24 |
4376282442 ps |
| T717 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1356024326 |
|
|
Jun 13 03:45:11 PM PDT 24 |
Jun 13 03:52:45 PM PDT 24 |
5214688350 ps |
| T718 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.4032752053 |
|
|
Jun 13 03:40:03 PM PDT 24 |
Jun 13 03:45:02 PM PDT 24 |
3185108354 ps |
| T557 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1658015493 |
|
|
Jun 13 04:10:24 PM PDT 24 |
Jun 13 04:20:14 PM PDT 24 |
3801836282 ps |
| T476 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1011366064 |
|
|
Jun 13 03:40:28 PM PDT 24 |
Jun 13 03:47:06 PM PDT 24 |
3622270504 ps |
| T354 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.667286538 |
|
|
Jun 13 03:59:06 PM PDT 24 |
Jun 13 04:53:59 PM PDT 24 |
13134663412 ps |
| T719 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.2040766557 |
|
|
Jun 13 03:45:10 PM PDT 24 |
Jun 13 04:45:42 PM PDT 24 |
13256552874 ps |
| T720 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1856771942 |
|
|
Jun 13 04:09:57 PM PDT 24 |
Jun 13 04:40:22 PM PDT 24 |
8684268364 ps |
| T388 |
/workspace/coverage/default/0.chip_sival_flash_info_access.1136067912 |
|
|
Jun 13 03:35:28 PM PDT 24 |
Jun 13 03:41:02 PM PDT 24 |
3282359400 ps |
| T157 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.4124613935 |
|
|
Jun 13 03:38:59 PM PDT 24 |
Jun 13 03:51:30 PM PDT 24 |
8952334216 ps |
| T721 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.3066020368 |
|
|
Jun 13 03:45:21 PM PDT 24 |
Jun 13 04:46:04 PM PDT 24 |
14056860725 ps |
| T501 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3112069070 |
|
|
Jun 13 04:18:03 PM PDT 24 |
Jun 13 04:26:40 PM PDT 24 |
5049703256 ps |
| T97 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.2789274267 |
|
|
Jun 13 04:07:07 PM PDT 24 |
Jun 13 04:18:50 PM PDT 24 |
6348877524 ps |
| T722 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.932064193 |
|
|
Jun 13 04:02:27 PM PDT 24 |
Jun 13 04:23:04 PM PDT 24 |
5252933742 ps |
| T723 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.1723392428 |
|
|
Jun 13 04:10:26 PM PDT 24 |
Jun 13 04:19:18 PM PDT 24 |
5287986686 ps |
| T506 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1528777789 |
|
|
Jun 13 04:16:42 PM PDT 24 |
Jun 13 04:23:48 PM PDT 24 |
3499007806 ps |
| T724 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.609709805 |
|
|
Jun 13 03:36:47 PM PDT 24 |
Jun 13 03:53:15 PM PDT 24 |
7635086099 ps |
| T725 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.1211454565 |
|
|
Jun 13 04:05:37 PM PDT 24 |
Jun 13 04:32:02 PM PDT 24 |
8463788288 ps |
| T726 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3774278903 |
|
|
Jun 13 03:37:10 PM PDT 24 |
Jun 13 03:56:07 PM PDT 24 |
13556457903 ps |
| T402 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.321252679 |
|
|
Jun 13 04:01:29 PM PDT 24 |
Jun 13 04:11:03 PM PDT 24 |
5716346158 ps |
| T727 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.1352729423 |
|
|
Jun 13 03:58:43 PM PDT 24 |
Jun 13 04:02:49 PM PDT 24 |
2801071512 ps |
| T222 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2811036960 |
|
|
Jun 13 03:43:08 PM PDT 24 |
Jun 13 04:18:38 PM PDT 24 |
14215757282 ps |
| T728 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.4212077684 |
|
|
Jun 13 03:52:30 PM PDT 24 |
Jun 13 03:56:32 PM PDT 24 |
2904004605 ps |
| T119 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.3147311699 |
|
|
Jun 13 03:40:01 PM PDT 24 |
Jun 13 04:16:32 PM PDT 24 |
14707322955 ps |
| T548 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.1445611235 |
|
|
Jun 13 04:12:43 PM PDT 24 |
Jun 13 04:19:53 PM PDT 24 |
3776045170 ps |
| T540 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3250913500 |
|
|
Jun 13 04:16:57 PM PDT 24 |
Jun 13 04:23:21 PM PDT 24 |
4132607460 ps |
| T729 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1065423261 |
|
|
Jun 13 03:35:58 PM PDT 24 |
Jun 13 03:45:40 PM PDT 24 |
4940252600 ps |
| T730 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.4242763627 |
|
|
Jun 13 03:41:20 PM PDT 24 |
Jun 13 07:25:31 PM PDT 24 |
254560984392 ps |
| T731 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2349682598 |
|
|
Jun 13 03:41:18 PM PDT 24 |
Jun 13 03:44:13 PM PDT 24 |
2607193407 ps |
| T450 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1446307278 |
|
|
Jun 13 03:51:30 PM PDT 24 |
Jun 13 04:00:54 PM PDT 24 |
6089719864 ps |
| T461 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.3024162505 |
|
|
Jun 13 04:12:03 PM PDT 24 |
Jun 13 04:20:20 PM PDT 24 |
3338468448 ps |
| T732 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.172006065 |
|
|
Jun 13 03:55:27 PM PDT 24 |
Jun 13 05:30:55 PM PDT 24 |
46800531669 ps |
| T733 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.4292060029 |
|
|
Jun 13 03:43:47 PM PDT 24 |
Jun 13 04:36:57 PM PDT 24 |
14441644342 ps |
| T734 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3730307777 |
|
|
Jun 13 03:41:50 PM PDT 24 |
Jun 13 03:46:50 PM PDT 24 |
3669139260 ps |
| T735 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.843115852 |
|
|
Jun 13 03:44:03 PM PDT 24 |
Jun 13 04:45:29 PM PDT 24 |
13143692543 ps |
| T736 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.321304940 |
|
|
Jun 13 03:46:33 PM PDT 24 |
Jun 13 04:49:18 PM PDT 24 |
13774896020 ps |
| T737 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.2318195697 |
|
|
Jun 13 03:36:40 PM PDT 24 |
Jun 13 03:45:32 PM PDT 24 |
4405048220 ps |
| T738 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2660141520 |
|
|
Jun 13 03:57:03 PM PDT 24 |
Jun 13 04:05:44 PM PDT 24 |
8439135320 ps |
| T739 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.2272831745 |
|
|
Jun 13 04:08:32 PM PDT 24 |
Jun 13 04:48:31 PM PDT 24 |
13770840100 ps |
| T558 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3698607789 |
|
|
Jun 13 04:12:41 PM PDT 24 |
Jun 13 04:19:18 PM PDT 24 |
3848002456 ps |
| T426 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.1494968898 |
|
|
Jun 13 03:52:57 PM PDT 24 |
Jun 13 03:58:33 PM PDT 24 |
5225652020 ps |
| T507 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.3887016208 |
|
|
Jun 13 04:09:32 PM PDT 24 |
Jun 13 04:21:24 PM PDT 24 |
5907146918 ps |
| T740 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.3704369586 |
|
|
Jun 13 03:40:51 PM PDT 24 |
Jun 13 03:58:29 PM PDT 24 |
6053892776 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.571136913 |
|
|
Jun 13 03:36:38 PM PDT 24 |
Jun 13 03:41:15 PM PDT 24 |
2458002438 ps |
| T741 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2438851580 |
|
|
Jun 13 03:48:55 PM PDT 24 |
Jun 13 03:59:32 PM PDT 24 |
4625119016 ps |
| T120 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.4061225784 |
|
|
Jun 13 03:39:37 PM PDT 24 |
Jun 13 04:22:00 PM PDT 24 |
14021415167 ps |
| T742 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.1158566443 |
|
|
Jun 13 03:46:05 PM PDT 24 |
Jun 13 04:37:42 PM PDT 24 |
10282845430 ps |
| T499 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1329498808 |
|
|
Jun 13 04:10:01 PM PDT 24 |
Jun 13 04:23:23 PM PDT 24 |
6225790840 ps |
| T227 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1782997586 |
|
|
Jun 13 03:55:36 PM PDT 24 |
Jun 13 03:58:59 PM PDT 24 |
2176142656 ps |
| T405 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.3732706229 |
|
|
Jun 13 04:12:33 PM PDT 24 |
Jun 13 04:18:57 PM PDT 24 |
3558332660 ps |
| T743 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.3001068485 |
|
|
Jun 13 03:55:49 PM PDT 24 |
Jun 13 04:15:53 PM PDT 24 |
5246579697 ps |
| T744 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.2594898937 |
|
|
Jun 13 03:52:31 PM PDT 24 |
Jun 13 03:58:47 PM PDT 24 |
5813544508 ps |
| T552 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1407417636 |
|
|
Jun 13 04:13:10 PM PDT 24 |
Jun 13 04:22:56 PM PDT 24 |
4577656920 ps |
| T186 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.130430216 |
|
|
Jun 13 03:37:08 PM PDT 24 |
Jun 13 03:53:24 PM PDT 24 |
5873145124 ps |
| T519 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1790005502 |
|
|
Jun 13 04:12:56 PM PDT 24 |
Jun 13 04:20:26 PM PDT 24 |
4256714162 ps |
| T745 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2685474176 |
|
|
Jun 13 04:09:43 PM PDT 24 |
Jun 13 04:33:13 PM PDT 24 |
8673606862 ps |
| T460 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.1795475803 |
|
|
Jun 13 04:14:07 PM PDT 24 |
Jun 13 04:21:48 PM PDT 24 |
4163883752 ps |
| T380 |
/workspace/coverage/default/1.chip_sival_flash_info_access.1154174648 |
|
|
Jun 13 03:46:00 PM PDT 24 |
Jun 13 03:52:08 PM PDT 24 |
3321120556 ps |
| T746 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.3839736173 |
|
|
Jun 13 03:44:35 PM PDT 24 |
Jun 13 03:48:57 PM PDT 24 |
2610354660 ps |
| T747 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1356440585 |
|
|
Jun 13 03:37:13 PM PDT 24 |
Jun 13 03:45:17 PM PDT 24 |
4512600968 ps |
| T538 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.1626814513 |
|
|
Jun 13 04:15:40 PM PDT 24 |
Jun 13 04:22:36 PM PDT 24 |
3723909408 ps |
| T228 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.46857247 |
|
|
Jun 13 03:53:55 PM PDT 24 |
Jun 13 04:08:43 PM PDT 24 |
5892056452 ps |
| T748 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.1742010631 |
|
|
Jun 13 04:07:01 PM PDT 24 |
Jun 13 04:17:22 PM PDT 24 |
6162970792 ps |
| T749 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.3671694926 |
|
|
Jun 13 03:41:33 PM PDT 24 |
Jun 13 03:44:40 PM PDT 24 |
2949528102 ps |
| T750 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3517341981 |
|
|
Jun 13 03:37:37 PM PDT 24 |
Jun 13 03:52:15 PM PDT 24 |
8029900314 ps |
| T751 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.1074067741 |
|
|
Jun 13 03:59:32 PM PDT 24 |
Jun 13 04:04:18 PM PDT 24 |
3060550542 ps |
| T752 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.1715362883 |
|
|
Jun 13 04:03:08 PM PDT 24 |
Jun 13 04:12:15 PM PDT 24 |
5844168820 ps |
| T753 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1946326144 |
|
|
Jun 13 03:44:42 PM PDT 24 |
Jun 13 03:56:12 PM PDT 24 |
4956824792 ps |
| T524 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.3722540948 |
|
|
Jun 13 04:18:01 PM PDT 24 |
Jun 13 04:25:14 PM PDT 24 |
4227560968 ps |
| T278 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.4173032040 |
|
|
Jun 13 03:51:42 PM PDT 24 |
Jun 13 03:57:55 PM PDT 24 |
4004466552 ps |
| T754 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.2387817019 |
|
|
Jun 13 04:01:01 PM PDT 24 |
Jun 13 04:18:26 PM PDT 24 |
6554665850 ps |
| T755 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.1756692080 |
|
|
Jun 13 03:39:31 PM PDT 24 |
Jun 13 03:47:22 PM PDT 24 |
4613906388 ps |
| T756 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1664215634 |
|
|
Jun 13 03:56:15 PM PDT 24 |
Jun 13 04:19:43 PM PDT 24 |
6192905403 ps |
| T757 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.2026251067 |
|
|
Jun 13 03:37:14 PM PDT 24 |
Jun 13 03:41:49 PM PDT 24 |
3179997886 ps |
| T366 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.4031594208 |
|
|
Jun 13 04:01:23 PM PDT 24 |
Jun 13 04:23:19 PM PDT 24 |
5446184216 ps |
| T758 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.2212494228 |
|
|
Jun 13 03:58:23 PM PDT 24 |
Jun 13 04:02:59 PM PDT 24 |
2711723530 ps |
| T522 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.822925927 |
|
|
Jun 13 04:11:13 PM PDT 24 |
Jun 13 04:17:55 PM PDT 24 |
3993889354 ps |
| T759 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.428236922 |
|
|
Jun 13 04:11:46 PM PDT 24 |
Jun 13 04:24:05 PM PDT 24 |
6351934252 ps |
| T91 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2124458854 |
|
|
Jun 13 03:47:59 PM PDT 24 |
Jun 13 03:58:37 PM PDT 24 |
5653174260 ps |
| T252 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.3947516042 |
|
|
Jun 13 03:43:10 PM PDT 24 |
Jun 13 03:47:23 PM PDT 24 |
2926411901 ps |
| T760 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1907460253 |
|
|
Jun 13 03:38:15 PM PDT 24 |
Jun 13 03:59:13 PM PDT 24 |
5960931038 ps |
| T514 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.4188940739 |
|
|
Jun 13 04:12:57 PM PDT 24 |
Jun 13 04:21:32 PM PDT 24 |
3900377518 ps |
| T761 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3726566761 |
|
|
Jun 13 04:06:48 PM PDT 24 |
Jun 13 04:17:26 PM PDT 24 |
6363945532 ps |
| T100 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.466841472 |
|
|
Jun 13 03:53:28 PM PDT 24 |
Jun 13 03:59:07 PM PDT 24 |
3518937778 ps |
| T762 |
/workspace/coverage/default/1.rom_e2e_smoke.861240439 |
|
|
Jun 13 04:02:40 PM PDT 24 |
Jun 13 04:57:45 PM PDT 24 |
14933789024 ps |
| T351 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.4268728627 |
|
|
Jun 13 03:45:17 PM PDT 24 |
Jun 13 04:11:17 PM PDT 24 |
7288313304 ps |
| T763 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.2949711248 |
|
|
Jun 13 03:57:47 PM PDT 24 |
Jun 13 04:54:55 PM PDT 24 |
19061200413 ps |
| T542 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1902306188 |
|
|
Jun 13 04:11:34 PM PDT 24 |
Jun 13 04:18:59 PM PDT 24 |
3636590660 ps |
| T764 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.1477661563 |
|
|
Jun 13 04:16:40 PM PDT 24 |
Jun 13 04:21:20 PM PDT 24 |
3652508336 ps |
| T765 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1870301654 |
|
|
Jun 13 03:59:08 PM PDT 24 |
Jun 13 04:04:57 PM PDT 24 |
2878987439 ps |
| T766 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.1693943667 |
|
|
Jun 13 03:43:10 PM PDT 24 |
Jun 13 03:47:19 PM PDT 24 |
2861512358 ps |
| T280 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.3756602280 |
|
|
Jun 13 03:48:04 PM PDT 24 |
Jun 13 03:52:06 PM PDT 24 |
3191496482 ps |
| T767 |
/workspace/coverage/default/0.chip_sw_edn_kat.4290780092 |
|
|
Jun 13 03:39:49 PM PDT 24 |
Jun 13 03:51:12 PM PDT 24 |
3422982420 ps |
| T768 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.2046601429 |
|
|
Jun 13 03:44:08 PM PDT 24 |
Jun 13 04:53:39 PM PDT 24 |
14579135733 ps |
| T769 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.2296901345 |
|
|
Jun 13 03:38:09 PM PDT 24 |
Jun 13 03:45:22 PM PDT 24 |
3858228800 ps |
| T770 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2155779875 |
|
|
Jun 13 03:41:20 PM PDT 24 |
Jun 13 07:00:36 PM PDT 24 |
62929856463 ps |
| T771 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2552957991 |
|
|
Jun 13 03:39:33 PM PDT 24 |
Jun 13 03:44:39 PM PDT 24 |
3347069672 ps |
| T92 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.1958787256 |
|
|
Jun 13 04:06:25 PM PDT 24 |
Jun 13 04:18:58 PM PDT 24 |
5940439472 ps |
| T772 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.1908250125 |
|
|
Jun 13 04:02:14 PM PDT 24 |
Jun 13 04:55:32 PM PDT 24 |
13901050680 ps |
| T208 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.582067406 |
|
|
Jun 13 03:38:33 PM PDT 24 |
Jun 13 03:40:31 PM PDT 24 |
2645014988 ps |
| T773 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.2183456767 |
|
|
Jun 13 04:07:35 PM PDT 24 |
Jun 13 05:53:47 PM PDT 24 |
31998999844 ps |
| T774 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.1767730145 |
|
|
Jun 13 03:39:32 PM PDT 24 |
Jun 13 04:10:21 PM PDT 24 |
7589479804 ps |
| T775 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.588165800 |
|
|
Jun 13 03:34:52 PM PDT 24 |
Jun 13 03:38:22 PM PDT 24 |
2974558376 ps |
| T45 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1437229912 |
|
|
Jun 13 03:44:21 PM PDT 24 |
Jun 13 03:53:17 PM PDT 24 |
5275026392 ps |
| T776 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.3026467765 |
|
|
Jun 13 03:53:36 PM PDT 24 |
Jun 13 04:04:06 PM PDT 24 |
4663141993 ps |
| T360 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.331721881 |
|
|
Jun 13 03:35:53 PM PDT 24 |
Jun 13 03:41:02 PM PDT 24 |
3631587030 ps |
| T777 |
/workspace/coverage/default/2.chip_sw_edn_kat.2128219315 |
|
|
Jun 13 03:58:45 PM PDT 24 |
Jun 13 04:12:17 PM PDT 24 |
3168724596 ps |
| T778 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.81263175 |
|
|
Jun 13 03:57:14 PM PDT 24 |
Jun 13 04:52:23 PM PDT 24 |
13375890188 ps |
| T779 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.3654252747 |
|
|
Jun 13 03:40:05 PM PDT 24 |
Jun 13 03:45:22 PM PDT 24 |
3164458236 ps |
| T374 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.18107688 |
|
|
Jun 13 03:37:27 PM PDT 24 |
Jun 13 03:46:51 PM PDT 24 |
4719042492 ps |
| T10 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3531935191 |
|
|
Jun 13 04:02:46 PM PDT 24 |
Jun 13 04:09:33 PM PDT 24 |
4320174280 ps |
| T780 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.51444033 |
|
|
Jun 13 03:55:30 PM PDT 24 |
Jun 13 04:06:26 PM PDT 24 |
4619454566 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.4156638920 |
|
|
Jun 13 03:53:46 PM PDT 24 |
Jun 13 03:59:44 PM PDT 24 |
3425542134 ps |
| T781 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.2765139202 |
|
|
Jun 13 03:42:43 PM PDT 24 |
Jun 13 05:09:54 PM PDT 24 |
22068122183 ps |
| T782 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.1746131898 |
|
|
Jun 13 03:47:21 PM PDT 24 |
Jun 13 03:55:34 PM PDT 24 |
5712526224 ps |
| T285 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.2930137318 |
|
|
Jun 13 04:13:19 PM PDT 24 |
Jun 13 04:23:13 PM PDT 24 |
5027883880 ps |
| T279 |
/workspace/coverage/default/0.chip_sw_alert_test.2337945752 |
|
|
Jun 13 03:40:29 PM PDT 24 |
Jun 13 03:45:32 PM PDT 24 |
3178028400 ps |
| T783 |
/workspace/coverage/default/0.rom_keymgr_functest.2956820964 |
|
|
Jun 13 03:38:58 PM PDT 24 |
Jun 13 03:46:01 PM PDT 24 |
4407843940 ps |
| T784 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.9375164 |
|
|
Jun 13 04:00:27 PM PDT 24 |
Jun 13 04:07:41 PM PDT 24 |
2643678412 ps |
| T484 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2614299973 |
|
|
Jun 13 04:09:28 PM PDT 24 |
Jun 13 04:16:12 PM PDT 24 |
3762901700 ps |
| T451 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.3892795016 |
|
|
Jun 13 03:39:34 PM PDT 24 |
Jun 13 03:47:41 PM PDT 24 |
4468573265 ps |
| T785 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.1046684166 |
|
|
Jun 13 03:59:40 PM PDT 24 |
Jun 13 04:18:23 PM PDT 24 |
6883000916 ps |
| T786 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.3696566006 |
|
|
Jun 13 03:37:15 PM PDT 24 |
Jun 13 05:13:16 PM PDT 24 |
21144503900 ps |
| T288 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.2687239494 |
|
|
Jun 13 04:16:46 PM PDT 24 |
Jun 13 04:28:02 PM PDT 24 |
4944971020 ps |
| T329 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.151382663 |
|
|
Jun 13 03:51:08 PM PDT 24 |
Jun 13 04:11:49 PM PDT 24 |
6095760156 ps |
| T330 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.4155494659 |
|
|
Jun 13 03:37:22 PM PDT 24 |
Jun 13 03:59:38 PM PDT 24 |
7851484064 ps |
| T331 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.3189214787 |
|
|
Jun 13 04:09:56 PM PDT 24 |
Jun 13 04:17:02 PM PDT 24 |
3949737774 ps |
| T332 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.3396768140 |
|
|
Jun 13 03:50:54 PM PDT 24 |
Jun 13 03:56:41 PM PDT 24 |
3193513610 ps |
| T253 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1675680165 |
|
|
Jun 13 03:55:55 PM PDT 24 |
Jun 13 04:00:17 PM PDT 24 |
3021030955 ps |
| T333 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3475565991 |
|
|
Jun 13 04:00:13 PM PDT 24 |
Jun 13 04:13:08 PM PDT 24 |
7394781344 ps |
| T334 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.985746447 |
|
|
Jun 13 03:38:34 PM PDT 24 |
Jun 13 03:44:59 PM PDT 24 |
4091355328 ps |
| T293 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2260616322 |
|
|
Jun 13 03:46:24 PM PDT 24 |
Jun 13 05:20:15 PM PDT 24 |
22832034960 ps |
| T335 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.79124214 |
|
|
Jun 13 04:08:13 PM PDT 24 |
Jun 13 05:04:44 PM PDT 24 |
14197733107 ps |
| T44 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3795474666 |
|
|
Jun 13 03:43:56 PM PDT 24 |
Jun 13 03:49:38 PM PDT 24 |
2905601016 ps |
| T423 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2615792854 |
|
|
Jun 13 03:39:20 PM PDT 24 |
Jun 13 03:41:52 PM PDT 24 |
3067925579 ps |
| T424 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.702653683 |
|
|
Jun 13 04:10:10 PM PDT 24 |
Jun 13 04:17:46 PM PDT 24 |
4018402632 ps |
| T425 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.948070222 |
|
|
Jun 13 04:09:47 PM PDT 24 |
Jun 13 04:16:00 PM PDT 24 |
3515780928 ps |
| T357 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.3779397059 |
|
|
Jun 13 03:40:52 PM PDT 24 |
Jun 13 04:20:25 PM PDT 24 |
14117735438 ps |
| T787 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.87596415 |
|
|
Jun 13 03:48:50 PM PDT 24 |
Jun 13 03:58:43 PM PDT 24 |
4103084196 ps |
| T788 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3606786130 |
|
|
Jun 13 03:51:09 PM PDT 24 |
Jun 13 05:13:21 PM PDT 24 |
24873438384 ps |
| T789 |
/workspace/coverage/default/2.chip_sw_example_rom.542567133 |
|
|
Jun 13 03:52:21 PM PDT 24 |
Jun 13 03:54:46 PM PDT 24 |
2791467912 ps |
| T485 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2666797543 |
|
|
Jun 13 03:37:19 PM PDT 24 |
Jun 13 03:48:18 PM PDT 24 |
4961971256 ps |
| T790 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.3454368732 |
|
|
Jun 13 03:45:44 PM PDT 24 |
Jun 13 03:52:46 PM PDT 24 |
3149372688 ps |
| T791 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2218012712 |
|
|
Jun 13 03:42:14 PM PDT 24 |
Jun 13 04:35:15 PM PDT 24 |
21426914361 ps |
| T528 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1195704340 |
|
|
Jun 13 04:13:01 PM PDT 24 |
Jun 13 04:24:58 PM PDT 24 |
5683443450 ps |
| T196 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1789460308 |
|
|
Jun 13 03:43:28 PM PDT 24 |
Jun 13 03:47:14 PM PDT 24 |
2581034541 ps |
| T792 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.2422833451 |
|
|
Jun 13 03:54:44 PM PDT 24 |
Jun 13 04:07:06 PM PDT 24 |
4362723756 ps |
| T793 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.3041363780 |
|
|
Jun 13 04:03:53 PM PDT 24 |
Jun 13 04:09:26 PM PDT 24 |
2741174526 ps |
| T794 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.467468678 |
|
|
Jun 13 03:42:32 PM PDT 24 |
Jun 13 04:24:07 PM PDT 24 |
9999879560 ps |
| T795 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.2200633605 |
|
|
Jun 13 03:40:06 PM PDT 24 |
Jun 13 03:44:26 PM PDT 24 |
3034684439 ps |
| T796 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.2504023640 |
|
|
Jun 13 03:55:51 PM PDT 24 |
Jun 13 04:04:43 PM PDT 24 |
5657949810 ps |
| T797 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.2422544738 |
|
|
Jun 13 03:42:14 PM PDT 24 |
Jun 13 04:24:34 PM PDT 24 |
30793094336 ps |
| T367 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.4156426869 |
|
|
Jun 13 03:40:35 PM PDT 24 |
Jun 13 04:04:11 PM PDT 24 |
6958609466 ps |
| T798 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.2250566413 |
|
|
Jun 13 03:58:01 PM PDT 24 |
Jun 13 04:02:16 PM PDT 24 |
2426345576 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1011272035 |
|
|
Jun 13 03:36:55 PM PDT 24 |
Jun 13 03:58:46 PM PDT 24 |
8720822260 ps |
| T799 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3645240866 |
|
|
Jun 13 03:41:56 PM PDT 24 |
Jun 13 04:02:21 PM PDT 24 |
12103200803 ps |
| T158 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2758748982 |
|
|
Jun 13 03:46:34 PM PDT 24 |
Jun 13 04:01:07 PM PDT 24 |
7927349892 ps |
| T800 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3280500003 |
|
|
Jun 13 04:02:24 PM PDT 24 |
Jun 13 04:47:45 PM PDT 24 |
10967767889 ps |
| T801 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.689293605 |
|
|
Jun 13 03:45:15 PM PDT 24 |
Jun 13 03:49:30 PM PDT 24 |
2645465218 ps |
| T802 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1592639742 |
|
|
Jun 13 03:41:22 PM PDT 24 |
Jun 13 04:51:27 PM PDT 24 |
21549322565 ps |
| T803 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.1409882374 |
|
|
Jun 13 03:58:20 PM PDT 24 |
Jun 13 04:43:39 PM PDT 24 |
16953464798 ps |
| T804 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.2811461156 |
|
|
Jun 13 03:56:37 PM PDT 24 |
Jun 13 04:00:01 PM PDT 24 |
2988430170 ps |
| T216 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.1344927229 |
|
|
Jun 13 03:54:01 PM PDT 24 |
Jun 13 05:38:35 PM PDT 24 |
43514701440 ps |
| T805 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3745879068 |
|
|
Jun 13 03:59:18 PM PDT 24 |
Jun 13 04:19:57 PM PDT 24 |
13862868348 ps |
| T508 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.2575788511 |
|
|
Jun 13 04:17:04 PM PDT 24 |
Jun 13 04:25:24 PM PDT 24 |
5547779490 ps |
| T806 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.4024946894 |
|
|
Jun 13 04:06:06 PM PDT 24 |
Jun 13 04:15:14 PM PDT 24 |
7216581080 ps |
| T46 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3453208749 |
|
|
Jun 13 03:58:45 PM PDT 24 |
Jun 13 04:06:22 PM PDT 24 |
4951279368 ps |
| T807 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3540942096 |
|
|
Jun 13 04:01:22 PM PDT 24 |
Jun 13 04:14:36 PM PDT 24 |
4493366458 ps |
| T121 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1733981003 |
|
|
Jun 13 03:51:14 PM PDT 24 |
Jun 13 04:00:02 PM PDT 24 |
3999881690 ps |
| T550 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.3413208831 |
|
|
Jun 13 04:12:15 PM PDT 24 |
Jun 13 04:27:50 PM PDT 24 |
5155281352 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.3033059778 |
|
|
Jun 13 03:41:24 PM PDT 24 |
Jun 13 05:13:03 PM PDT 24 |
49749520004 ps |
| T808 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.4055109931 |
|
|
Jun 13 03:36:33 PM PDT 24 |
Jun 13 04:17:37 PM PDT 24 |
10312122814 ps |
| T809 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1899224613 |
|
|
Jun 13 03:58:41 PM PDT 24 |
Jun 13 07:40:25 PM PDT 24 |
254741527452 ps |
| T810 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3604592769 |
|
|
Jun 13 03:55:31 PM PDT 24 |
Jun 13 04:07:25 PM PDT 24 |
4233319520 ps |
| T811 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.1065236138 |
|
|
Jun 13 03:40:13 PM PDT 24 |
Jun 13 03:44:12 PM PDT 24 |
2992233580 ps |
| T812 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2200005694 |
|
|
Jun 13 03:37:14 PM PDT 24 |
Jun 13 03:44:52 PM PDT 24 |
5223921580 ps |
| T170 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.2213519192 |
|
|
Jun 13 04:15:42 PM PDT 24 |
Jun 13 04:22:57 PM PDT 24 |
3832854384 ps |
| T197 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.3672926339 |
|
|
Jun 13 03:38:40 PM PDT 24 |
Jun 13 03:51:40 PM PDT 24 |
5841803450 ps |
| T813 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1154053150 |
|
|
Jun 13 03:37:48 PM PDT 24 |
Jun 13 03:46:20 PM PDT 24 |
4824853592 ps |
| T814 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2399828085 |
|
|
Jun 13 03:59:50 PM PDT 24 |
Jun 13 04:09:49 PM PDT 24 |
9226498538 ps |
| T392 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.2180355760 |
|
|
Jun 13 04:09:35 PM PDT 24 |
Jun 13 04:23:26 PM PDT 24 |
5436436028 ps |
| T815 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.1566595923 |
|
|
Jun 13 04:00:22 PM PDT 24 |
Jun 13 04:32:43 PM PDT 24 |
26738405088 ps |
| T107 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.1348925692 |
|
|
Jun 13 03:38:00 PM PDT 24 |
Jun 13 03:46:49 PM PDT 24 |
4496225047 ps |
| T816 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.1133534104 |
|
|
Jun 13 04:07:59 PM PDT 24 |
Jun 13 04:14:38 PM PDT 24 |
4583244066 ps |
| T817 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3039984923 |
|
|
Jun 13 03:58:12 PM PDT 24 |
Jun 13 04:01:28 PM PDT 24 |
3003516609 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.393675452 |
|
|
Jun 13 03:39:58 PM PDT 24 |
Jun 13 03:53:17 PM PDT 24 |
4059116570 ps |
| T818 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.1152820668 |
|
|
Jun 13 04:07:25 PM PDT 24 |
Jun 13 04:16:46 PM PDT 24 |
4204762280 ps |
| T819 |
/workspace/coverage/default/1.chip_tap_straps_rma.2750770059 |
|
|
Jun 13 03:48:50 PM PDT 24 |
Jun 13 04:00:38 PM PDT 24 |
8346252317 ps |
| T481 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.1318257593 |
|
|
Jun 13 04:12:50 PM PDT 24 |
Jun 13 04:21:47 PM PDT 24 |
4365692560 ps |
| T482 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.3309593693 |
|
|
Jun 13 04:13:57 PM PDT 24 |
Jun 13 04:20:07 PM PDT 24 |
3675133990 ps |
| T820 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.625105321 |
|
|
Jun 13 04:08:05 PM PDT 24 |
Jun 13 05:00:14 PM PDT 24 |
13973714424 ps |
| T122 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.419856082 |
|
|
Jun 13 03:43:39 PM PDT 24 |
Jun 13 03:49:50 PM PDT 24 |
3915482618 ps |
| T821 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1705673478 |
|
|
Jun 13 03:53:37 PM PDT 24 |
Jun 13 04:36:10 PM PDT 24 |
24949809715 ps |
| T822 |
/workspace/coverage/default/0.chip_tap_straps_dev.170289407 |
|
|
Jun 13 03:37:46 PM PDT 24 |
Jun 13 03:48:43 PM PDT 24 |
7737028025 ps |
| T823 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.20622819 |
|
|
Jun 13 03:46:42 PM PDT 24 |
Jun 13 03:56:23 PM PDT 24 |
5062039324 ps |
| T504 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.1521879452 |
|
|
Jun 13 04:16:06 PM PDT 24 |
Jun 13 04:22:29 PM PDT 24 |
3540456632 ps |
| T824 |
/workspace/coverage/default/0.chip_tap_straps_rma.2408205219 |
|
|
Jun 13 03:38:18 PM PDT 24 |
Jun 13 03:41:35 PM PDT 24 |
3491318078 ps |
| T825 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.62260373 |
|
|
Jun 13 04:07:17 PM PDT 24 |
Jun 13 04:16:06 PM PDT 24 |
3982808900 ps |
| T826 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2455476577 |
|
|
Jun 13 03:50:52 PM PDT 24 |
Jun 13 04:11:30 PM PDT 24 |
7976335409 ps |
| T827 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.3926775530 |
|
|
Jun 13 03:48:33 PM PDT 24 |
Jun 13 05:00:54 PM PDT 24 |
17016904380 ps |
| T828 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2589064793 |
|
|
Jun 13 03:43:38 PM PDT 24 |
Jun 13 03:45:21 PM PDT 24 |
1930092694 ps |
| T829 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2870467001 |
|
|
Jun 13 03:56:01 PM PDT 24 |
Jun 13 04:07:22 PM PDT 24 |
7657721423 ps |
| T254 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.1493309166 |
|
|
Jun 13 03:42:49 PM PDT 24 |
Jun 13 04:08:38 PM PDT 24 |
23576257200 ps |
| T830 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.822830183 |
|
|
Jun 13 03:38:47 PM PDT 24 |
Jun 13 03:43:58 PM PDT 24 |
3165027218 ps |
| T831 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.663377267 |
|
|
Jun 13 03:47:04 PM PDT 24 |
Jun 13 04:48:08 PM PDT 24 |
13545159656 ps |
| T832 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.2783206755 |
|
|
Jun 13 03:43:21 PM PDT 24 |
Jun 13 03:52:21 PM PDT 24 |
4453509950 ps |
| T833 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1658239581 |
|
|
Jun 13 03:40:28 PM PDT 24 |
Jun 13 04:03:07 PM PDT 24 |
8039533816 ps |
| T533 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.2536929319 |
|
|
Jun 13 04:12:45 PM PDT 24 |
Jun 13 04:19:32 PM PDT 24 |
3743376800 ps |
| T545 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.1232011098 |
|
|
Jun 13 04:06:59 PM PDT 24 |
Jun 13 04:14:36 PM PDT 24 |
3420829720 ps |
| T454 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.4118107602 |
|
|
Jun 13 03:59:48 PM PDT 24 |
Jun 13 04:17:18 PM PDT 24 |
4891317240 ps |
| T834 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.422654180 |
|
|
Jun 13 04:03:50 PM PDT 24 |
Jun 13 04:12:49 PM PDT 24 |
4094422144 ps |
| T835 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.266823035 |
|
|
Jun 13 04:09:45 PM PDT 24 |
Jun 13 04:21:52 PM PDT 24 |
6289522154 ps |
| T389 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3078404343 |
|
|
Jun 13 03:36:09 PM PDT 24 |
Jun 13 03:45:30 PM PDT 24 |
4427341280 ps |
| T836 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.2585655553 |
|
|
Jun 13 03:46:47 PM PDT 24 |
Jun 13 04:00:33 PM PDT 24 |
7134119856 ps |
| T837 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.1953175975 |
|
|
Jun 13 04:07:02 PM PDT 24 |
Jun 13 05:09:42 PM PDT 24 |
14180529173 ps |
| T286 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.2266083865 |
|
|
Jun 13 04:15:28 PM PDT 24 |
Jun 13 04:24:36 PM PDT 24 |
5033104682 ps |
| T490 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.1402671195 |
|
|
Jun 13 04:06:41 PM PDT 24 |
Jun 13 04:16:18 PM PDT 24 |
5004009282 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.579493791 |
|
|
Jun 13 03:40:14 PM PDT 24 |
Jun 13 03:46:36 PM PDT 24 |
3482346789 ps |
| T150 |
/workspace/coverage/default/1.chip_jtag_mem_access.1661389804 |
|
|
Jun 13 03:42:13 PM PDT 24 |
Jun 13 04:12:39 PM PDT 24 |
13749143555 ps |
| T838 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.891173287 |
|
|
Jun 13 04:14:27 PM PDT 24 |
Jun 13 04:26:18 PM PDT 24 |
5335405500 ps |
| T839 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2568498441 |
|
|
Jun 13 04:07:03 PM PDT 24 |
Jun 13 04:38:07 PM PDT 24 |
7859231862 ps |
| T840 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.14096337 |
|
|
Jun 13 03:46:49 PM PDT 24 |
Jun 13 04:56:32 PM PDT 24 |
17637046930 ps |
| T418 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2849791477 |
|
|
Jun 13 03:38:40 PM PDT 24 |
Jun 13 03:47:53 PM PDT 24 |
3384087380 ps |
| T841 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.516627981 |
|
|
Jun 13 04:07:07 PM PDT 24 |
Jun 13 04:15:24 PM PDT 24 |
4427737688 ps |
| T842 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.796398079 |
|
|
Jun 13 03:48:12 PM PDT 24 |
Jun 13 05:07:24 PM PDT 24 |
18571691032 ps |
| T843 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.311396818 |
|
|
Jun 13 03:39:04 PM PDT 24 |
Jun 13 04:55:28 PM PDT 24 |
17251027832 ps |
| T844 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.3808109815 |
|
|
Jun 13 03:38:30 PM PDT 24 |
Jun 13 03:48:09 PM PDT 24 |
3199272600 ps |
| T421 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.1869110599 |
|
|
Jun 13 03:58:13 PM PDT 24 |
Jun 13 04:08:27 PM PDT 24 |
3431071518 ps |
| T845 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.16643502 |
|
|
Jun 13 03:48:53 PM PDT 24 |
Jun 13 05:21:28 PM PDT 24 |
22340465992 ps |
| T846 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.83806687 |
|
|
Jun 13 03:57:10 PM PDT 24 |
Jun 13 04:52:09 PM PDT 24 |
14237600448 ps |
| T847 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3439385203 |
|
|
Jun 13 03:51:16 PM PDT 24 |
Jun 13 03:56:30 PM PDT 24 |
3277679501 ps |
| T518 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1493998550 |
|
|
Jun 13 04:16:39 PM PDT 24 |
Jun 13 04:25:39 PM PDT 24 |
5481835404 ps |
| T848 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.4180162835 |
|
|
Jun 13 04:18:01 PM PDT 24 |
Jun 13 04:26:11 PM PDT 24 |
5374944072 ps |
| T502 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3358526934 |
|
|
Jun 13 04:20:31 PM PDT 24 |
Jun 13 04:25:35 PM PDT 24 |
3655231972 ps |
| T266 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.3007071698 |
|
|
Jun 13 04:10:05 PM PDT 24 |
Jun 13 04:17:34 PM PDT 24 |
4274417624 ps |
| T546 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2166937657 |
|
|
Jun 13 04:14:48 PM PDT 24 |
Jun 13 04:21:00 PM PDT 24 |
3301458310 ps |