T11 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.217140709 |
|
|
Jun 29 07:55:17 PM PDT 24 |
Jun 29 08:01:12 PM PDT 24 |
3638413900 ps |
T970 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.872759936 |
|
|
Jun 29 07:38:40 PM PDT 24 |
Jun 29 07:50:56 PM PDT 24 |
4017430256 ps |
T971 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3694811130 |
|
|
Jun 29 07:51:06 PM PDT 24 |
Jun 29 08:11:14 PM PDT 24 |
7814065500 ps |
T972 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.2280458052 |
|
|
Jun 29 07:45:17 PM PDT 24 |
Jun 29 08:15:09 PM PDT 24 |
7765725496 ps |
T973 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.1241591425 |
|
|
Jun 29 07:38:53 PM PDT 24 |
Jun 29 07:51:32 PM PDT 24 |
5621589520 ps |
T974 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.1649957689 |
|
|
Jun 29 07:45:40 PM PDT 24 |
Jun 29 08:59:16 PM PDT 24 |
15469933350 ps |
T975 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.1563236555 |
|
|
Jun 29 07:49:10 PM PDT 24 |
Jun 29 07:55:22 PM PDT 24 |
2751637051 ps |
T976 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.2982536229 |
|
|
Jun 29 08:03:58 PM PDT 24 |
Jun 29 08:19:45 PM PDT 24 |
13715428904 ps |
T977 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.3363775313 |
|
|
Jun 29 07:41:42 PM PDT 24 |
Jun 29 07:48:46 PM PDT 24 |
3994229420 ps |
T272 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3176607007 |
|
|
Jun 29 07:59:36 PM PDT 24 |
Jun 29 08:14:11 PM PDT 24 |
7772156325 ps |
T317 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.1721176280 |
|
|
Jun 29 07:55:47 PM PDT 24 |
Jun 29 08:08:24 PM PDT 24 |
4578600344 ps |
T978 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.113848501 |
|
|
Jun 29 07:59:13 PM PDT 24 |
Jun 29 08:13:26 PM PDT 24 |
7044562740 ps |
T979 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3686231423 |
|
|
Jun 29 07:56:40 PM PDT 24 |
Jun 29 08:30:42 PM PDT 24 |
20416006297 ps |
T980 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.835682341 |
|
|
Jun 29 08:12:32 PM PDT 24 |
Jun 29 08:23:18 PM PDT 24 |
5584253424 ps |
T981 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1729267347 |
|
|
Jun 29 08:12:00 PM PDT 24 |
Jun 29 08:24:27 PM PDT 24 |
4365973400 ps |
T982 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2269262958 |
|
|
Jun 29 07:40:04 PM PDT 24 |
Jun 29 08:01:54 PM PDT 24 |
14780624280 ps |
T983 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1154456437 |
|
|
Jun 29 07:59:54 PM PDT 24 |
Jun 29 08:03:54 PM PDT 24 |
2383654708 ps |
T714 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.1835973107 |
|
|
Jun 29 08:13:14 PM PDT 24 |
Jun 29 08:24:41 PM PDT 24 |
5497229540 ps |
T984 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3686219727 |
|
|
Jun 29 07:47:11 PM PDT 24 |
Jun 29 07:52:10 PM PDT 24 |
3098645016 ps |
T985 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1018315421 |
|
|
Jun 29 07:54:42 PM PDT 24 |
Jun 29 08:07:24 PM PDT 24 |
4390612084 ps |
T986 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3872638063 |
|
|
Jun 29 07:41:42 PM PDT 24 |
Jun 29 07:45:41 PM PDT 24 |
3040875704 ps |
T767 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.103337499 |
|
|
Jun 29 08:07:22 PM PDT 24 |
Jun 29 08:15:12 PM PDT 24 |
4225713376 ps |
T987 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.147595282 |
|
|
Jun 29 07:50:48 PM PDT 24 |
Jun 29 08:19:51 PM PDT 24 |
7102312054 ps |
T273 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.3799371017 |
|
|
Jun 29 07:47:24 PM PDT 24 |
Jun 29 07:58:32 PM PDT 24 |
6332354559 ps |
T708 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3895593294 |
|
|
Jun 29 08:08:13 PM PDT 24 |
Jun 29 08:17:27 PM PDT 24 |
4656097444 ps |
T988 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.501650154 |
|
|
Jun 29 07:53:04 PM PDT 24 |
Jun 29 07:58:16 PM PDT 24 |
2992665022 ps |
T387 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.114954136 |
|
|
Jun 29 07:59:51 PM PDT 24 |
Jun 29 08:09:23 PM PDT 24 |
4132242904 ps |
T989 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.3541118617 |
|
|
Jun 29 07:48:42 PM PDT 24 |
Jun 29 08:05:55 PM PDT 24 |
6804703938 ps |
T290 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.1377640755 |
|
|
Jun 29 07:42:40 PM PDT 24 |
Jun 29 08:02:09 PM PDT 24 |
5868243476 ps |
T746 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1626327980 |
|
|
Jun 29 08:03:33 PM PDT 24 |
Jun 29 08:10:07 PM PDT 24 |
3635843084 ps |
T689 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2555127153 |
|
|
Jun 29 08:11:58 PM PDT 24 |
Jun 29 08:19:47 PM PDT 24 |
4242018026 ps |
T990 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3733572558 |
|
|
Jun 29 07:49:37 PM PDT 24 |
Jun 29 07:58:10 PM PDT 24 |
5596770166 ps |
T742 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.1013714711 |
|
|
Jun 29 08:06:23 PM PDT 24 |
Jun 29 08:17:25 PM PDT 24 |
5998425306 ps |
T236 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.494596607 |
|
|
Jun 29 08:14:32 PM PDT 24 |
Jun 29 08:24:21 PM PDT 24 |
4821682352 ps |
T991 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.599142731 |
|
|
Jun 29 08:10:08 PM PDT 24 |
Jun 29 08:16:51 PM PDT 24 |
3646849804 ps |
T992 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.292995652 |
|
|
Jun 29 08:04:39 PM PDT 24 |
Jun 29 09:08:05 PM PDT 24 |
17330739412 ps |
T993 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.1338767757 |
|
|
Jun 29 07:46:42 PM PDT 24 |
Jun 29 07:54:12 PM PDT 24 |
4867693528 ps |
T994 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.1507768649 |
|
|
Jun 29 07:45:22 PM PDT 24 |
Jun 29 08:22:10 PM PDT 24 |
9647986768 ps |
T692 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.930295791 |
|
|
Jun 29 08:23:27 PM PDT 24 |
Jun 29 08:30:44 PM PDT 24 |
3394548140 ps |
T995 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.758434122 |
|
|
Jun 29 07:37:10 PM PDT 24 |
Jun 29 08:02:37 PM PDT 24 |
7036237496 ps |
T996 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.138380079 |
|
|
Jun 29 07:51:26 PM PDT 24 |
Jun 29 07:55:30 PM PDT 24 |
2870981660 ps |
T997 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.2733922767 |
|
|
Jun 29 07:56:16 PM PDT 24 |
Jun 29 09:08:24 PM PDT 24 |
16060558034 ps |
T998 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.1925822876 |
|
|
Jun 29 07:59:19 PM PDT 24 |
Jun 29 11:21:01 PM PDT 24 |
64786248439 ps |
T999 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.4126103786 |
|
|
Jun 29 08:04:08 PM PDT 24 |
Jun 29 08:37:59 PM PDT 24 |
9281660564 ps |
T1000 |
/workspace/coverage/default/1.chip_sw_aes_enc.3636245888 |
|
|
Jun 29 07:44:54 PM PDT 24 |
Jun 29 07:49:41 PM PDT 24 |
2753637572 ps |
T720 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.3286711164 |
|
|
Jun 29 08:10:31 PM PDT 24 |
Jun 29 08:16:39 PM PDT 24 |
3618194472 ps |
T385 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.210074142 |
|
|
Jun 29 07:38:12 PM PDT 24 |
Jun 29 07:50:28 PM PDT 24 |
8683930049 ps |
T1001 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1101025038 |
|
|
Jun 29 07:48:44 PM PDT 24 |
Jun 29 07:57:58 PM PDT 24 |
4038976994 ps |
T233 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3960491954 |
|
|
Jun 29 07:50:12 PM PDT 24 |
Jun 29 07:57:25 PM PDT 24 |
4133355760 ps |
T1002 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.276928859 |
|
|
Jun 29 07:44:15 PM PDT 24 |
Jun 29 08:51:03 PM PDT 24 |
14867442142 ps |
T1003 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.2231485398 |
|
|
Jun 29 07:59:04 PM PDT 24 |
Jun 29 08:35:01 PM PDT 24 |
23910745544 ps |
T1004 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1053483522 |
|
|
Jun 29 08:03:00 PM PDT 24 |
Jun 29 08:11:54 PM PDT 24 |
6549460616 ps |
T1005 |
/workspace/coverage/default/1.chip_tap_straps_dev.2222799160 |
|
|
Jun 29 07:49:15 PM PDT 24 |
Jun 29 07:51:55 PM PDT 24 |
3408200844 ps |
T1006 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1665863509 |
|
|
Jun 29 08:07:06 PM PDT 24 |
Jun 29 08:32:39 PM PDT 24 |
8006283880 ps |
T1007 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.651761326 |
|
|
Jun 29 08:10:50 PM PDT 24 |
Jun 29 08:22:00 PM PDT 24 |
5014501508 ps |
T1008 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.3360125725 |
|
|
Jun 29 07:40:41 PM PDT 24 |
Jun 29 09:20:14 PM PDT 24 |
46643563464 ps |
T1009 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3641208391 |
|
|
Jun 29 07:49:00 PM PDT 24 |
Jun 29 08:03:48 PM PDT 24 |
4321858010 ps |
T1010 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.4088726439 |
|
|
Jun 29 08:08:11 PM PDT 24 |
Jun 29 08:19:57 PM PDT 24 |
3653427500 ps |
T1011 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.332579503 |
|
|
Jun 29 07:57:12 PM PDT 24 |
Jun 29 09:10:00 PM PDT 24 |
18252944301 ps |
T721 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.3558074507 |
|
|
Jun 29 08:08:14 PM PDT 24 |
Jun 29 08:14:08 PM PDT 24 |
3753326472 ps |
T1012 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.88602595 |
|
|
Jun 29 08:06:32 PM PDT 24 |
Jun 29 08:19:09 PM PDT 24 |
7075769095 ps |
T1013 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.3770520584 |
|
|
Jun 29 07:41:05 PM PDT 24 |
Jun 29 07:49:09 PM PDT 24 |
6595274848 ps |
T1014 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.935202630 |
|
|
Jun 29 07:56:26 PM PDT 24 |
Jun 29 08:15:43 PM PDT 24 |
6817414634 ps |
T640 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.483646874 |
|
|
Jun 29 07:50:09 PM PDT 24 |
Jun 29 08:01:00 PM PDT 24 |
4828977311 ps |
T94 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3119156158 |
|
|
Jun 29 08:01:38 PM PDT 24 |
Jun 29 08:09:04 PM PDT 24 |
7740923288 ps |
T1015 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1403246477 |
|
|
Jun 29 07:38:43 PM PDT 24 |
Jun 29 07:46:19 PM PDT 24 |
6851287552 ps |
T123 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3709976788 |
|
|
Jun 29 07:39:32 PM PDT 24 |
Jun 29 07:48:59 PM PDT 24 |
5239739376 ps |
T81 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.1083103088 |
|
|
Jun 29 07:50:34 PM PDT 24 |
Jun 29 08:19:12 PM PDT 24 |
13527715048 ps |
T1016 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.3944308569 |
|
|
Jun 29 07:39:56 PM PDT 24 |
Jun 29 08:27:17 PM PDT 24 |
13112476104 ps |
T44 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4066978015 |
|
|
Jun 29 07:43:06 PM PDT 24 |
Jun 29 07:50:22 PM PDT 24 |
5229238704 ps |
T1017 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.4156708056 |
|
|
Jun 29 08:00:16 PM PDT 24 |
Jun 29 08:05:21 PM PDT 24 |
3341947320 ps |
T1018 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.985675601 |
|
|
Jun 29 07:48:27 PM PDT 24 |
Jun 29 07:58:53 PM PDT 24 |
4331860640 ps |
T305 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.808765608 |
|
|
Jun 29 07:42:10 PM PDT 24 |
Jun 29 07:56:39 PM PDT 24 |
4730988032 ps |
T1019 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.4213324127 |
|
|
Jun 29 08:11:57 PM PDT 24 |
Jun 29 08:22:06 PM PDT 24 |
4609553572 ps |
T1020 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1685148447 |
|
|
Jun 29 07:51:31 PM PDT 24 |
Jun 29 08:00:26 PM PDT 24 |
5053872120 ps |
T1021 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.4143343515 |
|
|
Jun 29 08:06:02 PM PDT 24 |
Jun 29 08:49:28 PM PDT 24 |
11784866880 ps |
T1022 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.931292247 |
|
|
Jun 29 07:44:06 PM PDT 24 |
Jun 29 08:11:37 PM PDT 24 |
14053608290 ps |
T1023 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2260494686 |
|
|
Jun 29 07:59:13 PM PDT 24 |
Jun 29 08:05:47 PM PDT 24 |
4001097800 ps |
T1024 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.69084053 |
|
|
Jun 29 08:10:37 PM PDT 24 |
Jun 29 08:19:23 PM PDT 24 |
4552630964 ps |
T171 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.644677276 |
|
|
Jun 29 07:40:19 PM PDT 24 |
Jun 29 07:41:59 PM PDT 24 |
2374769854 ps |
T1025 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.3452540512 |
|
|
Jun 29 07:39:41 PM PDT 24 |
Jun 29 07:54:00 PM PDT 24 |
6062331100 ps |
T753 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2822601286 |
|
|
Jun 29 08:10:06 PM PDT 24 |
Jun 29 08:21:48 PM PDT 24 |
6208142024 ps |
T659 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.2934952865 |
|
|
Jun 29 07:38:38 PM PDT 24 |
Jun 29 07:42:28 PM PDT 24 |
3229153106 ps |
T1026 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2589714895 |
|
|
Jun 29 07:42:14 PM PDT 24 |
Jun 29 11:26:38 PM PDT 24 |
78565062720 ps |
T1027 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.164716326 |
|
|
Jun 29 08:06:54 PM PDT 24 |
Jun 29 08:14:06 PM PDT 24 |
7246101072 ps |
T685 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1352598519 |
|
|
Jun 29 08:12:18 PM PDT 24 |
Jun 29 08:24:23 PM PDT 24 |
6112445318 ps |
T353 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.2356043233 |
|
|
Jun 29 08:05:23 PM PDT 24 |
Jun 29 08:10:52 PM PDT 24 |
3450125470 ps |
T1028 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.3850356686 |
|
|
Jun 29 07:39:53 PM PDT 24 |
Jun 29 08:00:47 PM PDT 24 |
5106262760 ps |
T1029 |
/workspace/coverage/default/0.chip_sw_example_rom.208868450 |
|
|
Jun 29 07:37:14 PM PDT 24 |
Jun 29 07:40:00 PM PDT 24 |
2674889336 ps |
T51 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.352762892 |
|
|
Jun 29 08:07:03 PM PDT 24 |
Jun 29 09:01:31 PM PDT 24 |
25102897567 ps |
T1030 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.3401178411 |
|
|
Jun 29 07:58:47 PM PDT 24 |
Jun 29 08:23:07 PM PDT 24 |
5913808478 ps |
T1031 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3864001870 |
|
|
Jun 29 08:09:50 PM PDT 24 |
Jun 29 08:19:09 PM PDT 24 |
4397043176 ps |
T1032 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.2820677753 |
|
|
Jun 29 08:03:35 PM PDT 24 |
Jun 29 08:09:15 PM PDT 24 |
2952153484 ps |
T731 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.2215835407 |
|
|
Jun 29 08:12:52 PM PDT 24 |
Jun 29 08:22:17 PM PDT 24 |
3936154040 ps |
T1033 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.1637837288 |
|
|
Jun 29 07:46:06 PM PDT 24 |
Jun 29 08:24:18 PM PDT 24 |
29083616532 ps |
T1034 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3176033813 |
|
|
Jun 29 07:43:15 PM PDT 24 |
Jun 29 07:48:12 PM PDT 24 |
3605147499 ps |
T1035 |
/workspace/coverage/default/0.chip_sival_flash_info_access.264280021 |
|
|
Jun 29 07:42:08 PM PDT 24 |
Jun 29 07:48:12 PM PDT 24 |
3588850760 ps |
T727 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.4207739401 |
|
|
Jun 29 08:13:42 PM PDT 24 |
Jun 29 08:21:18 PM PDT 24 |
3261078344 ps |
T291 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2752682144 |
|
|
Jun 29 07:59:16 PM PDT 24 |
Jun 29 08:22:56 PM PDT 24 |
6774982922 ps |
T709 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.1674798326 |
|
|
Jun 29 08:05:04 PM PDT 24 |
Jun 29 08:15:33 PM PDT 24 |
4879747976 ps |
T281 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2312863094 |
|
|
Jun 29 08:09:35 PM PDT 24 |
Jun 29 08:21:22 PM PDT 24 |
4773993770 ps |
T738 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.2908410064 |
|
|
Jun 29 08:09:04 PM PDT 24 |
Jun 29 08:15:00 PM PDT 24 |
3734851896 ps |
T440 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.3849514432 |
|
|
Jun 29 07:40:03 PM PDT 24 |
Jun 29 08:30:21 PM PDT 24 |
24650842053 ps |
T1036 |
/workspace/coverage/default/2.chip_sw_hmac_enc.2496228675 |
|
|
Jun 29 07:59:47 PM PDT 24 |
Jun 29 08:04:35 PM PDT 24 |
3434490608 ps |
T1037 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.1340550365 |
|
|
Jun 29 07:42:37 PM PDT 24 |
Jun 29 08:42:59 PM PDT 24 |
13127714627 ps |
T756 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.2531947386 |
|
|
Jun 29 08:09:41 PM PDT 24 |
Jun 29 08:15:26 PM PDT 24 |
3777860700 ps |
T672 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2564415855 |
|
|
Jun 29 07:47:01 PM PDT 24 |
Jun 29 08:04:08 PM PDT 24 |
5253881464 ps |
T1038 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1922353679 |
|
|
Jun 29 07:49:35 PM PDT 24 |
Jun 29 08:53:47 PM PDT 24 |
14572046612 ps |
T354 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.2120256244 |
|
|
Jun 29 08:13:59 PM PDT 24 |
Jun 29 08:25:02 PM PDT 24 |
4725558040 ps |
T1039 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.3020002139 |
|
|
Jun 29 08:05:54 PM PDT 24 |
Jun 29 08:42:31 PM PDT 24 |
13530731464 ps |
T1040 |
/workspace/coverage/default/2.rom_keymgr_functest.3709698744 |
|
|
Jun 29 08:09:53 PM PDT 24 |
Jun 29 08:16:50 PM PDT 24 |
4058008500 ps |
T1041 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.2835724799 |
|
|
Jun 29 07:46:34 PM PDT 24 |
Jun 29 07:56:49 PM PDT 24 |
4519263470 ps |
T321 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2658078116 |
|
|
Jun 29 07:38:44 PM PDT 24 |
Jun 29 07:53:56 PM PDT 24 |
4979321372 ps |
T182 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2391048701 |
|
|
Jun 29 07:38:43 PM PDT 24 |
Jun 29 07:40:54 PM PDT 24 |
3255445239 ps |
T1042 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.1154404192 |
|
|
Jun 29 07:52:26 PM PDT 24 |
Jun 29 07:57:50 PM PDT 24 |
3108540880 ps |
T237 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.1044490885 |
|
|
Jun 29 08:09:17 PM PDT 24 |
Jun 29 08:21:08 PM PDT 24 |
5782646000 ps |
T1043 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3547666238 |
|
|
Jun 29 07:38:36 PM PDT 24 |
Jun 29 07:46:38 PM PDT 24 |
5081385640 ps |
T739 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.3337695796 |
|
|
Jun 29 08:08:47 PM PDT 24 |
Jun 29 08:23:37 PM PDT 24 |
4984253840 ps |
T1044 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2568360854 |
|
|
Jun 29 07:39:02 PM PDT 24 |
Jun 29 07:49:54 PM PDT 24 |
4136087118 ps |
T1045 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1828349035 |
|
|
Jun 29 07:42:01 PM PDT 24 |
Jun 29 08:02:27 PM PDT 24 |
6527995607 ps |
T666 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3898469108 |
|
|
Jun 29 07:42:44 PM PDT 24 |
Jun 29 07:51:16 PM PDT 24 |
4625596088 ps |
T687 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.563177420 |
|
|
Jun 29 08:14:21 PM PDT 24 |
Jun 29 08:24:38 PM PDT 24 |
4651556542 ps |
T1046 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2217261588 |
|
|
Jun 29 07:37:43 PM PDT 24 |
Jun 29 08:06:33 PM PDT 24 |
8769622302 ps |
T648 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.2664905692 |
|
|
Jun 29 07:59:41 PM PDT 24 |
Jun 29 08:01:36 PM PDT 24 |
2491001794 ps |
T726 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.3993139655 |
|
|
Jun 29 08:09:35 PM PDT 24 |
Jun 29 08:16:55 PM PDT 24 |
3295202900 ps |
T1047 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.290569230 |
|
|
Jun 29 07:51:37 PM PDT 24 |
Jun 29 09:00:18 PM PDT 24 |
14697210714 ps |
T1048 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.3155273883 |
|
|
Jun 29 08:06:00 PM PDT 24 |
Jun 29 08:14:03 PM PDT 24 |
7017260564 ps |
T151 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3683964048 |
|
|
Jun 29 07:42:24 PM PDT 24 |
Jun 29 07:53:20 PM PDT 24 |
6156695306 ps |
T680 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.82073501 |
|
|
Jun 29 07:47:06 PM PDT 24 |
Jun 29 07:54:00 PM PDT 24 |
3880939816 ps |
T167 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.2442662829 |
|
|
Jun 29 07:47:53 PM PDT 24 |
Jun 29 07:58:29 PM PDT 24 |
3444642088 ps |
T1049 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.4164279035 |
|
|
Jun 29 08:09:56 PM PDT 24 |
Jun 29 09:28:32 PM PDT 24 |
14660015392 ps |
T1050 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.2366235468 |
|
|
Jun 29 07:37:48 PM PDT 24 |
Jun 29 07:43:41 PM PDT 24 |
6858732160 ps |
T95 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3356831797 |
|
|
Jun 29 07:39:53 PM PDT 24 |
Jun 29 08:06:17 PM PDT 24 |
25577021710 ps |
T206 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.4012645915 |
|
|
Jun 29 07:47:37 PM PDT 24 |
Jun 29 09:03:58 PM PDT 24 |
16194056964 ps |
T1051 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.4211741259 |
|
|
Jun 29 07:41:19 PM PDT 24 |
Jun 29 07:52:16 PM PDT 24 |
4364571426 ps |
T1052 |
/workspace/coverage/default/2.chip_sw_example_concurrency.2784744158 |
|
|
Jun 29 07:56:58 PM PDT 24 |
Jun 29 08:02:15 PM PDT 24 |
3283331958 ps |
T1053 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1295142839 |
|
|
Jun 29 07:39:43 PM PDT 24 |
Jun 29 07:49:52 PM PDT 24 |
4063151728 ps |
T1054 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.1189795957 |
|
|
Jun 29 08:00:27 PM PDT 24 |
Jun 29 08:08:04 PM PDT 24 |
4854690200 ps |
T1055 |
/workspace/coverage/default/1.rom_e2e_smoke.3924517 |
|
|
Jun 29 08:03:39 PM PDT 24 |
Jun 29 09:08:04 PM PDT 24 |
15416426660 ps |
T1056 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.395317669 |
|
|
Jun 29 07:40:03 PM PDT 24 |
Jun 29 08:25:56 PM PDT 24 |
30140989708 ps |
T1057 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.2510073566 |
|
|
Jun 29 07:57:28 PM PDT 24 |
Jun 29 08:02:56 PM PDT 24 |
2545229606 ps |
T684 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.2078831621 |
|
|
Jun 29 08:07:03 PM PDT 24 |
Jun 29 08:17:57 PM PDT 24 |
5175488600 ps |
T1058 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.514982242 |
|
|
Jun 29 07:48:42 PM PDT 24 |
Jun 29 08:01:04 PM PDT 24 |
4717903742 ps |
T644 |
/workspace/coverage/default/2.chip_tap_straps_dev.1373693793 |
|
|
Jun 29 07:59:53 PM PDT 24 |
Jun 29 08:23:19 PM PDT 24 |
11332555805 ps |
T1059 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.1751378645 |
|
|
Jun 29 07:40:21 PM PDT 24 |
Jun 29 07:45:39 PM PDT 24 |
3414222252 ps |
T96 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.727040372 |
|
|
Jun 29 07:49:38 PM PDT 24 |
Jun 29 07:57:25 PM PDT 24 |
7041257068 ps |
T1060 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.762998250 |
|
|
Jun 29 08:04:15 PM PDT 24 |
Jun 29 08:11:38 PM PDT 24 |
3376205671 ps |
T1061 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1121772710 |
|
|
Jun 29 07:44:57 PM PDT 24 |
Jun 29 09:03:04 PM PDT 24 |
14515354004 ps |
T295 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.195407374 |
|
|
Jun 29 07:46:10 PM PDT 24 |
Jun 29 08:26:05 PM PDT 24 |
10588317710 ps |
T1062 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2764028196 |
|
|
Jun 29 07:56:54 PM PDT 24 |
Jun 29 08:16:04 PM PDT 24 |
5548516968 ps |
T1063 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.2696607245 |
|
|
Jun 29 07:58:43 PM PDT 24 |
Jun 29 08:12:33 PM PDT 24 |
7924045008 ps |
T1064 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3367397595 |
|
|
Jun 29 07:39:55 PM PDT 24 |
Jun 29 07:44:37 PM PDT 24 |
2652181634 ps |
T1065 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2512856672 |
|
|
Jun 29 07:59:28 PM PDT 24 |
Jun 29 08:12:30 PM PDT 24 |
4759454750 ps |
T20 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.3358225539 |
|
|
Jun 29 07:39:18 PM PDT 24 |
Jun 29 07:43:34 PM PDT 24 |
2582128178 ps |
T1066 |
/workspace/coverage/default/2.chip_sw_edn_kat.2206138665 |
|
|
Jun 29 07:59:01 PM PDT 24 |
Jun 29 08:10:02 PM PDT 24 |
3453985240 ps |
T1067 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.427493626 |
|
|
Jun 29 07:45:19 PM PDT 24 |
Jun 29 09:15:53 PM PDT 24 |
44920164082 ps |
T1068 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.2002469945 |
|
|
Jun 29 08:09:49 PM PDT 24 |
Jun 29 08:17:51 PM PDT 24 |
3715006520 ps |
T1069 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3913627128 |
|
|
Jun 29 07:38:40 PM PDT 24 |
Jun 29 07:47:13 PM PDT 24 |
4480852112 ps |
T743 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.3597289784 |
|
|
Jun 29 08:11:13 PM PDT 24 |
Jun 29 08:22:52 PM PDT 24 |
6543763432 ps |
T1070 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1874585856 |
|
|
Jun 29 07:46:11 PM PDT 24 |
Jun 29 09:34:16 PM PDT 24 |
24087993666 ps |
T1071 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.4108198885 |
|
|
Jun 29 07:51:00 PM PDT 24 |
Jun 29 07:54:39 PM PDT 24 |
2878255962 ps |
T1072 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3696194247 |
|
|
Jun 29 07:37:59 PM PDT 24 |
Jun 29 11:28:52 PM PDT 24 |
255072722466 ps |
T641 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.373809833 |
|
|
Jun 29 07:37:13 PM PDT 24 |
Jun 29 07:43:27 PM PDT 24 |
4621330650 ps |
T1073 |
/workspace/coverage/default/2.chip_tap_straps_prod.770922857 |
|
|
Jun 29 08:00:50 PM PDT 24 |
Jun 29 08:28:01 PM PDT 24 |
13273230854 ps |
T1074 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.751513133 |
|
|
Jun 29 08:03:44 PM PDT 24 |
Jun 29 08:26:51 PM PDT 24 |
14486835453 ps |
T759 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.2069308803 |
|
|
Jun 29 08:13:33 PM PDT 24 |
Jun 29 08:23:36 PM PDT 24 |
4580500352 ps |
T1075 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.2766223248 |
|
|
Jun 29 07:57:43 PM PDT 24 |
Jun 29 08:07:00 PM PDT 24 |
4409658100 ps |
T446 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.3637312667 |
|
|
Jun 29 07:53:53 PM PDT 24 |
Jun 29 08:15:55 PM PDT 24 |
6039373092 ps |
T1076 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.1668856292 |
|
|
Jun 29 07:56:50 PM PDT 24 |
Jun 29 08:01:50 PM PDT 24 |
2795361753 ps |
T162 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.62283501 |
|
|
Jun 29 07:44:39 PM PDT 24 |
Jun 29 08:15:05 PM PDT 24 |
22614467434 ps |
T1077 |
/workspace/coverage/default/1.chip_sw_kmac_idle.3299123310 |
|
|
Jun 29 07:46:33 PM PDT 24 |
Jun 29 07:49:40 PM PDT 24 |
2481429768 ps |
T1078 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.4237103337 |
|
|
Jun 29 07:37:19 PM PDT 24 |
Jun 29 07:45:25 PM PDT 24 |
3524783800 ps |
T1079 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.2222028057 |
|
|
Jun 29 07:40:39 PM PDT 24 |
Jun 29 07:45:44 PM PDT 24 |
3053055976 ps |
T47 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2776199378 |
|
|
Jun 29 07:54:26 PM PDT 24 |
Jun 29 08:01:17 PM PDT 24 |
3585829919 ps |
T1080 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.1840114159 |
|
|
Jun 29 07:46:47 PM PDT 24 |
Jun 29 08:14:00 PM PDT 24 |
7088360080 ps |
T760 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.1496318146 |
|
|
Jun 29 08:13:51 PM PDT 24 |
Jun 29 08:22:23 PM PDT 24 |
4611908216 ps |
T1081 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.1461257694 |
|
|
Jun 29 07:58:44 PM PDT 24 |
Jun 29 08:27:55 PM PDT 24 |
7780218952 ps |
T1082 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.3462814957 |
|
|
Jun 29 07:42:48 PM PDT 24 |
Jun 29 07:50:07 PM PDT 24 |
3314602772 ps |
T1083 |
/workspace/coverage/default/0.chip_sw_aes_idle.2814048439 |
|
|
Jun 29 07:40:49 PM PDT 24 |
Jun 29 07:45:03 PM PDT 24 |
2643054902 ps |
T1084 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.2865976739 |
|
|
Jun 29 08:09:38 PM PDT 24 |
Jun 29 08:14:51 PM PDT 24 |
2901746304 ps |
T45 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.839375460 |
|
|
Jun 29 07:38:09 PM PDT 24 |
Jun 29 07:47:43 PM PDT 24 |
5342257556 ps |
T1085 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.134963837 |
|
|
Jun 29 07:52:48 PM PDT 24 |
Jun 29 07:56:26 PM PDT 24 |
2758143976 ps |
T1086 |
/workspace/coverage/default/1.chip_sw_flash_init.190288415 |
|
|
Jun 29 07:42:42 PM PDT 24 |
Jun 29 08:15:55 PM PDT 24 |
22245680384 ps |
T1087 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.756693764 |
|
|
Jun 29 08:03:40 PM PDT 24 |
Jun 29 08:11:44 PM PDT 24 |
3917946586 ps |
T1088 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.2419763105 |
|
|
Jun 29 07:55:47 PM PDT 24 |
Jun 29 08:02:25 PM PDT 24 |
2616320842 ps |
T1089 |
/workspace/coverage/default/1.chip_sw_aes_idle.2693333955 |
|
|
Jun 29 07:48:41 PM PDT 24 |
Jun 29 07:54:08 PM PDT 24 |
2393196176 ps |
T676 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.3183667411 |
|
|
Jun 29 08:14:05 PM PDT 24 |
Jun 29 08:25:12 PM PDT 24 |
5805290860 ps |
T294 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2454090054 |
|
|
Jun 29 07:48:13 PM PDT 24 |
Jun 29 08:10:31 PM PDT 24 |
5463043704 ps |
T299 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.1487202329 |
|
|
Jun 29 08:00:13 PM PDT 24 |
Jun 29 08:26:51 PM PDT 24 |
6683320536 ps |
T1090 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.2904338333 |
|
|
Jun 29 07:48:46 PM PDT 24 |
Jun 29 08:04:39 PM PDT 24 |
6375924752 ps |
T1091 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.965457825 |
|
|
Jun 29 07:41:31 PM PDT 24 |
Jun 29 07:45:52 PM PDT 24 |
3023589340 ps |
T1092 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.727587073 |
|
|
Jun 29 08:06:27 PM PDT 24 |
Jun 29 08:20:22 PM PDT 24 |
4677127204 ps |
T1093 |
/workspace/coverage/default/4.chip_tap_straps_rma.1698889321 |
|
|
Jun 29 08:03:55 PM PDT 24 |
Jun 29 08:10:51 PM PDT 24 |
3901682632 ps |
T193 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.3536274738 |
|
|
Jun 29 07:57:40 PM PDT 24 |
Jun 29 09:08:39 PM PDT 24 |
20633998918 ps |
T1094 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.2267350220 |
|
|
Jun 29 07:46:35 PM PDT 24 |
Jun 29 08:21:08 PM PDT 24 |
11268900478 ps |
T238 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.1425869797 |
|
|
Jun 29 07:43:34 PM PDT 24 |
Jun 29 07:57:23 PM PDT 24 |
7157591654 ps |
T207 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.218901923 |
|
|
Jun 29 08:00:30 PM PDT 24 |
Jun 29 09:04:08 PM PDT 24 |
10652281992 ps |
T1095 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.129006489 |
|
|
Jun 29 07:45:11 PM PDT 24 |
Jun 29 07:49:29 PM PDT 24 |
2972641882 ps |
T1096 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.1021501911 |
|
|
Jun 29 07:46:58 PM PDT 24 |
Jun 29 07:51:59 PM PDT 24 |
3778984756 ps |
T168 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.2154324060 |
|
|
Jun 29 07:58:55 PM PDT 24 |
Jun 29 08:09:52 PM PDT 24 |
4162074340 ps |
T369 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.101379556 |
|
|
Jun 29 07:38:40 PM PDT 24 |
Jun 29 07:51:37 PM PDT 24 |
5309197880 ps |
T1097 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.4102640679 |
|
|
Jun 29 08:05:13 PM PDT 24 |
Jun 29 08:11:25 PM PDT 24 |
3329223418 ps |
T649 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.3236633686 |
|
|
Jun 29 07:55:06 PM PDT 24 |
Jun 29 07:57:38 PM PDT 24 |
2952555915 ps |
T728 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.917139284 |
|
|
Jun 29 07:54:02 PM PDT 24 |
Jun 29 08:03:56 PM PDT 24 |
4392159036 ps |
T717 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.86555180 |
|
|
Jun 29 08:08:22 PM PDT 24 |
Jun 29 08:15:46 PM PDT 24 |
3181429840 ps |
T1098 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.4235081401 |
|
|
Jun 29 07:39:47 PM PDT 24 |
Jun 29 07:49:10 PM PDT 24 |
18706828078 ps |
T1099 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.4094811807 |
|
|
Jun 29 08:04:34 PM PDT 24 |
Jun 29 08:32:08 PM PDT 24 |
8179978472 ps |
T735 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.2983886571 |
|
|
Jun 29 08:05:10 PM PDT 24 |
Jun 29 08:11:30 PM PDT 24 |
3699396548 ps |
T342 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.4060746858 |
|
|
Jun 29 07:38:22 PM PDT 24 |
Jun 29 07:50:13 PM PDT 24 |
4086274792 ps |
T1100 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.1648150615 |
|
|
Jun 29 07:44:21 PM PDT 24 |
Jun 29 07:55:50 PM PDT 24 |
5797653340 ps |
T1101 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.778428100 |
|
|
Jun 29 07:43:31 PM PDT 24 |
Jun 29 07:53:15 PM PDT 24 |
7667778956 ps |
T1102 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.1876697184 |
|
|
Jun 29 07:41:22 PM PDT 24 |
Jun 29 07:52:10 PM PDT 24 |
4196229610 ps |
T1103 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.1276668525 |
|
|
Jun 29 07:54:22 PM PDT 24 |
Jun 29 07:58:34 PM PDT 24 |
3230305400 ps |
T757 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.4252985822 |
|
|
Jun 29 08:23:17 PM PDT 24 |
Jun 29 08:33:48 PM PDT 24 |
4436042996 ps |
T1104 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.4143959177 |
|
|
Jun 29 07:40:14 PM PDT 24 |
Jun 29 07:57:18 PM PDT 24 |
6284150732 ps |
T1105 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.629370739 |
|
|
Jun 29 07:41:25 PM PDT 24 |
Jun 29 07:45:54 PM PDT 24 |
3162312712 ps |
T1106 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.2716767015 |
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|
Jun 29 07:39:32 PM PDT 24 |
Jun 29 07:45:22 PM PDT 24 |
3024240880 ps |
T1107 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2367517508 |
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|
Jun 29 07:40:35 PM PDT 24 |
Jun 29 07:46:10 PM PDT 24 |
2425616139 ps |
T1108 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.8408208 |
|
|
Jun 29 07:41:37 PM PDT 24 |
Jun 29 08:06:34 PM PDT 24 |
8223988052 ps |
T1109 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.4262713758 |
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|
Jun 29 07:55:41 PM PDT 24 |
Jun 29 07:59:07 PM PDT 24 |
2943390096 ps |
T1110 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.1625080058 |
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|
Jun 29 07:54:50 PM PDT 24 |
Jun 29 08:10:56 PM PDT 24 |
5348466876 ps |
T1111 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1327577297 |
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|
Jun 29 08:01:03 PM PDT 24 |
Jun 29 08:04:19 PM PDT 24 |
2685636601 ps |
T1112 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.3779576421 |
|
|
Jun 29 07:53:11 PM PDT 24 |
Jun 29 08:39:35 PM PDT 24 |
10543117800 ps |
T1113 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.777365564 |
|
|
Jun 29 07:53:47 PM PDT 24 |
Jun 29 08:40:00 PM PDT 24 |
13420256340 ps |
T1114 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1283795747 |
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|
Jun 29 07:43:35 PM PDT 24 |
Jun 29 08:12:45 PM PDT 24 |
18001235962 ps |
T1115 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.1590226901 |
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|
Jun 29 07:38:52 PM PDT 24 |
Jun 29 07:43:16 PM PDT 24 |
3062065064 ps |
T1116 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2730971530 |
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|
Jun 29 07:44:16 PM PDT 24 |
Jun 29 08:24:43 PM PDT 24 |
21400270313 ps |
T1117 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.211933522 |
|
|
Jun 29 07:39:55 PM PDT 24 |
Jun 29 09:04:31 PM PDT 24 |
19366899576 ps |
T126 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.771715234 |
|
|
Jun 29 07:47:36 PM PDT 24 |
Jun 29 07:57:58 PM PDT 24 |
5888085164 ps |
T1118 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.1080724656 |
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|
Jun 29 07:46:49 PM PDT 24 |
Jun 29 08:53:47 PM PDT 24 |
15600313760 ps |
T1119 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.387094512 |
|
|
Jun 29 07:57:26 PM PDT 24 |
Jun 29 08:00:41 PM PDT 24 |
2878989740 ps |
T1120 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3403939640 |
|
|
Jun 29 08:08:50 PM PDT 24 |
Jun 29 08:18:39 PM PDT 24 |
5613595484 ps |
T749 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3782814176 |
|
|
Jun 29 08:12:26 PM PDT 24 |
Jun 29 08:21:28 PM PDT 24 |
4561691284 ps |
T1121 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.963115807 |
|
|
Jun 29 07:44:44 PM PDT 24 |
Jun 29 08:01:37 PM PDT 24 |
9226222872 ps |
T1122 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.3129018419 |
|
|
Jun 29 07:55:22 PM PDT 24 |
Jun 29 08:00:05 PM PDT 24 |
3059646916 ps |
T1123 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.4001515897 |
|
|
Jun 29 07:59:59 PM PDT 24 |
Jun 29 10:29:13 PM PDT 24 |
34818782232 ps |
T1124 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.1233570676 |
|
|
Jun 29 08:02:31 PM PDT 24 |
Jun 29 08:14:51 PM PDT 24 |
4734023560 ps |
T1125 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.701757953 |
|
|
Jun 29 07:43:34 PM PDT 24 |
Jun 29 07:47:09 PM PDT 24 |
3760516837 ps |
T1126 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.3469725739 |
|
|
Jun 29 07:43:18 PM PDT 24 |
Jun 29 08:01:52 PM PDT 24 |
5665225090 ps |
T239 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.872563925 |
|
|
Jun 29 08:23:49 PM PDT 24 |
Jun 29 08:34:32 PM PDT 24 |
5538164928 ps |
T1127 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.1443085359 |
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|
Jun 29 08:00:24 PM PDT 24 |
Jun 29 08:07:17 PM PDT 24 |
3488986116 ps |
T1128 |
/workspace/coverage/default/1.rom_e2e_static_critical.1002854269 |
|
|
Jun 29 07:55:30 PM PDT 24 |
Jun 29 09:11:41 PM PDT 24 |
16706303672 ps |
T673 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.2888276562 |
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|
Jun 29 07:40:53 PM PDT 24 |
Jun 29 08:28:56 PM PDT 24 |
36391972679 ps |
T163 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3425142283 |
|
|
Jun 29 07:40:10 PM PDT 24 |
Jun 29 07:52:09 PM PDT 24 |
4617674923 ps |
T1129 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1372225322 |
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|
Jun 29 07:56:46 PM PDT 24 |
Jun 29 09:26:17 PM PDT 24 |
51157662087 ps |
T1130 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3336085214 |
|
|
Jun 29 08:04:01 PM PDT 24 |
Jun 29 08:07:13 PM PDT 24 |
2461096846 ps |
T715 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.371902152 |
|
|
Jun 29 08:09:28 PM PDT 24 |
Jun 29 08:18:03 PM PDT 24 |
4381259768 ps |
T1131 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.655169314 |
|
|
Jun 29 08:14:20 PM PDT 24 |
Jun 29 08:22:29 PM PDT 24 |
4392411920 ps |
T1132 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.3171717442 |
|
|
Jun 29 08:13:46 PM PDT 24 |
Jun 29 08:19:17 PM PDT 24 |
4112128500 ps |
T1133 |
/workspace/coverage/default/1.chip_sw_aes_entropy.3838151998 |
|
|
Jun 29 07:45:32 PM PDT 24 |
Jun 29 07:49:22 PM PDT 24 |
2421442598 ps |