| T651 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.2411754101 |
|
|
Jun 29 08:13:59 PM PDT 24 |
Jun 29 08:23:37 PM PDT 24 |
4172055684 ps |
| T1134 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.2223144799 |
|
|
Jun 29 07:48:57 PM PDT 24 |
Jun 29 08:54:06 PM PDT 24 |
29642634379 ps |
| T1135 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.3077518085 |
|
|
Jun 29 08:08:09 PM PDT 24 |
Jun 29 08:57:57 PM PDT 24 |
13039911424 ps |
| T1136 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.1485718163 |
|
|
Jun 29 07:48:03 PM PDT 24 |
Jun 29 07:52:02 PM PDT 24 |
2492790144 ps |
| T449 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.168656241 |
|
|
Jun 29 08:00:01 PM PDT 24 |
Jun 29 08:10:55 PM PDT 24 |
2896685756 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.636405413 |
|
|
Jun 29 07:56:31 PM PDT 24 |
Jun 29 08:02:13 PM PDT 24 |
3108045224 ps |
| T1138 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.66061893 |
|
|
Jun 29 07:54:02 PM PDT 24 |
Jun 29 11:55:33 PM PDT 24 |
77272075696 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.3183854718 |
|
|
Jun 29 08:01:09 PM PDT 24 |
Jun 29 08:11:04 PM PDT 24 |
4720374154 ps |
| T677 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1009937685 |
|
|
Jun 29 08:11:20 PM PDT 24 |
Jun 29 08:23:30 PM PDT 24 |
4644801166 ps |
| T1140 |
/workspace/coverage/default/0.rom_e2e_smoke.1441194339 |
|
|
Jun 29 07:44:44 PM PDT 24 |
Jun 29 08:53:54 PM PDT 24 |
15177312524 ps |
| T1141 |
/workspace/coverage/default/2.chip_sw_example_rom.1254616976 |
|
|
Jun 29 07:52:55 PM PDT 24 |
Jun 29 07:55:30 PM PDT 24 |
2566688098 ps |
| T1142 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.2367475885 |
|
|
Jun 29 08:09:01 PM PDT 24 |
Jun 29 08:15:02 PM PDT 24 |
3309766840 ps |
| T1143 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3679366753 |
|
|
Jun 29 07:38:56 PM PDT 24 |
Jun 29 08:16:56 PM PDT 24 |
21905259293 ps |
| T48 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.4100865410 |
|
|
Jun 29 07:39:17 PM PDT 24 |
Jun 29 07:44:34 PM PDT 24 |
3011226523 ps |
| T1144 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.537454390 |
|
|
Jun 29 08:11:55 PM PDT 24 |
Jun 29 08:18:44 PM PDT 24 |
3903481136 ps |
| T313 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.212931096 |
|
|
Jun 29 08:00:11 PM PDT 24 |
Jun 29 08:07:27 PM PDT 24 |
4202535412 ps |
| T12 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.2281748658 |
|
|
Jun 29 07:54:15 PM PDT 24 |
Jun 29 08:03:35 PM PDT 24 |
6399105412 ps |
| T412 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.3776551246 |
|
|
Jun 29 07:53:12 PM PDT 24 |
Jun 29 08:04:13 PM PDT 24 |
4384219826 ps |
| T413 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.2396071342 |
|
|
Jun 29 08:06:41 PM PDT 24 |
Jun 29 08:15:47 PM PDT 24 |
3989069088 ps |
| T414 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.328938363 |
|
|
Jun 29 08:09:48 PM PDT 24 |
Jun 29 08:23:56 PM PDT 24 |
5029095960 ps |
| T415 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.4294295764 |
|
|
Jun 29 07:51:30 PM PDT 24 |
Jun 29 07:54:48 PM PDT 24 |
3089179500 ps |
| T416 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.1592370238 |
|
|
Jun 29 08:09:42 PM PDT 24 |
Jun 29 08:22:33 PM PDT 24 |
4701719412 ps |
| T417 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.3032267838 |
|
|
Jun 29 08:05:38 PM PDT 24 |
Jun 29 08:46:10 PM PDT 24 |
9654246324 ps |
| T418 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.4007110820 |
|
|
Jun 29 07:42:58 PM PDT 24 |
Jun 29 07:49:51 PM PDT 24 |
7103831524 ps |
| T240 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.3245714910 |
|
|
Jun 29 08:07:19 PM PDT 24 |
Jun 29 08:17:30 PM PDT 24 |
3850748300 ps |
| T419 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.1162035500 |
|
|
Jun 29 07:43:05 PM PDT 24 |
Jun 29 07:48:14 PM PDT 24 |
3661798340 ps |
| T722 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.3270659567 |
|
|
Jun 29 08:13:27 PM PDT 24 |
Jun 29 08:21:14 PM PDT 24 |
3403036976 ps |
| T1145 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.36184588 |
|
|
Jun 29 08:03:44 PM PDT 24 |
Jun 29 08:14:15 PM PDT 24 |
4064384444 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.628773245 |
|
|
Jun 29 07:42:14 PM PDT 24 |
Jun 29 08:22:18 PM PDT 24 |
10362031653 ps |
| T710 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1487493650 |
|
|
Jun 29 08:07:19 PM PDT 24 |
Jun 29 08:15:11 PM PDT 24 |
4286357800 ps |
| T747 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.1577233936 |
|
|
Jun 29 08:10:19 PM PDT 24 |
Jun 29 08:16:11 PM PDT 24 |
3848669180 ps |
| T1147 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.675000594 |
|
|
Jun 29 07:37:45 PM PDT 24 |
Jun 29 08:06:49 PM PDT 24 |
6267236356 ps |
| T1148 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2284419906 |
|
|
Jun 29 08:01:47 PM PDT 24 |
Jun 29 08:06:34 PM PDT 24 |
3108780136 ps |
| T1149 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.590358920 |
|
|
Jun 29 07:41:11 PM PDT 24 |
Jun 29 07:51:29 PM PDT 24 |
6106605824 ps |
| T1150 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.3929171984 |
|
|
Jun 29 08:02:06 PM PDT 24 |
Jun 29 08:10:45 PM PDT 24 |
3100614488 ps |
| T1151 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.95217253 |
|
|
Jun 29 08:21:16 PM PDT 24 |
Jun 29 08:34:01 PM PDT 24 |
5360944184 ps |
| T1152 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.1326816119 |
|
|
Jun 29 07:43:37 PM PDT 24 |
Jun 29 07:51:33 PM PDT 24 |
7370673768 ps |
| T355 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3353255509 |
|
|
Jun 29 08:11:59 PM PDT 24 |
Jun 29 08:23:52 PM PDT 24 |
6188751876 ps |
| T1153 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3537381685 |
|
|
Jun 29 07:57:21 PM PDT 24 |
Jun 29 08:52:56 PM PDT 24 |
11516141012 ps |
| T1154 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.1936895463 |
|
|
Jun 29 08:00:59 PM PDT 24 |
Jun 29 08:04:59 PM PDT 24 |
2742125174 ps |
| T1155 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.761907533 |
|
|
Jun 29 07:43:30 PM PDT 24 |
Jun 29 07:54:33 PM PDT 24 |
5141288893 ps |
| T314 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1754599823 |
|
|
Jun 29 07:45:07 PM PDT 24 |
Jun 29 07:56:23 PM PDT 24 |
4819507352 ps |
| T1156 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2107175973 |
|
|
Jun 29 07:44:48 PM PDT 24 |
Jun 29 07:48:54 PM PDT 24 |
3035360500 ps |
| T1157 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.4204273001 |
|
|
Jun 29 07:59:36 PM PDT 24 |
Jun 29 08:08:42 PM PDT 24 |
3811924884 ps |
| T1158 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.1568467967 |
|
|
Jun 29 07:38:36 PM PDT 24 |
Jun 29 07:59:56 PM PDT 24 |
10081182618 ps |
| T1159 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.451075492 |
|
|
Jun 29 07:41:29 PM PDT 24 |
Jun 29 08:06:38 PM PDT 24 |
8540763228 ps |
| T732 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.3120859526 |
|
|
Jun 29 08:09:11 PM PDT 24 |
Jun 29 08:15:09 PM PDT 24 |
3200439680 ps |
| T1160 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2261488484 |
|
|
Jun 29 07:39:06 PM PDT 24 |
Jun 29 07:51:11 PM PDT 24 |
4912497144 ps |
| T1161 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2424001443 |
|
|
Jun 29 07:38:59 PM PDT 24 |
Jun 29 07:41:04 PM PDT 24 |
3073250934 ps |
| T21 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2242646354 |
|
|
Jun 29 07:53:29 PM PDT 24 |
Jun 29 07:58:10 PM PDT 24 |
2544146301 ps |
| T1162 |
/workspace/coverage/default/0.chip_tap_straps_prod.2584103497 |
|
|
Jun 29 07:39:28 PM PDT 24 |
Jun 29 07:55:18 PM PDT 24 |
8350304711 ps |
| T1163 |
/workspace/coverage/default/1.chip_tap_straps_prod.4087808863 |
|
|
Jun 29 07:51:19 PM PDT 24 |
Jun 29 08:24:22 PM PDT 24 |
16669448426 ps |
| T1164 |
/workspace/coverage/default/0.chip_sw_example_flash.299221309 |
|
|
Jun 29 07:39:04 PM PDT 24 |
Jun 29 07:43:31 PM PDT 24 |
2977563054 ps |
| T1165 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.2959717661 |
|
|
Jun 29 07:38:15 PM PDT 24 |
Jun 29 07:46:48 PM PDT 24 |
5108673262 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_edn_kat.4151006754 |
|
|
Jun 29 07:44:48 PM PDT 24 |
Jun 29 07:55:04 PM PDT 24 |
3646872384 ps |
| T1167 |
/workspace/coverage/default/2.chip_sw_aes_enc.1504509094 |
|
|
Jun 29 07:56:52 PM PDT 24 |
Jun 29 08:00:34 PM PDT 24 |
3027139856 ps |
| T1168 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.3956616912 |
|
|
Jun 29 07:57:52 PM PDT 24 |
Jun 29 08:23:53 PM PDT 24 |
5886381672 ps |
| T282 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.956109430 |
|
|
Jun 29 08:14:46 PM PDT 24 |
Jun 29 08:23:44 PM PDT 24 |
3944240348 ps |
| T1169 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.2190850182 |
|
|
Jun 29 07:58:23 PM PDT 24 |
Jun 29 08:36:53 PM PDT 24 |
9044750800 ps |
| T678 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.455664748 |
|
|
Jun 29 08:07:37 PM PDT 24 |
Jun 29 08:14:09 PM PDT 24 |
3756662296 ps |
| T300 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3447053603 |
|
|
Jun 29 07:39:52 PM PDT 24 |
Jun 29 08:01:32 PM PDT 24 |
6404247600 ps |
| T1170 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.188489120 |
|
|
Jun 29 07:36:58 PM PDT 24 |
Jun 29 07:45:46 PM PDT 24 |
7112208650 ps |
| T1171 |
/workspace/coverage/default/1.chip_sw_example_rom.72240574 |
|
|
Jun 29 07:40:43 PM PDT 24 |
Jun 29 07:42:49 PM PDT 24 |
2730460296 ps |
| T1172 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2978816707 |
|
|
Jun 29 07:52:22 PM PDT 24 |
Jun 29 07:56:37 PM PDT 24 |
2746658392 ps |
| T1173 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.4223901974 |
|
|
Jun 29 08:12:27 PM PDT 24 |
Jun 29 08:18:53 PM PDT 24 |
3578223990 ps |
| T1174 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.116248212 |
|
|
Jun 29 08:04:43 PM PDT 24 |
Jun 29 08:13:52 PM PDT 24 |
7203240780 ps |
| T1175 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.2344972506 |
|
|
Jun 29 07:57:14 PM PDT 24 |
Jun 29 09:01:45 PM PDT 24 |
14983070161 ps |
| T1176 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.782478467 |
|
|
Jun 29 07:51:59 PM PDT 24 |
Jun 29 08:00:29 PM PDT 24 |
4892325358 ps |
| T1177 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.778064933 |
|
|
Jun 29 08:07:44 PM PDT 24 |
Jun 29 08:11:07 PM PDT 24 |
2777727934 ps |
| T1178 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.1005648941 |
|
|
Jun 29 07:54:25 PM PDT 24 |
Jun 29 08:06:52 PM PDT 24 |
4014583668 ps |
| T1179 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.558802760 |
|
|
Jun 29 08:11:32 PM PDT 24 |
Jun 29 08:18:37 PM PDT 24 |
3180995570 ps |
| T1180 |
/workspace/coverage/default/2.chip_tap_straps_rma.1818946805 |
|
|
Jun 29 08:00:45 PM PDT 24 |
Jun 29 08:10:44 PM PDT 24 |
6186487470 ps |
| T1181 |
/workspace/coverage/default/0.rom_e2e_static_critical.3382339582 |
|
|
Jun 29 07:47:29 PM PDT 24 |
Jun 29 08:59:53 PM PDT 24 |
16697067920 ps |
| T13 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.220624408 |
|
|
Jun 29 07:39:25 PM PDT 24 |
Jun 29 07:46:00 PM PDT 24 |
6232158520 ps |
| T401 |
/workspace/coverage/default/0.rom_keymgr_functest.3992314862 |
|
|
Jun 29 07:40:16 PM PDT 24 |
Jun 29 07:49:14 PM PDT 24 |
5165234980 ps |
| T402 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.1232836959 |
|
|
Jun 29 08:06:07 PM PDT 24 |
Jun 29 08:22:34 PM PDT 24 |
9932056520 ps |
| T403 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3272105487 |
|
|
Jun 29 08:15:56 PM PDT 24 |
Jun 29 08:22:47 PM PDT 24 |
3405834688 ps |
| T404 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1785973021 |
|
|
Jun 29 07:47:17 PM PDT 24 |
Jun 29 08:41:29 PM PDT 24 |
27692057927 ps |
| T405 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.2217677260 |
|
|
Jun 29 08:05:10 PM PDT 24 |
Jun 29 08:16:18 PM PDT 24 |
5138514028 ps |
| T406 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.438200144 |
|
|
Jun 29 08:10:05 PM PDT 24 |
Jun 29 08:12:13 PM PDT 24 |
2286055460 ps |
| T407 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.2571290571 |
|
|
Jun 29 08:12:47 PM PDT 24 |
Jun 29 08:23:28 PM PDT 24 |
5763073630 ps |
| T408 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.305333318 |
|
|
Jun 29 08:07:44 PM PDT 24 |
Jun 29 08:53:50 PM PDT 24 |
13557525800 ps |
| T409 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.1216336774 |
|
|
Jun 29 08:07:33 PM PDT 24 |
Jun 29 08:15:51 PM PDT 24 |
5809791200 ps |
| T1182 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3390163002 |
|
|
Jun 29 07:41:16 PM PDT 24 |
Jun 29 07:44:43 PM PDT 24 |
3109094064 ps |
| T356 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1778876384 |
|
|
Jun 29 08:08:28 PM PDT 24 |
Jun 29 08:14:46 PM PDT 24 |
4191808508 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.3421949366 |
|
|
Jun 29 07:39:37 PM PDT 24 |
Jun 29 07:51:21 PM PDT 24 |
5211511192 ps |
| T1184 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.2108385485 |
|
|
Jun 29 08:11:31 PM PDT 24 |
Jun 29 08:21:41 PM PDT 24 |
5761208882 ps |
| T14 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.2751802091 |
|
|
Jun 29 07:40:27 PM PDT 24 |
Jun 29 08:16:03 PM PDT 24 |
23765782152 ps |
| T681 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.77865605 |
|
|
Jun 29 08:14:49 PM PDT 24 |
Jun 29 08:21:17 PM PDT 24 |
4467552846 ps |
| T1185 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3149560283 |
|
|
Jun 29 07:58:44 PM PDT 24 |
Jun 29 08:22:09 PM PDT 24 |
6620350698 ps |
| T1186 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.306617492 |
|
|
Jun 29 07:53:32 PM PDT 24 |
Jun 29 08:05:33 PM PDT 24 |
4376906268 ps |
| T1187 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.1687460453 |
|
|
Jun 29 07:46:26 PM PDT 24 |
Jun 29 07:50:48 PM PDT 24 |
3092119404 ps |
| T733 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.106499022 |
|
|
Jun 29 08:12:41 PM PDT 24 |
Jun 29 08:22:59 PM PDT 24 |
4823143728 ps |
| T1188 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.747997125 |
|
|
Jun 29 07:39:41 PM PDT 24 |
Jun 29 08:04:42 PM PDT 24 |
8038793544 ps |
| T1189 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.2185884033 |
|
|
Jun 29 07:58:04 PM PDT 24 |
Jun 29 08:24:10 PM PDT 24 |
8559130744 ps |
| T1190 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.3980915274 |
|
|
Jun 29 07:38:12 PM PDT 24 |
Jun 29 07:43:54 PM PDT 24 |
3458343480 ps |
| T1191 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.1968397361 |
|
|
Jun 29 07:57:36 PM PDT 24 |
Jun 29 08:02:06 PM PDT 24 |
2620224667 ps |
| T1192 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.952216866 |
|
|
Jun 29 07:55:27 PM PDT 24 |
Jun 29 07:59:18 PM PDT 24 |
2735052270 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.1957243558 |
|
|
Jun 29 07:37:19 PM PDT 24 |
Jun 29 07:41:20 PM PDT 24 |
3106451848 ps |
| T1193 |
/workspace/coverage/default/2.chip_sw_aes_idle.1456699870 |
|
|
Jun 29 07:58:13 PM PDT 24 |
Jun 29 08:01:55 PM PDT 24 |
3195809164 ps |
| T764 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.3289020559 |
|
|
Jun 29 08:06:41 PM PDT 24 |
Jun 29 08:13:33 PM PDT 24 |
3299392158 ps |
| T1194 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2996534550 |
|
|
Jun 29 08:05:02 PM PDT 24 |
Jun 29 08:15:00 PM PDT 24 |
4335927200 ps |
| T315 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1078711457 |
|
|
Jun 29 08:01:06 PM PDT 24 |
Jun 29 08:13:59 PM PDT 24 |
5060738966 ps |
| T1195 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.2280864684 |
|
|
Jun 29 07:53:28 PM PDT 24 |
Jun 29 08:12:33 PM PDT 24 |
8971850112 ps |
| T1196 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.4287576839 |
|
|
Jun 29 08:08:42 PM PDT 24 |
Jun 29 08:17:47 PM PDT 24 |
4217523160 ps |
| T1197 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.2158971671 |
|
|
Jun 29 07:43:05 PM PDT 24 |
Jun 29 07:50:05 PM PDT 24 |
3670998814 ps |
| T1198 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.27179138 |
|
|
Jun 29 07:59:02 PM PDT 24 |
Jun 29 08:08:43 PM PDT 24 |
3942856440 ps |
| T1199 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.3190520422 |
|
|
Jun 29 07:45:34 PM PDT 24 |
Jun 29 09:36:18 PM PDT 24 |
24802559304 ps |
| T1200 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.310943909 |
|
|
Jun 29 07:59:51 PM PDT 24 |
Jun 29 08:29:15 PM PDT 24 |
7539368508 ps |
| T1201 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3805496434 |
|
|
Jun 29 07:42:00 PM PDT 24 |
Jun 29 07:52:27 PM PDT 24 |
5057292000 ps |
| T1202 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.399872963 |
|
|
Jun 29 08:06:11 PM PDT 24 |
Jun 29 08:37:39 PM PDT 24 |
7654017760 ps |
| T1203 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.421993793 |
|
|
Jun 29 08:01:10 PM PDT 24 |
Jun 29 08:27:41 PM PDT 24 |
9153258329 ps |
| T223 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.3364492986 |
|
|
Jun 29 08:11:25 PM PDT 24 |
Jun 29 08:21:38 PM PDT 24 |
5506862138 ps |
| T255 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1586122244 |
|
|
Jun 29 08:11:13 PM PDT 24 |
Jun 29 08:17:35 PM PDT 24 |
3362628796 ps |
| T256 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.272872119 |
|
|
Jun 29 07:39:39 PM PDT 24 |
Jun 29 07:49:46 PM PDT 24 |
4233133240 ps |
| T257 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.2958504300 |
|
|
Jun 29 08:07:40 PM PDT 24 |
Jun 29 08:14:58 PM PDT 24 |
4097158720 ps |
| T258 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.623546866 |
|
|
Jun 29 07:50:46 PM PDT 24 |
Jun 29 07:56:23 PM PDT 24 |
2858936056 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.1796915049 |
|
|
Jun 29 07:38:32 PM PDT 24 |
Jun 29 07:51:32 PM PDT 24 |
5410422728 ps |
| T260 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.4106417312 |
|
|
Jun 29 08:21:28 PM PDT 24 |
Jun 29 08:28:39 PM PDT 24 |
4461608546 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1512050484 |
|
|
Jun 29 07:46:47 PM PDT 24 |
Jun 29 07:53:48 PM PDT 24 |
5037110260 ps |
| T262 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.1935542138 |
|
|
Jun 29 08:06:43 PM PDT 24 |
Jun 29 09:10:57 PM PDT 24 |
15938690781 ps |
| T263 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.1730006690 |
|
|
Jun 29 07:48:16 PM PDT 24 |
Jun 29 07:59:24 PM PDT 24 |
5053288535 ps |
| T768 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3354470555 |
|
|
Jun 29 08:11:05 PM PDT 24 |
Jun 29 08:21:31 PM PDT 24 |
5723658630 ps |
| T1204 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.3081919776 |
|
|
Jun 29 08:12:47 PM PDT 24 |
Jun 29 08:20:48 PM PDT 24 |
4145591044 ps |
| T762 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1834468410 |
|
|
Jun 29 08:03:49 PM PDT 24 |
Jun 29 08:14:59 PM PDT 24 |
6506772196 ps |
| T1205 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.179639905 |
|
|
Jun 29 07:50:01 PM PDT 24 |
Jun 29 07:59:30 PM PDT 24 |
5132208848 ps |
| T1206 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.476390569 |
|
|
Jun 29 08:00:40 PM PDT 24 |
Jun 29 08:03:26 PM PDT 24 |
2430474594 ps |
| T1207 |
/workspace/coverage/default/1.chip_sw_example_concurrency.1245202382 |
|
|
Jun 29 07:42:46 PM PDT 24 |
Jun 29 07:47:06 PM PDT 24 |
2552005626 ps |
| T1208 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.2962055330 |
|
|
Jun 29 08:11:28 PM PDT 24 |
Jun 29 09:05:25 PM PDT 24 |
15680727392 ps |
| T1209 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.3397619346 |
|
|
Jun 29 08:00:50 PM PDT 24 |
Jun 29 08:09:11 PM PDT 24 |
3796271800 ps |
| T127 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3703906782 |
|
|
Jun 29 07:38:22 PM PDT 24 |
Jun 29 07:44:29 PM PDT 24 |
4580452924 ps |
| T1210 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.1254311397 |
|
|
Jun 29 08:15:21 PM PDT 24 |
Jun 29 08:21:35 PM PDT 24 |
4281209862 ps |
| T1211 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.4194824106 |
|
|
Jun 29 07:38:23 PM PDT 24 |
Jun 29 07:45:23 PM PDT 24 |
3467494720 ps |
| T1212 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.2223347709 |
|
|
Jun 29 08:05:41 PM PDT 24 |
Jun 29 08:13:54 PM PDT 24 |
4111504112 ps |
| T1213 |
/workspace/coverage/default/3.chip_tap_straps_prod.670714038 |
|
|
Jun 29 08:03:16 PM PDT 24 |
Jun 29 08:06:09 PM PDT 24 |
2656391573 ps |
| T411 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2075138467 |
|
|
Jun 29 07:39:45 PM PDT 24 |
Jun 29 07:46:13 PM PDT 24 |
6720760380 ps |
| T1214 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1210559236 |
|
|
Jun 29 08:00:27 PM PDT 24 |
Jun 29 08:05:44 PM PDT 24 |
3739966663 ps |
| T1215 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2795547120 |
|
|
Jun 29 07:43:24 PM PDT 24 |
Jun 29 07:58:35 PM PDT 24 |
6099828860 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.1984229524 |
|
|
Jun 29 07:42:49 PM PDT 24 |
Jun 29 07:47:50 PM PDT 24 |
3059987440 ps |
| T1217 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.1591214181 |
|
|
Jun 29 07:56:14 PM PDT 24 |
Jun 29 09:23:03 PM PDT 24 |
45178325596 ps |
| T1218 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.75621288 |
|
|
Jun 29 07:41:25 PM PDT 24 |
Jun 29 07:45:24 PM PDT 24 |
2559024920 ps |
| T1219 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.3721945651 |
|
|
Jun 29 07:39:28 PM PDT 24 |
Jun 29 07:42:02 PM PDT 24 |
2481486638 ps |
| T451 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1408454291 |
|
|
Jun 29 07:37:46 PM PDT 24 |
Jun 29 07:49:15 PM PDT 24 |
3314391700 ps |
| T682 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.2962262756 |
|
|
Jun 29 08:06:57 PM PDT 24 |
Jun 29 08:17:41 PM PDT 24 |
6050407850 ps |
| T1220 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.1958881958 |
|
|
Jun 29 07:40:00 PM PDT 24 |
Jun 29 07:49:31 PM PDT 24 |
7302814733 ps |
| T297 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1244676883 |
|
|
Jun 29 08:00:29 PM PDT 24 |
Jun 29 08:12:13 PM PDT 24 |
4941984484 ps |
| T750 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.4068172409 |
|
|
Jun 29 08:12:33 PM PDT 24 |
Jun 29 08:19:58 PM PDT 24 |
4037658472 ps |
| T1221 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.724313640 |
|
|
Jun 29 07:46:57 PM PDT 24 |
Jun 29 07:52:34 PM PDT 24 |
2790289650 ps |
| T1222 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.2733299070 |
|
|
Jun 29 07:42:21 PM PDT 24 |
Jun 29 07:47:40 PM PDT 24 |
3541310048 ps |
| T1223 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.2258171157 |
|
|
Jun 29 07:51:56 PM PDT 24 |
Jun 29 07:57:42 PM PDT 24 |
3148537160 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1945104967 |
|
|
Jun 29 07:49:54 PM PDT 24 |
Jun 29 08:27:59 PM PDT 24 |
26789789179 ps |
| T1225 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.2394595069 |
|
|
Jun 29 08:02:48 PM PDT 24 |
Jun 29 08:06:21 PM PDT 24 |
3097354750 ps |
| T1226 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.2812891024 |
|
|
Jun 29 07:49:19 PM PDT 24 |
Jun 29 09:03:04 PM PDT 24 |
15063091260 ps |
| T241 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.254768906 |
|
|
Jun 29 08:08:40 PM PDT 24 |
Jun 29 08:22:02 PM PDT 24 |
5157174344 ps |
| T729 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2405986416 |
|
|
Jun 29 08:13:56 PM PDT 24 |
Jun 29 08:26:24 PM PDT 24 |
5866492360 ps |
| T1227 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.4107748357 |
|
|
Jun 29 07:39:40 PM PDT 24 |
Jun 29 07:47:42 PM PDT 24 |
7088587256 ps |
| T1228 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.758050859 |
|
|
Jun 29 07:38:28 PM PDT 24 |
Jun 29 08:16:37 PM PDT 24 |
10901144176 ps |
| T765 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.2240826439 |
|
|
Jun 29 08:11:59 PM PDT 24 |
Jun 29 08:24:40 PM PDT 24 |
5027432152 ps |
| T1229 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.599843208 |
|
|
Jun 29 07:44:04 PM PDT 24 |
Jun 29 07:49:52 PM PDT 24 |
3132097111 ps |
| T1230 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.243203174 |
|
|
Jun 29 07:40:23 PM PDT 24 |
Jun 29 08:52:18 PM PDT 24 |
25233711732 ps |
| T1231 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.4164202525 |
|
|
Jun 29 07:48:04 PM PDT 24 |
Jun 29 07:57:27 PM PDT 24 |
4784301048 ps |
| T1232 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.196786033 |
|
|
Jun 29 07:48:31 PM PDT 24 |
Jun 29 08:00:15 PM PDT 24 |
4313342290 ps |
| T707 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3011944364 |
|
|
Jun 29 08:10:12 PM PDT 24 |
Jun 29 08:18:58 PM PDT 24 |
4247207864 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.780032114 |
|
|
Jun 29 07:41:50 PM PDT 24 |
Jun 29 07:47:54 PM PDT 24 |
3124748540 ps |
| T1234 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2469559992 |
|
|
Jun 29 07:43:59 PM PDT 24 |
Jun 29 07:47:57 PM PDT 24 |
2509903560 ps |
| T1235 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.2682650784 |
|
|
Jun 29 07:38:49 PM PDT 24 |
Jun 29 07:50:24 PM PDT 24 |
4348583680 ps |
| T1236 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.2382233779 |
|
|
Jun 29 07:46:35 PM PDT 24 |
Jun 29 07:50:51 PM PDT 24 |
3053192116 ps |
| T1237 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.1916890879 |
|
|
Jun 29 08:06:21 PM PDT 24 |
Jun 29 08:30:15 PM PDT 24 |
7581137202 ps |
| T1238 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.997430648 |
|
|
Jun 29 07:47:32 PM PDT 24 |
Jun 29 07:59:49 PM PDT 24 |
9252211248 ps |
| T1239 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.3397516780 |
|
|
Jun 29 07:57:56 PM PDT 24 |
Jun 29 08:09:03 PM PDT 24 |
5848310000 ps |
| T1240 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.425427689 |
|
|
Jun 29 07:49:38 PM PDT 24 |
Jun 29 08:15:47 PM PDT 24 |
8131217182 ps |
| T283 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.3489676181 |
|
|
Jun 29 08:07:09 PM PDT 24 |
Jun 29 08:16:23 PM PDT 24 |
3724487800 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2959599193 |
|
|
Jun 29 07:44:02 PM PDT 24 |
Jun 29 07:56:08 PM PDT 24 |
4116273000 ps |
| T8 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1694826360 |
|
|
Jun 29 07:42:41 PM PDT 24 |
Jun 29 07:46:53 PM PDT 24 |
3643612276 ps |
| T421 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1233283698 |
|
|
Jun 29 07:46:38 PM PDT 24 |
Jun 29 08:42:06 PM PDT 24 |
40776822335 ps |
| T422 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.406146708 |
|
|
Jun 29 07:42:14 PM PDT 24 |
Jun 29 07:47:40 PM PDT 24 |
2913006904 ps |
| T423 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.2241956121 |
|
|
Jun 29 08:09:17 PM PDT 24 |
Jun 29 08:15:39 PM PDT 24 |
3837373998 ps |
| T424 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.169105054 |
|
|
Jun 29 07:50:59 PM PDT 24 |
Jun 29 08:03:24 PM PDT 24 |
4912271791 ps |
| T425 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.4080467629 |
|
|
Jun 29 08:13:58 PM PDT 24 |
Jun 29 08:26:44 PM PDT 24 |
4943445396 ps |
| T426 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.1773125666 |
|
|
Jun 29 07:55:16 PM PDT 24 |
Jun 29 08:02:57 PM PDT 24 |
3932339356 ps |
| T242 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.1986218910 |
|
|
Jun 29 07:56:36 PM PDT 24 |
Jun 29 08:05:16 PM PDT 24 |
5453515910 ps |
| T427 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.3813386314 |
|
|
Jun 29 08:04:19 PM PDT 24 |
Jun 29 09:37:53 PM PDT 24 |
22258498532 ps |
| T428 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.375909665 |
|
|
Jun 29 07:56:00 PM PDT 24 |
Jun 29 08:03:30 PM PDT 24 |
6541951326 ps |
| T748 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.3156921846 |
|
|
Jun 29 08:06:25 PM PDT 24 |
Jun 29 08:14:13 PM PDT 24 |
3723375042 ps |
| T1242 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.895600004 |
|
|
Jun 29 08:13:59 PM PDT 24 |
Jun 29 08:20:44 PM PDT 24 |
4109858668 ps |
| T1243 |
/workspace/coverage/default/4.chip_tap_straps_dev.3879062726 |
|
|
Jun 29 08:04:36 PM PDT 24 |
Jun 29 08:36:57 PM PDT 24 |
17119317130 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.468663098 |
|
|
Jun 29 08:00:14 PM PDT 24 |
Jun 29 08:09:01 PM PDT 24 |
3645481448 ps |
| T1245 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.3865404245 |
|
|
Jun 29 08:03:39 PM PDT 24 |
Jun 29 08:10:15 PM PDT 24 |
6323144984 ps |
| T1246 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.2292446787 |
|
|
Jun 29 07:48:25 PM PDT 24 |
Jun 29 09:05:25 PM PDT 24 |
15141630740 ps |
| T1247 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.3348455190 |
|
|
Jun 29 08:07:54 PM PDT 24 |
Jun 29 09:09:47 PM PDT 24 |
14313330520 ps |
| T1248 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.1436842668 |
|
|
Jun 29 08:09:32 PM PDT 24 |
Jun 29 08:23:02 PM PDT 24 |
5797070232 ps |
| T1249 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.192208770 |
|
|
Jun 29 07:59:53 PM PDT 24 |
Jun 29 08:11:21 PM PDT 24 |
5075645140 ps |
| T1250 |
/workspace/coverage/default/2.chip_sw_example_flash.829049541 |
|
|
Jun 29 07:56:56 PM PDT 24 |
Jun 29 08:01:48 PM PDT 24 |
2822321624 ps |
| T1251 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.825633191 |
|
|
Jun 29 08:05:47 PM PDT 24 |
Jun 29 08:26:24 PM PDT 24 |
11167947894 ps |
| T1252 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.279999983 |
|
|
Jun 29 07:58:55 PM PDT 24 |
Jun 29 08:05:56 PM PDT 24 |
3784489000 ps |
| T1253 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.3529486741 |
|
|
Jun 29 07:47:42 PM PDT 24 |
Jun 29 07:59:19 PM PDT 24 |
8577221376 ps |
| T1254 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.2792991864 |
|
|
Jun 29 07:46:50 PM PDT 24 |
Jun 29 09:17:02 PM PDT 24 |
27931365864 ps |
| T1255 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.1039602624 |
|
|
Jun 29 07:44:20 PM PDT 24 |
Jun 29 07:48:47 PM PDT 24 |
3285403703 ps |
| T1256 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.1466542835 |
|
|
Jun 29 07:38:02 PM PDT 24 |
Jun 29 07:43:14 PM PDT 24 |
2519610488 ps |
| T1257 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.1641468522 |
|
|
Jun 29 07:40:32 PM PDT 24 |
Jun 29 07:43:59 PM PDT 24 |
2146852746 ps |
| T1258 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.2371459511 |
|
|
Jun 29 07:43:56 PM PDT 24 |
Jun 29 07:50:08 PM PDT 24 |
3408513942 ps |
| T1259 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.3467736692 |
|
|
Jun 29 08:06:10 PM PDT 24 |
Jun 29 08:27:34 PM PDT 24 |
13477529552 ps |
| T1260 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.552144334 |
|
|
Jun 29 07:39:56 PM PDT 24 |
Jun 29 07:56:03 PM PDT 24 |
4360938940 ps |
| T1261 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.1761663795 |
|
|
Jun 29 07:40:16 PM PDT 24 |
Jun 29 07:52:02 PM PDT 24 |
4795151664 ps |
| T1262 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2558576230 |
|
|
Jun 29 07:43:34 PM PDT 24 |
Jun 29 08:13:51 PM PDT 24 |
13367195871 ps |
| T1263 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3559852836 |
|
|
Jun 29 07:55:50 PM PDT 24 |
Jun 29 07:57:29 PM PDT 24 |
1868693620 ps |
| T1264 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.254152403 |
|
|
Jun 29 07:39:33 PM PDT 24 |
Jun 29 08:47:18 PM PDT 24 |
20436602206 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.1877479529 |
|
|
Jun 29 07:48:39 PM PDT 24 |
Jun 29 08:06:35 PM PDT 24 |
5735068400 ps |
| T1266 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.3002438006 |
|
|
Jun 29 07:37:52 PM PDT 24 |
Jun 29 07:42:21 PM PDT 24 |
2431398098 ps |
| T1267 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.3125815439 |
|
|
Jun 29 07:58:28 PM PDT 24 |
Jun 29 08:27:26 PM PDT 24 |
9766240332 ps |
| T388 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1209806240 |
|
|
Jun 29 07:50:36 PM PDT 24 |
Jun 29 07:58:54 PM PDT 24 |
3797326236 ps |
| T1268 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.379825390 |
|
|
Jun 29 07:38:56 PM PDT 24 |
Jun 29 07:56:17 PM PDT 24 |
5908082911 ps |
| T1269 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1746525366 |
|
|
Jun 29 07:42:24 PM PDT 24 |
Jun 29 07:54:40 PM PDT 24 |
5627216173 ps |
| T724 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.3861187716 |
|
|
Jun 29 08:10:26 PM PDT 24 |
Jun 29 08:24:34 PM PDT 24 |
4952441710 ps |
| T172 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.95311963 |
|
|
Jun 29 07:41:44 PM PDT 24 |
Jun 29 07:43:42 PM PDT 24 |
2464878219 ps |
| T1270 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.854689043 |
|
|
Jun 29 07:47:10 PM PDT 24 |
Jun 29 07:58:04 PM PDT 24 |
8240589582 ps |
| T1271 |
/workspace/coverage/default/2.chip_sw_aes_entropy.3190252507 |
|
|
Jun 29 07:56:57 PM PDT 24 |
Jun 29 08:02:02 PM PDT 24 |
2917879050 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1163614027 |
|
|
Jun 29 07:42:57 PM PDT 24 |
Jun 29 07:46:30 PM PDT 24 |
2808985984 ps |
| T284 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.592305825 |
|
|
Jun 29 08:11:16 PM PDT 24 |
Jun 29 08:18:50 PM PDT 24 |
3501475772 ps |
| T1273 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.1466880381 |
|
|
Jun 29 07:39:30 PM PDT 24 |
Jun 29 07:43:48 PM PDT 24 |
2674970460 ps |
| T1274 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1640073339 |
|
|
Jun 29 07:40:05 PM PDT 24 |
Jun 29 07:44:54 PM PDT 24 |
2596585384 ps |
| T1275 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.2572729323 |
|
|
Jun 29 07:56:49 PM PDT 24 |
Jun 29 08:06:09 PM PDT 24 |
6011834222 ps |
| T1276 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.333924427 |
|
|
Jun 29 07:59:15 PM PDT 24 |
Jun 29 08:03:41 PM PDT 24 |
3518271212 ps |
| T1277 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.1923092511 |
|
|
Jun 29 08:02:11 PM PDT 24 |
Jun 29 08:06:28 PM PDT 24 |
3405496602 ps |
| T1278 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.1842280104 |
|
|
Jun 29 07:45:22 PM PDT 24 |
Jun 29 07:59:15 PM PDT 24 |
8639679962 ps |
| T1279 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.693017302 |
|
|
Jun 29 07:44:41 PM PDT 24 |
Jun 29 07:49:21 PM PDT 24 |
2965579481 ps |
| T1280 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.1700570438 |
|
|
Jun 29 07:44:29 PM PDT 24 |
Jun 29 08:51:45 PM PDT 24 |
15008519660 ps |
| T224 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.702091528 |
|
|
Jun 29 08:09:22 PM PDT 24 |
Jun 29 08:22:14 PM PDT 24 |
5131407680 ps |
| T1281 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.1859879539 |
|
|
Jun 29 07:48:31 PM PDT 24 |
Jun 29 09:20:17 PM PDT 24 |
22270920588 ps |
| T1282 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.2814335650 |
|
|
Jun 29 08:00:52 PM PDT 24 |
Jun 29 08:24:08 PM PDT 24 |
8778359264 ps |
| T1283 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.2899735715 |
|
|
Jun 29 07:54:31 PM PDT 24 |
Jun 29 08:03:17 PM PDT 24 |
4059513060 ps |
| T1284 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.3222937883 |
|
|
Jun 29 07:48:12 PM PDT 24 |
Jun 29 09:09:37 PM PDT 24 |
15639789340 ps |
| T1285 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.3680795433 |
|
|
Jun 29 07:56:19 PM PDT 24 |
Jun 29 08:57:41 PM PDT 24 |
14732911654 ps |
| T73 |
/workspace/coverage/cover_reg_top/47.xbar_same_source.1072863604 |
|
|
Jun 29 08:22:57 PM PDT 24 |
Jun 29 08:24:21 PM PDT 24 |
2559797300 ps |
| T74 |
/workspace/coverage/cover_reg_top/69.xbar_smoke_slow_rsp.2802026951 |
|
|
Jun 29 08:26:25 PM PDT 24 |
Jun 29 08:27:51 PM PDT 24 |
5082561493 ps |
| T75 |
/workspace/coverage/cover_reg_top/17.xbar_smoke_slow_rsp.1634871140 |
|
|
Jun 29 08:16:42 PM PDT 24 |
Jun 29 08:17:59 PM PDT 24 |
4600597047 ps |
| T117 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_rand_reset.2069220409 |
|
|
Jun 29 08:18:44 PM PDT 24 |
Jun 29 08:23:26 PM PDT 24 |
2640045790 ps |
| T368 |
/workspace/coverage/cover_reg_top/89.xbar_random.2817103595 |
|
|
Jun 29 08:29:40 PM PDT 24 |
Jun 29 08:30:30 PM PDT 24 |
551769723 ps |
| T530 |
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.3987160905 |
|
|
Jun 29 08:30:29 PM PDT 24 |
Jun 29 08:30:36 PM PDT 24 |
41772370 ps |
| T225 |
/workspace/coverage/cover_reg_top/52.xbar_error_random.543561720 |
|
|
Jun 29 08:23:51 PM PDT 24 |
Jun 29 08:24:44 PM PDT 24 |
578041370 ps |
| T490 |
/workspace/coverage/cover_reg_top/57.xbar_random_zero_delays.3902173700 |
|
|
Jun 29 08:24:30 PM PDT 24 |
Jun 29 08:25:01 PM PDT 24 |
274268386 ps |
| T226 |
/workspace/coverage/cover_reg_top/43.xbar_random_slow_rsp.1000823418 |
|
|
Jun 29 08:22:22 PM PDT 24 |
Jun 29 08:39:33 PM PDT 24 |
59187811009 ps |
| T227 |
/workspace/coverage/cover_reg_top/60.xbar_error_and_unmapped_addr.1274955100 |
|
|
Jun 29 08:25:02 PM PDT 24 |
Jun 29 08:25:18 PM PDT 24 |
139677911 ps |
| T531 |
/workspace/coverage/cover_reg_top/15.xbar_smoke.993583691 |
|
|
Jun 29 08:15:56 PM PDT 24 |
Jun 29 08:16:04 PM PDT 24 |
49108675 ps |
| T430 |
/workspace/coverage/cover_reg_top/13.xbar_unmapped_addr.109946430 |
|
|
Jun 29 08:15:29 PM PDT 24 |
Jun 29 08:16:01 PM PDT 24 |
236683005 ps |
| T420 |
/workspace/coverage/cover_reg_top/86.xbar_stress_all_with_rand_reset.4037549441 |
|
|
Jun 29 08:29:17 PM PDT 24 |
Jun 29 08:40:22 PM PDT 24 |
9555296368 ps |
| T533 |
/workspace/coverage/cover_reg_top/80.xbar_smoke_large_delays.3250090864 |
|
|
Jun 29 08:28:10 PM PDT 24 |
Jun 29 08:29:45 PM PDT 24 |
9114986933 ps |
| T522 |
/workspace/coverage/cover_reg_top/85.xbar_unmapped_addr.1214252334 |
|
|
Jun 29 08:29:13 PM PDT 24 |
Jun 29 08:29:43 PM PDT 24 |
230329779 ps |
| T532 |
/workspace/coverage/cover_reg_top/19.xbar_smoke_slow_rsp.2627291114 |
|
|
Jun 29 08:17:09 PM PDT 24 |
Jun 29 08:17:54 PM PDT 24 |
2660674909 ps |
| T488 |
/workspace/coverage/cover_reg_top/94.xbar_random_large_delays.3531622157 |
|
|
Jun 29 08:30:30 PM PDT 24 |
Jun 29 08:40:11 PM PDT 24 |
57258055799 ps |