| T1043 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.2860150753 |
|
|
Jun 30 07:32:26 PM PDT 24 |
Jun 30 07:42:51 PM PDT 24 |
5205730414 ps |
| T1044 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.4029155943 |
|
|
Jun 30 08:01:09 PM PDT 24 |
Jun 30 08:25:37 PM PDT 24 |
8241718512 ps |
| T1045 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.401628262 |
|
|
Jun 30 07:40:09 PM PDT 24 |
Jun 30 07:48:29 PM PDT 24 |
6458313530 ps |
| T1046 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1709551933 |
|
|
Jun 30 08:08:21 PM PDT 24 |
Jun 30 08:18:25 PM PDT 24 |
4796643046 ps |
| T188 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.2563213397 |
|
|
Jun 30 07:28:02 PM PDT 24 |
Jun 30 07:35:29 PM PDT 24 |
4783963058 ps |
| T720 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2848302408 |
|
|
Jun 30 08:03:16 PM PDT 24 |
Jun 30 08:10:15 PM PDT 24 |
3987234168 ps |
| T140 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.2497505176 |
|
|
Jun 30 07:56:48 PM PDT 24 |
Jun 30 08:00:53 PM PDT 24 |
2858550551 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.21011053 |
|
|
Jun 30 07:40:46 PM PDT 24 |
Jun 30 07:45:34 PM PDT 24 |
2867760208 ps |
| T1048 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1313656356 |
|
|
Jun 30 07:47:03 PM PDT 24 |
Jun 30 07:56:26 PM PDT 24 |
7503963701 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.1493388582 |
|
|
Jun 30 07:40:39 PM PDT 24 |
Jun 30 07:50:00 PM PDT 24 |
3907401480 ps |
| T359 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.2488789009 |
|
|
Jun 30 07:45:08 PM PDT 24 |
Jun 30 07:55:00 PM PDT 24 |
3504980880 ps |
| T90 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.2443314298 |
|
|
Jun 30 08:11:38 PM PDT 24 |
Jun 30 08:21:31 PM PDT 24 |
5981696744 ps |
| T93 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.2303373049 |
|
|
Jun 30 07:52:54 PM PDT 24 |
Jun 30 08:02:50 PM PDT 24 |
5127622742 ps |
| T94 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.275727725 |
|
|
Jun 30 07:48:14 PM PDT 24 |
Jun 30 07:56:25 PM PDT 24 |
3522432900 ps |
| T95 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.2762827974 |
|
|
Jun 30 07:29:59 PM PDT 24 |
Jun 30 07:37:54 PM PDT 24 |
3895870324 ps |
| T8 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.318619379 |
|
|
Jun 30 07:48:28 PM PDT 24 |
Jun 30 07:55:19 PM PDT 24 |
5046621300 ps |
| T96 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.2846050673 |
|
|
Jun 30 07:39:55 PM PDT 24 |
Jun 30 07:45:08 PM PDT 24 |
3496177016 ps |
| T97 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3344988118 |
|
|
Jun 30 08:00:42 PM PDT 24 |
Jun 30 08:08:39 PM PDT 24 |
4484298950 ps |
| T98 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.1310247059 |
|
|
Jun 30 08:05:47 PM PDT 24 |
Jun 30 08:12:36 PM PDT 24 |
3570501296 ps |
| T99 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2101967343 |
|
|
Jun 30 07:32:58 PM PDT 24 |
Jun 30 07:43:36 PM PDT 24 |
4086491672 ps |
| T100 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3302998725 |
|
|
Jun 30 07:28:02 PM PDT 24 |
Jun 30 07:32:52 PM PDT 24 |
2336186178 ps |
| T174 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.960550750 |
|
|
Jun 30 07:46:57 PM PDT 24 |
Jun 30 07:50:10 PM PDT 24 |
2033716915 ps |
| T750 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.4025962906 |
|
|
Jun 30 08:07:39 PM PDT 24 |
Jun 30 08:14:31 PM PDT 24 |
3274393140 ps |
| T1049 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1927607299 |
|
|
Jun 30 07:42:40 PM PDT 24 |
Jun 30 08:50:17 PM PDT 24 |
15448119952 ps |
| T759 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.2752692775 |
|
|
Jun 30 08:09:08 PM PDT 24 |
Jun 30 08:15:59 PM PDT 24 |
3656028424 ps |
| T790 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.40042039 |
|
|
Jun 30 08:08:26 PM PDT 24 |
Jun 30 08:16:06 PM PDT 24 |
3661175772 ps |
| T1050 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.1760266799 |
|
|
Jun 30 08:03:52 PM PDT 24 |
Jun 30 08:12:59 PM PDT 24 |
3568449568 ps |
| T1051 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.249500151 |
|
|
Jun 30 07:28:35 PM PDT 24 |
Jun 30 07:32:38 PM PDT 24 |
3205489022 ps |
| T1052 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2491006987 |
|
|
Jun 30 07:47:41 PM PDT 24 |
Jun 30 09:13:35 PM PDT 24 |
24061516703 ps |
| T367 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3311745317 |
|
|
Jun 30 07:36:33 PM PDT 24 |
Jun 30 07:43:22 PM PDT 24 |
2948746432 ps |
| T16 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1807046216 |
|
|
Jun 30 07:51:26 PM PDT 24 |
Jun 30 07:57:57 PM PDT 24 |
6112850736 ps |
| T1053 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.1267409070 |
|
|
Jun 30 07:43:45 PM PDT 24 |
Jun 30 07:45:45 PM PDT 24 |
2380260309 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.1462304113 |
|
|
Jun 30 07:45:35 PM PDT 24 |
Jun 30 09:28:37 PM PDT 24 |
26663678536 ps |
| T1055 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.3878154480 |
|
|
Jun 30 07:28:15 PM PDT 24 |
Jun 30 07:47:02 PM PDT 24 |
5566170775 ps |
| T24 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.3846515489 |
|
|
Jun 30 07:49:50 PM PDT 24 |
Jun 30 07:55:56 PM PDT 24 |
3458514081 ps |
| T1056 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.1045417683 |
|
|
Jun 30 07:30:20 PM PDT 24 |
Jun 30 07:33:55 PM PDT 24 |
3355964988 ps |
| T771 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3105135463 |
|
|
Jun 30 08:09:02 PM PDT 24 |
Jun 30 08:14:28 PM PDT 24 |
3693401366 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.2201787937 |
|
|
Jun 30 07:53:27 PM PDT 24 |
Jun 30 07:59:51 PM PDT 24 |
3783741429 ps |
| T1058 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.3463227984 |
|
|
Jun 30 08:05:53 PM PDT 24 |
Jun 30 09:19:20 PM PDT 24 |
15286912008 ps |
| T1059 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.3123426046 |
|
|
Jun 30 08:05:14 PM PDT 24 |
Jun 30 08:14:00 PM PDT 24 |
4738610890 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.713570073 |
|
|
Jun 30 07:49:23 PM PDT 24 |
Jun 30 07:53:46 PM PDT 24 |
3282124094 ps |
| T1061 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.3589951664 |
|
|
Jun 30 07:55:02 PM PDT 24 |
Jun 30 08:03:58 PM PDT 24 |
4073532630 ps |
| T243 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.3759950284 |
|
|
Jun 30 07:47:00 PM PDT 24 |
Jun 30 07:51:00 PM PDT 24 |
3025567418 ps |
| T431 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.812362791 |
|
|
Jun 30 07:27:29 PM PDT 24 |
Jun 30 07:31:51 PM PDT 24 |
2871932630 ps |
| T1062 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2336542713 |
|
|
Jun 30 07:35:12 PM PDT 24 |
Jun 30 07:46:33 PM PDT 24 |
5059895964 ps |
| T1063 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.3970688943 |
|
|
Jun 30 08:01:52 PM PDT 24 |
Jun 30 08:13:57 PM PDT 24 |
5763696113 ps |
| T64 |
/workspace/coverage/default/0.chip_sw_alert_test.3476708315 |
|
|
Jun 30 07:29:55 PM PDT 24 |
Jun 30 07:35:48 PM PDT 24 |
3141214174 ps |
| T722 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.2199582937 |
|
|
Jun 30 08:05:55 PM PDT 24 |
Jun 30 08:11:56 PM PDT 24 |
3468474264 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3605128070 |
|
|
Jun 30 07:51:35 PM PDT 24 |
Jun 30 07:54:33 PM PDT 24 |
2030878064 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.873248822 |
|
|
Jun 30 07:51:06 PM PDT 24 |
Jun 30 07:56:13 PM PDT 24 |
2422129172 ps |
| T671 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.2934840010 |
|
|
Jun 30 07:34:22 PM PDT 24 |
Jun 30 07:44:17 PM PDT 24 |
5507751483 ps |
| T727 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.4214372700 |
|
|
Jun 30 08:07:57 PM PDT 24 |
Jun 30 08:20:42 PM PDT 24 |
5764071520 ps |
| T1065 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.1847139374 |
|
|
Jun 30 08:06:25 PM PDT 24 |
Jun 30 08:19:00 PM PDT 24 |
4789875408 ps |
| T1066 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.1910103762 |
|
|
Jun 30 07:54:48 PM PDT 24 |
Jun 30 07:58:57 PM PDT 24 |
3350256280 ps |
| T1067 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.660309484 |
|
|
Jun 30 07:52:25 PM PDT 24 |
Jun 30 07:57:04 PM PDT 24 |
2200904727 ps |
| T1068 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.726412631 |
|
|
Jun 30 07:28:33 PM PDT 24 |
Jun 30 07:35:16 PM PDT 24 |
3786181102 ps |
| T316 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.3363059991 |
|
|
Jun 30 07:41:29 PM PDT 24 |
Jun 30 07:57:34 PM PDT 24 |
5418460580 ps |
| T657 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1253806959 |
|
|
Jun 30 07:28:28 PM PDT 24 |
Jun 30 07:37:57 PM PDT 24 |
3412830988 ps |
| T1069 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.3556239529 |
|
|
Jun 30 07:43:58 PM PDT 24 |
Jun 30 07:52:20 PM PDT 24 |
3698480788 ps |
| T1070 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2501312928 |
|
|
Jun 30 07:31:40 PM PDT 24 |
Jun 30 07:39:51 PM PDT 24 |
3517784908 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.2198427878 |
|
|
Jun 30 08:00:07 PM PDT 24 |
Jun 30 08:05:01 PM PDT 24 |
3278746300 ps |
| T426 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.4077534312 |
|
|
Jun 30 08:05:57 PM PDT 24 |
Jun 30 08:17:33 PM PDT 24 |
4482317584 ps |
| T700 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.791363276 |
|
|
Jun 30 08:09:18 PM PDT 24 |
Jun 30 08:22:20 PM PDT 24 |
4897146492 ps |
| T199 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.3259485480 |
|
|
Jun 30 07:43:05 PM PDT 24 |
Jun 30 08:15:32 PM PDT 24 |
25010473650 ps |
| T1072 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.2296298102 |
|
|
Jun 30 07:58:21 PM PDT 24 |
Jun 30 08:10:08 PM PDT 24 |
4402009124 ps |
| T1073 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.756906436 |
|
|
Jun 30 07:41:29 PM PDT 24 |
Jun 30 07:50:11 PM PDT 24 |
3942390728 ps |
| T746 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.864591672 |
|
|
Jun 30 08:06:52 PM PDT 24 |
Jun 30 08:18:53 PM PDT 24 |
5986850160 ps |
| T1074 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.174557841 |
|
|
Jun 30 07:28:21 PM PDT 24 |
Jun 30 07:30:40 PM PDT 24 |
2608718186 ps |
| T163 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.2764102972 |
|
|
Jun 30 07:33:13 PM PDT 24 |
Jun 30 07:44:37 PM PDT 24 |
4461118472 ps |
| T1075 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.674848721 |
|
|
Jun 30 07:47:49 PM PDT 24 |
Jun 30 08:03:39 PM PDT 24 |
7077278480 ps |
| T200 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.1464101051 |
|
|
Jun 30 07:54:24 PM PDT 24 |
Jun 30 08:06:28 PM PDT 24 |
5101344296 ps |
| T1076 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.467855154 |
|
|
Jun 30 07:45:09 PM PDT 24 |
Jun 30 07:55:32 PM PDT 24 |
4689374744 ps |
| T762 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.1871410141 |
|
|
Jun 30 08:07:16 PM PDT 24 |
Jun 30 08:13:48 PM PDT 24 |
3384240056 ps |
| T1077 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2013167237 |
|
|
Jun 30 07:42:29 PM PDT 24 |
Jun 30 07:52:34 PM PDT 24 |
3556286524 ps |
| T1078 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.2917758509 |
|
|
Jun 30 07:53:11 PM PDT 24 |
Jun 30 07:58:40 PM PDT 24 |
3337528090 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.1880671695 |
|
|
Jun 30 07:35:25 PM PDT 24 |
Jun 30 07:43:29 PM PDT 24 |
4685298864 ps |
| T1080 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.2734859810 |
|
|
Jun 30 07:44:39 PM PDT 24 |
Jun 30 08:02:36 PM PDT 24 |
5799600542 ps |
| T1081 |
/workspace/coverage/default/2.rom_keymgr_functest.2306891566 |
|
|
Jun 30 07:58:27 PM PDT 24 |
Jun 30 08:08:01 PM PDT 24 |
4038015960 ps |
| T1082 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2339164126 |
|
|
Jun 30 07:33:09 PM PDT 24 |
Jun 30 07:42:35 PM PDT 24 |
3609106970 ps |
| T1083 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.353731647 |
|
|
Jun 30 08:04:14 PM PDT 24 |
Jun 30 09:19:16 PM PDT 24 |
15096030986 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.4034831510 |
|
|
Jun 30 07:39:11 PM PDT 24 |
Jun 30 07:42:30 PM PDT 24 |
2194542632 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2500884274 |
|
|
Jun 30 07:28:50 PM PDT 24 |
Jun 30 08:58:39 PM PDT 24 |
20622423998 ps |
| T363 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.906148816 |
|
|
Jun 30 07:58:31 PM PDT 24 |
Jun 30 08:01:33 PM PDT 24 |
2412248278 ps |
| T36 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3003293382 |
|
|
Jun 30 07:27:56 PM PDT 24 |
Jun 30 08:06:58 PM PDT 24 |
8535003400 ps |
| T311 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3109667662 |
|
|
Jun 30 07:50:14 PM PDT 24 |
Jun 30 08:01:12 PM PDT 24 |
4399833970 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3129677663 |
|
|
Jun 30 07:31:30 PM PDT 24 |
Jun 30 07:55:24 PM PDT 24 |
11072697340 ps |
| T792 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.851098613 |
|
|
Jun 30 08:04:15 PM PDT 24 |
Jun 30 08:18:49 PM PDT 24 |
5555841112 ps |
| T796 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.629089759 |
|
|
Jun 30 08:10:38 PM PDT 24 |
Jun 30 08:19:24 PM PDT 24 |
5186739042 ps |
| T1087 |
/workspace/coverage/default/1.rom_e2e_smoke.3484385887 |
|
|
Jun 30 07:52:05 PM PDT 24 |
Jun 30 09:04:15 PM PDT 24 |
15664814668 ps |
| T1088 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2852320384 |
|
|
Jun 30 07:32:21 PM PDT 24 |
Jun 30 07:42:21 PM PDT 24 |
3957686680 ps |
| T248 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.1915262325 |
|
|
Jun 30 07:40:00 PM PDT 24 |
Jun 30 08:33:35 PM PDT 24 |
34160056850 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.2403543712 |
|
|
Jun 30 08:00:29 PM PDT 24 |
Jun 30 08:05:22 PM PDT 24 |
3194197328 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3302374806 |
|
|
Jun 30 07:59:37 PM PDT 24 |
Jun 30 08:34:06 PM PDT 24 |
11687448929 ps |
| T432 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.1781231503 |
|
|
Jun 30 07:32:06 PM PDT 24 |
Jun 30 07:55:30 PM PDT 24 |
7195549133 ps |
| T1091 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.2153207982 |
|
|
Jun 30 07:39:36 PM PDT 24 |
Jun 30 07:44:05 PM PDT 24 |
3055123680 ps |
| T1092 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1027959185 |
|
|
Jun 30 07:28:03 PM PDT 24 |
Jun 30 07:48:46 PM PDT 24 |
6122142088 ps |
| T1093 |
/workspace/coverage/default/2.rom_e2e_static_critical.3364957121 |
|
|
Jun 30 08:05:17 PM PDT 24 |
Jun 30 09:17:26 PM PDT 24 |
17018658800 ps |
| T354 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.571685186 |
|
|
Jun 30 08:06:34 PM PDT 24 |
Jun 30 08:15:03 PM PDT 24 |
4332526920 ps |
| T308 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3947384065 |
|
|
Jun 30 07:30:40 PM PDT 24 |
Jun 30 07:48:46 PM PDT 24 |
6099609688 ps |
| T1094 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.2266881755 |
|
|
Jun 30 07:29:59 PM PDT 24 |
Jun 30 07:52:02 PM PDT 24 |
4805332570 ps |
| T1095 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.1143690871 |
|
|
Jun 30 07:53:31 PM PDT 24 |
Jun 30 07:58:34 PM PDT 24 |
2670729161 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.1739345348 |
|
|
Jun 30 07:47:15 PM PDT 24 |
Jun 30 07:54:44 PM PDT 24 |
6960373312 ps |
| T288 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.2112754308 |
|
|
Jun 30 07:58:18 PM PDT 24 |
Jun 30 08:02:35 PM PDT 24 |
3084547400 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2964424225 |
|
|
Jun 30 07:29:50 PM PDT 24 |
Jun 30 07:40:19 PM PDT 24 |
5021569460 ps |
| T1098 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.3532982524 |
|
|
Jun 30 07:56:51 PM PDT 24 |
Jun 30 08:13:16 PM PDT 24 |
5562350670 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3664974619 |
|
|
Jun 30 07:32:31 PM PDT 24 |
Jun 30 07:42:59 PM PDT 24 |
3603988080 ps |
| T794 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.3326715491 |
|
|
Jun 30 08:03:38 PM PDT 24 |
Jun 30 08:09:57 PM PDT 24 |
3243292392 ps |
| T723 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.3600644706 |
|
|
Jun 30 08:08:28 PM PDT 24 |
Jun 30 08:14:26 PM PDT 24 |
3618085252 ps |
| T1100 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3349596289 |
|
|
Jun 30 07:47:36 PM PDT 24 |
Jun 30 08:24:08 PM PDT 24 |
10801779616 ps |
| T70 |
/workspace/coverage/default/4.chip_tap_straps_rma.620745348 |
|
|
Jun 30 07:59:41 PM PDT 24 |
Jun 30 08:03:02 PM PDT 24 |
2416991479 ps |
| T193 |
/workspace/coverage/default/1.chip_jtag_csr_rw.223181264 |
|
|
Jun 30 07:39:38 PM PDT 24 |
Jun 30 08:07:27 PM PDT 24 |
12219029780 ps |
| T732 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3695707650 |
|
|
Jun 30 08:02:53 PM PDT 24 |
Jun 30 08:10:18 PM PDT 24 |
4246803468 ps |
| T1101 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.1353653721 |
|
|
Jun 30 07:48:30 PM PDT 24 |
Jun 30 07:52:07 PM PDT 24 |
3355082376 ps |
| T1102 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1661166713 |
|
|
Jun 30 07:34:24 PM PDT 24 |
Jun 30 08:11:00 PM PDT 24 |
9959928423 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3407826939 |
|
|
Jun 30 07:40:43 PM PDT 24 |
Jun 30 07:53:39 PM PDT 24 |
4619455300 ps |
| T1104 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.457292331 |
|
|
Jun 30 07:41:37 PM PDT 24 |
Jun 30 08:56:23 PM PDT 24 |
15059737338 ps |
| T1105 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.257541662 |
|
|
Jun 30 08:01:34 PM PDT 24 |
Jun 30 08:17:34 PM PDT 24 |
12655592520 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_hmac_enc.1213711127 |
|
|
Jun 30 07:46:06 PM PDT 24 |
Jun 30 07:51:37 PM PDT 24 |
2693381044 ps |
| T1107 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.3165873062 |
|
|
Jun 30 07:28:11 PM PDT 24 |
Jun 30 08:34:52 PM PDT 24 |
20771680303 ps |
| T781 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1478432860 |
|
|
Jun 30 08:08:50 PM PDT 24 |
Jun 30 08:14:51 PM PDT 24 |
4023512832 ps |
| T1108 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.246092758 |
|
|
Jun 30 08:06:59 PM PDT 24 |
Jun 30 08:15:36 PM PDT 24 |
4873789650 ps |
| T343 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3929648020 |
|
|
Jun 30 07:58:29 PM PDT 24 |
Jun 30 08:08:26 PM PDT 24 |
5113213276 ps |
| T1109 |
/workspace/coverage/default/1.chip_sw_aes_enc.1589725032 |
|
|
Jun 30 07:44:05 PM PDT 24 |
Jun 30 07:49:10 PM PDT 24 |
3405678868 ps |
| T751 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.477942676 |
|
|
Jun 30 08:05:13 PM PDT 24 |
Jun 30 08:19:14 PM PDT 24 |
5062421950 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.2921270356 |
|
|
Jun 30 07:31:52 PM PDT 24 |
Jun 30 07:44:16 PM PDT 24 |
4479628268 ps |
| T1111 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1025827392 |
|
|
Jun 30 07:51:34 PM PDT 24 |
Jun 30 08:12:15 PM PDT 24 |
10571579433 ps |
| T1112 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.2114042244 |
|
|
Jun 30 07:49:33 PM PDT 24 |
Jun 30 07:53:51 PM PDT 24 |
3388085980 ps |
| T763 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.1227820323 |
|
|
Jun 30 08:09:50 PM PDT 24 |
Jun 30 08:19:29 PM PDT 24 |
5499105784 ps |
| T1113 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2981065096 |
|
|
Jun 30 07:59:27 PM PDT 24 |
Jun 30 08:27:22 PM PDT 24 |
6267994840 ps |
| T1114 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.3766563972 |
|
|
Jun 30 07:49:07 PM PDT 24 |
Jun 30 08:04:23 PM PDT 24 |
6363689340 ps |
| T101 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.1927733377 |
|
|
Jun 30 07:57:36 PM PDT 24 |
Jun 30 08:24:59 PM PDT 24 |
21868410782 ps |
| T1115 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2879640346 |
|
|
Jun 30 07:56:13 PM PDT 24 |
Jun 30 08:03:01 PM PDT 24 |
4529479176 ps |
| T1116 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3201366662 |
|
|
Jun 30 07:54:17 PM PDT 24 |
Jun 30 08:11:29 PM PDT 24 |
9404312276 ps |
| T1117 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1288249386 |
|
|
Jun 30 07:59:25 PM PDT 24 |
Jun 30 08:08:46 PM PDT 24 |
5709922380 ps |
| T320 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.541626454 |
|
|
Jun 30 07:33:50 PM PDT 24 |
Jun 30 07:41:26 PM PDT 24 |
3282799230 ps |
| T228 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.1096410911 |
|
|
Jun 30 07:51:23 PM PDT 24 |
Jun 30 08:01:20 PM PDT 24 |
5752492530 ps |
| T743 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.3772573395 |
|
|
Jun 30 08:02:55 PM PDT 24 |
Jun 30 08:14:11 PM PDT 24 |
5791746064 ps |
| T1118 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.1677978798 |
|
|
Jun 30 07:52:37 PM PDT 24 |
Jun 30 07:59:44 PM PDT 24 |
4725498528 ps |
| T1119 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.993702090 |
|
|
Jun 30 08:07:59 PM PDT 24 |
Jun 30 08:18:08 PM PDT 24 |
4551968600 ps |
| T1120 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.2319107569 |
|
|
Jun 30 07:39:41 PM PDT 24 |
Jun 30 07:44:58 PM PDT 24 |
2653518208 ps |
| T1121 |
/workspace/coverage/default/1.chip_sw_edn_kat.1872843055 |
|
|
Jun 30 07:45:41 PM PDT 24 |
Jun 30 07:59:11 PM PDT 24 |
3214016286 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1721475041 |
|
|
Jun 30 07:52:56 PM PDT 24 |
Jun 30 08:01:11 PM PDT 24 |
5463250052 ps |
| T164 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.3609182613 |
|
|
Jun 30 07:57:47 PM PDT 24 |
Jun 30 08:07:36 PM PDT 24 |
5549918432 ps |
| T1122 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.1001355110 |
|
|
Jun 30 07:28:38 PM PDT 24 |
Jun 30 09:08:27 PM PDT 24 |
50699936236 ps |
| T1123 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.4043588702 |
|
|
Jun 30 07:42:14 PM PDT 24 |
Jun 30 10:53:34 PM PDT 24 |
65306954406 ps |
| T1124 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.1106416166 |
|
|
Jun 30 07:52:10 PM PDT 24 |
Jun 30 08:10:42 PM PDT 24 |
9697454004 ps |
| T764 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.2229967059 |
|
|
Jun 30 08:10:19 PM PDT 24 |
Jun 30 08:22:01 PM PDT 24 |
5117092000 ps |
| T1125 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.3017593870 |
|
|
Jun 30 08:02:44 PM PDT 24 |
Jun 30 08:17:09 PM PDT 24 |
4389702610 ps |
| T1126 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3484649392 |
|
|
Jun 30 07:41:46 PM PDT 24 |
Jun 30 07:50:50 PM PDT 24 |
5637186400 ps |
| T1127 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3213579532 |
|
|
Jun 30 07:57:16 PM PDT 24 |
Jun 30 08:09:26 PM PDT 24 |
5045431650 ps |
| T1128 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.3245815946 |
|
|
Jun 30 07:55:23 PM PDT 24 |
Jun 30 08:01:49 PM PDT 24 |
4594097046 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3266182083 |
|
|
Jun 30 07:35:34 PM PDT 24 |
Jun 30 08:57:19 PM PDT 24 |
25073990887 ps |
| T1130 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3199451850 |
|
|
Jun 30 07:46:32 PM PDT 24 |
Jun 30 07:52:32 PM PDT 24 |
3835140142 ps |
| T229 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.3099298305 |
|
|
Jun 30 07:41:40 PM PDT 24 |
Jun 30 07:48:41 PM PDT 24 |
4375020442 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.2222086888 |
|
|
Jun 30 07:48:29 PM PDT 24 |
Jun 30 07:55:11 PM PDT 24 |
3064921888 ps |
| T91 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1947249769 |
|
|
Jun 30 08:10:30 PM PDT 24 |
Jun 30 08:19:36 PM PDT 24 |
4905051760 ps |
| T1132 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1262509774 |
|
|
Jun 30 08:07:07 PM PDT 24 |
Jun 30 08:15:47 PM PDT 24 |
3489955520 ps |
| T1133 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.627586040 |
|
|
Jun 30 08:01:06 PM PDT 24 |
Jun 30 08:04:38 PM PDT 24 |
2262120299 ps |
| T1134 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.4216767110 |
|
|
Jun 30 07:43:18 PM PDT 24 |
Jun 30 07:47:21 PM PDT 24 |
3031977350 ps |
| T251 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.1297591275 |
|
|
Jun 30 08:05:01 PM PDT 24 |
Jun 30 08:15:02 PM PDT 24 |
5609898430 ps |
| T267 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.658669603 |
|
|
Jun 30 08:02:06 PM PDT 24 |
Jun 30 08:16:45 PM PDT 24 |
4610001374 ps |
| T268 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.3352838041 |
|
|
Jun 30 08:07:54 PM PDT 24 |
Jun 30 08:19:34 PM PDT 24 |
4897421488 ps |
| T269 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.1007910720 |
|
|
Jun 30 08:04:00 PM PDT 24 |
Jun 30 08:18:19 PM PDT 24 |
3807535960 ps |
| T270 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.969142850 |
|
|
Jun 30 07:59:44 PM PDT 24 |
Jun 30 08:27:07 PM PDT 24 |
6683255256 ps |
| T271 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.2956540210 |
|
|
Jun 30 07:53:32 PM PDT 24 |
Jun 30 08:09:35 PM PDT 24 |
5986552562 ps |
| T272 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.2932792669 |
|
|
Jun 30 07:54:08 PM PDT 24 |
Jun 30 08:19:35 PM PDT 24 |
7288367668 ps |
| T273 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.115206963 |
|
|
Jun 30 08:06:01 PM PDT 24 |
Jun 30 08:15:46 PM PDT 24 |
5705463080 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.3323145727 |
|
|
Jun 30 07:44:52 PM PDT 24 |
Jun 30 08:05:02 PM PDT 24 |
7751620138 ps |
| T225 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.449547773 |
|
|
Jun 30 07:27:27 PM PDT 24 |
Jun 30 09:04:29 PM PDT 24 |
49539722508 ps |
| T129 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1743262258 |
|
|
Jun 30 07:33:47 PM PDT 24 |
Jun 30 07:49:04 PM PDT 24 |
8281743546 ps |
| T1135 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.2267447155 |
|
|
Jun 30 07:42:43 PM PDT 24 |
Jun 30 08:57:49 PM PDT 24 |
15478026926 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2686379142 |
|
|
Jun 30 07:28:37 PM PDT 24 |
Jun 30 07:38:46 PM PDT 24 |
18689275088 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.540843126 |
|
|
Jun 30 07:55:28 PM PDT 24 |
Jun 30 07:59:16 PM PDT 24 |
2884795090 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.4191456335 |
|
|
Jun 30 07:33:19 PM PDT 24 |
Jun 30 07:37:11 PM PDT 24 |
2575495810 ps |
| T410 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.1168798238 |
|
|
Jun 30 07:45:28 PM PDT 24 |
Jun 30 07:49:03 PM PDT 24 |
2396620778 ps |
| T411 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3975306192 |
|
|
Jun 30 07:35:19 PM PDT 24 |
Jun 30 07:38:57 PM PDT 24 |
3155248192 ps |
| T61 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2347808915 |
|
|
Jun 30 07:50:06 PM PDT 24 |
Jun 30 08:10:26 PM PDT 24 |
9029973768 ps |
| T289 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.4096197148 |
|
|
Jun 30 07:34:04 PM PDT 24 |
Jun 30 07:39:19 PM PDT 24 |
3185697905 ps |
| T201 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.2715900322 |
|
|
Jun 30 07:44:04 PM PDT 24 |
Jun 30 07:57:08 PM PDT 24 |
5211668357 ps |
| T412 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.964409436 |
|
|
Jun 30 08:04:28 PM PDT 24 |
Jun 30 08:16:58 PM PDT 24 |
5116207480 ps |
| T413 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.1879934870 |
|
|
Jun 30 07:56:14 PM PDT 24 |
Jun 30 08:03:16 PM PDT 24 |
3879838870 ps |
| T130 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.3915970134 |
|
|
Jun 30 07:48:11 PM PDT 24 |
Jun 30 08:03:17 PM PDT 24 |
8835670034 ps |
| T414 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.3216980258 |
|
|
Jun 30 07:30:36 PM PDT 24 |
Jun 30 07:57:42 PM PDT 24 |
8650775820 ps |
| T1137 |
/workspace/coverage/default/0.chip_sw_edn_kat.2647524262 |
|
|
Jun 30 07:29:13 PM PDT 24 |
Jun 30 07:38:44 PM PDT 24 |
3005945990 ps |
| T1138 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.1230790683 |
|
|
Jun 30 07:44:28 PM PDT 24 |
Jun 30 08:50:02 PM PDT 24 |
16818026640 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.297838764 |
|
|
Jun 30 07:52:40 PM PDT 24 |
Jun 30 08:04:22 PM PDT 24 |
3713570640 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.2009779350 |
|
|
Jun 30 07:31:44 PM PDT 24 |
Jun 30 07:34:51 PM PDT 24 |
2777082704 ps |
| T1141 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.2773380045 |
|
|
Jun 30 08:01:29 PM PDT 24 |
Jun 30 08:06:58 PM PDT 24 |
2678619236 ps |
| T1142 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.4174216255 |
|
|
Jun 30 07:59:06 PM PDT 24 |
Jun 30 08:05:49 PM PDT 24 |
3382862890 ps |
| T1143 |
/workspace/coverage/default/0.chip_tap_straps_dev.996220245 |
|
|
Jun 30 07:33:24 PM PDT 24 |
Jun 30 07:38:45 PM PDT 24 |
3997129277 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2275083035 |
|
|
Jun 30 07:29:23 PM PDT 24 |
Jun 30 07:32:03 PM PDT 24 |
3868917321 ps |
| T1145 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.3377563793 |
|
|
Jun 30 07:29:06 PM PDT 24 |
Jun 30 07:51:27 PM PDT 24 |
7745082532 ps |
| T688 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.2255263068 |
|
|
Jun 30 07:39:11 PM PDT 24 |
Jun 30 08:34:49 PM PDT 24 |
21987299679 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1486571195 |
|
|
Jun 30 07:45:07 PM PDT 24 |
Jun 30 07:51:00 PM PDT 24 |
2667437319 ps |
| T1147 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.263479923 |
|
|
Jun 30 07:29:49 PM PDT 24 |
Jun 30 07:38:07 PM PDT 24 |
6895254774 ps |
| T1148 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.1517001892 |
|
|
Jun 30 07:59:13 PM PDT 24 |
Jun 30 08:04:10 PM PDT 24 |
2981318468 ps |
| T725 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.3233792994 |
|
|
Jun 30 07:31:39 PM PDT 24 |
Jun 30 07:44:39 PM PDT 24 |
6474971792 ps |
| T151 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3838776861 |
|
|
Jun 30 07:31:28 PM PDT 24 |
Jun 30 07:40:55 PM PDT 24 |
4326416290 ps |
| T1149 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1184718884 |
|
|
Jun 30 07:52:58 PM PDT 24 |
Jun 30 08:00:04 PM PDT 24 |
3489522486 ps |
| T179 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3381821948 |
|
|
Jun 30 07:50:33 PM PDT 24 |
Jun 30 09:29:54 PM PDT 24 |
42886859078 ps |
| T1150 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.306978100 |
|
|
Jun 30 07:47:11 PM PDT 24 |
Jun 30 08:09:07 PM PDT 24 |
11337646056 ps |
| T1151 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.3465906215 |
|
|
Jun 30 07:59:03 PM PDT 24 |
Jun 30 08:02:26 PM PDT 24 |
2069113609 ps |
| T1152 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3616250993 |
|
|
Jun 30 07:59:06 PM PDT 24 |
Jun 30 08:04:00 PM PDT 24 |
2888190250 ps |
| T1153 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2860633130 |
|
|
Jun 30 07:31:38 PM PDT 24 |
Jun 30 07:40:04 PM PDT 24 |
8804962780 ps |
| T340 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1290963762 |
|
|
Jun 30 07:53:51 PM PDT 24 |
Jun 30 08:02:47 PM PDT 24 |
18741235412 ps |
| T1154 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3897353257 |
|
|
Jun 30 07:29:07 PM PDT 24 |
Jun 30 07:46:54 PM PDT 24 |
8612992378 ps |
| T745 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.523784982 |
|
|
Jun 30 08:11:53 PM PDT 24 |
Jun 30 08:24:57 PM PDT 24 |
5213782748 ps |
| T696 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.255049264 |
|
|
Jun 30 08:06:42 PM PDT 24 |
Jun 30 08:18:00 PM PDT 24 |
5457969614 ps |
| T295 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.72653795 |
|
|
Jun 30 07:46:46 PM PDT 24 |
Jun 30 07:56:33 PM PDT 24 |
4539034840 ps |
| T433 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.1523656537 |
|
|
Jun 30 07:44:55 PM PDT 24 |
Jun 30 08:08:11 PM PDT 24 |
6210740040 ps |
| T133 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.17847299 |
|
|
Jun 30 08:00:15 PM PDT 24 |
Jun 30 08:18:53 PM PDT 24 |
7438417250 ps |
| T252 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.2182218257 |
|
|
Jun 30 07:41:35 PM PDT 24 |
Jun 30 07:49:17 PM PDT 24 |
4386979638 ps |
| T1155 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.3291284589 |
|
|
Jun 30 07:40:13 PM PDT 24 |
Jun 30 07:48:10 PM PDT 24 |
4570667894 ps |
| T1156 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.2821313220 |
|
|
Jun 30 07:44:26 PM PDT 24 |
Jun 30 07:50:52 PM PDT 24 |
3290879000 ps |
| T1157 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1145712860 |
|
|
Jun 30 08:02:12 PM PDT 24 |
Jun 30 08:10:35 PM PDT 24 |
5017952326 ps |
| T333 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2107915070 |
|
|
Jun 30 07:48:41 PM PDT 24 |
Jun 30 07:59:25 PM PDT 24 |
4684803258 ps |
| T1158 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.2246351355 |
|
|
Jun 30 07:50:16 PM PDT 24 |
Jun 30 07:54:42 PM PDT 24 |
3265027664 ps |
| T1159 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.1341554310 |
|
|
Jun 30 07:41:36 PM PDT 24 |
Jun 30 07:46:28 PM PDT 24 |
3634476124 ps |
| T1160 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.2638013761 |
|
|
Jun 30 07:57:09 PM PDT 24 |
Jun 30 08:08:22 PM PDT 24 |
6372828332 ps |
| T1161 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.2024143158 |
|
|
Jun 30 08:03:45 PM PDT 24 |
Jun 30 09:21:04 PM PDT 24 |
15618153346 ps |
| T1162 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2261899274 |
|
|
Jun 30 08:07:38 PM PDT 24 |
Jun 30 08:14:26 PM PDT 24 |
3673190690 ps |
| T1163 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2495733107 |
|
|
Jun 30 07:30:29 PM PDT 24 |
Jun 30 07:52:21 PM PDT 24 |
7134905392 ps |
| T1164 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.1549046789 |
|
|
Jun 30 08:03:25 PM PDT 24 |
Jun 30 08:21:55 PM PDT 24 |
10239106828 ps |
| T1165 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1011278839 |
|
|
Jun 30 07:42:31 PM PDT 24 |
Jun 30 07:47:38 PM PDT 24 |
3279288838 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.4087774423 |
|
|
Jun 30 07:45:16 PM PDT 24 |
Jun 30 07:55:50 PM PDT 24 |
4537154324 ps |
| T1167 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.4069737376 |
|
|
Jun 30 07:41:14 PM PDT 24 |
Jun 30 08:00:11 PM PDT 24 |
6958847260 ps |
| T1168 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.1422208656 |
|
|
Jun 30 07:50:10 PM PDT 24 |
Jun 30 07:56:29 PM PDT 24 |
3507082256 ps |
| T1169 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3169877271 |
|
|
Jun 30 07:56:13 PM PDT 24 |
Jun 30 08:07:38 PM PDT 24 |
4899860308 ps |
| T1170 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.3411575344 |
|
|
Jun 30 07:52:12 PM PDT 24 |
Jun 30 08:04:27 PM PDT 24 |
5070924350 ps |
| T791 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.662434031 |
|
|
Jun 30 08:05:02 PM PDT 24 |
Jun 30 08:12:45 PM PDT 24 |
3691218854 ps |
| T13 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.526180140 |
|
|
Jun 30 07:28:01 PM PDT 24 |
Jun 30 07:34:08 PM PDT 24 |
4411013792 ps |
| T1171 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.3020227241 |
|
|
Jun 30 08:00:07 PM PDT 24 |
Jun 30 10:10:48 PM PDT 24 |
32256551560 ps |
| T238 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.2932321952 |
|
|
Jun 30 08:04:00 PM PDT 24 |
Jun 30 08:14:43 PM PDT 24 |
4486251200 ps |
| T1172 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3972156353 |
|
|
Jun 30 07:52:10 PM PDT 24 |
Jun 30 07:56:18 PM PDT 24 |
2684014266 ps |
| T1173 |
/workspace/coverage/default/2.chip_sw_kmac_idle.2480668938 |
|
|
Jun 30 07:56:06 PM PDT 24 |
Jun 30 08:00:01 PM PDT 24 |
2310803540 ps |
| T360 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1896076662 |
|
|
Jun 30 07:41:06 PM PDT 24 |
Jun 30 09:07:45 PM PDT 24 |
18196900312 ps |
| T757 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1044367804 |
|
|
Jun 30 08:07:21 PM PDT 24 |
Jun 30 08:18:22 PM PDT 24 |
4779462144 ps |
| T1174 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1715577926 |
|
|
Jun 30 07:58:06 PM PDT 24 |
Jun 30 08:09:57 PM PDT 24 |
4918987440 ps |
| T1175 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.2315591391 |
|
|
Jun 30 07:43:44 PM PDT 24 |
Jun 30 07:51:30 PM PDT 24 |
5881976588 ps |
| T1176 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.2075410782 |
|
|
Jun 30 07:33:25 PM PDT 24 |
Jun 30 07:38:00 PM PDT 24 |
2932584748 ps |
| T773 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.629472576 |
|
|
Jun 30 08:09:42 PM PDT 24 |
Jun 30 08:22:03 PM PDT 24 |
6466335160 ps |
| T1177 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.395819471 |
|
|
Jun 30 07:33:26 PM PDT 24 |
Jun 30 07:44:02 PM PDT 24 |
3705367189 ps |
| T1178 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.833717426 |
|
|
Jun 30 07:27:33 PM PDT 24 |
Jun 30 07:32:04 PM PDT 24 |
3517336480 ps |
| T1179 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3218129170 |
|
|
Jun 30 07:42:44 PM PDT 24 |
Jun 30 08:42:08 PM PDT 24 |
37165250358 ps |
| T1180 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1432871079 |
|
|
Jun 30 07:42:36 PM PDT 24 |
Jun 30 07:52:17 PM PDT 24 |
4873900336 ps |
| T1181 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.1201562996 |
|
|
Jun 30 08:01:11 PM PDT 24 |
Jun 30 08:03:11 PM PDT 24 |
2817727562 ps |
| T361 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.31492343 |
|
|
Jun 30 07:40:20 PM PDT 24 |
Jun 30 09:29:35 PM PDT 24 |
23779047560 ps |
| T1182 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.337636145 |
|
|
Jun 30 07:42:39 PM PDT 24 |
Jun 30 11:24:32 PM PDT 24 |
79160969394 ps |
| T1183 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3300461017 |
|
|
Jun 30 07:42:05 PM PDT 24 |
Jun 30 07:55:01 PM PDT 24 |
4275451852 ps |
| T1184 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.909080489 |
|
|
Jun 30 07:55:16 PM PDT 24 |
Jun 30 08:13:27 PM PDT 24 |
5904526770 ps |