| T101 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.66602949 |
|
|
Jul 06 07:42:54 PM PDT 24 |
Jul 06 08:09:17 PM PDT 24 |
21440908350 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.864567615 |
|
|
Jul 06 07:45:44 PM PDT 24 |
Jul 06 08:04:15 PM PDT 24 |
5463949320 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.4117903485 |
|
|
Jul 06 07:47:53 PM PDT 24 |
Jul 06 07:58:28 PM PDT 24 |
3420149298 ps |
| T997 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3078935886 |
|
|
Jul 06 07:40:16 PM PDT 24 |
Jul 06 07:50:35 PM PDT 24 |
4095480984 ps |
| T998 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2060181346 |
|
|
Jul 06 07:48:23 PM PDT 24 |
Jul 06 08:54:44 PM PDT 24 |
15125132228 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_kmac_idle.3389041408 |
|
|
Jul 06 07:32:03 PM PDT 24 |
Jul 06 07:35:43 PM PDT 24 |
2762512824 ps |
| T200 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.1763301349 |
|
|
Jul 06 07:45:36 PM PDT 24 |
Jul 06 07:54:12 PM PDT 24 |
4131474774 ps |
| T343 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.517653612 |
|
|
Jul 06 07:53:21 PM PDT 24 |
Jul 06 08:01:28 PM PDT 24 |
3189009688 ps |
| T1000 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.821017576 |
|
|
Jul 06 07:57:36 PM PDT 24 |
Jul 06 08:57:52 PM PDT 24 |
14917739784 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.1505277429 |
|
|
Jul 06 07:53:34 PM PDT 24 |
Jul 06 07:59:00 PM PDT 24 |
3078142208 ps |
| T1002 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2732067699 |
|
|
Jul 06 07:38:21 PM PDT 24 |
Jul 06 08:39:17 PM PDT 24 |
11772351683 ps |
| T1003 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.3748298063 |
|
|
Jul 06 07:43:48 PM PDT 24 |
Jul 06 07:54:43 PM PDT 24 |
5817627390 ps |
| T1004 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.525752694 |
|
|
Jul 06 07:31:08 PM PDT 24 |
Jul 06 07:50:20 PM PDT 24 |
8794516994 ps |
| T1005 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.3009192879 |
|
|
Jul 06 07:49:06 PM PDT 24 |
Jul 06 08:30:22 PM PDT 24 |
11866281784 ps |
| T1006 |
/workspace/coverage/default/1.chip_tap_straps_dev.3389948327 |
|
|
Jul 06 07:40:19 PM PDT 24 |
Jul 06 07:42:16 PM PDT 24 |
2055163935 ps |
| T1007 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.352833396 |
|
|
Jul 06 07:36:17 PM PDT 24 |
Jul 06 07:55:03 PM PDT 24 |
5886159180 ps |
| T1008 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.486950870 |
|
|
Jul 06 07:40:43 PM PDT 24 |
Jul 06 08:48:57 PM PDT 24 |
15865964604 ps |
| T1009 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3931738364 |
|
|
Jul 06 07:36:59 PM PDT 24 |
Jul 06 08:44:34 PM PDT 24 |
15347491300 ps |
| T1010 |
/workspace/coverage/default/0.chip_sival_flash_info_access.1808281283 |
|
|
Jul 06 07:28:45 PM PDT 24 |
Jul 06 07:33:55 PM PDT 24 |
3208300550 ps |
| T72 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.2211213001 |
|
|
Jul 06 07:39:45 PM PDT 24 |
Jul 06 07:43:06 PM PDT 24 |
3012989015 ps |
| T743 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.3177129804 |
|
|
Jul 06 08:01:14 PM PDT 24 |
Jul 06 08:07:07 PM PDT 24 |
4073014840 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.559829088 |
|
|
Jul 06 07:50:08 PM PDT 24 |
Jul 06 08:04:59 PM PDT 24 |
5053374984 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.654850477 |
|
|
Jul 06 07:31:53 PM PDT 24 |
Jul 06 07:45:38 PM PDT 24 |
6128472320 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.500300532 |
|
|
Jul 06 07:50:43 PM PDT 24 |
Jul 06 08:02:18 PM PDT 24 |
4490043884 ps |
| T149 |
/workspace/coverage/default/0.chip_jtag_csr_rw.3088426105 |
|
|
Jul 06 07:21:07 PM PDT 24 |
Jul 06 07:46:33 PM PDT 24 |
13687223216 ps |
| T1014 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3864761612 |
|
|
Jul 06 07:58:44 PM PDT 24 |
Jul 06 08:26:58 PM PDT 24 |
9035068234 ps |
| T1015 |
/workspace/coverage/default/1.rom_e2e_static_critical.3129773942 |
|
|
Jul 06 07:49:07 PM PDT 24 |
Jul 06 09:13:07 PM PDT 24 |
18019771538 ps |
| T102 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.1614640196 |
|
|
Jul 06 07:28:32 PM PDT 24 |
Jul 06 07:52:41 PM PDT 24 |
19512682770 ps |
| T1016 |
/workspace/coverage/default/1.rom_e2e_smoke.2742732345 |
|
|
Jul 06 07:46:40 PM PDT 24 |
Jul 06 08:53:30 PM PDT 24 |
15204288184 ps |
| T69 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.1932099818 |
|
|
Jul 06 07:53:51 PM PDT 24 |
Jul 06 08:00:49 PM PDT 24 |
4224981130 ps |
| T1017 |
/workspace/coverage/default/0.chip_tap_straps_dev.1945671217 |
|
|
Jul 06 07:28:34 PM PDT 24 |
Jul 06 07:33:50 PM PDT 24 |
3482243305 ps |
| T1018 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.190204148 |
|
|
Jul 06 07:36:40 PM PDT 24 |
Jul 06 07:50:52 PM PDT 24 |
6034026810 ps |
| T1019 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1733437303 |
|
|
Jul 06 08:00:41 PM PDT 24 |
Jul 06 08:08:03 PM PDT 24 |
4097799476 ps |
| T1020 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.4085097823 |
|
|
Jul 06 07:56:40 PM PDT 24 |
Jul 06 09:05:02 PM PDT 24 |
12992861492 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.4162141891 |
|
|
Jul 06 07:31:02 PM PDT 24 |
Jul 06 07:42:32 PM PDT 24 |
4582355300 ps |
| T765 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.3808456782 |
|
|
Jul 06 07:58:47 PM PDT 24 |
Jul 06 08:10:54 PM PDT 24 |
5882882520 ps |
| T730 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.1313768365 |
|
|
Jul 06 08:03:19 PM PDT 24 |
Jul 06 08:09:08 PM PDT 24 |
3941319480 ps |
| T178 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.368912858 |
|
|
Jul 06 08:05:24 PM PDT 24 |
Jul 06 08:15:30 PM PDT 24 |
4409168118 ps |
| T770 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.1729371288 |
|
|
Jul 06 07:59:31 PM PDT 24 |
Jul 06 08:06:21 PM PDT 24 |
3977201572 ps |
| T1022 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.1264742642 |
|
|
Jul 06 07:55:07 PM PDT 24 |
Jul 06 08:06:23 PM PDT 24 |
6198842267 ps |
| T1023 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1303200741 |
|
|
Jul 06 07:55:45 PM PDT 24 |
Jul 06 08:02:01 PM PDT 24 |
4450851402 ps |
| T367 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.719351703 |
|
|
Jul 06 07:36:37 PM PDT 24 |
Jul 06 07:46:35 PM PDT 24 |
18334045662 ps |
| T1024 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.658623674 |
|
|
Jul 06 07:38:36 PM PDT 24 |
Jul 06 08:05:16 PM PDT 24 |
7539686388 ps |
| T282 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.2915813424 |
|
|
Jul 06 07:56:16 PM PDT 24 |
Jul 06 08:11:05 PM PDT 24 |
4966472080 ps |
| T1025 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2929725726 |
|
|
Jul 06 07:54:45 PM PDT 24 |
Jul 06 08:17:25 PM PDT 24 |
5824590060 ps |
| T1026 |
/workspace/coverage/default/3.chip_tap_straps_prod.183780843 |
|
|
Jul 06 07:54:38 PM PDT 24 |
Jul 06 07:57:42 PM PDT 24 |
2542602289 ps |
| T362 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.3996558385 |
|
|
Jul 06 07:28:48 PM PDT 24 |
Jul 06 07:33:31 PM PDT 24 |
2820350912 ps |
| T214 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.523564333 |
|
|
Jul 06 07:32:51 PM PDT 24 |
Jul 06 10:39:41 PM PDT 24 |
65718568327 ps |
| T1027 |
/workspace/coverage/default/2.chip_tap_straps_rma.2675830962 |
|
|
Jul 06 07:50:46 PM PDT 24 |
Jul 06 07:53:34 PM PDT 24 |
2624104036 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1345015724 |
|
|
Jul 06 07:39:39 PM PDT 24 |
Jul 06 07:49:58 PM PDT 24 |
4000573392 ps |
| T1029 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.666016227 |
|
|
Jul 06 07:34:17 PM PDT 24 |
Jul 06 07:42:47 PM PDT 24 |
4148889470 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1878560043 |
|
|
Jul 06 07:36:25 PM PDT 24 |
Jul 06 07:43:19 PM PDT 24 |
6214940628 ps |
| T163 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3923622023 |
|
|
Jul 06 07:33:41 PM PDT 24 |
Jul 06 07:46:13 PM PDT 24 |
3567324492 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.274365459 |
|
|
Jul 06 07:43:06 PM PDT 24 |
Jul 06 07:47:58 PM PDT 24 |
3501808720 ps |
| T1032 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.3308051874 |
|
|
Jul 06 07:47:37 PM PDT 24 |
Jul 06 08:50:26 PM PDT 24 |
14937260844 ps |
| T762 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.2663997952 |
|
|
Jul 06 08:04:16 PM PDT 24 |
Jul 06 08:20:17 PM PDT 24 |
6254447506 ps |
| T297 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1279249677 |
|
|
Jul 06 07:51:39 PM PDT 24 |
Jul 06 07:56:10 PM PDT 24 |
2912717896 ps |
| T400 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2456852229 |
|
|
Jul 06 07:45:45 PM PDT 24 |
Jul 06 07:48:22 PM PDT 24 |
3879552211 ps |
| T170 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3360324311 |
|
|
Jul 06 07:46:52 PM PDT 24 |
Jul 06 07:48:42 PM PDT 24 |
1790146598 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3174395275 |
|
|
Jul 06 07:36:28 PM PDT 24 |
Jul 06 07:41:28 PM PDT 24 |
3615256244 ps |
| T401 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.3907466585 |
|
|
Jul 06 08:02:25 PM PDT 24 |
Jul 06 08:10:01 PM PDT 24 |
4591827270 ps |
| T402 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.2834571767 |
|
|
Jul 06 07:57:50 PM PDT 24 |
Jul 06 08:08:04 PM PDT 24 |
4920098024 ps |
| T403 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.2544273904 |
|
|
Jul 06 07:48:24 PM PDT 24 |
Jul 06 08:49:26 PM PDT 24 |
19375337768 ps |
| T404 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3324879512 |
|
|
Jul 06 07:29:21 PM PDT 24 |
Jul 06 07:44:17 PM PDT 24 |
4808929200 ps |
| T298 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.1809966247 |
|
|
Jul 06 07:41:54 PM PDT 24 |
Jul 06 07:45:49 PM PDT 24 |
2798517000 ps |
| T405 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.3663308410 |
|
|
Jul 06 07:34:46 PM PDT 24 |
Jul 06 08:26:53 PM PDT 24 |
10957106424 ps |
| T14 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1178924677 |
|
|
Jul 06 07:43:40 PM PDT 24 |
Jul 06 07:47:38 PM PDT 24 |
3132660432 ps |
| T172 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3197917052 |
|
|
Jul 06 07:36:10 PM PDT 24 |
Jul 06 07:37:58 PM PDT 24 |
2080776709 ps |
| T1033 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1707164662 |
|
|
Jul 06 07:35:22 PM PDT 24 |
Jul 06 08:05:27 PM PDT 24 |
8876210400 ps |
| T442 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.4043224540 |
|
|
Jul 06 07:56:16 PM PDT 24 |
Jul 06 08:05:54 PM PDT 24 |
3675154040 ps |
| T88 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.201233498 |
|
|
Jul 06 08:05:15 PM PDT 24 |
Jul 06 08:19:08 PM PDT 24 |
5842899374 ps |
| T445 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.3158228594 |
|
|
Jul 06 07:50:43 PM PDT 24 |
Jul 06 07:58:19 PM PDT 24 |
3890694348 ps |
| T446 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.1759312937 |
|
|
Jul 06 07:28:18 PM PDT 24 |
Jul 06 07:33:07 PM PDT 24 |
2740689130 ps |
| T447 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1729782920 |
|
|
Jul 06 07:52:47 PM PDT 24 |
Jul 06 07:56:56 PM PDT 24 |
3030354744 ps |
| T215 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.1142752788 |
|
|
Jul 06 07:44:12 PM PDT 24 |
Jul 06 11:04:23 PM PDT 24 |
63278104487 ps |
| T158 |
/workspace/coverage/default/1.rom_raw_unlock.3438375540 |
|
|
Jul 06 07:44:31 PM PDT 24 |
Jul 06 07:48:27 PM PDT 24 |
4852354633 ps |
| T74 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.780066196 |
|
|
Jul 06 07:28:16 PM PDT 24 |
Jul 06 07:33:17 PM PDT 24 |
3004797748 ps |
| T448 |
/workspace/coverage/default/0.rom_raw_unlock.1957462962 |
|
|
Jul 06 07:33:39 PM PDT 24 |
Jul 06 07:38:10 PM PDT 24 |
6142225549 ps |
| T449 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3052867912 |
|
|
Jul 06 07:45:58 PM PDT 24 |
Jul 06 08:16:29 PM PDT 24 |
13658941801 ps |
| T344 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.3585376578 |
|
|
Jul 06 07:41:45 PM PDT 24 |
Jul 06 07:49:15 PM PDT 24 |
4321305816 ps |
| T737 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.281438851 |
|
|
Jul 06 08:05:06 PM PDT 24 |
Jul 06 08:13:09 PM PDT 24 |
5337000516 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.4104077895 |
|
|
Jul 06 07:47:18 PM PDT 24 |
Jul 06 08:09:09 PM PDT 24 |
6218541215 ps |
| T1035 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.2632311161 |
|
|
Jul 06 07:36:31 PM PDT 24 |
Jul 06 07:46:38 PM PDT 24 |
4398764624 ps |
| T1036 |
/workspace/coverage/default/2.chip_sw_example_rom.84220233 |
|
|
Jul 06 07:42:55 PM PDT 24 |
Jul 06 07:45:21 PM PDT 24 |
3028834832 ps |
| T1037 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.966781121 |
|
|
Jul 06 07:29:23 PM PDT 24 |
Jul 06 07:42:34 PM PDT 24 |
4348472312 ps |
| T1038 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.3127991933 |
|
|
Jul 06 07:45:28 PM PDT 24 |
Jul 06 08:11:20 PM PDT 24 |
9576142302 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.3949905656 |
|
|
Jul 06 07:50:16 PM PDT 24 |
Jul 06 07:55:11 PM PDT 24 |
2487164356 ps |
| T256 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.917946112 |
|
|
Jul 06 07:46:23 PM PDT 24 |
Jul 06 09:16:36 PM PDT 24 |
49711037465 ps |
| T1040 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.3084442317 |
|
|
Jul 06 07:50:37 PM PDT 24 |
Jul 06 08:23:12 PM PDT 24 |
23116647598 ps |
| T766 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1916763324 |
|
|
Jul 06 08:06:04 PM PDT 24 |
Jul 06 08:15:15 PM PDT 24 |
4963936400 ps |
| T1041 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.4162630190 |
|
|
Jul 06 07:36:46 PM PDT 24 |
Jul 06 07:44:10 PM PDT 24 |
3236492436 ps |
| T1042 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.918556605 |
|
|
Jul 06 07:48:39 PM PDT 24 |
Jul 06 08:26:55 PM PDT 24 |
9388890312 ps |
| T15 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.1139877905 |
|
|
Jul 06 07:32:16 PM PDT 24 |
Jul 06 07:39:29 PM PDT 24 |
4571018760 ps |
| T716 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.1170148947 |
|
|
Jul 06 07:59:40 PM PDT 24 |
Jul 06 08:13:56 PM PDT 24 |
4825002676 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.619736616 |
|
|
Jul 06 07:37:48 PM PDT 24 |
Jul 06 07:48:57 PM PDT 24 |
9190382510 ps |
| T1044 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.1207415435 |
|
|
Jul 06 07:47:11 PM PDT 24 |
Jul 06 07:53:17 PM PDT 24 |
4704159233 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.3646458524 |
|
|
Jul 06 07:43:21 PM PDT 24 |
Jul 06 07:47:06 PM PDT 24 |
2913472084 ps |
| T1046 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.1932055890 |
|
|
Jul 06 07:50:35 PM PDT 24 |
Jul 06 07:57:26 PM PDT 24 |
4312287936 ps |
| T221 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2241700257 |
|
|
Jul 06 07:35:51 PM PDT 24 |
Jul 06 08:04:19 PM PDT 24 |
23079993616 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.466973762 |
|
|
Jul 06 07:39:43 PM PDT 24 |
Jul 06 07:44:45 PM PDT 24 |
2640880363 ps |
| T789 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.2010863167 |
|
|
Jul 06 08:01:25 PM PDT 24 |
Jul 06 08:11:30 PM PDT 24 |
5020469676 ps |
| T679 |
/workspace/coverage/default/2.rom_raw_unlock.3406737010 |
|
|
Jul 06 07:53:07 PM PDT 24 |
Jul 06 07:57:44 PM PDT 24 |
5711768144 ps |
| T732 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.620116630 |
|
|
Jul 06 07:56:31 PM PDT 24 |
Jul 06 08:08:16 PM PDT 24 |
6399484624 ps |
| T1048 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.509854967 |
|
|
Jul 06 07:37:35 PM PDT 24 |
Jul 06 07:50:36 PM PDT 24 |
9831740592 ps |
| T1049 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.341169603 |
|
|
Jul 06 07:35:19 PM PDT 24 |
Jul 06 08:46:41 PM PDT 24 |
15297234952 ps |
| T720 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.3568502894 |
|
|
Jul 06 07:58:52 PM PDT 24 |
Jul 06 08:06:17 PM PDT 24 |
3288152552 ps |
| T655 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.579453579 |
|
|
Jul 06 07:35:05 PM PDT 24 |
Jul 06 07:36:57 PM PDT 24 |
2740905433 ps |
| T335 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1954899680 |
|
|
Jul 06 07:28:56 PM PDT 24 |
Jul 06 07:41:38 PM PDT 24 |
5315539340 ps |
| T1050 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4111467760 |
|
|
Jul 06 07:55:23 PM PDT 24 |
Jul 06 08:06:05 PM PDT 24 |
3822591621 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.92822655 |
|
|
Jul 06 07:38:16 PM PDT 24 |
Jul 06 07:46:27 PM PDT 24 |
4757704496 ps |
| T744 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.4035928901 |
|
|
Jul 06 07:28:11 PM PDT 24 |
Jul 06 07:35:23 PM PDT 24 |
3830855050 ps |
| T1052 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.519759981 |
|
|
Jul 06 07:47:23 PM PDT 24 |
Jul 06 08:00:22 PM PDT 24 |
6155493490 ps |
| T1053 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.2632939933 |
|
|
Jul 06 07:36:05 PM PDT 24 |
Jul 06 07:41:50 PM PDT 24 |
3863359660 ps |
| T1054 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1187897716 |
|
|
Jul 06 07:59:52 PM PDT 24 |
Jul 06 08:16:21 PM PDT 24 |
6351352872 ps |
| T1055 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.1773128911 |
|
|
Jul 06 08:03:44 PM PDT 24 |
Jul 06 08:13:36 PM PDT 24 |
5484687892 ps |
| T783 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.1489347743 |
|
|
Jul 06 08:04:00 PM PDT 24 |
Jul 06 08:10:56 PM PDT 24 |
3326302264 ps |
| T321 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.4229440019 |
|
|
Jul 06 07:40:27 PM PDT 24 |
Jul 06 08:03:12 PM PDT 24 |
6440759808 ps |
| T1056 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.3750962045 |
|
|
Jul 06 07:38:19 PM PDT 24 |
Jul 06 09:33:29 PM PDT 24 |
24299070120 ps |
| T1057 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.2155136651 |
|
|
Jul 06 07:58:49 PM PDT 24 |
Jul 06 09:01:29 PM PDT 24 |
14826821817 ps |
| T358 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.915630585 |
|
|
Jul 06 07:41:17 PM PDT 24 |
Jul 06 07:55:17 PM PDT 24 |
5636368413 ps |
| T1058 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.174051661 |
|
|
Jul 06 07:57:05 PM PDT 24 |
Jul 06 08:57:37 PM PDT 24 |
15580985801 ps |
| T1059 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.2612131453 |
|
|
Jul 06 07:54:21 PM PDT 24 |
Jul 06 08:10:02 PM PDT 24 |
7816782352 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.2476571135 |
|
|
Jul 06 07:38:41 PM PDT 24 |
Jul 06 07:43:51 PM PDT 24 |
2658153622 ps |
| T1061 |
/workspace/coverage/default/1.chip_sival_flash_info_access.693057514 |
|
|
Jul 06 07:32:32 PM PDT 24 |
Jul 06 07:38:04 PM PDT 24 |
3255853286 ps |
| T1062 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.3334089014 |
|
|
Jul 06 07:48:20 PM PDT 24 |
Jul 06 08:57:06 PM PDT 24 |
15006843880 ps |
| T733 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.645281964 |
|
|
Jul 06 08:03:42 PM PDT 24 |
Jul 06 08:11:17 PM PDT 24 |
4198147150 ps |
| T1063 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.946314574 |
|
|
Jul 06 07:36:08 PM PDT 24 |
Jul 06 08:52:02 PM PDT 24 |
15558648388 ps |
| T1064 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.2837631502 |
|
|
Jul 06 07:53:21 PM PDT 24 |
Jul 06 07:56:55 PM PDT 24 |
2487777039 ps |
| T370 |
/workspace/coverage/default/0.chip_sw_hmac_enc.3963929358 |
|
|
Jul 06 07:30:22 PM PDT 24 |
Jul 06 07:34:57 PM PDT 24 |
3411407838 ps |
| T1065 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.1106511956 |
|
|
Jul 06 07:36:09 PM PDT 24 |
Jul 06 08:34:21 PM PDT 24 |
11367881756 ps |
| T1066 |
/workspace/coverage/default/2.chip_sival_flash_info_access.3919028021 |
|
|
Jul 06 07:43:46 PM PDT 24 |
Jul 06 07:51:12 PM PDT 24 |
3404400888 ps |
| T648 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.695602242 |
|
|
Jul 06 07:41:01 PM PDT 24 |
Jul 06 08:45:47 PM PDT 24 |
24536073208 ps |
| T1067 |
/workspace/coverage/default/0.rom_keymgr_functest.1070008272 |
|
|
Jul 06 07:30:08 PM PDT 24 |
Jul 06 07:42:12 PM PDT 24 |
6054939160 ps |
| T1068 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.4089203168 |
|
|
Jul 06 07:36:30 PM PDT 24 |
Jul 06 07:51:39 PM PDT 24 |
12583142720 ps |
| T1069 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.3018402669 |
|
|
Jul 06 07:32:34 PM PDT 24 |
Jul 06 07:38:22 PM PDT 24 |
2961363418 ps |
| T717 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.1875857458 |
|
|
Jul 06 07:59:02 PM PDT 24 |
Jul 06 08:04:27 PM PDT 24 |
3398063732 ps |
| T21 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.694758463 |
|
|
Jul 06 07:43:46 PM PDT 24 |
Jul 06 07:47:45 PM PDT 24 |
3405058648 ps |
| T1070 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.62864921 |
|
|
Jul 06 07:56:09 PM PDT 24 |
Jul 06 08:20:35 PM PDT 24 |
7559467278 ps |
| T1071 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1307432272 |
|
|
Jul 06 07:37:41 PM PDT 24 |
Jul 06 07:45:37 PM PDT 24 |
6782323768 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1638576226 |
|
|
Jul 06 07:37:55 PM PDT 24 |
Jul 06 07:51:48 PM PDT 24 |
8225999562 ps |
| T1073 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.162867108 |
|
|
Jul 06 08:04:18 PM PDT 24 |
Jul 06 08:14:11 PM PDT 24 |
4844668224 ps |
| T1074 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.2564062315 |
|
|
Jul 06 07:57:54 PM PDT 24 |
Jul 06 08:52:14 PM PDT 24 |
14517487160 ps |
| T656 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.3271443628 |
|
|
Jul 06 07:34:56 PM PDT 24 |
Jul 06 07:37:01 PM PDT 24 |
2605021412 ps |
| T443 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2194972569 |
|
|
Jul 06 08:03:07 PM PDT 24 |
Jul 06 08:12:22 PM PDT 24 |
4107642304 ps |
| T347 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4163802694 |
|
|
Jul 06 07:32:02 PM PDT 24 |
Jul 06 07:46:13 PM PDT 24 |
4979385720 ps |
| T1075 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.4128653920 |
|
|
Jul 06 07:34:55 PM PDT 24 |
Jul 06 07:38:59 PM PDT 24 |
2754050992 ps |
| T1076 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.2139511022 |
|
|
Jul 06 07:52:57 PM PDT 24 |
Jul 06 07:54:46 PM PDT 24 |
2004982314 ps |
| T776 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3096764364 |
|
|
Jul 06 08:02:27 PM PDT 24 |
Jul 06 08:14:46 PM PDT 24 |
5168446408 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.938996804 |
|
|
Jul 06 07:32:32 PM PDT 24 |
Jul 06 07:42:29 PM PDT 24 |
6091484195 ps |
| T1078 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.3130046386 |
|
|
Jul 06 07:52:26 PM PDT 24 |
Jul 06 07:57:01 PM PDT 24 |
2426093660 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1467688075 |
|
|
Jul 06 07:29:48 PM PDT 24 |
Jul 06 07:34:40 PM PDT 24 |
2372595320 ps |
| T1080 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.4025996857 |
|
|
Jul 06 07:49:50 PM PDT 24 |
Jul 06 08:13:32 PM PDT 24 |
9775003128 ps |
| T784 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3739899374 |
|
|
Jul 06 08:00:56 PM PDT 24 |
Jul 06 08:08:32 PM PDT 24 |
4559224932 ps |
| T1081 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1795497734 |
|
|
Jul 06 07:29:27 PM PDT 24 |
Jul 06 07:40:46 PM PDT 24 |
4708698488 ps |
| T1082 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3164717889 |
|
|
Jul 06 07:55:07 PM PDT 24 |
Jul 06 08:04:43 PM PDT 24 |
5311633909 ps |
| T707 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.2414429997 |
|
|
Jul 06 08:00:25 PM PDT 24 |
Jul 06 08:13:37 PM PDT 24 |
5630019724 ps |
| T1083 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.2643330506 |
|
|
Jul 06 08:01:46 PM PDT 24 |
Jul 06 08:29:13 PM PDT 24 |
8614394136 ps |
| T735 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2546884638 |
|
|
Jul 06 08:03:02 PM PDT 24 |
Jul 06 08:11:53 PM PDT 24 |
4468493844 ps |
| T718 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.1993104788 |
|
|
Jul 06 08:00:00 PM PDT 24 |
Jul 06 08:16:30 PM PDT 24 |
5043912960 ps |
| T752 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.7803701 |
|
|
Jul 06 08:04:46 PM PDT 24 |
Jul 06 08:16:43 PM PDT 24 |
5403500568 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.122128285 |
|
|
Jul 06 07:32:35 PM PDT 24 |
Jul 06 07:40:45 PM PDT 24 |
4643971598 ps |
| T1085 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.3888762401 |
|
|
Jul 06 07:49:11 PM PDT 24 |
Jul 06 08:20:07 PM PDT 24 |
9593523760 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.4226439942 |
|
|
Jul 06 07:33:31 PM PDT 24 |
Jul 06 07:37:19 PM PDT 24 |
2504429169 ps |
| T1087 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.3198486171 |
|
|
Jul 06 07:59:39 PM PDT 24 |
Jul 06 08:10:15 PM PDT 24 |
4774858582 ps |
| T753 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.3338745302 |
|
|
Jul 06 08:04:03 PM PDT 24 |
Jul 06 08:17:17 PM PDT 24 |
5645602664 ps |
| T52 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.1737216711 |
|
|
Jul 06 07:32:19 PM PDT 24 |
Jul 06 07:38:27 PM PDT 24 |
3669053637 ps |
| T379 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.187087127 |
|
|
Jul 06 07:32:37 PM PDT 24 |
Jul 06 07:43:14 PM PDT 24 |
5879823660 ps |
| T212 |
/workspace/coverage/default/1.chip_jtag_mem_access.2696456148 |
|
|
Jul 06 07:32:48 PM PDT 24 |
Jul 06 07:56:45 PM PDT 24 |
13816057204 ps |
| T1088 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.292719236 |
|
|
Jul 06 07:40:46 PM PDT 24 |
Jul 06 07:44:30 PM PDT 24 |
3426632432 ps |
| T1089 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.607808619 |
|
|
Jul 06 07:31:02 PM PDT 24 |
Jul 06 07:41:07 PM PDT 24 |
9638918361 ps |
| T1090 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.3631761997 |
|
|
Jul 06 07:44:46 PM PDT 24 |
Jul 06 07:50:19 PM PDT 24 |
2679372440 ps |
| T1091 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.3366355227 |
|
|
Jul 06 07:29:11 PM PDT 24 |
Jul 06 07:37:42 PM PDT 24 |
6773325128 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.2601016372 |
|
|
Jul 06 07:36:13 PM PDT 24 |
Jul 06 07:48:28 PM PDT 24 |
4119157060 ps |
| T380 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2986594879 |
|
|
Jul 06 07:42:03 PM PDT 24 |
Jul 06 07:47:52 PM PDT 24 |
6127116312 ps |
| T396 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.3267519392 |
|
|
Jul 06 07:34:03 PM PDT 24 |
Jul 06 07:44:25 PM PDT 24 |
3535593752 ps |
| T1093 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.4274578353 |
|
|
Jul 06 07:49:12 PM PDT 24 |
Jul 06 07:55:53 PM PDT 24 |
3571054668 ps |
| T134 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3982529888 |
|
|
Jul 06 07:38:09 PM PDT 24 |
Jul 06 07:46:26 PM PDT 24 |
4600210698 ps |
| T417 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.3173520726 |
|
|
Jul 06 07:28:19 PM PDT 24 |
Jul 06 07:31:39 PM PDT 24 |
3430153256 ps |
| T541 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.1848506874 |
|
|
Jul 06 07:36:44 PM PDT 24 |
Jul 06 07:49:54 PM PDT 24 |
4642074536 ps |
| T728 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.212624037 |
|
|
Jul 06 08:04:07 PM PDT 24 |
Jul 06 08:13:24 PM PDT 24 |
5754431272 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.3956135470 |
|
|
Jul 06 07:51:40 PM PDT 24 |
Jul 06 07:55:00 PM PDT 24 |
2340076650 ps |
| T1095 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.961559476 |
|
|
Jul 06 07:54:52 PM PDT 24 |
Jul 06 08:43:01 PM PDT 24 |
12873696735 ps |
| T1096 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.311278218 |
|
|
Jul 06 07:37:23 PM PDT 24 |
Jul 06 07:40:40 PM PDT 24 |
2562977992 ps |
| T1097 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.807769003 |
|
|
Jul 06 07:58:55 PM PDT 24 |
Jul 06 08:05:17 PM PDT 24 |
3108787536 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3884580386 |
|
|
Jul 06 07:43:20 PM PDT 24 |
Jul 06 07:48:24 PM PDT 24 |
2320681946 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.4158178756 |
|
|
Jul 06 07:28:24 PM PDT 24 |
Jul 06 07:44:18 PM PDT 24 |
7647049178 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.1472036764 |
|
|
Jul 06 07:29:58 PM PDT 24 |
Jul 06 07:34:44 PM PDT 24 |
2954923304 ps |
| T1100 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.2796925715 |
|
|
Jul 06 07:42:42 PM PDT 24 |
Jul 06 08:07:23 PM PDT 24 |
5726463504 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.2859231889 |
|
|
Jul 06 07:32:17 PM PDT 24 |
Jul 06 07:44:40 PM PDT 24 |
3558758576 ps |
| T654 |
/workspace/coverage/default/2.chip_tap_straps_dev.1125196898 |
|
|
Jul 06 07:52:28 PM PDT 24 |
Jul 06 08:21:42 PM PDT 24 |
14311147044 ps |
| T369 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.1431969866 |
|
|
Jul 06 07:31:56 PM PDT 24 |
Jul 06 07:45:00 PM PDT 24 |
3885481952 ps |
| T759 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.1540053533 |
|
|
Jul 06 08:03:55 PM PDT 24 |
Jul 06 08:10:05 PM PDT 24 |
3395949780 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.165935967 |
|
|
Jul 06 07:32:56 PM PDT 24 |
Jul 06 07:45:01 PM PDT 24 |
3944052374 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.1104301501 |
|
|
Jul 06 07:27:49 PM PDT 24 |
Jul 06 07:31:49 PM PDT 24 |
2117699280 ps |
| T748 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.1968089639 |
|
|
Jul 06 08:03:10 PM PDT 24 |
Jul 06 08:13:59 PM PDT 24 |
4947645920 ps |
| T272 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.3371615891 |
|
|
Jul 06 07:58:39 PM PDT 24 |
Jul 06 08:09:04 PM PDT 24 |
5651616160 ps |
| T270 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2436192705 |
|
|
Jul 06 07:40:53 PM PDT 24 |
Jul 06 07:51:20 PM PDT 24 |
4877043720 ps |
| T1102 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.362969343 |
|
|
Jul 06 07:30:28 PM PDT 24 |
Jul 06 07:38:09 PM PDT 24 |
4199980786 ps |
| T1103 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.1626470428 |
|
|
Jul 06 07:54:52 PM PDT 24 |
Jul 06 07:59:12 PM PDT 24 |
2518736372 ps |
| T1104 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3748437428 |
|
|
Jul 06 07:46:49 PM PDT 24 |
Jul 06 07:55:18 PM PDT 24 |
7954551480 ps |
| T1105 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.2226082393 |
|
|
Jul 06 07:43:24 PM PDT 24 |
Jul 06 07:49:41 PM PDT 24 |
3596523520 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1854120799 |
|
|
Jul 06 07:37:00 PM PDT 24 |
Jul 06 08:03:31 PM PDT 24 |
8913006982 ps |
| T1107 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3302778290 |
|
|
Jul 06 07:56:29 PM PDT 24 |
Jul 06 08:22:22 PM PDT 24 |
8255939248 ps |
| T323 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.696720654 |
|
|
Jul 06 07:28:29 PM PDT 24 |
Jul 06 07:42:59 PM PDT 24 |
4936673240 ps |
| T738 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.4019627436 |
|
|
Jul 06 07:57:23 PM PDT 24 |
Jul 06 08:10:54 PM PDT 24 |
6619932660 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.147594473 |
|
|
Jul 06 07:42:31 PM PDT 24 |
Jul 06 07:59:15 PM PDT 24 |
5542299070 ps |
| T1109 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.529129912 |
|
|
Jul 06 07:52:31 PM PDT 24 |
Jul 06 08:08:46 PM PDT 24 |
6277997734 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1101344220 |
|
|
Jul 06 07:29:04 PM PDT 24 |
Jul 06 07:40:49 PM PDT 24 |
4739157180 ps |
| T1111 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.2300462340 |
|
|
Jul 06 07:47:14 PM PDT 24 |
Jul 06 07:53:16 PM PDT 24 |
3624009251 ps |
| T756 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.3287056493 |
|
|
Jul 06 08:02:38 PM PDT 24 |
Jul 06 08:08:57 PM PDT 24 |
3832707320 ps |
| T1112 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1384024407 |
|
|
Jul 06 07:48:04 PM PDT 24 |
Jul 06 08:13:12 PM PDT 24 |
8768401500 ps |
| T1113 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.2337585293 |
|
|
Jul 06 07:46:10 PM PDT 24 |
Jul 06 09:09:26 PM PDT 24 |
42999233512 ps |
| T382 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3509702920 |
|
|
Jul 06 08:06:10 PM PDT 24 |
Jul 06 08:14:44 PM PDT 24 |
5521586480 ps |
| T1114 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1941027572 |
|
|
Jul 06 07:49:42 PM PDT 24 |
Jul 06 10:00:26 PM PDT 24 |
28042130980 ps |
| T135 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.548307930 |
|
|
Jul 06 07:50:19 PM PDT 24 |
Jul 06 07:59:02 PM PDT 24 |
4715637944 ps |
| T1115 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.2217967441 |
|
|
Jul 06 07:56:56 PM PDT 24 |
Jul 06 08:50:26 PM PDT 24 |
15452641290 ps |
| T1116 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.3897152352 |
|
|
Jul 06 07:34:43 PM PDT 24 |
Jul 06 08:00:39 PM PDT 24 |
7536728200 ps |
| T1117 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.1090189738 |
|
|
Jul 06 07:58:20 PM PDT 24 |
Jul 06 08:05:37 PM PDT 24 |
4196141088 ps |
| T307 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.237224036 |
|
|
Jul 06 07:49:35 PM PDT 24 |
Jul 06 08:07:49 PM PDT 24 |
7090882464 ps |
| T1118 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.924364784 |
|
|
Jul 06 07:37:01 PM PDT 24 |
Jul 06 09:20:52 PM PDT 24 |
23722043264 ps |
| T1119 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.193126082 |
|
|
Jul 06 07:35:47 PM PDT 24 |
Jul 06 08:39:20 PM PDT 24 |
14871393852 ps |
| T444 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2457733687 |
|
|
Jul 06 07:58:00 PM PDT 24 |
Jul 06 08:03:52 PM PDT 24 |
3298445810 ps |
| T1120 |
/workspace/coverage/default/4.chip_tap_straps_dev.2944427728 |
|
|
Jul 06 07:55:37 PM PDT 24 |
Jul 06 07:59:47 PM PDT 24 |
2906780563 ps |
| T1121 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.527365623 |
|
|
Jul 06 07:57:02 PM PDT 24 |
Jul 06 08:57:26 PM PDT 24 |
28386304184 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.3449431875 |
|
|
Jul 06 07:52:24 PM PDT 24 |
Jul 06 07:57:09 PM PDT 24 |
3486680828 ps |
| T1123 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.3268308538 |
|
|
Jul 06 07:36:10 PM PDT 24 |
Jul 06 07:58:31 PM PDT 24 |
7626775546 ps |
| T724 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.215540308 |
|
|
Jul 06 08:03:34 PM PDT 24 |
Jul 06 08:10:31 PM PDT 24 |
3886128260 ps |
| T725 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.2459633596 |
|
|
Jul 06 07:59:41 PM PDT 24 |
Jul 06 08:07:19 PM PDT 24 |
4144103428 ps |
| T687 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.3211925134 |
|
|
Jul 06 07:39:04 PM PDT 24 |
Jul 06 07:46:29 PM PDT 24 |
3581432784 ps |
| T1124 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.715888569 |
|
|
Jul 06 07:39:02 PM PDT 24 |
Jul 06 07:45:01 PM PDT 24 |
3137638520 ps |
| T213 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1229125372 |
|
|
Jul 06 07:33:18 PM PDT 24 |
Jul 06 07:55:34 PM PDT 24 |
12693028394 ps |
| T777 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.2336811713 |
|
|
Jul 06 07:59:40 PM PDT 24 |
Jul 06 08:09:26 PM PDT 24 |
3743355936 ps |
| T1125 |
/workspace/coverage/default/1.chip_sw_aes_idle.3644355226 |
|
|
Jul 06 07:37:06 PM PDT 24 |
Jul 06 07:41:08 PM PDT 24 |
2816636560 ps |
| T1126 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.204278863 |
|
|
Jul 06 07:53:37 PM PDT 24 |
Jul 06 08:35:32 PM PDT 24 |
13519148044 ps |
| T1127 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.3828344778 |
|
|
Jul 06 07:56:33 PM PDT 24 |
Jul 06 08:15:20 PM PDT 24 |
8806958608 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1960963468 |
|
|
Jul 06 07:29:49 PM PDT 24 |
Jul 06 07:32:13 PM PDT 24 |
2655703052 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.2959255075 |
|
|
Jul 06 07:28:10 PM PDT 24 |
Jul 06 07:32:00 PM PDT 24 |
2907895644 ps |
| T729 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.543793114 |
|
|
Jul 06 07:58:03 PM PDT 24 |
Jul 06 08:08:37 PM PDT 24 |
5427231160 ps |
| T152 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3678684050 |
|
|
Jul 06 07:31:09 PM PDT 24 |
Jul 06 08:07:53 PM PDT 24 |
8495419656 ps |
| T750 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3076102582 |
|
|
Jul 06 07:59:59 PM PDT 24 |
Jul 06 08:11:20 PM PDT 24 |
4697006184 ps |
| T139 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3512422429 |
|
|
Jul 06 07:28:35 PM PDT 24 |
Jul 06 07:41:40 PM PDT 24 |
5393051550 ps |
| T758 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.4210448296 |
|
|
Jul 06 08:00:04 PM PDT 24 |
Jul 06 08:06:44 PM PDT 24 |
3314064482 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.4174357522 |
|
|
Jul 06 07:30:34 PM PDT 24 |
Jul 06 07:38:19 PM PDT 24 |
4671175100 ps |
| T1130 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.3521128022 |
|
|
Jul 06 07:34:27 PM PDT 24 |
Jul 06 07:45:51 PM PDT 24 |
6768178718 ps |
| T726 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1169909351 |
|
|
Jul 06 07:59:44 PM PDT 24 |
Jul 06 08:13:47 PM PDT 24 |
5750967406 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.2853079780 |
|
|
Jul 06 07:37:01 PM PDT 24 |
Jul 06 07:40:18 PM PDT 24 |
3030809552 ps |
| T1132 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1461358692 |
|
|
Jul 06 07:49:53 PM PDT 24 |
Jul 06 08:04:34 PM PDT 24 |
12485805340 ps |
| T371 |
/workspace/coverage/default/1.chip_sw_hmac_enc.1922319471 |
|
|
Jul 06 07:39:11 PM PDT 24 |
Jul 06 07:45:14 PM PDT 24 |
3264360020 ps |
| T778 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2193547558 |
|
|
Jul 06 08:00:34 PM PDT 24 |
Jul 06 08:15:30 PM PDT 24 |
5082763452 ps |
| T1133 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.1233500132 |
|
|
Jul 06 07:54:48 PM PDT 24 |
Jul 06 08:14:26 PM PDT 24 |
6158275742 ps |