| T1022 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.33235344 |
|
|
Jul 09 07:57:33 PM PDT 24 |
Jul 09 08:56:17 PM PDT 24 |
15225016458 ps |
| T1023 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3020454637 |
|
|
Jul 09 08:13:56 PM PDT 24 |
Jul 09 08:40:01 PM PDT 24 |
8856413584 ps |
| T1024 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.3755869517 |
|
|
Jul 09 07:57:41 PM PDT 24 |
Jul 09 09:30:11 PM PDT 24 |
23394792840 ps |
| T1025 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.723097530 |
|
|
Jul 09 07:54:28 PM PDT 24 |
Jul 09 07:58:22 PM PDT 24 |
2799550518 ps |
| T198 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.3678317570 |
|
|
Jul 09 07:55:11 PM PDT 24 |
Jul 09 08:04:11 PM PDT 24 |
4119842762 ps |
| T311 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3918694066 |
|
|
Jul 09 08:02:23 PM PDT 24 |
Jul 09 08:36:00 PM PDT 24 |
11875561784 ps |
| T1026 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.1118298066 |
|
|
Jul 09 07:57:12 PM PDT 24 |
Jul 09 08:18:48 PM PDT 24 |
8672777351 ps |
| T110 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.4045129257 |
|
|
Jul 09 08:15:36 PM PDT 24 |
Jul 09 08:22:30 PM PDT 24 |
7516890458 ps |
| T721 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1870693195 |
|
|
Jul 09 08:25:08 PM PDT 24 |
Jul 09 08:33:41 PM PDT 24 |
4336993692 ps |
| T1027 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.43852662 |
|
|
Jul 09 07:59:55 PM PDT 24 |
Jul 09 08:11:25 PM PDT 24 |
3963889724 ps |
| T1028 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.2209374037 |
|
|
Jul 09 07:53:38 PM PDT 24 |
Jul 09 08:04:49 PM PDT 24 |
7461447432 ps |
| T1029 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.226202733 |
|
|
Jul 09 07:58:52 PM PDT 24 |
Jul 09 08:56:11 PM PDT 24 |
10956361058 ps |
| T1030 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.2740496631 |
|
|
Jul 09 08:16:31 PM PDT 24 |
Jul 09 08:21:03 PM PDT 24 |
3301438760 ps |
| T725 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.164275378 |
|
|
Jul 09 08:20:16 PM PDT 24 |
Jul 09 08:26:54 PM PDT 24 |
3963430428 ps |
| T724 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3952258524 |
|
|
Jul 09 08:18:39 PM PDT 24 |
Jul 09 08:24:02 PM PDT 24 |
3590561530 ps |
| T1031 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.2487875108 |
|
|
Jul 09 08:14:05 PM PDT 24 |
Jul 09 08:25:17 PM PDT 24 |
4715218978 ps |
| T1032 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.3766161256 |
|
|
Jul 09 08:14:48 PM PDT 24 |
Jul 09 09:33:43 PM PDT 24 |
19520673264 ps |
| T234 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.2217975892 |
|
|
Jul 09 08:06:04 PM PDT 24 |
Jul 09 08:14:07 PM PDT 24 |
5167697824 ps |
| T1033 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.3353472294 |
|
|
Jul 09 07:56:26 PM PDT 24 |
Jul 09 09:03:36 PM PDT 24 |
15124777270 ps |
| T233 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.3367253190 |
|
|
Jul 09 07:56:59 PM PDT 24 |
Jul 09 09:27:48 PM PDT 24 |
49737747920 ps |
| T666 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1196637419 |
|
|
Jul 09 07:52:32 PM PDT 24 |
Jul 09 07:54:30 PM PDT 24 |
2115755561 ps |
| T1034 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.1793600126 |
|
|
Jul 09 07:57:00 PM PDT 24 |
Jul 09 08:02:04 PM PDT 24 |
2986143456 ps |
| T1035 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.3224298247 |
|
|
Jul 09 07:56:48 PM PDT 24 |
Jul 09 08:57:03 PM PDT 24 |
15131157569 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2666401554 |
|
|
Jul 09 07:54:53 PM PDT 24 |
Jul 09 11:46:02 PM PDT 24 |
79311823763 ps |
| T255 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.2565852126 |
|
|
Jul 09 07:54:26 PM PDT 24 |
Jul 09 08:34:45 PM PDT 24 |
11900205636 ps |
| T1037 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.3269375220 |
|
|
Jul 09 07:59:38 PM PDT 24 |
Jul 09 08:14:39 PM PDT 24 |
10492834028 ps |
| T1038 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.2162487894 |
|
|
Jul 09 08:21:27 PM PDT 24 |
Jul 09 08:25:33 PM PDT 24 |
3344225032 ps |
| T278 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.935392200 |
|
|
Jul 09 07:59:00 PM PDT 24 |
Jul 09 08:09:20 PM PDT 24 |
4119970600 ps |
| T1039 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.3253229876 |
|
|
Jul 09 07:50:09 PM PDT 24 |
Jul 09 08:07:51 PM PDT 24 |
5773548869 ps |
| T1040 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.4220176610 |
|
|
Jul 09 07:59:48 PM PDT 24 |
Jul 09 08:04:28 PM PDT 24 |
3116205992 ps |
| T16 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3587086405 |
|
|
Jul 09 07:53:55 PM PDT 24 |
Jul 09 07:59:51 PM PDT 24 |
4720348568 ps |
| T1041 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.1645776418 |
|
|
Jul 09 08:22:37 PM PDT 24 |
Jul 09 08:26:05 PM PDT 24 |
3275322116 ps |
| T1042 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.3607129262 |
|
|
Jul 09 08:19:45 PM PDT 24 |
Jul 09 08:31:46 PM PDT 24 |
6035467008 ps |
| T1043 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1281963706 |
|
|
Jul 09 08:16:47 PM PDT 24 |
Jul 09 08:26:16 PM PDT 24 |
4524416294 ps |
| T1044 |
/workspace/coverage/default/1.rom_e2e_static_critical.541739226 |
|
|
Jul 09 08:07:31 PM PDT 24 |
Jul 09 09:08:48 PM PDT 24 |
17733482958 ps |
| T1045 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3574606518 |
|
|
Jul 09 08:12:53 PM PDT 24 |
Jul 09 08:25:35 PM PDT 24 |
9634977760 ps |
| T1046 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.3382631406 |
|
|
Jul 09 08:23:20 PM PDT 24 |
Jul 09 08:29:38 PM PDT 24 |
3796963632 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.294376588 |
|
|
Jul 09 07:59:49 PM PDT 24 |
Jul 09 08:05:05 PM PDT 24 |
4610484308 ps |
| T148 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.3419251755 |
|
|
Jul 09 07:58:54 PM PDT 24 |
Jul 09 08:05:33 PM PDT 24 |
6039721190 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1895375088 |
|
|
Jul 09 07:51:55 PM PDT 24 |
Jul 09 07:59:50 PM PDT 24 |
5540077804 ps |
| T335 |
/workspace/coverage/default/0.chip_sival_flash_info_access.3887944767 |
|
|
Jul 09 07:51:11 PM PDT 24 |
Jul 09 07:56:09 PM PDT 24 |
3378828760 ps |
| T279 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3465241656 |
|
|
Jul 09 08:15:16 PM PDT 24 |
Jul 09 08:24:51 PM PDT 24 |
3974498880 ps |
| T245 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.3139591314 |
|
|
Jul 09 08:27:40 PM PDT 24 |
Jul 09 08:33:43 PM PDT 24 |
4001558648 ps |
| T212 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.219479643 |
|
|
Jul 09 07:52:21 PM PDT 24 |
Jul 09 07:59:24 PM PDT 24 |
3279690448 ps |
| T1048 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.2653891660 |
|
|
Jul 09 08:06:29 PM PDT 24 |
Jul 09 09:11:09 PM PDT 24 |
14665432162 ps |
| T35 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.2871577130 |
|
|
Jul 09 07:49:55 PM PDT 24 |
Jul 09 07:59:56 PM PDT 24 |
3550660642 ps |
| T297 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3610231419 |
|
|
Jul 09 08:15:58 PM PDT 24 |
Jul 09 08:25:14 PM PDT 24 |
4010077340 ps |
| T751 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.3075727571 |
|
|
Jul 09 08:19:22 PM PDT 24 |
Jul 09 08:25:51 PM PDT 24 |
4426466412 ps |
| T1049 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.3267750040 |
|
|
Jul 09 07:58:29 PM PDT 24 |
Jul 09 08:02:52 PM PDT 24 |
3371951683 ps |
| T1050 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.3206894986 |
|
|
Jul 09 07:51:33 PM PDT 24 |
Jul 09 07:56:39 PM PDT 24 |
2432189502 ps |
| T801 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1050046218 |
|
|
Jul 09 08:17:56 PM PDT 24 |
Jul 09 08:24:00 PM PDT 24 |
4194285936 ps |
| T1051 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3356428054 |
|
|
Jul 09 08:16:47 PM PDT 24 |
Jul 09 08:49:50 PM PDT 24 |
8739713000 ps |
| T667 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.4086915295 |
|
|
Jul 09 08:12:39 PM PDT 24 |
Jul 09 08:14:58 PM PDT 24 |
2533572163 ps |
| T787 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.1248554342 |
|
|
Jul 09 08:23:23 PM PDT 24 |
Jul 09 08:29:24 PM PDT 24 |
3680918176 ps |
| T1052 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3637798918 |
|
|
Jul 09 07:50:00 PM PDT 24 |
Jul 09 07:55:51 PM PDT 24 |
5011588176 ps |
| T1053 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2136118830 |
|
|
Jul 09 08:16:58 PM PDT 24 |
Jul 09 08:29:25 PM PDT 24 |
8706814551 ps |
| T1054 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.4107701162 |
|
|
Jul 09 08:16:23 PM PDT 24 |
Jul 09 08:31:42 PM PDT 24 |
9605063986 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.59154268 |
|
|
Jul 09 08:04:10 PM PDT 24 |
Jul 09 08:15:21 PM PDT 24 |
3788723552 ps |
| T730 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.2913176480 |
|
|
Jul 09 08:21:21 PM PDT 24 |
Jul 09 08:29:45 PM PDT 24 |
5481955928 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.1697773258 |
|
|
Jul 09 08:12:43 PM PDT 24 |
Jul 09 08:42:53 PM PDT 24 |
34833324269 ps |
| T8 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.4275999852 |
|
|
Jul 09 08:15:54 PM PDT 24 |
Jul 09 08:22:18 PM PDT 24 |
4452833720 ps |
| T343 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3933163582 |
|
|
Jul 09 07:58:18 PM PDT 24 |
Jul 09 08:08:27 PM PDT 24 |
18030948516 ps |
| T53 |
/workspace/coverage/default/2.chip_sw_power_virus.1660403221 |
|
|
Jul 09 08:22:49 PM PDT 24 |
Jul 09 08:42:11 PM PDT 24 |
4859868486 ps |
| T699 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3230678800 |
|
|
Jul 09 07:52:42 PM PDT 24 |
Jul 09 08:15:57 PM PDT 24 |
24632768804 ps |
| T700 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2366195470 |
|
|
Jul 09 07:50:43 PM PDT 24 |
Jul 09 08:07:42 PM PDT 24 |
11017597344 ps |
| T701 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.3026431406 |
|
|
Jul 09 08:20:20 PM PDT 24 |
Jul 09 08:26:26 PM PDT 24 |
5173091952 ps |
| T702 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3302807444 |
|
|
Jul 09 07:49:41 PM PDT 24 |
Jul 09 07:57:02 PM PDT 24 |
6518856862 ps |
| T703 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.1776619512 |
|
|
Jul 09 08:20:53 PM PDT 24 |
Jul 09 08:32:37 PM PDT 24 |
5633166900 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.3393848747 |
|
|
Jul 09 07:55:09 PM PDT 24 |
Jul 09 07:58:36 PM PDT 24 |
2895121172 ps |
| T705 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3358404826 |
|
|
Jul 09 08:21:25 PM PDT 24 |
Jul 09 08:34:28 PM PDT 24 |
5730463492 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2768315385 |
|
|
Jul 09 07:51:47 PM PDT 24 |
Jul 09 07:56:26 PM PDT 24 |
2915849756 ps |
| T1057 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.710368433 |
|
|
Jul 09 07:50:11 PM PDT 24 |
Jul 09 08:07:10 PM PDT 24 |
6276117688 ps |
| T1058 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.4108148239 |
|
|
Jul 09 08:17:17 PM PDT 24 |
Jul 09 08:23:23 PM PDT 24 |
3337878034 ps |
| T797 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.1119650772 |
|
|
Jul 09 08:25:17 PM PDT 24 |
Jul 09 08:35:02 PM PDT 24 |
5185600928 ps |
| T789 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.4057445415 |
|
|
Jul 09 08:20:30 PM PDT 24 |
Jul 09 08:28:34 PM PDT 24 |
5112146472 ps |
| T121 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.2236461625 |
|
|
Jul 09 08:02:46 PM PDT 24 |
Jul 10 12:49:13 AM PDT 24 |
127445584526 ps |
| T257 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.1718343816 |
|
|
Jul 09 07:57:47 PM PDT 24 |
Jul 09 08:19:41 PM PDT 24 |
11825305494 ps |
| T1059 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.3212138279 |
|
|
Jul 09 08:01:29 PM PDT 24 |
Jul 09 08:10:24 PM PDT 24 |
6428501242 ps |
| T1060 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1073197049 |
|
|
Jul 09 08:17:36 PM PDT 24 |
Jul 09 08:21:32 PM PDT 24 |
2998754356 ps |
| T235 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.2830766896 |
|
|
Jul 09 07:51:35 PM PDT 24 |
Jul 09 07:58:09 PM PDT 24 |
3822026020 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3046464607 |
|
|
Jul 09 07:54:21 PM PDT 24 |
Jul 09 07:58:47 PM PDT 24 |
3204829169 ps |
| T9 |
/workspace/coverage/default/2.chip_jtag_csr_rw.3062048370 |
|
|
Jul 09 08:06:15 PM PDT 24 |
Jul 09 08:29:18 PM PDT 24 |
13292341580 ps |
| T136 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2847195786 |
|
|
Jul 09 08:14:01 PM PDT 24 |
Jul 09 08:21:04 PM PDT 24 |
5551471064 ps |
| T397 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.2135778746 |
|
|
Jul 09 08:18:00 PM PDT 24 |
Jul 09 08:20:00 PM PDT 24 |
2316784312 ps |
| T398 |
/workspace/coverage/default/2.chip_sw_example_rom.2454173222 |
|
|
Jul 09 08:04:28 PM PDT 24 |
Jul 09 08:06:52 PM PDT 24 |
2494483248 ps |
| T399 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1477682699 |
|
|
Jul 09 08:18:55 PM PDT 24 |
Jul 09 08:30:53 PM PDT 24 |
5829049448 ps |
| T400 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.1149861294 |
|
|
Jul 09 07:54:07 PM PDT 24 |
Jul 09 08:16:12 PM PDT 24 |
6789843743 ps |
| T401 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2730910645 |
|
|
Jul 09 08:15:13 PM PDT 24 |
Jul 09 08:28:21 PM PDT 24 |
6432225843 ps |
| T402 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1663435059 |
|
|
Jul 09 08:21:22 PM PDT 24 |
Jul 09 08:28:32 PM PDT 24 |
4285494676 ps |
| T403 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.676163578 |
|
|
Jul 09 07:58:26 PM PDT 24 |
Jul 09 09:03:29 PM PDT 24 |
15831854700 ps |
| T404 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.4026265173 |
|
|
Jul 09 07:58:56 PM PDT 24 |
Jul 09 08:02:58 PM PDT 24 |
2614239622 ps |
| T1062 |
/workspace/coverage/default/0.chip_tap_straps_prod.3384047307 |
|
|
Jul 09 07:53:35 PM PDT 24 |
Jul 09 07:56:43 PM PDT 24 |
2693274651 ps |
| T754 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.3421169591 |
|
|
Jul 09 08:16:34 PM PDT 24 |
Jul 09 08:28:10 PM PDT 24 |
4416826016 ps |
| T1063 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.2502401189 |
|
|
Jul 09 07:56:29 PM PDT 24 |
Jul 09 08:02:32 PM PDT 24 |
4137306992 ps |
| T708 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.330072025 |
|
|
Jul 09 08:00:15 PM PDT 24 |
Jul 09 08:12:02 PM PDT 24 |
5047518018 ps |
| T768 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3246563120 |
|
|
Jul 09 08:25:40 PM PDT 24 |
Jul 09 08:31:42 PM PDT 24 |
2989662936 ps |
| T179 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.2218223623 |
|
|
Jul 09 07:50:53 PM PDT 24 |
Jul 09 07:53:19 PM PDT 24 |
2765037445 ps |
| T1064 |
/workspace/coverage/default/2.chip_sw_aes_enc.3981004348 |
|
|
Jul 09 08:14:52 PM PDT 24 |
Jul 09 08:20:51 PM PDT 24 |
3309326328 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2818195111 |
|
|
Jul 09 07:56:44 PM PDT 24 |
Jul 09 08:01:29 PM PDT 24 |
2728735424 ps |
| T162 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.932787905 |
|
|
Jul 09 07:56:36 PM PDT 24 |
Jul 09 08:01:36 PM PDT 24 |
2894248771 ps |
| T1066 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1872855931 |
|
|
Jul 09 07:51:54 PM PDT 24 |
Jul 09 08:01:37 PM PDT 24 |
7058872668 ps |
| T745 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3007629788 |
|
|
Jul 09 08:19:08 PM PDT 24 |
Jul 09 08:29:03 PM PDT 24 |
4820130940 ps |
| T202 |
/workspace/coverage/default/0.chip_jtag_mem_access.3861297297 |
|
|
Jul 09 07:43:41 PM PDT 24 |
Jul 09 08:09:35 PM PDT 24 |
13639128220 ps |
| T1067 |
/workspace/coverage/default/0.rom_e2e_static_critical.3191011110 |
|
|
Jul 09 07:56:55 PM PDT 24 |
Jul 09 09:04:27 PM PDT 24 |
17528012436 ps |
| T280 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.3574909021 |
|
|
Jul 09 07:51:17 PM PDT 24 |
Jul 09 08:02:56 PM PDT 24 |
4252235800 ps |
| T1068 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3506473772 |
|
|
Jul 09 08:15:24 PM PDT 24 |
Jul 09 08:30:21 PM PDT 24 |
7452859678 ps |
| T662 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.734516801 |
|
|
Jul 09 07:53:59 PM PDT 24 |
Jul 09 08:03:24 PM PDT 24 |
2966309966 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.4030729134 |
|
|
Jul 09 08:06:27 PM PDT 24 |
Jul 09 11:05:10 PM PDT 24 |
65794478982 ps |
| T807 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.223408131 |
|
|
Jul 09 08:24:13 PM PDT 24 |
Jul 09 08:30:06 PM PDT 24 |
4501807678 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3042745806 |
|
|
Jul 09 08:16:38 PM PDT 24 |
Jul 09 08:26:45 PM PDT 24 |
7309842044 ps |
| T1071 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2763153334 |
|
|
Jul 09 08:02:10 PM PDT 24 |
Jul 09 08:24:47 PM PDT 24 |
7861059749 ps |
| T757 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3084134773 |
|
|
Jul 09 08:23:20 PM PDT 24 |
Jul 09 08:32:23 PM PDT 24 |
4609365078 ps |
| T1072 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.1810608948 |
|
|
Jul 09 08:07:12 PM PDT 24 |
Jul 09 08:59:43 PM PDT 24 |
15652608854 ps |
| T17 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.1454638160 |
|
|
Jul 09 07:48:38 PM PDT 24 |
Jul 09 07:52:38 PM PDT 24 |
3995191730 ps |
| T281 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.4278412240 |
|
|
Jul 09 08:17:48 PM PDT 24 |
Jul 09 08:28:23 PM PDT 24 |
4274970109 ps |
| T303 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.1669532791 |
|
|
Jul 09 07:58:39 PM PDT 24 |
Jul 09 08:21:15 PM PDT 24 |
5702143266 ps |
| T764 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.4020964842 |
|
|
Jul 09 08:23:41 PM PDT 24 |
Jul 09 08:32:18 PM PDT 24 |
4799943234 ps |
| T1073 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.1973243465 |
|
|
Jul 09 07:56:30 PM PDT 24 |
Jul 09 08:28:15 PM PDT 24 |
8497665844 ps |
| T805 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1125749361 |
|
|
Jul 09 08:18:59 PM PDT 24 |
Jul 09 08:30:18 PM PDT 24 |
5318340148 ps |
| T737 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.3008755752 |
|
|
Jul 09 08:17:48 PM PDT 24 |
Jul 09 08:29:43 PM PDT 24 |
5405689512 ps |
| T1074 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.484287214 |
|
|
Jul 09 07:52:05 PM PDT 24 |
Jul 09 08:16:00 PM PDT 24 |
6590827500 ps |
| T1075 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.522450911 |
|
|
Jul 09 07:51:01 PM PDT 24 |
Jul 09 08:02:42 PM PDT 24 |
5794051771 ps |
| T1076 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.796562187 |
|
|
Jul 09 08:22:33 PM PDT 24 |
Jul 09 08:29:54 PM PDT 24 |
4723914824 ps |
| T246 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.741055991 |
|
|
Jul 09 08:19:42 PM PDT 24 |
Jul 09 08:26:37 PM PDT 24 |
3932903208 ps |
| T1077 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.2477871433 |
|
|
Jul 09 08:07:39 PM PDT 24 |
Jul 09 08:26:43 PM PDT 24 |
6104116912 ps |
| T292 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3451034877 |
|
|
Jul 09 07:52:12 PM PDT 24 |
Jul 09 07:55:51 PM PDT 24 |
2380851445 ps |
| T1078 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1570288172 |
|
|
Jul 09 07:54:52 PM PDT 24 |
Jul 09 08:18:19 PM PDT 24 |
5662468612 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1518068997 |
|
|
Jul 09 07:50:30 PM PDT 24 |
Jul 09 11:22:37 PM PDT 24 |
254566364528 ps |
| T1080 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.3773261639 |
|
|
Jul 09 08:20:35 PM PDT 24 |
Jul 09 08:31:50 PM PDT 24 |
4873360010 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3255274820 |
|
|
Jul 09 08:17:26 PM PDT 24 |
Jul 09 08:22:44 PM PDT 24 |
3344623778 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1834686991 |
|
|
Jul 09 07:56:41 PM PDT 24 |
Jul 09 08:10:41 PM PDT 24 |
8356499634 ps |
| T1083 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.1991629389 |
|
|
Jul 09 08:15:10 PM PDT 24 |
Jul 09 08:19:22 PM PDT 24 |
2392117076 ps |
| T15 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.3130442868 |
|
|
Jul 09 07:50:31 PM PDT 24 |
Jul 09 07:56:37 PM PDT 24 |
5527970072 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.408035761 |
|
|
Jul 09 07:52:25 PM PDT 24 |
Jul 09 08:22:18 PM PDT 24 |
7694724208 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.2900152332 |
|
|
Jul 09 07:56:04 PM PDT 24 |
Jul 09 08:00:29 PM PDT 24 |
2545015914 ps |
| T668 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.394164443 |
|
|
Jul 09 08:02:08 PM PDT 24 |
Jul 09 08:03:47 PM PDT 24 |
1802073516 ps |
| T1086 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.250632583 |
|
|
Jul 09 07:54:40 PM PDT 24 |
Jul 09 08:14:22 PM PDT 24 |
7709508428 ps |
| T170 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.4163679198 |
|
|
Jul 09 08:15:29 PM PDT 24 |
Jul 09 08:23:36 PM PDT 24 |
4280229972 ps |
| T1087 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.1230670613 |
|
|
Jul 09 08:16:45 PM PDT 24 |
Jul 09 08:32:25 PM PDT 24 |
4288050808 ps |
| T1088 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.1585993679 |
|
|
Jul 09 07:54:58 PM PDT 24 |
Jul 09 07:58:20 PM PDT 24 |
2247137245 ps |
| T1089 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.2663941792 |
|
|
Jul 09 08:05:36 PM PDT 24 |
Jul 09 08:11:39 PM PDT 24 |
3611448182 ps |
| T1090 |
/workspace/coverage/default/2.chip_tap_straps_prod.2881834561 |
|
|
Jul 09 08:14:10 PM PDT 24 |
Jul 09 08:16:35 PM PDT 24 |
2248298028 ps |
| T304 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.279301513 |
|
|
Jul 09 07:57:05 PM PDT 24 |
Jul 09 08:18:22 PM PDT 24 |
6062969994 ps |
| T1091 |
/workspace/coverage/default/1.rom_e2e_smoke.130561140 |
|
|
Jul 09 08:06:37 PM PDT 24 |
Jul 09 09:23:54 PM PDT 24 |
15672967324 ps |
| T139 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.996545871 |
|
|
Jul 09 07:51:49 PM PDT 24 |
Jul 09 07:59:12 PM PDT 24 |
5427456128 ps |
| T68 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.2389461298 |
|
|
Jul 09 08:13:40 PM PDT 24 |
Jul 09 08:19:11 PM PDT 24 |
5045049428 ps |
| T1092 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.2762266475 |
|
|
Jul 09 08:18:58 PM PDT 24 |
Jul 09 08:25:41 PM PDT 24 |
3876085544 ps |
| T794 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.3562752408 |
|
|
Jul 09 08:23:33 PM PDT 24 |
Jul 09 08:33:03 PM PDT 24 |
5801302532 ps |
| T1093 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.981981324 |
|
|
Jul 09 08:02:50 PM PDT 24 |
Jul 09 09:45:50 PM PDT 24 |
23614388280 ps |
| T1094 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2536158302 |
|
|
Jul 09 08:00:19 PM PDT 24 |
Jul 09 08:11:17 PM PDT 24 |
3959184712 ps |
| T307 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2758261469 |
|
|
Jul 09 07:58:57 PM PDT 24 |
Jul 09 08:11:46 PM PDT 24 |
4866620974 ps |
| T1095 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.2594085684 |
|
|
Jul 09 08:14:56 PM PDT 24 |
Jul 09 08:20:55 PM PDT 24 |
3531670978 ps |
| T750 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2636316720 |
|
|
Jul 09 08:22:15 PM PDT 24 |
Jul 09 08:28:46 PM PDT 24 |
3126877800 ps |
| T180 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1510028618 |
|
|
Jul 09 07:51:52 PM PDT 24 |
Jul 09 07:54:06 PM PDT 24 |
2943530020 ps |
| T1096 |
/workspace/coverage/default/2.chip_sw_example_concurrency.3473013925 |
|
|
Jul 09 08:05:08 PM PDT 24 |
Jul 09 08:11:18 PM PDT 24 |
3176538824 ps |
| T1097 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.938092224 |
|
|
Jul 09 07:57:14 PM PDT 24 |
Jul 09 08:46:36 PM PDT 24 |
10548965697 ps |
| T802 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.904454997 |
|
|
Jul 09 08:23:59 PM PDT 24 |
Jul 09 08:36:31 PM PDT 24 |
6405790844 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.396678250 |
|
|
Jul 09 07:55:54 PM PDT 24 |
Jul 09 08:05:33 PM PDT 24 |
3927925560 ps |
| T1099 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.461244521 |
|
|
Jul 09 08:17:06 PM PDT 24 |
Jul 09 08:25:20 PM PDT 24 |
3743959452 ps |
| T44 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.2155704465 |
|
|
Jul 09 08:06:28 PM PDT 24 |
Jul 09 08:09:59 PM PDT 24 |
2498700816 ps |
| T663 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.4138270095 |
|
|
Jul 09 07:51:15 PM PDT 24 |
Jul 10 12:31:18 AM PDT 24 |
121383914848 ps |
| T423 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2400068370 |
|
|
Jul 09 08:21:57 PM PDT 24 |
Jul 09 08:27:25 PM PDT 24 |
3877645956 ps |
| T769 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.1938872859 |
|
|
Jul 09 08:24:13 PM PDT 24 |
Jul 09 08:30:53 PM PDT 24 |
4617248124 ps |
| T1100 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.2069022451 |
|
|
Jul 09 08:16:09 PM PDT 24 |
Jul 09 08:22:08 PM PDT 24 |
3200006518 ps |
| T199 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.289377689 |
|
|
Jul 09 07:57:33 PM PDT 24 |
Jul 09 08:06:39 PM PDT 24 |
4789488494 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.641256897 |
|
|
Jul 09 07:52:09 PM PDT 24 |
Jul 09 07:53:57 PM PDT 24 |
2502419190 ps |
| T785 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.1578010357 |
|
|
Jul 09 08:13:29 PM PDT 24 |
Jul 09 08:24:52 PM PDT 24 |
4557196680 ps |
| T1102 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.1489685152 |
|
|
Jul 09 08:01:46 PM PDT 24 |
Jul 09 08:09:21 PM PDT 24 |
3977106908 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.3759939254 |
|
|
Jul 09 07:57:15 PM PDT 24 |
Jul 09 08:00:35 PM PDT 24 |
2825706540 ps |
| T1104 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.148474119 |
|
|
Jul 09 08:13:20 PM PDT 24 |
Jul 09 08:36:34 PM PDT 24 |
13530454600 ps |
| T1105 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2697953174 |
|
|
Jul 09 08:16:37 PM PDT 24 |
Jul 09 08:34:02 PM PDT 24 |
10620277347 ps |
| T804 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.2851532116 |
|
|
Jul 09 08:21:25 PM PDT 24 |
Jul 09 08:31:38 PM PDT 24 |
5248787376 ps |
| T1106 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.767947360 |
|
|
Jul 09 08:19:09 PM PDT 24 |
Jul 09 08:39:17 PM PDT 24 |
12101725692 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.3148035585 |
|
|
Jul 09 08:05:20 PM PDT 24 |
Jul 09 08:10:37 PM PDT 24 |
3124079328 ps |
| T1108 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2700013320 |
|
|
Jul 09 07:52:35 PM PDT 24 |
Jul 09 07:58:09 PM PDT 24 |
3189527650 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.36986847 |
|
|
Jul 09 07:50:41 PM PDT 24 |
Jul 09 07:53:25 PM PDT 24 |
2781791070 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.394748638 |
|
|
Jul 09 07:50:13 PM PDT 24 |
Jul 09 11:00:11 PM PDT 24 |
59970910818 ps |
| T282 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2785375832 |
|
|
Jul 09 07:53:33 PM PDT 24 |
Jul 09 08:01:29 PM PDT 24 |
5071182707 ps |
| T1111 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.893374085 |
|
|
Jul 09 07:59:39 PM PDT 24 |
Jul 09 08:09:22 PM PDT 24 |
5342479064 ps |
| T798 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.26368941 |
|
|
Jul 09 07:48:33 PM PDT 24 |
Jul 09 07:59:35 PM PDT 24 |
5347932940 ps |
| T1112 |
/workspace/coverage/default/0.rom_e2e_smoke.3422233092 |
|
|
Jul 09 08:00:29 PM PDT 24 |
Jul 09 08:55:09 PM PDT 24 |
14374096520 ps |
| T1113 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.1315144582 |
|
|
Jul 09 07:59:04 PM PDT 24 |
Jul 09 08:10:18 PM PDT 24 |
8140617616 ps |
| T1114 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.3725851180 |
|
|
Jul 09 08:06:54 PM PDT 24 |
Jul 09 09:01:18 PM PDT 24 |
14745182836 ps |
| T1115 |
/workspace/coverage/default/4.chip_tap_straps_prod.459466839 |
|
|
Jul 09 08:13:20 PM PDT 24 |
Jul 09 08:16:53 PM PDT 24 |
2467100038 ps |
| T1116 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3419701889 |
|
|
Jul 09 07:57:20 PM PDT 24 |
Jul 09 09:02:17 PM PDT 24 |
15324087656 ps |
| T236 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.1872331111 |
|
|
Jul 09 07:57:17 PM PDT 24 |
Jul 09 08:06:25 PM PDT 24 |
4736873442 ps |
| T1117 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2197540505 |
|
|
Jul 09 07:51:33 PM PDT 24 |
Jul 09 08:04:56 PM PDT 24 |
4281781966 ps |
| T1118 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2981972957 |
|
|
Jul 09 08:15:41 PM PDT 24 |
Jul 09 08:28:55 PM PDT 24 |
4303797304 ps |
| T1119 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1948113815 |
|
|
Jul 09 07:59:30 PM PDT 24 |
Jul 09 08:25:01 PM PDT 24 |
8056471472 ps |
| T1120 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.500949844 |
|
|
Jul 09 08:04:52 PM PDT 24 |
Jul 09 11:55:35 PM PDT 24 |
78711675388 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.660583444 |
|
|
Jul 09 07:50:45 PM PDT 24 |
Jul 09 08:51:35 PM PDT 24 |
16795601720 ps |
| T1122 |
/workspace/coverage/default/1.chip_sw_aes_enc.4114424784 |
|
|
Jul 09 08:05:30 PM PDT 24 |
Jul 09 08:08:52 PM PDT 24 |
2664316780 ps |
| T1123 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.1651284423 |
|
|
Jul 09 08:12:46 PM PDT 24 |
Jul 09 08:22:10 PM PDT 24 |
4388272362 ps |
| T791 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.3846169519 |
|
|
Jul 09 08:23:58 PM PDT 24 |
Jul 09 08:33:17 PM PDT 24 |
4682059468 ps |
| T1124 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1126800071 |
|
|
Jul 09 08:15:43 PM PDT 24 |
Jul 09 08:26:15 PM PDT 24 |
3809104612 ps |
| T1125 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.1573135480 |
|
|
Jul 09 08:16:40 PM PDT 24 |
Jul 09 08:52:58 PM PDT 24 |
24740026455 ps |
| T1126 |
/workspace/coverage/default/1.chip_sw_example_rom.3769486813 |
|
|
Jul 09 07:53:54 PM PDT 24 |
Jul 09 07:55:42 PM PDT 24 |
2503053102 ps |
| T283 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1197805132 |
|
|
Jul 09 08:24:13 PM PDT 24 |
Jul 09 08:33:15 PM PDT 24 |
5848046008 ps |
| T1127 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.3115639197 |
|
|
Jul 09 07:55:02 PM PDT 24 |
Jul 09 08:08:09 PM PDT 24 |
8164781380 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.3993359479 |
|
|
Jul 09 07:52:42 PM PDT 24 |
Jul 09 08:01:47 PM PDT 24 |
6096167080 ps |
| T101 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1522323533 |
|
|
Jul 09 08:22:14 PM PDT 24 |
Jul 09 08:33:59 PM PDT 24 |
4984977336 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.1343004241 |
|
|
Jul 09 07:51:34 PM PDT 24 |
Jul 09 07:57:03 PM PDT 24 |
4084250769 ps |
| T756 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3776970348 |
|
|
Jul 09 08:21:18 PM PDT 24 |
Jul 09 08:30:27 PM PDT 24 |
4462634164 ps |
| T1130 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2365943516 |
|
|
Jul 09 07:58:06 PM PDT 24 |
Jul 09 08:09:22 PM PDT 24 |
4082355656 ps |
| T1131 |
/workspace/coverage/default/4.chip_tap_straps_dev.2588416948 |
|
|
Jul 09 08:11:56 PM PDT 24 |
Jul 09 08:14:57 PM PDT 24 |
3637880102 ps |
| T1132 |
/workspace/coverage/default/0.chip_sw_example_rom.1056691316 |
|
|
Jul 09 07:48:04 PM PDT 24 |
Jul 09 07:50:29 PM PDT 24 |
2267369260 ps |
| T1133 |
/workspace/coverage/default/1.chip_sw_kmac_idle.2489119898 |
|
|
Jul 09 08:00:38 PM PDT 24 |
Jul 09 08:05:17 PM PDT 24 |
3164207418 ps |
| T1134 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1759794574 |
|
|
Jul 09 08:15:45 PM PDT 24 |
Jul 09 08:22:38 PM PDT 24 |
4265031277 ps |
| T1135 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.224607360 |
|
|
Jul 09 08:20:47 PM PDT 24 |
Jul 09 08:31:19 PM PDT 24 |
5004239162 ps |
| T1136 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.2644807102 |
|
|
Jul 09 07:51:16 PM PDT 24 |
Jul 09 08:00:16 PM PDT 24 |
4853064758 ps |
| T762 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.2507724556 |
|
|
Jul 09 08:23:57 PM PDT 24 |
Jul 09 08:33:58 PM PDT 24 |
5084927552 ps |
| T238 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.83537448 |
|
|
Jul 09 08:14:11 PM PDT 24 |
Jul 09 08:40:41 PM PDT 24 |
19432030741 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.240136620 |
|
|
Jul 09 08:10:01 PM PDT 24 |
Jul 09 08:18:44 PM PDT 24 |
3440305102 ps |
| T760 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.163168894 |
|
|
Jul 09 08:22:28 PM PDT 24 |
Jul 09 08:31:55 PM PDT 24 |
5232649676 ps |
| T1138 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1038146120 |
|
|
Jul 09 07:52:18 PM PDT 24 |
Jul 09 08:15:18 PM PDT 24 |
7908114662 ps |
| T1139 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.2739415358 |
|
|
Jul 09 08:04:14 PM PDT 24 |
Jul 09 08:12:33 PM PDT 24 |
5258115204 ps |
| T1140 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.2946697642 |
|
|
Jul 09 08:15:43 PM PDT 24 |
Jul 09 08:36:43 PM PDT 24 |
8377316020 ps |
| T1141 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.2873214599 |
|
|
Jul 09 08:04:30 PM PDT 24 |
Jul 09 08:09:00 PM PDT 24 |
3266070016 ps |
| T1142 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.3689100899 |
|
|
Jul 09 08:14:54 PM PDT 24 |
Jul 09 08:56:40 PM PDT 24 |
10454541268 ps |
| T808 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.817554342 |
|
|
Jul 09 08:21:00 PM PDT 24 |
Jul 09 08:31:44 PM PDT 24 |
5703068178 ps |
| T77 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.966936020 |
|
|
Jul 09 07:49:17 PM PDT 24 |
Jul 09 09:38:40 PM PDT 24 |
32007264496 ps |
| T694 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.2763371921 |
|
|
Jul 09 08:02:35 PM PDT 24 |
Jul 09 08:09:29 PM PDT 24 |
4660129510 ps |
| T420 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.1255179438 |
|
|
Jul 09 07:52:36 PM PDT 24 |
Jul 09 08:34:52 PM PDT 24 |
24677535300 ps |
| T1143 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3647347546 |
|
|
Jul 09 08:16:29 PM PDT 24 |
Jul 09 08:30:40 PM PDT 24 |
4065926216 ps |
| T1144 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.4253617218 |
|
|
Jul 09 07:59:57 PM PDT 24 |
Jul 09 08:08:27 PM PDT 24 |
4819999320 ps |
| T1145 |
/workspace/coverage/default/2.rom_e2e_static_critical.4154965321 |
|
|
Jul 09 08:22:09 PM PDT 24 |
Jul 09 09:34:34 PM PDT 24 |
16930606400 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.1833599175 |
|
|
Jul 09 07:57:47 PM PDT 24 |
Jul 09 08:15:03 PM PDT 24 |
4380822126 ps |
| T12 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1795337075 |
|
|
Jul 09 08:05:01 PM PDT 24 |
Jul 09 08:12:28 PM PDT 24 |
6218617452 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2323289016 |
|
|
Jul 09 07:54:39 PM PDT 24 |
Jul 09 07:59:22 PM PDT 24 |
3353427562 ps |
| T75 |
/workspace/coverage/default/0.chip_tap_straps_rma.4127728586 |
|
|
Jul 09 07:53:03 PM PDT 24 |
Jul 09 08:04:56 PM PDT 24 |
8222511225 ps |
| T1147 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.2494336359 |
|
|
Jul 09 08:16:41 PM PDT 24 |
Jul 09 08:25:27 PM PDT 24 |
3440334372 ps |
| T1148 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.1361277629 |
|
|
Jul 09 07:59:58 PM PDT 24 |
Jul 09 08:09:42 PM PDT 24 |
4547561240 ps |
| T1149 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.876780518 |
|
|
Jul 09 07:50:55 PM PDT 24 |
Jul 09 07:54:35 PM PDT 24 |
2662596392 ps |
| T1150 |
/workspace/coverage/default/0.chip_sw_kmac_idle.1772857073 |
|
|
Jul 09 07:51:19 PM PDT 24 |
Jul 09 07:55:50 PM PDT 24 |
2562595034 ps |
| T1151 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.994573412 |
|
|
Jul 09 08:04:47 PM PDT 24 |
Jul 09 08:13:26 PM PDT 24 |
5847797476 ps |
| T1152 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.1997751871 |
|
|
Jul 09 07:53:14 PM PDT 24 |
Jul 09 08:13:16 PM PDT 24 |
8531425224 ps |
| T774 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.4190559308 |
|
|
Jul 09 08:19:58 PM PDT 24 |
Jul 09 08:33:02 PM PDT 24 |
5358757704 ps |
| T786 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.2836746899 |
|
|
Jul 09 08:20:48 PM PDT 24 |
Jul 09 08:30:37 PM PDT 24 |
4842242136 ps |
| T1153 |
/workspace/coverage/default/1.chip_sw_power_idle_load.4214312384 |
|
|
Jul 09 08:04:00 PM PDT 24 |
Jul 09 08:16:08 PM PDT 24 |
4772683944 ps |
| T1154 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.3911304522 |
|
|
Jul 09 08:06:37 PM PDT 24 |
Jul 09 09:03:53 PM PDT 24 |
15026880942 ps |
| T767 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.192511411 |
|
|
Jul 09 08:13:28 PM PDT 24 |
Jul 09 08:21:53 PM PDT 24 |
4193687788 ps |
| T1155 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.374692473 |
|
|
Jul 09 08:03:42 PM PDT 24 |
Jul 09 08:10:41 PM PDT 24 |
2906964600 ps |
| T1156 |
/workspace/coverage/default/0.chip_sw_flash_init.3592979479 |
|
|
Jul 09 07:49:23 PM PDT 24 |
Jul 09 08:23:00 PM PDT 24 |
20116701854 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.4187463781 |
|
|
Jul 09 08:12:19 PM PDT 24 |
Jul 09 09:48:20 PM PDT 24 |
45867451040 ps |
| T1157 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.970319957 |
|
|
Jul 09 07:48:53 PM PDT 24 |
Jul 09 08:00:11 PM PDT 24 |
3920588120 ps |
| T1158 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.3235617250 |
|
|
Jul 09 08:13:16 PM PDT 24 |
Jul 09 09:44:46 PM PDT 24 |
46326821584 ps |
| T203 |
/workspace/coverage/default/2.chip_jtag_mem_access.473374514 |
|
|
Jul 09 08:06:16 PM PDT 24 |
Jul 09 08:34:38 PM PDT 24 |
13644923986 ps |
| T809 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.1440097253 |
|
|
Jul 09 08:19:04 PM PDT 24 |
Jul 09 08:29:54 PM PDT 24 |
5056243300 ps |
| T1159 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.312353283 |
|
|
Jul 09 07:51:19 PM PDT 24 |
Jul 09 08:00:27 PM PDT 24 |
5116772504 ps |
| T1160 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2085759979 |
|
|
Jul 09 07:52:29 PM PDT 24 |
Jul 09 08:17:44 PM PDT 24 |
10782209154 ps |