| T793 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.2346604786 |
|
|
Jul 09 08:18:31 PM PDT 24 |
Jul 09 08:28:07 PM PDT 24 |
4599347200 ps |
| T1161 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.4294245409 |
|
|
Jul 09 08:13:43 PM PDT 24 |
Jul 09 08:37:25 PM PDT 24 |
13520875672 ps |
| T718 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.702801571 |
|
|
Jul 09 08:20:56 PM PDT 24 |
Jul 09 08:32:36 PM PDT 24 |
4374324570 ps |
| T200 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.487289244 |
|
|
Jul 09 07:52:33 PM PDT 24 |
Jul 09 08:08:55 PM PDT 24 |
7765854218 ps |
| T1162 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.2495266236 |
|
|
Jul 09 07:52:56 PM PDT 24 |
Jul 09 07:57:45 PM PDT 24 |
3000145636 ps |
| T1163 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1392686997 |
|
|
Jul 09 07:51:48 PM PDT 24 |
Jul 09 08:04:12 PM PDT 24 |
7379349576 ps |
| T1164 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4204436284 |
|
|
Jul 09 08:22:47 PM PDT 24 |
Jul 09 09:18:58 PM PDT 24 |
15493806092 ps |
| T312 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3527976504 |
|
|
Jul 09 07:56:45 PM PDT 24 |
Jul 09 08:31:39 PM PDT 24 |
14245017680 ps |
| T1165 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3778688314 |
|
|
Jul 09 07:52:46 PM PDT 24 |
Jul 09 07:59:00 PM PDT 24 |
3664914527 ps |
| T298 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.4586037 |
|
|
Jul 09 08:01:30 PM PDT 24 |
Jul 09 08:08:12 PM PDT 24 |
4849670450 ps |
| T1166 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1100518091 |
|
|
Jul 09 08:16:19 PM PDT 24 |
Jul 09 08:20:19 PM PDT 24 |
2495139552 ps |
| T157 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3708204917 |
|
|
Jul 09 08:00:05 PM PDT 24 |
Jul 09 08:11:37 PM PDT 24 |
4190234136 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.1553568898 |
|
|
Jul 09 07:49:34 PM PDT 24 |
Jul 09 08:00:36 PM PDT 24 |
4746201800 ps |
| T1167 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.2651469862 |
|
|
Jul 09 07:54:39 PM PDT 24 |
Jul 09 08:32:38 PM PDT 24 |
24439631396 ps |
| T360 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1946681152 |
|
|
Jul 09 08:16:09 PM PDT 24 |
Jul 09 08:23:23 PM PDT 24 |
5016815364 ps |
| T1168 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2616176609 |
|
|
Jul 09 08:18:52 PM PDT 24 |
Jul 09 08:29:05 PM PDT 24 |
6004809480 ps |
| T1169 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.764399694 |
|
|
Jul 09 07:53:15 PM PDT 24 |
Jul 09 08:59:37 PM PDT 24 |
25203007608 ps |
| T1170 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.644009112 |
|
|
Jul 09 08:02:28 PM PDT 24 |
Jul 09 08:07:50 PM PDT 24 |
3070645275 ps |
| T1171 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.502973619 |
|
|
Jul 09 08:24:46 PM PDT 24 |
Jul 09 08:33:58 PM PDT 24 |
6555255152 ps |
| T309 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2280664260 |
|
|
Jul 09 08:15:33 PM PDT 24 |
Jul 09 08:32:40 PM PDT 24 |
6626983680 ps |
| T1172 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.2342514940 |
|
|
Jul 09 07:49:27 PM PDT 24 |
Jul 09 08:07:29 PM PDT 24 |
7231187480 ps |
| T63 |
/workspace/coverage/default/0.chip_sw_alert_test.929186910 |
|
|
Jul 09 07:53:08 PM PDT 24 |
Jul 09 07:58:28 PM PDT 24 |
3204275760 ps |
| T1173 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.3688864508 |
|
|
Jul 09 07:50:54 PM PDT 24 |
Jul 09 08:01:25 PM PDT 24 |
6992580206 ps |
| T424 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1249676098 |
|
|
Jul 09 08:22:40 PM PDT 24 |
Jul 09 08:29:26 PM PDT 24 |
3503831100 ps |
| T1174 |
/workspace/coverage/default/1.chip_sw_hmac_enc.973566162 |
|
|
Jul 09 08:01:18 PM PDT 24 |
Jul 09 08:05:44 PM PDT 24 |
2680285632 ps |
| T1175 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.571787556 |
|
|
Jul 09 08:23:25 PM PDT 24 |
Jul 09 08:29:26 PM PDT 24 |
3188918990 ps |
| T1176 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.433646591 |
|
|
Jul 09 07:52:59 PM PDT 24 |
Jul 09 07:58:21 PM PDT 24 |
3551424476 ps |
| T69 |
/workspace/coverage/default/4.chip_tap_straps_rma.4049927454 |
|
|
Jul 09 08:16:23 PM PDT 24 |
Jul 09 08:18:41 PM PDT 24 |
2481308673 ps |
| T1177 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1433029409 |
|
|
Jul 09 08:17:44 PM PDT 24 |
Jul 09 08:36:35 PM PDT 24 |
9010574506 ps |
| T50 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.3775192004 |
|
|
Jul 09 08:05:01 PM PDT 24 |
Jul 09 08:11:17 PM PDT 24 |
3108538059 ps |
| T1178 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.642120243 |
|
|
Jul 09 08:00:47 PM PDT 24 |
Jul 09 08:25:33 PM PDT 24 |
9952362500 ps |
| T770 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.222181266 |
|
|
Jul 09 08:23:22 PM PDT 24 |
Jul 09 08:35:38 PM PDT 24 |
5488304982 ps |
| T752 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.978957043 |
|
|
Jul 09 08:21:09 PM PDT 24 |
Jul 09 08:26:52 PM PDT 24 |
4345393720 ps |
| T722 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.4074007366 |
|
|
Jul 09 08:26:07 PM PDT 24 |
Jul 09 08:33:05 PM PDT 24 |
3528191422 ps |
| T806 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.2130901050 |
|
|
Jul 09 08:22:51 PM PDT 24 |
Jul 09 08:32:48 PM PDT 24 |
6104217620 ps |
| T144 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.3561648300 |
|
|
Jul 09 08:15:33 PM PDT 24 |
Jul 09 08:46:51 PM PDT 24 |
14864434355 ps |
| T1179 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.3949022984 |
|
|
Jul 09 07:52:16 PM PDT 24 |
Jul 09 08:30:36 PM PDT 24 |
11700787040 ps |
| T407 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.779087560 |
|
|
Jul 09 07:52:30 PM PDT 24 |
Jul 09 08:20:28 PM PDT 24 |
23313539688 ps |
| T1180 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3475141627 |
|
|
Jul 09 07:52:17 PM PDT 24 |
Jul 09 07:57:42 PM PDT 24 |
3058898065 ps |
| T1181 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.491719157 |
|
|
Jul 09 08:06:37 PM PDT 24 |
Jul 09 09:04:19 PM PDT 24 |
24557480562 ps |
| T1182 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.321869099 |
|
|
Jul 09 08:23:32 PM PDT 24 |
Jul 09 09:31:01 PM PDT 24 |
14798303119 ps |
| T1183 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.2949602489 |
|
|
Jul 09 08:20:32 PM PDT 24 |
Jul 09 08:30:55 PM PDT 24 |
5026802648 ps |
| T1184 |
/workspace/coverage/default/0.chip_sw_aes_idle.1494052001 |
|
|
Jul 09 07:52:25 PM PDT 24 |
Jul 09 07:55:46 PM PDT 24 |
2239687016 ps |
| T1185 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.831173996 |
|
|
Jul 09 07:58:17 PM PDT 24 |
Jul 09 08:11:49 PM PDT 24 |
8091450850 ps |
| T1186 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.1005821509 |
|
|
Jul 09 07:57:46 PM PDT 24 |
Jul 09 08:09:13 PM PDT 24 |
8310807066 ps |
| T1187 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.1028300977 |
|
|
Jul 09 08:03:35 PM PDT 24 |
Jul 09 08:08:23 PM PDT 24 |
3141646895 ps |
| T1188 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.4054048168 |
|
|
Jul 09 07:58:46 PM PDT 24 |
Jul 09 08:02:23 PM PDT 24 |
3187298520 ps |
| T1189 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.1087981399 |
|
|
Jul 09 08:05:44 PM PDT 24 |
Jul 09 08:28:25 PM PDT 24 |
7036452404 ps |
| T1190 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.4233232754 |
|
|
Jul 09 07:54:22 PM PDT 24 |
Jul 09 08:15:11 PM PDT 24 |
7764243996 ps |
| T1191 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.3955082055 |
|
|
Jul 09 08:02:04 PM PDT 24 |
Jul 09 08:04:21 PM PDT 24 |
2483173772 ps |
| T1192 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.1463522285 |
|
|
Jul 09 08:14:49 PM PDT 24 |
Jul 09 08:23:25 PM PDT 24 |
8300186175 ps |
| T1193 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.4274768948 |
|
|
Jul 09 07:59:53 PM PDT 24 |
Jul 09 08:58:20 PM PDT 24 |
11815635364 ps |
| T1194 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.64208097 |
|
|
Jul 09 07:48:26 PM PDT 24 |
Jul 09 08:17:02 PM PDT 24 |
8245429313 ps |
| T1195 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.3374761923 |
|
|
Jul 09 08:15:25 PM PDT 24 |
Jul 09 08:30:10 PM PDT 24 |
7835176414 ps |
| T778 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.1932696740 |
|
|
Jul 09 08:19:03 PM PDT 24 |
Jul 09 08:30:41 PM PDT 24 |
5700223974 ps |
| T1196 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.1019932038 |
|
|
Jul 09 07:51:19 PM PDT 24 |
Jul 09 07:59:56 PM PDT 24 |
4264637300 ps |
| T1197 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.3942652343 |
|
|
Jul 09 07:49:10 PM PDT 24 |
Jul 09 07:52:52 PM PDT 24 |
2752663076 ps |
| T1198 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.239097772 |
|
|
Jul 09 07:51:18 PM PDT 24 |
Jul 09 08:30:16 PM PDT 24 |
26551389833 ps |
| T45 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.1258061918 |
|
|
Jul 09 07:48:54 PM PDT 24 |
Jul 09 07:53:46 PM PDT 24 |
3034258574 ps |
| T765 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2792328158 |
|
|
Jul 09 08:20:20 PM PDT 24 |
Jul 09 08:27:01 PM PDT 24 |
3188776500 ps |
| T1199 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.1398093585 |
|
|
Jul 09 08:20:00 PM PDT 24 |
Jul 09 08:30:51 PM PDT 24 |
5628361032 ps |
| T1200 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.1344684603 |
|
|
Jul 09 08:22:19 PM PDT 24 |
Jul 09 08:30:13 PM PDT 24 |
3897066832 ps |
| T310 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.1836802114 |
|
|
Jul 09 08:13:02 PM PDT 24 |
Jul 09 08:38:11 PM PDT 24 |
12628277704 ps |
| T1201 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2536829752 |
|
|
Jul 09 07:52:21 PM PDT 24 |
Jul 09 08:02:34 PM PDT 24 |
5230921040 ps |
| T1202 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.4089316471 |
|
|
Jul 09 08:13:58 PM PDT 24 |
Jul 09 08:17:58 PM PDT 24 |
2615443002 ps |
| T1203 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3168888488 |
|
|
Jul 09 07:59:24 PM PDT 24 |
Jul 09 08:35:20 PM PDT 24 |
9830058986 ps |
| T1204 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3885581075 |
|
|
Jul 09 07:53:21 PM PDT 24 |
Jul 09 08:13:46 PM PDT 24 |
10520320454 ps |
| T1205 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.4063654334 |
|
|
Jul 09 07:50:07 PM PDT 24 |
Jul 09 07:59:06 PM PDT 24 |
4227787460 ps |
| T1206 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1623841571 |
|
|
Jul 09 08:14:50 PM PDT 24 |
Jul 09 08:28:44 PM PDT 24 |
6068939444 ps |
| T1207 |
/workspace/coverage/default/1.chip_sw_flash_init.409260120 |
|
|
Jul 09 07:53:58 PM PDT 24 |
Jul 09 08:24:42 PM PDT 24 |
21266099572 ps |
| T1208 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.2341192080 |
|
|
Jul 09 08:27:23 PM PDT 24 |
Jul 09 08:33:25 PM PDT 24 |
4174643820 ps |
| T1209 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.2218372324 |
|
|
Jul 09 08:18:53 PM PDT 24 |
Jul 09 08:29:39 PM PDT 24 |
4600402272 ps |
| T1210 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1650389812 |
|
|
Jul 09 08:10:16 PM PDT 24 |
Jul 09 09:15:25 PM PDT 24 |
15687350172 ps |
| T1211 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.2961396729 |
|
|
Jul 09 08:27:53 PM PDT 24 |
Jul 09 08:37:07 PM PDT 24 |
5680174790 ps |
| T1212 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3527212075 |
|
|
Jul 09 08:16:33 PM PDT 24 |
Jul 09 08:34:34 PM PDT 24 |
7234288426 ps |
| T1213 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.4092195231 |
|
|
Jul 09 08:00:13 PM PDT 24 |
Jul 09 08:58:03 PM PDT 24 |
14908151560 ps |
| T507 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3308444528 |
|
|
Jul 09 08:05:38 PM PDT 24 |
Jul 09 08:20:06 PM PDT 24 |
5129339608 ps |
| T421 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.1269547092 |
|
|
Jul 09 07:54:19 PM PDT 24 |
Jul 09 08:42:05 PM PDT 24 |
24660121108 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.3856957681 |
|
|
Jul 09 07:59:49 PM PDT 24 |
Jul 09 08:30:13 PM PDT 24 |
7552635956 ps |
| T1214 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.2618505138 |
|
|
Jul 09 07:50:21 PM PDT 24 |
Jul 09 08:04:44 PM PDT 24 |
6365091906 ps |
| T1215 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2222796765 |
|
|
Jul 09 08:04:21 PM PDT 24 |
Jul 09 08:08:44 PM PDT 24 |
3486320768 ps |
| T790 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.1900487183 |
|
|
Jul 09 08:27:12 PM PDT 24 |
Jul 09 08:37:07 PM PDT 24 |
4677655306 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.2924982914 |
|
|
Jul 09 07:54:03 PM PDT 24 |
Jul 09 07:59:04 PM PDT 24 |
2515153616 ps |
| T1217 |
/workspace/coverage/default/0.chip_tap_straps_dev.1716308713 |
|
|
Jul 09 07:56:39 PM PDT 24 |
Jul 09 08:26:29 PM PDT 24 |
12683509196 ps |
| T1218 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.2157014780 |
|
|
Jul 09 08:16:46 PM PDT 24 |
Jul 09 09:04:30 PM PDT 24 |
13648017770 ps |
| T201 |
/workspace/coverage/default/0.chip_sw_power_virus.2690622382 |
|
|
Jul 09 07:57:32 PM PDT 24 |
Jul 09 08:20:31 PM PDT 24 |
4710192268 ps |
| T1219 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.454618771 |
|
|
Jul 09 07:58:05 PM PDT 24 |
Jul 09 08:05:17 PM PDT 24 |
5428068270 ps |
| T1220 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3568480048 |
|
|
Jul 09 07:56:29 PM PDT 24 |
Jul 09 08:19:17 PM PDT 24 |
10834239489 ps |
| T723 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2041579898 |
|
|
Jul 09 08:25:20 PM PDT 24 |
Jul 09 08:33:24 PM PDT 24 |
5536407524 ps |
| T1221 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.4070922705 |
|
|
Jul 09 08:05:03 PM PDT 24 |
Jul 09 08:12:56 PM PDT 24 |
4905687048 ps |
| T1222 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.664311066 |
|
|
Jul 09 07:53:03 PM PDT 24 |
Jul 09 08:05:38 PM PDT 24 |
4110323320 ps |
| T229 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.1155613190 |
|
|
Jul 09 08:14:57 PM PDT 24 |
Jul 09 09:09:10 PM PDT 24 |
12658919050 ps |
| T1223 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1408384440 |
|
|
Jul 09 07:59:37 PM PDT 24 |
Jul 09 09:37:03 PM PDT 24 |
24082941006 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1926358111 |
|
|
Jul 09 07:57:28 PM PDT 24 |
Jul 09 08:04:39 PM PDT 24 |
4219000214 ps |
| T78 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.2589854967 |
|
|
Jul 09 07:49:19 PM PDT 24 |
Jul 09 07:54:48 PM PDT 24 |
2520247688 ps |
| T1225 |
/workspace/coverage/default/0.rom_raw_unlock.3300422956 |
|
|
Jul 09 07:55:41 PM PDT 24 |
Jul 09 08:00:06 PM PDT 24 |
6159715052 ps |
| T1226 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.1041318529 |
|
|
Jul 09 07:56:06 PM PDT 24 |
Jul 09 08:07:08 PM PDT 24 |
5302700940 ps |
| T1227 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.310806291 |
|
|
Jul 09 08:07:20 PM PDT 24 |
Jul 09 08:58:32 PM PDT 24 |
15168976504 ps |
| T1228 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.1772258201 |
|
|
Jul 09 08:19:32 PM PDT 24 |
Jul 09 09:19:14 PM PDT 24 |
15594202474 ps |
| T1229 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.4031166085 |
|
|
Jul 09 07:53:06 PM PDT 24 |
Jul 09 08:16:45 PM PDT 24 |
9660943278 ps |
| T1230 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.3580769608 |
|
|
Jul 09 07:59:30 PM PDT 24 |
Jul 09 08:30:27 PM PDT 24 |
7334223650 ps |
| T1231 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2079530082 |
|
|
Jul 09 07:49:39 PM PDT 24 |
Jul 09 08:15:08 PM PDT 24 |
25580920745 ps |
| T1232 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.2355934487 |
|
|
Jul 09 08:11:55 PM PDT 24 |
Jul 09 08:18:27 PM PDT 24 |
5204321666 ps |
| T1233 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.2529823929 |
|
|
Jul 09 07:57:59 PM PDT 24 |
Jul 09 08:03:56 PM PDT 24 |
7419551790 ps |
| T1234 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.4044477153 |
|
|
Jul 09 07:52:27 PM PDT 24 |
Jul 09 08:01:33 PM PDT 24 |
3999695124 ps |
| T1235 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.62023167 |
|
|
Jul 09 07:57:25 PM PDT 24 |
Jul 09 08:58:49 PM PDT 24 |
15706307348 ps |
| T1236 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1736367747 |
|
|
Jul 09 07:57:53 PM PDT 24 |
Jul 09 08:08:12 PM PDT 24 |
3936701240 ps |
| T1237 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.3413768850 |
|
|
Jul 09 08:17:12 PM PDT 24 |
Jul 09 09:42:44 PM PDT 24 |
21424513380 ps |
| T1238 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.159277309 |
|
|
Jul 09 08:15:22 PM PDT 24 |
Jul 09 08:20:11 PM PDT 24 |
3526464634 ps |
| T715 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.776338487 |
|
|
Jul 09 08:23:08 PM PDT 24 |
Jul 09 08:28:46 PM PDT 24 |
4452288864 ps |
| T1239 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3097989786 |
|
|
Jul 09 07:50:54 PM PDT 24 |
Jul 09 07:57:23 PM PDT 24 |
3164444904 ps |
| T137 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3799745296 |
|
|
Jul 09 07:50:50 PM PDT 24 |
Jul 09 08:03:36 PM PDT 24 |
5593434118 ps |
| T1240 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.3069823040 |
|
|
Jul 09 08:22:24 PM PDT 24 |
Jul 09 08:35:06 PM PDT 24 |
6177948834 ps |
| T1241 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.780803965 |
|
|
Jul 09 07:57:46 PM PDT 24 |
Jul 09 08:57:48 PM PDT 24 |
14181903337 ps |
| T1242 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3652371977 |
|
|
Jul 09 08:05:07 PM PDT 24 |
Jul 09 09:31:30 PM PDT 24 |
44920320952 ps |
| T1243 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.3219627941 |
|
|
Jul 09 07:58:58 PM PDT 24 |
Jul 09 08:56:32 PM PDT 24 |
15811581461 ps |
| T1244 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.2115963097 |
|
|
Jul 09 08:00:39 PM PDT 24 |
Jul 09 09:03:55 PM PDT 24 |
14370180632 ps |
| T1245 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.3982698142 |
|
|
Jul 09 08:00:58 PM PDT 24 |
Jul 09 09:46:01 PM PDT 24 |
50049043785 ps |
| T1246 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.1410797235 |
|
|
Jul 09 07:50:15 PM PDT 24 |
Jul 09 07:56:50 PM PDT 24 |
4695054898 ps |
| T308 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.775284991 |
|
|
Jul 09 07:52:18 PM PDT 24 |
Jul 09 08:07:10 PM PDT 24 |
5113812752 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.3901271425 |
|
|
Jul 09 07:51:07 PM PDT 24 |
Jul 09 07:59:40 PM PDT 24 |
3935487008 ps |
| T1248 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.1875150147 |
|
|
Jul 09 07:59:18 PM PDT 24 |
Jul 09 08:10:55 PM PDT 24 |
4607475878 ps |
| T1249 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.1907313638 |
|
|
Jul 09 08:04:37 PM PDT 24 |
Jul 09 08:28:38 PM PDT 24 |
8188238520 ps |
| T1250 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.2531435838 |
|
|
Jul 09 08:03:49 PM PDT 24 |
Jul 09 08:17:08 PM PDT 24 |
6957973690 ps |
| T1251 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.3248429279 |
|
|
Jul 09 07:49:03 PM PDT 24 |
Jul 09 08:38:23 PM PDT 24 |
12224301628 ps |
| T1252 |
/workspace/coverage/default/1.rom_keymgr_functest.625890786 |
|
|
Jul 09 08:03:55 PM PDT 24 |
Jul 09 08:09:01 PM PDT 24 |
4716089960 ps |
| T1253 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.339769007 |
|
|
Jul 09 07:52:37 PM PDT 24 |
Jul 09 08:02:35 PM PDT 24 |
3987098700 ps |
| T39 |
/workspace/coverage/default/1.chip_sw_gpio.2585496211 |
|
|
Jul 09 07:54:56 PM PDT 24 |
Jul 09 08:01:42 PM PDT 24 |
3737683892 ps |
| T320 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.1233481871 |
|
|
Jul 09 08:15:19 PM PDT 24 |
Jul 09 08:23:35 PM PDT 24 |
3661109680 ps |
| T1254 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.1407287551 |
|
|
Jul 09 07:57:25 PM PDT 24 |
Jul 09 09:04:52 PM PDT 24 |
14622159360 ps |
| T1255 |
/workspace/coverage/default/3.chip_tap_straps_rma.2542215192 |
|
|
Jul 09 08:14:08 PM PDT 24 |
Jul 09 08:20:00 PM PDT 24 |
4373643202 ps |
| T779 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.122025592 |
|
|
Jul 09 08:20:29 PM PDT 24 |
Jul 09 08:28:40 PM PDT 24 |
4294704632 ps |
| T1256 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1414820265 |
|
|
Jul 09 08:13:54 PM PDT 24 |
Jul 09 08:17:44 PM PDT 24 |
2513908030 ps |
| T1257 |
/workspace/coverage/default/0.chip_sw_example_concurrency.4174236984 |
|
|
Jul 09 07:51:02 PM PDT 24 |
Jul 09 07:55:35 PM PDT 24 |
3392822550 ps |
| T1258 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.4069926979 |
|
|
Jul 09 08:18:49 PM PDT 24 |
Jul 09 08:24:25 PM PDT 24 |
3091652002 ps |
| T334 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.476509742 |
|
|
Jul 09 07:48:49 PM PDT 24 |
Jul 09 07:59:12 PM PDT 24 |
4279534963 ps |
| T1259 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.1794582646 |
|
|
Jul 09 07:56:53 PM PDT 24 |
Jul 09 08:21:37 PM PDT 24 |
7697924064 ps |
| T1260 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.644876136 |
|
|
Jul 09 07:55:27 PM PDT 24 |
Jul 09 08:11:25 PM PDT 24 |
5890582232 ps |
| T1261 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.1212240487 |
|
|
Jul 09 08:03:28 PM PDT 24 |
Jul 09 08:08:45 PM PDT 24 |
3007404350 ps |
| T1262 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1792352815 |
|
|
Jul 09 07:53:33 PM PDT 24 |
Jul 09 08:12:05 PM PDT 24 |
7899349998 ps |
| T1263 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.904031447 |
|
|
Jul 09 07:57:22 PM PDT 24 |
Jul 09 08:01:38 PM PDT 24 |
2403629156 ps |
| T1264 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.2156385793 |
|
|
Jul 09 07:57:38 PM PDT 24 |
Jul 09 09:00:46 PM PDT 24 |
15334734684 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.1617283590 |
|
|
Jul 09 07:59:19 PM PDT 24 |
Jul 09 08:04:40 PM PDT 24 |
2604987455 ps |
| T1266 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3724976976 |
|
|
Jul 09 08:16:28 PM PDT 24 |
Jul 09 08:33:43 PM PDT 24 |
6937183974 ps |
| T1267 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.4054210138 |
|
|
Jul 09 08:06:18 PM PDT 24 |
Jul 09 09:17:17 PM PDT 24 |
14891146696 ps |
| T1268 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.1873050464 |
|
|
Jul 09 07:59:12 PM PDT 24 |
Jul 09 08:03:38 PM PDT 24 |
3264321012 ps |
| T1269 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.1619590639 |
|
|
Jul 09 08:12:53 PM PDT 24 |
Jul 09 08:15:36 PM PDT 24 |
2858887845 ps |
| T1270 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.3960665404 |
|
|
Jul 09 08:04:18 PM PDT 24 |
Jul 09 08:08:08 PM PDT 24 |
3405833024 ps |
| T1271 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.297753160 |
|
|
Jul 09 08:21:01 PM PDT 24 |
Jul 09 09:11:12 PM PDT 24 |
26894053384 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2785796108 |
|
|
Jul 09 07:51:34 PM PDT 24 |
Jul 09 08:03:01 PM PDT 24 |
3574365474 ps |
| T1273 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.299908546 |
|
|
Jul 09 08:02:23 PM PDT 24 |
Jul 09 08:24:59 PM PDT 24 |
9047610496 ps |
| T269 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.2822714077 |
|
|
Jul 09 08:05:14 PM PDT 24 |
Jul 09 08:19:22 PM PDT 24 |
4984318096 ps |
| T1274 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.1705070698 |
|
|
Jul 09 07:56:21 PM PDT 24 |
Jul 09 08:16:10 PM PDT 24 |
9883710832 ps |
| T1275 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.2105489094 |
|
|
Jul 09 08:04:35 PM PDT 24 |
Jul 09 08:16:19 PM PDT 24 |
4129121159 ps |
| T270 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.1287634206 |
|
|
Jul 09 07:57:02 PM PDT 24 |
Jul 09 08:08:26 PM PDT 24 |
5496699914 ps |
| T284 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.4096851051 |
|
|
Jul 09 08:19:59 PM PDT 24 |
Jul 09 08:27:56 PM PDT 24 |
4428738402 ps |
| T1276 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.3339132306 |
|
|
Jul 09 08:23:36 PM PDT 24 |
Jul 09 09:26:45 PM PDT 24 |
14827003074 ps |
| T79 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.1343916525 |
|
|
Jul 09 07:50:39 PM PDT 24 |
Jul 09 07:58:30 PM PDT 24 |
3181209520 ps |
| T1277 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2180277148 |
|
|
Jul 09 08:20:40 PM PDT 24 |
Jul 09 08:34:08 PM PDT 24 |
4818722030 ps |
| T1278 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1032676572 |
|
|
Jul 09 08:19:34 PM PDT 24 |
Jul 09 09:16:37 PM PDT 24 |
15218387416 ps |
| T1279 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2086249573 |
|
|
Jul 09 08:17:42 PM PDT 24 |
Jul 09 08:28:47 PM PDT 24 |
4487127296 ps |
| T1280 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.945117125 |
|
|
Jul 09 08:19:42 PM PDT 24 |
Jul 09 08:23:27 PM PDT 24 |
2464808496 ps |
| T706 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.550458815 |
|
|
Jul 09 07:50:56 PM PDT 24 |
Jul 09 08:05:53 PM PDT 24 |
4931453554 ps |
| T1281 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.278756494 |
|
|
Jul 09 08:09:20 PM PDT 24 |
Jul 09 08:26:20 PM PDT 24 |
6186125398 ps |
| T1282 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3298500224 |
|
|
Jul 09 08:05:58 PM PDT 24 |
Jul 09 08:17:12 PM PDT 24 |
4311856920 ps |
| T1283 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.691294583 |
|
|
Jul 09 08:14:23 PM PDT 24 |
Jul 09 09:05:32 PM PDT 24 |
28529892122 ps |
| T1284 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.4078307358 |
|
|
Jul 09 08:07:32 PM PDT 24 |
Jul 09 08:49:27 PM PDT 24 |
11562760008 ps |
| T1285 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.2841007934 |
|
|
Jul 09 07:51:28 PM PDT 24 |
Jul 09 09:15:24 PM PDT 24 |
27403740000 ps |
| T1286 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.252314263 |
|
|
Jul 09 07:59:04 PM PDT 24 |
Jul 09 08:08:22 PM PDT 24 |
4286872836 ps |
| T1287 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.1230809977 |
|
|
Jul 09 08:18:50 PM PDT 24 |
Jul 09 08:31:36 PM PDT 24 |
4748701096 ps |
| T259 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.1340428465 |
|
|
Jul 09 08:21:33 PM PDT 24 |
Jul 09 08:31:19 PM PDT 24 |
4700940350 ps |
| T1288 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3615900740 |
|
|
Jul 09 07:50:38 PM PDT 24 |
Jul 09 07:59:27 PM PDT 24 |
7405334892 ps |
| T1289 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.2739070202 |
|
|
Jul 09 08:15:17 PM PDT 24 |
Jul 09 08:22:35 PM PDT 24 |
4974334725 ps |
| T1290 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.2677936531 |
|
|
Jul 09 08:12:09 PM PDT 24 |
Jul 09 08:28:22 PM PDT 24 |
10041780105 ps |
| T753 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.3328594002 |
|
|
Jul 09 08:24:02 PM PDT 24 |
Jul 09 08:35:23 PM PDT 24 |
5935034840 ps |
| T1291 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.3460486 |
|
|
Jul 09 08:12:51 PM PDT 24 |
Jul 09 08:27:37 PM PDT 24 |
5990082632 ps |
| T271 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.435239748 |
|
|
Jul 09 08:13:42 PM PDT 24 |
Jul 09 08:24:15 PM PDT 24 |
4727989050 ps |
| T1292 |
/workspace/coverage/default/3.chip_tap_straps_prod.3666161386 |
|
|
Jul 09 08:18:03 PM PDT 24 |
Jul 09 08:32:12 PM PDT 24 |
9515652980 ps |
| T1293 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.1383766526 |
|
|
Jul 09 08:24:12 PM PDT 24 |
Jul 09 08:29:34 PM PDT 24 |
4193307840 ps |
| T1294 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.1854879955 |
|
|
Jul 09 08:14:53 PM PDT 24 |
Jul 09 08:40:11 PM PDT 24 |
7889149328 ps |
| T1295 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.4166032528 |
|
|
Jul 09 08:18:32 PM PDT 24 |
Jul 09 08:40:28 PM PDT 24 |
9308427344 ps |
| T1296 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1812964370 |
|
|
Jul 09 07:53:13 PM PDT 24 |
Jul 09 07:58:42 PM PDT 24 |
4161285206 ps |
| T1297 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.1951134841 |
|
|
Jul 09 08:13:10 PM PDT 24 |
Jul 09 08:20:19 PM PDT 24 |
4912953094 ps |
| T1298 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.3472439593 |
|
|
Jul 09 08:15:24 PM PDT 24 |
Jul 09 08:22:25 PM PDT 24 |
5392285152 ps |
| T1299 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.1732442398 |
|
|
Jul 09 07:53:49 PM PDT 24 |
Jul 09 07:58:12 PM PDT 24 |
3607571390 ps |
| T1300 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.2580398716 |
|
|
Jul 09 07:58:52 PM PDT 24 |
Jul 09 08:05:09 PM PDT 24 |
4600414134 ps |
| T1301 |
/workspace/coverage/default/1.chip_sw_example_flash.617363383 |
|
|
Jul 09 07:56:11 PM PDT 24 |
Jul 09 07:59:28 PM PDT 24 |
2981420272 ps |
| T1302 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3500366461 |
|
|
Jul 09 07:53:06 PM PDT 24 |
Jul 09 08:12:29 PM PDT 24 |
8772941709 ps |
| T792 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2829461320 |
|
|
Jul 09 08:21:05 PM PDT 24 |
Jul 09 08:28:51 PM PDT 24 |
3673421016 ps |
| T755 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.1344169788 |
|
|
Jul 09 08:21:42 PM PDT 24 |
Jul 09 08:27:40 PM PDT 24 |
3721879848 ps |
| T1303 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.2027551187 |
|
|
Jul 09 08:04:46 PM PDT 24 |
Jul 09 08:16:21 PM PDT 24 |
4185554750 ps |
| T1304 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.4056946069 |
|
|
Jul 09 07:51:14 PM PDT 24 |
Jul 09 08:01:26 PM PDT 24 |
4567703832 ps |
| T1305 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.455451179 |
|
|
Jul 09 07:55:18 PM PDT 24 |
Jul 09 07:59:32 PM PDT 24 |
3343438584 ps |
| T314 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.4165840272 |
|
|
Jul 09 08:16:01 PM PDT 24 |
Jul 09 08:51:14 PM PDT 24 |
8191929790 ps |
| T376 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.344703005 |
|
|
Jul 09 08:16:44 PM PDT 24 |
Jul 09 08:18:57 PM PDT 24 |
1849695600 ps |
| T1306 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.2760585935 |
|
|
Jul 09 07:56:55 PM PDT 24 |
Jul 09 08:09:11 PM PDT 24 |
6149965494 ps |
| T1307 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.4250749114 |
|
|
Jul 09 08:01:13 PM PDT 24 |
Jul 09 09:10:10 PM PDT 24 |
15321156140 ps |
| T294 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.2738642720 |
|
|
Jul 09 08:15:25 PM PDT 24 |
Jul 09 08:21:06 PM PDT 24 |
2858253792 ps |
| T1308 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.4020643465 |
|
|
Jul 09 08:13:22 PM PDT 24 |
Jul 09 11:32:14 PM PDT 24 |
255625952160 ps |
| T1309 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.555368939 |
|
|
Jul 09 08:21:42 PM PDT 24 |
Jul 09 08:29:50 PM PDT 24 |
3086058840 ps |
| T1310 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.904767074 |
|
|
Jul 09 08:02:53 PM PDT 24 |
Jul 09 09:03:08 PM PDT 24 |
15223841264 ps |
| T1311 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1676991374 |
|
|
Jul 09 07:58:56 PM PDT 24 |
Jul 09 08:40:29 PM PDT 24 |
20440076175 ps |
| T1312 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.1225028637 |
|
|
Jul 09 07:49:15 PM PDT 24 |
Jul 09 07:53:50 PM PDT 24 |
3617046744 ps |
| T102 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.4016695297 |
|
|
Jul 09 08:21:22 PM PDT 24 |
Jul 09 08:27:16 PM PDT 24 |
3956221996 ps |
| T1313 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.3679336517 |
|
|
Jul 09 08:21:43 PM PDT 24 |
Jul 09 08:32:08 PM PDT 24 |
4932906222 ps |
| T1314 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.4014407002 |
|
|
Jul 09 08:23:45 PM PDT 24 |
Jul 09 08:29:42 PM PDT 24 |
3852173260 ps |
| T1315 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.3083757815 |
|
|
Jul 09 07:54:12 PM PDT 24 |
Jul 09 08:04:27 PM PDT 24 |
4725700871 ps |
| T1316 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.1852403076 |
|
|
Jul 09 08:06:34 PM PDT 24 |
Jul 09 08:11:02 PM PDT 24 |
2897601940 ps |
| T1317 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.4273397091 |
|
|
Jul 09 07:58:30 PM PDT 24 |
Jul 09 08:45:38 PM PDT 24 |
13362534743 ps |
| T138 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.1022357113 |
|
|
Jul 09 08:23:20 PM PDT 24 |
Jul 09 08:33:12 PM PDT 24 |
4683014104 ps |
| T1318 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.56520245 |
|
|
Jul 09 07:49:44 PM PDT 24 |
Jul 09 07:53:11 PM PDT 24 |
2587855280 ps |
| T315 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.2189987428 |
|
|
Jul 09 07:53:16 PM PDT 24 |
Jul 09 08:28:43 PM PDT 24 |
8523047240 ps |
| T1319 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1262418006 |
|
|
Jul 09 07:55:00 PM PDT 24 |
Jul 09 07:56:46 PM PDT 24 |
2405254132 ps |
| T1320 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.2349469666 |
|
|
Jul 09 08:16:58 PM PDT 24 |
Jul 09 08:36:49 PM PDT 24 |
6804058788 ps |
| T1321 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.1900732069 |
|
|
Jul 09 08:19:46 PM PDT 24 |
Jul 09 08:24:27 PM PDT 24 |
2732340076 ps |
| T1322 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1404574913 |
|
|
Jul 09 07:52:31 PM PDT 24 |
Jul 09 08:10:07 PM PDT 24 |
5098151976 ps |
| T1323 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.1481698963 |
|
|
Jul 09 08:24:12 PM PDT 24 |
Jul 09 08:31:41 PM PDT 24 |
3710674212 ps |
| T1324 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.1029572709 |
|
|
Jul 09 07:55:42 PM PDT 24 |
Jul 09 08:02:07 PM PDT 24 |
3457342428 ps |
| T1325 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1636643253 |
|
|
Jul 09 08:04:02 PM PDT 24 |
Jul 09 11:08:39 PM PDT 24 |
58239571917 ps |
| T1326 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.1912227527 |
|
|
Jul 09 07:58:53 PM PDT 24 |
Jul 09 09:04:38 PM PDT 24 |
15980598350 ps |
| T1327 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.1535489503 |
|
|
Jul 09 07:54:29 PM PDT 24 |
Jul 09 08:05:45 PM PDT 24 |
6648283400 ps |
| T1328 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.2964541807 |
|
|
Jul 09 08:23:21 PM PDT 24 |
Jul 09 08:30:38 PM PDT 24 |
4079693840 ps |
| T64 |
/workspace/coverage/default/1.chip_sw_alert_test.129850964 |
|
|
Jul 09 08:05:43 PM PDT 24 |
Jul 09 08:10:30 PM PDT 24 |
3025704348 ps |
| T1329 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.4087600143 |
|
|
Jul 09 08:16:45 PM PDT 24 |
Jul 09 08:21:51 PM PDT 24 |
2984476800 ps |
| T1330 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.4275086453 |
|
|
Jul 09 07:52:56 PM PDT 24 |
Jul 09 08:27:19 PM PDT 24 |
11338702128 ps |
| T1331 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.12923325 |
|
|
Jul 09 07:52:47 PM PDT 24 |
Jul 09 07:57:27 PM PDT 24 |
3211470536 ps |
| T775 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3634166454 |
|
|
Jul 09 08:25:47 PM PDT 24 |
Jul 09 08:32:51 PM PDT 24 |
3849789118 ps |
| T761 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2498534914 |
|
|
Jul 09 07:56:26 PM PDT 24 |
Jul 09 08:03:46 PM PDT 24 |
4193787960 ps |
| T1332 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.2061803555 |
|
|
Jul 09 07:57:14 PM PDT 24 |
Jul 09 09:48:26 PM PDT 24 |
23889873577 ps |
| T1333 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.528880183 |
|
|
Jul 09 08:00:43 PM PDT 24 |
Jul 09 08:19:07 PM PDT 24 |
9340065851 ps |
| T1334 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.4052422405 |
|
|
Jul 09 07:58:14 PM PDT 24 |
Jul 09 08:02:53 PM PDT 24 |
3387479806 ps |
| T1335 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1231416537 |
|
|
Jul 09 08:17:42 PM PDT 24 |
Jul 09 08:29:10 PM PDT 24 |
3917878050 ps |
| T1336 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.689957909 |
|
|
Jul 09 08:04:11 PM PDT 24 |
Jul 09 08:31:48 PM PDT 24 |
9736132692 ps |
| T1337 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.146722641 |
|
|
Jul 09 08:16:27 PM PDT 24 |
Jul 09 08:20:40 PM PDT 24 |
2769934512 ps |
| T1338 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.562159472 |
|
|
Jul 09 08:19:10 PM PDT 24 |
Jul 09 08:24:42 PM PDT 24 |
3622261376 ps |
| T1339 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.522282218 |
|
|
Jul 09 07:55:42 PM PDT 24 |
Jul 09 08:01:04 PM PDT 24 |
2447020424 ps |
| T1340 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.2636790870 |
|
|
Jul 09 07:49:55 PM PDT 24 |
Jul 09 09:27:22 PM PDT 24 |
51326569752 ps |
| T1341 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.4236328642 |
|
|
Jul 09 08:15:46 PM PDT 24 |
Jul 09 08:20:27 PM PDT 24 |
3257361848 ps |
| T1342 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.2161070059 |
|
|
Jul 09 07:55:33 PM PDT 24 |
Jul 09 08:15:47 PM PDT 24 |
9083282384 ps |
| T1343 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2009773338 |
|
|
Jul 09 07:59:58 PM PDT 24 |
Jul 09 08:13:27 PM PDT 24 |
4901558992 ps |
| T1344 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.3252968004 |
|
|
Jul 09 08:18:22 PM PDT 24 |
Jul 09 09:19:51 PM PDT 24 |
17195894744 ps |
| T1345 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1556491588 |
|
|
Jul 09 08:16:56 PM PDT 24 |
Jul 09 08:24:08 PM PDT 24 |
18087286070 ps |
| T51 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.389106283 |
|
|
Jul 09 07:56:07 PM PDT 24 |
Jul 09 08:02:31 PM PDT 24 |
3447452529 ps |
| T1346 |
/workspace/coverage/default/2.chip_sw_edn_kat.3087498143 |
|
|
Jul 09 08:15:07 PM PDT 24 |
Jul 09 08:23:42 PM PDT 24 |
3160284052 ps |
| T1347 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3377385056 |
|
|
Jul 09 08:13:36 PM PDT 24 |
Jul 09 08:40:49 PM PDT 24 |
13547192097 ps |
| T776 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.1286666935 |
|
|
Jul 09 08:19:25 PM PDT 24 |
Jul 09 08:31:02 PM PDT 24 |
5211005966 ps |
| T1348 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.954660793 |
|
|
Jul 09 07:52:42 PM PDT 24 |
Jul 09 08:24:40 PM PDT 24 |
11188444453 ps |
| T1349 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3374710223 |
|
|
Jul 09 08:16:06 PM PDT 24 |
Jul 09 08:25:57 PM PDT 24 |
5417740388 ps |
| T1350 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.476992373 |
|
|
Jul 09 08:13:39 PM PDT 24 |
Jul 09 08:27:30 PM PDT 24 |
4297509972 ps |
| T1351 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2426714378 |
|
|
Jul 09 08:04:13 PM PDT 24 |
Jul 09 08:39:52 PM PDT 24 |
26696339990 ps |