| T866 |
/workspace/coverage/default/2.chip_sw_edn_kat.3500322416 |
|
|
Jul 12 08:09:34 PM PDT 24 |
Jul 12 08:22:24 PM PDT 24 |
3415227594 ps |
| T867 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.3425388136 |
|
|
Jul 12 08:04:11 PM PDT 24 |
Jul 12 08:08:56 PM PDT 24 |
3138956696 ps |
| T341 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.4095569414 |
|
|
Jul 12 08:05:23 PM PDT 24 |
Jul 12 08:20:46 PM PDT 24 |
5608397096 ps |
| T283 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.529107739 |
|
|
Jul 12 08:03:53 PM PDT 24 |
Jul 12 08:13:31 PM PDT 24 |
3536070042 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1005133233 |
|
|
Jul 12 07:47:49 PM PDT 24 |
Jul 12 08:16:10 PM PDT 24 |
10376825365 ps |
| T675 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1035405284 |
|
|
Jul 12 08:21:12 PM PDT 24 |
Jul 12 08:27:58 PM PDT 24 |
3337225624 ps |
| T868 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1423941023 |
|
|
Jul 12 08:07:55 PM PDT 24 |
Jul 12 08:33:28 PM PDT 24 |
11381440598 ps |
| T869 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.3659192179 |
|
|
Jul 12 07:56:37 PM PDT 24 |
Jul 12 08:16:14 PM PDT 24 |
6477972296 ps |
| T870 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3782558369 |
|
|
Jul 12 07:48:51 PM PDT 24 |
Jul 12 07:58:49 PM PDT 24 |
4815612048 ps |
| T126 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.4031796223 |
|
|
Jul 12 08:13:42 PM PDT 24 |
Jul 12 08:23:40 PM PDT 24 |
6321574420 ps |
| T302 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2541537107 |
|
|
Jul 12 08:25:20 PM PDT 24 |
Jul 12 08:32:24 PM PDT 24 |
3208409354 ps |
| T319 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.2643397722 |
|
|
Jul 12 08:14:56 PM PDT 24 |
Jul 12 08:40:04 PM PDT 24 |
8925561457 ps |
| T697 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2437390994 |
|
|
Jul 12 08:17:55 PM PDT 24 |
Jul 12 08:23:54 PM PDT 24 |
3163895680 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.3115354506 |
|
|
Jul 12 07:59:34 PM PDT 24 |
Jul 12 08:17:17 PM PDT 24 |
5241819424 ps |
| T871 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2850777355 |
|
|
Jul 12 07:58:17 PM PDT 24 |
Jul 12 09:01:53 PM PDT 24 |
15554963980 ps |
| T621 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2322346462 |
|
|
Jul 12 07:48:31 PM PDT 24 |
Jul 12 07:50:30 PM PDT 24 |
1914542366 ps |
| T872 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2455308727 |
|
|
Jul 12 07:49:57 PM PDT 24 |
Jul 12 08:04:10 PM PDT 24 |
4158987144 ps |
| T873 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.3143270482 |
|
|
Jul 12 07:57:15 PM PDT 24 |
Jul 12 08:57:22 PM PDT 24 |
15541357120 ps |
| T874 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.4156717311 |
|
|
Jul 12 08:00:40 PM PDT 24 |
Jul 12 08:03:11 PM PDT 24 |
2978235708 ps |
| T875 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2935113334 |
|
|
Jul 12 07:59:33 PM PDT 24 |
Jul 12 08:09:23 PM PDT 24 |
6513060661 ps |
| T669 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3323226715 |
|
|
Jul 12 08:22:19 PM PDT 24 |
Jul 12 08:31:33 PM PDT 24 |
3575927892 ps |
| T29 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2681992752 |
|
|
Jul 12 07:49:07 PM PDT 24 |
Jul 12 08:20:42 PM PDT 24 |
25108687220 ps |
| T876 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1902351176 |
|
|
Jul 12 07:47:37 PM PDT 24 |
Jul 12 07:57:40 PM PDT 24 |
3644617584 ps |
| T743 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2626507345 |
|
|
Jul 12 08:23:45 PM PDT 24 |
Jul 12 08:29:58 PM PDT 24 |
3942377674 ps |
| T672 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.2437912146 |
|
|
Jul 12 08:22:54 PM PDT 24 |
Jul 12 08:33:44 PM PDT 24 |
5450784096 ps |
| T661 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.914496318 |
|
|
Jul 12 08:20:22 PM PDT 24 |
Jul 12 08:26:16 PM PDT 24 |
4092553424 ps |
| T231 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.1993088617 |
|
|
Jul 12 07:56:34 PM PDT 24 |
Jul 12 08:25:12 PM PDT 24 |
12148935496 ps |
| T877 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1810381537 |
|
|
Jul 12 07:56:59 PM PDT 24 |
Jul 12 09:05:24 PM PDT 24 |
15734978982 ps |
| T622 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2358648796 |
|
|
Jul 12 07:55:11 PM PDT 24 |
Jul 12 07:56:58 PM PDT 24 |
3173795967 ps |
| T720 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.1565074607 |
|
|
Jul 12 08:21:51 PM PDT 24 |
Jul 12 08:31:58 PM PDT 24 |
6257967672 ps |
| T686 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.3333885957 |
|
|
Jul 12 08:19:43 PM PDT 24 |
Jul 12 08:26:50 PM PDT 24 |
4290720864 ps |
| T238 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.569520905 |
|
|
Jul 12 07:47:39 PM PDT 24 |
Jul 12 07:54:17 PM PDT 24 |
4511497698 ps |
| T680 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.3241105855 |
|
|
Jul 12 08:18:48 PM PDT 24 |
Jul 12 08:31:28 PM PDT 24 |
5899988728 ps |
| T187 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3772452306 |
|
|
Jul 12 08:04:37 PM PDT 24 |
Jul 12 09:28:44 PM PDT 24 |
42384110740 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2478249488 |
|
|
Jul 12 07:50:24 PM PDT 24 |
Jul 12 07:59:59 PM PDT 24 |
5076618046 ps |
| T878 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.537296422 |
|
|
Jul 12 08:10:37 PM PDT 24 |
Jul 12 08:23:28 PM PDT 24 |
3652593120 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.2531905256 |
|
|
Jul 12 08:00:56 PM PDT 24 |
Jul 12 08:24:17 PM PDT 24 |
21408724132 ps |
| T748 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1658209891 |
|
|
Jul 12 08:23:38 PM PDT 24 |
Jul 12 08:30:10 PM PDT 24 |
4176246770 ps |
| T46 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3247482175 |
|
|
Jul 12 07:52:18 PM PDT 24 |
Jul 12 08:01:10 PM PDT 24 |
6531569400 ps |
| T879 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2149943944 |
|
|
Jul 12 08:00:12 PM PDT 24 |
Jul 12 08:03:42 PM PDT 24 |
2367071710 ps |
| T353 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1252708556 |
|
|
Jul 12 08:10:42 PM PDT 24 |
Jul 12 08:21:50 PM PDT 24 |
6734264172 ps |
| T745 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.3860149754 |
|
|
Jul 12 07:48:37 PM PDT 24 |
Jul 12 07:54:26 PM PDT 24 |
3953976124 ps |
| T880 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.2129484762 |
|
|
Jul 12 08:15:25 PM PDT 24 |
Jul 12 08:25:19 PM PDT 24 |
6558293020 ps |
| T337 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.4019325548 |
|
|
Jul 12 08:09:35 PM PDT 24 |
Jul 12 08:20:12 PM PDT 24 |
4278858951 ps |
| T81 |
/workspace/coverage/default/1.chip_jtag_mem_access.2650864353 |
|
|
Jul 12 07:53:02 PM PDT 24 |
Jul 12 08:20:01 PM PDT 24 |
13582538970 ps |
| T881 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.3068798862 |
|
|
Jul 12 08:17:08 PM PDT 24 |
Jul 12 08:25:38 PM PDT 24 |
5266817891 ps |
| T882 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.1232971980 |
|
|
Jul 12 08:13:44 PM PDT 24 |
Jul 12 09:17:39 PM PDT 24 |
16414710640 ps |
| T721 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1906085125 |
|
|
Jul 12 08:20:58 PM PDT 24 |
Jul 12 08:27:58 PM PDT 24 |
3593014360 ps |
| T883 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.2543231239 |
|
|
Jul 12 08:07:12 PM PDT 24 |
Jul 12 08:10:50 PM PDT 24 |
2910123768 ps |
| T109 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.712300011 |
|
|
Jul 12 08:12:46 PM PDT 24 |
Jul 12 11:29:38 PM PDT 24 |
83563711214 ps |
| T657 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.544605562 |
|
|
Jul 12 08:26:14 PM PDT 24 |
Jul 12 08:35:19 PM PDT 24 |
4650484606 ps |
| T884 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.1512123968 |
|
|
Jul 12 08:07:15 PM PDT 24 |
Jul 12 08:17:42 PM PDT 24 |
6523689184 ps |
| T234 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.3619900983 |
|
|
Jul 12 07:51:48 PM PDT 24 |
Jul 12 09:16:40 PM PDT 24 |
46065482956 ps |
| T379 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.2583531382 |
|
|
Jul 12 07:49:18 PM PDT 24 |
Jul 12 07:58:49 PM PDT 24 |
9691093217 ps |
| T757 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2271859128 |
|
|
Jul 12 08:16:30 PM PDT 24 |
Jul 12 08:23:56 PM PDT 24 |
3816207794 ps |
| T885 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.420344763 |
|
|
Jul 12 08:05:41 PM PDT 24 |
Jul 12 08:11:02 PM PDT 24 |
3137887320 ps |
| T207 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2136080438 |
|
|
Jul 12 07:52:31 PM PDT 24 |
Jul 12 11:39:10 PM PDT 24 |
78859640823 ps |
| T640 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.3694009764 |
|
|
Jul 12 07:50:57 PM PDT 24 |
Jul 12 08:17:37 PM PDT 24 |
10707453234 ps |
| T886 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1639680282 |
|
|
Jul 12 08:05:47 PM PDT 24 |
Jul 12 08:11:41 PM PDT 24 |
3446401520 ps |
| T887 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2750945041 |
|
|
Jul 12 07:49:21 PM PDT 24 |
Jul 12 09:09:43 PM PDT 24 |
16100268914 ps |
| T24 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.2965292696 |
|
|
Jul 12 07:49:37 PM PDT 24 |
Jul 12 08:01:41 PM PDT 24 |
6961012890 ps |
| T888 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.1512083738 |
|
|
Jul 12 07:56:34 PM PDT 24 |
Jul 12 08:13:26 PM PDT 24 |
10486133864 ps |
| T889 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2916349076 |
|
|
Jul 12 07:49:30 PM PDT 24 |
Jul 12 08:09:33 PM PDT 24 |
8128251931 ps |
| T373 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.979630088 |
|
|
Jul 12 07:46:36 PM PDT 24 |
Jul 12 07:51:24 PM PDT 24 |
3191291808 ps |
| T890 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3155517240 |
|
|
Jul 12 08:14:45 PM PDT 24 |
Jul 12 08:19:51 PM PDT 24 |
2910716736 ps |
| T891 |
/workspace/coverage/default/0.chip_sw_example_flash.3731681033 |
|
|
Jul 12 07:49:21 PM PDT 24 |
Jul 12 07:53:35 PM PDT 24 |
3177020776 ps |
| T377 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.1629027948 |
|
|
Jul 12 07:50:23 PM PDT 24 |
Jul 12 07:56:00 PM PDT 24 |
3079983631 ps |
| T892 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.4252977711 |
|
|
Jul 12 07:55:39 PM PDT 24 |
Jul 12 08:02:49 PM PDT 24 |
4723360000 ps |
| T402 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.383192749 |
|
|
Jul 12 08:15:41 PM PDT 24 |
Jul 12 08:22:49 PM PDT 24 |
4211624168 ps |
| T651 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1880856281 |
|
|
Jul 12 08:22:01 PM PDT 24 |
Jul 12 08:28:09 PM PDT 24 |
3504128648 ps |
| T893 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.960462620 |
|
|
Jul 12 07:49:31 PM PDT 24 |
Jul 12 07:57:49 PM PDT 24 |
6272487990 ps |
| T135 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2799468219 |
|
|
Jul 12 08:09:29 PM PDT 24 |
Jul 12 08:17:50 PM PDT 24 |
5419527800 ps |
| T894 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.3711059913 |
|
|
Jul 12 08:10:59 PM PDT 24 |
Jul 12 08:21:12 PM PDT 24 |
6242824688 ps |
| T895 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.1749932261 |
|
|
Jul 12 08:09:08 PM PDT 24 |
Jul 12 08:13:48 PM PDT 24 |
2278066968 ps |
| T737 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2263990098 |
|
|
Jul 12 08:24:28 PM PDT 24 |
Jul 12 08:30:36 PM PDT 24 |
3447160206 ps |
| T896 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1809562181 |
|
|
Jul 12 08:15:13 PM PDT 24 |
Jul 12 08:23:09 PM PDT 24 |
5867650000 ps |
| T30 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.2467604973 |
|
|
Jul 12 07:56:42 PM PDT 24 |
Jul 12 08:55:02 PM PDT 24 |
20189826409 ps |
| T897 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.2235325738 |
|
|
Jul 12 07:48:30 PM PDT 24 |
Jul 12 07:54:24 PM PDT 24 |
2956423026 ps |
| T898 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.3441632937 |
|
|
Jul 12 07:55:29 PM PDT 24 |
Jul 12 08:00:45 PM PDT 24 |
3895997204 ps |
| T899 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.2820901621 |
|
|
Jul 12 08:11:07 PM PDT 24 |
Jul 12 08:21:58 PM PDT 24 |
7892801128 ps |
| T900 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.785254110 |
|
|
Jul 12 07:58:44 PM PDT 24 |
Jul 12 08:07:08 PM PDT 24 |
4982169216 ps |
| T321 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.1340943836 |
|
|
Jul 12 08:14:59 PM PDT 24 |
Jul 12 08:25:42 PM PDT 24 |
4265668220 ps |
| T166 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.2287420006 |
|
|
Jul 12 08:23:02 PM PDT 24 |
Jul 12 08:29:50 PM PDT 24 |
5259299846 ps |
| T694 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.652031641 |
|
|
Jul 12 08:23:59 PM PDT 24 |
Jul 12 08:33:10 PM PDT 24 |
4998798744 ps |
| T901 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1430971406 |
|
|
Jul 12 07:51:11 PM PDT 24 |
Jul 12 08:25:37 PM PDT 24 |
7992899704 ps |
| T902 |
/workspace/coverage/default/0.rom_e2e_smoke.4158583611 |
|
|
Jul 12 07:53:33 PM PDT 24 |
Jul 12 08:55:25 PM PDT 24 |
15790956632 ps |
| T738 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1448344509 |
|
|
Jul 12 08:18:36 PM PDT 24 |
Jul 12 08:25:40 PM PDT 24 |
3914420868 ps |
| T14 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.25510730 |
|
|
Jul 12 07:53:09 PM PDT 24 |
Jul 12 08:16:15 PM PDT 24 |
24048214808 ps |
| T903 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.731212507 |
|
|
Jul 12 08:09:33 PM PDT 24 |
Jul 12 08:14:29 PM PDT 24 |
2656362804 ps |
| T760 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3387096326 |
|
|
Jul 12 08:18:03 PM PDT 24 |
Jul 12 08:24:51 PM PDT 24 |
3323878310 ps |
| T367 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.24498301 |
|
|
Jul 12 07:57:18 PM PDT 24 |
Jul 12 09:38:49 PM PDT 24 |
23730699424 ps |
| T307 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.360589574 |
|
|
Jul 12 08:01:00 PM PDT 24 |
Jul 12 08:08:45 PM PDT 24 |
5067264376 ps |
| T904 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1358577842 |
|
|
Jul 12 07:54:33 PM PDT 24 |
Jul 12 07:57:53 PM PDT 24 |
3083427528 ps |
| T149 |
/workspace/coverage/default/1.rom_raw_unlock.2841834580 |
|
|
Jul 12 08:02:47 PM PDT 24 |
Jul 12 08:07:14 PM PDT 24 |
5867089691 ps |
| T905 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.2655568347 |
|
|
Jul 12 08:14:12 PM PDT 24 |
Jul 12 08:19:00 PM PDT 24 |
2536498886 ps |
| T623 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3848164623 |
|
|
Jul 12 07:56:02 PM PDT 24 |
Jul 12 07:58:03 PM PDT 24 |
2627334819 ps |
| T906 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.2727239133 |
|
|
Jul 12 07:53:54 PM PDT 24 |
Jul 12 08:53:56 PM PDT 24 |
14215039763 ps |
| T699 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1677480647 |
|
|
Jul 12 08:23:09 PM PDT 24 |
Jul 12 08:32:14 PM PDT 24 |
5034736810 ps |
| T907 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.3279351586 |
|
|
Jul 12 07:48:39 PM PDT 24 |
Jul 12 07:53:53 PM PDT 24 |
2615191946 ps |
| T908 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3232689814 |
|
|
Jul 12 07:49:43 PM PDT 24 |
Jul 12 08:07:27 PM PDT 24 |
6978595590 ps |
| T909 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.175843307 |
|
|
Jul 12 08:05:34 PM PDT 24 |
Jul 12 08:11:47 PM PDT 24 |
3482354502 ps |
| T910 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.4189214341 |
|
|
Jul 12 07:54:52 PM PDT 24 |
Jul 12 08:05:44 PM PDT 24 |
4559543710 ps |
| T911 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.979956587 |
|
|
Jul 12 07:57:33 PM PDT 24 |
Jul 12 08:02:08 PM PDT 24 |
2775409283 ps |
| T912 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.844408990 |
|
|
Jul 12 08:15:41 PM PDT 24 |
Jul 12 08:22:10 PM PDT 24 |
6877187376 ps |
| T913 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.1872622743 |
|
|
Jul 12 08:03:24 PM PDT 24 |
Jul 12 08:06:29 PM PDT 24 |
2549174040 ps |
| T914 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.3036285931 |
|
|
Jul 12 08:06:05 PM PDT 24 |
Jul 12 08:14:19 PM PDT 24 |
5564461699 ps |
| T327 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.32246244 |
|
|
Jul 12 08:06:18 PM PDT 24 |
Jul 12 08:15:05 PM PDT 24 |
4069872400 ps |
| T915 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.1054460477 |
|
|
Jul 12 07:55:49 PM PDT 24 |
Jul 12 08:03:54 PM PDT 24 |
4587962984 ps |
| T916 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.2877405761 |
|
|
Jul 12 08:15:19 PM PDT 24 |
Jul 12 08:20:47 PM PDT 24 |
3094801524 ps |
| T917 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2562902181 |
|
|
Jul 12 08:09:58 PM PDT 24 |
Jul 12 08:19:08 PM PDT 24 |
5013734452 ps |
| T918 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.4021140128 |
|
|
Jul 12 07:47:50 PM PDT 24 |
Jul 12 07:54:20 PM PDT 24 |
4618870928 ps |
| T919 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.224949312 |
|
|
Jul 12 08:15:53 PM PDT 24 |
Jul 12 08:28:50 PM PDT 24 |
5669356772 ps |
| T920 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3296702897 |
|
|
Jul 12 08:08:35 PM PDT 24 |
Jul 12 08:16:11 PM PDT 24 |
6425458666 ps |
| T921 |
/workspace/coverage/default/2.chip_sw_hmac_enc.3255389483 |
|
|
Jul 12 08:10:12 PM PDT 24 |
Jul 12 08:15:30 PM PDT 24 |
3062982660 ps |
| T922 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.1259800631 |
|
|
Jul 12 08:13:29 PM PDT 24 |
Jul 12 08:37:56 PM PDT 24 |
12388384952 ps |
| T8 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3891967902 |
|
|
Jul 12 08:14:21 PM PDT 24 |
Jul 12 08:21:57 PM PDT 24 |
4283071186 ps |
| T923 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.1608942359 |
|
|
Jul 12 08:09:05 PM PDT 24 |
Jul 12 08:12:43 PM PDT 24 |
2530798648 ps |
| T242 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.3272076440 |
|
|
Jul 12 08:22:41 PM PDT 24 |
Jul 12 08:32:21 PM PDT 24 |
4798594080 ps |
| T259 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.1078222800 |
|
|
Jul 12 08:18:29 PM PDT 24 |
Jul 12 09:15:04 PM PDT 24 |
26593209388 ps |
| T260 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.56357938 |
|
|
Jul 12 07:57:17 PM PDT 24 |
Jul 12 08:26:11 PM PDT 24 |
8204853744 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.675447129 |
|
|
Jul 12 07:53:10 PM PDT 24 |
Jul 12 08:04:40 PM PDT 24 |
4335558362 ps |
| T262 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2162937430 |
|
|
Jul 12 07:54:23 PM PDT 24 |
Jul 12 08:09:51 PM PDT 24 |
10174052060 ps |
| T263 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1507958218 |
|
|
Jul 12 08:04:42 PM PDT 24 |
Jul 12 08:13:00 PM PDT 24 |
3651213268 ps |
| T264 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.3860454683 |
|
|
Jul 12 08:21:41 PM PDT 24 |
Jul 12 08:29:22 PM PDT 24 |
4155874280 ps |
| T235 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.3278761730 |
|
|
Jul 12 08:08:05 PM PDT 24 |
Jul 12 09:40:01 PM PDT 24 |
49068141850 ps |
| T150 |
/workspace/coverage/default/2.rom_raw_unlock.1865559467 |
|
|
Jul 12 08:12:39 PM PDT 24 |
Jul 12 08:16:59 PM PDT 24 |
6019670686 ps |
| T161 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.1258188914 |
|
|
Jul 12 08:07:49 PM PDT 24 |
Jul 12 08:14:38 PM PDT 24 |
3160547210 ps |
| T924 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2273090565 |
|
|
Jul 12 07:50:52 PM PDT 24 |
Jul 12 07:55:01 PM PDT 24 |
2402072000 ps |
| T925 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1262694787 |
|
|
Jul 12 08:01:43 PM PDT 24 |
Jul 12 08:06:26 PM PDT 24 |
3365112179 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.528180526 |
|
|
Jul 12 07:49:49 PM PDT 24 |
Jul 12 07:59:46 PM PDT 24 |
5915973550 ps |
| T662 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.1011629330 |
|
|
Jul 12 08:24:07 PM PDT 24 |
Jul 12 08:35:02 PM PDT 24 |
5856320504 ps |
| T405 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.139839804 |
|
|
Jul 12 07:49:42 PM PDT 24 |
Jul 12 08:11:55 PM PDT 24 |
6561222382 ps |
| T691 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.4086662918 |
|
|
Jul 12 08:18:28 PM PDT 24 |
Jul 12 08:25:26 PM PDT 24 |
3632374388 ps |
| T926 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.791669332 |
|
|
Jul 12 07:50:14 PM PDT 24 |
Jul 12 07:56:48 PM PDT 24 |
4695094964 ps |
| T927 |
/workspace/coverage/default/1.rom_e2e_smoke.1056304223 |
|
|
Jul 12 08:17:39 PM PDT 24 |
Jul 12 09:22:34 PM PDT 24 |
14880383840 ps |
| T332 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.2705416008 |
|
|
Jul 12 07:49:21 PM PDT 24 |
Jul 12 07:53:58 PM PDT 24 |
2753712040 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.41573227 |
|
|
Jul 12 07:51:18 PM PDT 24 |
Jul 12 08:00:44 PM PDT 24 |
6412704232 ps |
| T31 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.3245946823 |
|
|
Jul 12 07:57:07 PM PDT 24 |
Jul 12 08:24:27 PM PDT 24 |
24325684912 ps |
| T928 |
/workspace/coverage/default/0.chip_sw_aes_idle.501512168 |
|
|
Jul 12 07:48:56 PM PDT 24 |
Jul 12 07:54:26 PM PDT 24 |
3162691444 ps |
| T41 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.914018388 |
|
|
Jul 12 07:57:06 PM PDT 24 |
Jul 12 08:02:07 PM PDT 24 |
2543356200 ps |
| T749 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.1063561640 |
|
|
Jul 12 08:23:01 PM PDT 24 |
Jul 12 08:29:45 PM PDT 24 |
3986478520 ps |
| T929 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.1399275004 |
|
|
Jul 12 07:54:47 PM PDT 24 |
Jul 12 07:58:50 PM PDT 24 |
2871648040 ps |
| T930 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1956324256 |
|
|
Jul 12 08:17:33 PM PDT 24 |
Jul 12 08:54:44 PM PDT 24 |
12819292416 ps |
| T931 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.3621656530 |
|
|
Jul 12 07:47:43 PM PDT 24 |
Jul 12 07:52:38 PM PDT 24 |
3547923186 ps |
| T714 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.460522359 |
|
|
Jul 12 08:15:50 PM PDT 24 |
Jul 12 08:21:33 PM PDT 24 |
3374394568 ps |
| T932 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1609460363 |
|
|
Jul 12 08:20:57 PM PDT 24 |
Jul 12 08:28:05 PM PDT 24 |
3463968680 ps |
| T933 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.429622343 |
|
|
Jul 12 08:17:05 PM PDT 24 |
Jul 12 08:55:15 PM PDT 24 |
12812019444 ps |
| T210 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.2826677783 |
|
|
Jul 12 08:07:08 PM PDT 24 |
Jul 12 08:13:52 PM PDT 24 |
4038489152 ps |
| T703 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.203735764 |
|
|
Jul 12 08:25:49 PM PDT 24 |
Jul 12 08:35:54 PM PDT 24 |
5711816724 ps |
| T201 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.2703701332 |
|
|
Jul 12 08:04:07 PM PDT 24 |
Jul 12 08:12:09 PM PDT 24 |
4300984057 ps |
| T500 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.3056452111 |
|
|
Jul 12 08:10:09 PM PDT 24 |
Jul 12 08:24:49 PM PDT 24 |
5191762942 ps |
| T177 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.3582294625 |
|
|
Jul 12 08:07:08 PM PDT 24 |
Jul 12 08:10:08 PM PDT 24 |
3986079159 ps |
| T715 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.1856376021 |
|
|
Jul 12 08:24:47 PM PDT 24 |
Jul 12 08:34:30 PM PDT 24 |
4967951400 ps |
| T934 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3190337451 |
|
|
Jul 12 08:06:48 PM PDT 24 |
Jul 12 08:26:49 PM PDT 24 |
8445847332 ps |
| T692 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.1553818659 |
|
|
Jul 12 08:20:17 PM PDT 24 |
Jul 12 08:32:26 PM PDT 24 |
6089311950 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.1275852498 |
|
|
Jul 12 08:10:44 PM PDT 24 |
Jul 12 08:19:52 PM PDT 24 |
3624107642 ps |
| T32 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1136716994 |
|
|
Jul 12 07:49:30 PM PDT 24 |
Jul 12 08:25:34 PM PDT 24 |
7828438956 ps |
| T936 |
/workspace/coverage/default/1.chip_sw_aes_enc.2462211002 |
|
|
Jul 12 07:57:18 PM PDT 24 |
Jul 12 08:02:14 PM PDT 24 |
3515918980 ps |
| T937 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.284341309 |
|
|
Jul 12 08:02:32 PM PDT 24 |
Jul 12 08:06:28 PM PDT 24 |
2428493108 ps |
| T938 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.3790162657 |
|
|
Jul 12 07:49:24 PM PDT 24 |
Jul 12 07:55:28 PM PDT 24 |
2622941318 ps |
| T939 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1215072169 |
|
|
Jul 12 07:50:06 PM PDT 24 |
Jul 12 08:51:13 PM PDT 24 |
20696275205 ps |
| T940 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.2650027503 |
|
|
Jul 12 07:58:18 PM PDT 24 |
Jul 12 09:30:02 PM PDT 24 |
23717242877 ps |
| T320 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3395888059 |
|
|
Jul 12 08:05:17 PM PDT 24 |
Jul 12 08:15:24 PM PDT 24 |
4534334805 ps |
| T941 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.1342165591 |
|
|
Jul 12 08:16:33 PM PDT 24 |
Jul 12 08:31:26 PM PDT 24 |
9980367785 ps |
| T942 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2129373183 |
|
|
Jul 12 08:10:09 PM PDT 24 |
Jul 12 08:16:33 PM PDT 24 |
4276411960 ps |
| T943 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.3871121037 |
|
|
Jul 12 08:15:10 PM PDT 24 |
Jul 12 08:21:02 PM PDT 24 |
6143523960 ps |
| T729 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.612054184 |
|
|
Jul 12 08:18:24 PM PDT 24 |
Jul 12 08:26:02 PM PDT 24 |
3669873240 ps |
| T944 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.983449237 |
|
|
Jul 12 07:57:36 PM PDT 24 |
Jul 12 08:08:53 PM PDT 24 |
3572403344 ps |
| T33 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1382915148 |
|
|
Jul 12 07:49:11 PM PDT 24 |
Jul 12 09:40:36 PM PDT 24 |
31847371426 ps |
| T945 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.621353182 |
|
|
Jul 12 08:15:16 PM PDT 24 |
Jul 12 08:25:59 PM PDT 24 |
6343386721 ps |
| T946 |
/workspace/coverage/default/1.chip_sw_example_rom.697998745 |
|
|
Jul 12 07:54:14 PM PDT 24 |
Jul 12 07:56:36 PM PDT 24 |
2305309574 ps |
| T713 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.3377941587 |
|
|
Jul 12 08:16:53 PM PDT 24 |
Jul 12 08:27:33 PM PDT 24 |
5183766896 ps |
| T178 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.4194063828 |
|
|
Jul 12 07:46:55 PM PDT 24 |
Jul 12 07:49:27 PM PDT 24 |
3078554478 ps |
| T947 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.582822995 |
|
|
Jul 12 07:49:06 PM PDT 24 |
Jul 12 07:53:28 PM PDT 24 |
2350882616 ps |
| T752 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.5619514 |
|
|
Jul 12 08:21:37 PM PDT 24 |
Jul 12 08:33:35 PM PDT 24 |
6165559650 ps |
| T948 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.1859023932 |
|
|
Jul 12 07:46:56 PM PDT 24 |
Jul 12 08:02:30 PM PDT 24 |
6284502589 ps |
| T624 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.2305100339 |
|
|
Jul 12 07:52:08 PM PDT 24 |
Jul 12 07:53:50 PM PDT 24 |
2584394155 ps |
| T949 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1432742088 |
|
|
Jul 12 07:59:51 PM PDT 24 |
Jul 12 09:16:39 PM PDT 24 |
18142624799 ps |
| T950 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3581362449 |
|
|
Jul 12 07:49:10 PM PDT 24 |
Jul 12 08:23:42 PM PDT 24 |
7764038040 ps |
| T323 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.3738345092 |
|
|
Jul 12 07:49:25 PM PDT 24 |
Jul 12 07:55:55 PM PDT 24 |
4071081212 ps |
| T204 |
/workspace/coverage/default/0.chip_jtag_csr_rw.80652506 |
|
|
Jul 12 07:41:35 PM PDT 24 |
Jul 12 08:28:51 PM PDT 24 |
21559587778 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3785964239 |
|
|
Jul 12 08:09:29 PM PDT 24 |
Jul 12 08:25:13 PM PDT 24 |
8029450430 ps |
| T951 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.2758074928 |
|
|
Jul 12 08:04:32 PM PDT 24 |
Jul 12 08:08:43 PM PDT 24 |
3121544010 ps |
| T952 |
/workspace/coverage/default/1.rom_keymgr_functest.48640518 |
|
|
Jul 12 08:15:03 PM PDT 24 |
Jul 12 08:29:29 PM PDT 24 |
5147393374 ps |
| T953 |
/workspace/coverage/default/4.chip_tap_straps_prod.2857159403 |
|
|
Jul 12 08:15:34 PM PDT 24 |
Jul 12 08:36:38 PM PDT 24 |
13016315574 ps |
| T236 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.1809208719 |
|
|
Jul 12 07:55:56 PM PDT 24 |
Jul 12 09:27:16 PM PDT 24 |
52518833188 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.3360792480 |
|
|
Jul 12 07:47:13 PM PDT 24 |
Jul 12 07:52:28 PM PDT 24 |
3330382544 ps |
| T954 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3739593036 |
|
|
Jul 12 08:07:18 PM PDT 24 |
Jul 12 08:14:27 PM PDT 24 |
5819344590 ps |
| T955 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.144517273 |
|
|
Jul 12 07:59:31 PM PDT 24 |
Jul 12 09:12:38 PM PDT 24 |
14098662756 ps |
| T956 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.2045787082 |
|
|
Jul 12 08:04:13 PM PDT 24 |
Jul 12 08:14:16 PM PDT 24 |
4541950324 ps |
| T957 |
/workspace/coverage/default/0.chip_sw_aes_enc.4137528716 |
|
|
Jul 12 07:50:30 PM PDT 24 |
Jul 12 07:54:53 PM PDT 24 |
2718946904 ps |
| T618 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.2348077028 |
|
|
Jul 12 07:52:49 PM PDT 24 |
Jul 12 08:05:17 PM PDT 24 |
5511184587 ps |
| T958 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1078969597 |
|
|
Jul 12 08:17:46 PM PDT 24 |
Jul 12 08:53:16 PM PDT 24 |
11047485214 ps |
| T228 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2450797767 |
|
|
Jul 12 08:09:01 PM PDT 24 |
Jul 12 08:31:45 PM PDT 24 |
7143485944 ps |
| T959 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3860687544 |
|
|
Jul 12 08:07:17 PM PDT 24 |
Jul 12 08:45:52 PM PDT 24 |
19855001614 ps |
| T99 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3946452244 |
|
|
Jul 12 08:11:50 PM PDT 24 |
Jul 12 08:38:34 PM PDT 24 |
24749522440 ps |
| T308 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1999119182 |
|
|
Jul 12 07:51:56 PM PDT 24 |
Jul 12 08:00:48 PM PDT 24 |
4212632676 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.48953525 |
|
|
Jul 12 07:48:51 PM PDT 24 |
Jul 12 07:53:43 PM PDT 24 |
3073983600 ps |
| T42 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3259521602 |
|
|
Jul 12 08:09:33 PM PDT 24 |
Jul 12 08:14:30 PM PDT 24 |
2555230232 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3272784633 |
|
|
Jul 12 07:49:16 PM PDT 24 |
Jul 12 07:52:58 PM PDT 24 |
2638091460 ps |
| T961 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.2841090686 |
|
|
Jul 12 08:17:47 PM PDT 24 |
Jul 12 09:42:36 PM PDT 24 |
23200320324 ps |
| T962 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.3635781217 |
|
|
Jul 12 08:15:20 PM PDT 24 |
Jul 12 09:05:15 PM PDT 24 |
11375403463 ps |
| T963 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.2888713313 |
|
|
Jul 12 07:58:55 PM PDT 24 |
Jul 12 09:18:21 PM PDT 24 |
14652166151 ps |
| T698 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.1164349333 |
|
|
Jul 12 08:22:35 PM PDT 24 |
Jul 12 08:34:12 PM PDT 24 |
5938174640 ps |
| T964 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2010246542 |
|
|
Jul 12 07:54:58 PM PDT 24 |
Jul 12 08:20:49 PM PDT 24 |
9999137056 ps |
| T965 |
/workspace/coverage/default/0.chip_sw_coremark.2476447262 |
|
|
Jul 12 07:48:44 PM PDT 24 |
Jul 12 11:44:34 PM PDT 24 |
70926874298 ps |
| T147 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3814844256 |
|
|
Jul 12 07:50:44 PM PDT 24 |
Jul 12 08:58:52 PM PDT 24 |
25009220752 ps |
| T966 |
/workspace/coverage/default/3.chip_tap_straps_dev.1613698660 |
|
|
Jul 12 08:15:54 PM PDT 24 |
Jul 12 08:20:41 PM PDT 24 |
3670718434 ps |
| T967 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.421747654 |
|
|
Jul 12 07:50:38 PM PDT 24 |
Jul 12 08:09:46 PM PDT 24 |
5507696600 ps |
| T968 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.55486689 |
|
|
Jul 12 07:58:34 PM PDT 24 |
Jul 12 08:08:44 PM PDT 24 |
4067848052 ps |
| T969 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.3568679040 |
|
|
Jul 12 08:11:54 PM PDT 24 |
Jul 12 08:22:08 PM PDT 24 |
10817135600 ps |
| T970 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.843816048 |
|
|
Jul 12 08:02:23 PM PDT 24 |
Jul 12 08:09:43 PM PDT 24 |
3367456184 ps |
| T127 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.4234743678 |
|
|
Jul 12 07:59:51 PM PDT 24 |
Jul 12 08:07:22 PM PDT 24 |
5164889246 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_flash_init.1506602338 |
|
|
Jul 12 08:03:46 PM PDT 24 |
Jul 12 08:41:47 PM PDT 24 |
25309199129 ps |
| T971 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.3234584227 |
|
|
Jul 12 07:51:19 PM PDT 24 |
Jul 12 08:24:27 PM PDT 24 |
8573504044 ps |
| T734 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1108300458 |
|
|
Jul 12 08:23:04 PM PDT 24 |
Jul 12 08:30:10 PM PDT 24 |
3521224920 ps |
| T972 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.2489853852 |
|
|
Jul 12 07:56:55 PM PDT 24 |
Jul 12 08:57:54 PM PDT 24 |
14802053338 ps |
| T735 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3192357946 |
|
|
Jul 12 08:25:18 PM PDT 24 |
Jul 12 08:33:10 PM PDT 24 |
3635001340 ps |
| T741 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2663869312 |
|
|
Jul 12 08:21:16 PM PDT 24 |
Jul 12 08:28:54 PM PDT 24 |
4047533036 ps |
| T701 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.4008691261 |
|
|
Jul 12 08:21:34 PM PDT 24 |
Jul 12 08:34:06 PM PDT 24 |
6209449296 ps |
| T100 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2480495018 |
|
|
Jul 12 08:10:18 PM PDT 24 |
Jul 12 08:18:38 PM PDT 24 |
6943492902 ps |
| T211 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.3884511200 |
|
|
Jul 12 07:48:28 PM PDT 24 |
Jul 12 07:53:33 PM PDT 24 |
2893433300 ps |
| T322 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.1930413952 |
|
|
Jul 12 07:53:22 PM PDT 24 |
Jul 12 08:03:08 PM PDT 24 |
3960029338 ps |
| T269 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.2933384438 |
|
|
Jul 12 08:14:19 PM PDT 24 |
Jul 12 08:27:46 PM PDT 24 |
5709827512 ps |
| T271 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.3921744848 |
|
|
Jul 12 07:49:05 PM PDT 24 |
Jul 12 07:56:32 PM PDT 24 |
4068736608 ps |
| T272 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.3820612121 |
|
|
Jul 12 08:06:40 PM PDT 24 |
Jul 12 08:25:38 PM PDT 24 |
5814015784 ps |
| T170 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.4189875666 |
|
|
Jul 12 07:49:15 PM PDT 24 |
Jul 12 07:57:46 PM PDT 24 |
5354798996 ps |
| T273 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.2356167904 |
|
|
Jul 12 08:20:20 PM PDT 24 |
Jul 12 08:31:59 PM PDT 24 |
5417561352 ps |
| T274 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.1404030141 |
|
|
Jul 12 08:12:07 PM PDT 24 |
Jul 12 08:16:14 PM PDT 24 |
3185972237 ps |
| T275 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.1511244120 |
|
|
Jul 12 07:59:30 PM PDT 24 |
Jul 12 08:03:21 PM PDT 24 |
2889213906 ps |
| T276 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3209172823 |
|
|
Jul 12 08:09:33 PM PDT 24 |
Jul 12 08:15:43 PM PDT 24 |
3629331080 ps |
| T277 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1948668743 |
|
|
Jul 12 07:59:57 PM PDT 24 |
Jul 12 08:10:14 PM PDT 24 |
4609030656 ps |
| T278 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.950482083 |
|
|
Jul 12 08:05:28 PM PDT 24 |
Jul 12 08:27:44 PM PDT 24 |
9119015712 ps |
| T973 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1856020582 |
|
|
Jul 12 07:49:50 PM PDT 24 |
Jul 12 08:09:51 PM PDT 24 |
7585288888 ps |
| T974 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.413614335 |
|
|
Jul 12 07:57:24 PM PDT 24 |
Jul 12 08:01:44 PM PDT 24 |
3455981698 ps |
| T12 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1656986636 |
|
|
Jul 12 08:04:34 PM PDT 24 |
Jul 12 08:10:25 PM PDT 24 |
3802919776 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_example_concurrency.216235204 |
|
|
Jul 12 07:46:23 PM PDT 24 |
Jul 12 07:49:47 PM PDT 24 |
2530809032 ps |
| T976 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.100530327 |
|
|
Jul 12 08:02:22 PM PDT 24 |
Jul 12 08:07:21 PM PDT 24 |
2408992672 ps |
| T977 |
/workspace/coverage/default/4.chip_tap_straps_dev.682603867 |
|
|
Jul 12 08:14:01 PM PDT 24 |
Jul 12 08:41:35 PM PDT 24 |
13441335166 ps |
| T702 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2022430493 |
|
|
Jul 12 08:18:12 PM PDT 24 |
Jul 12 08:27:15 PM PDT 24 |
3811539590 ps |
| T978 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1241750317 |
|
|
Jul 12 07:47:34 PM PDT 24 |
Jul 12 08:07:18 PM PDT 24 |
6231466098 ps |
| T979 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1764568724 |
|
|
Jul 12 08:00:32 PM PDT 24 |
Jul 12 08:45:23 PM PDT 24 |
21296913999 ps |
| T980 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1276010936 |
|
|
Jul 12 08:04:20 PM PDT 24 |
Jul 12 08:26:49 PM PDT 24 |
9298195910 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.2462611575 |
|
|
Jul 12 08:02:36 PM PDT 24 |
Jul 12 08:23:41 PM PDT 24 |
5762380360 ps |
| T982 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2516432421 |
|
|
Jul 12 08:10:47 PM PDT 24 |
Jul 12 08:22:11 PM PDT 24 |
4903956852 ps |
| T351 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.1108275368 |
|
|
Jul 12 07:53:07 PM PDT 24 |
Jul 12 08:04:20 PM PDT 24 |
4105175288 ps |
| T983 |
/workspace/coverage/default/1.rom_e2e_static_critical.1454965632 |
|
|
Jul 12 08:17:59 PM PDT 24 |
Jul 12 09:29:35 PM PDT 24 |
17436095136 ps |
| T706 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1198672870 |
|
|
Jul 12 08:19:36 PM PDT 24 |
Jul 12 08:28:28 PM PDT 24 |
4572388544 ps |
| T718 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.2709201063 |
|
|
Jul 12 08:24:52 PM PDT 24 |
Jul 12 08:34:25 PM PDT 24 |
6302701520 ps |
| T984 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.3530288766 |
|
|
Jul 12 08:06:53 PM PDT 24 |
Jul 12 08:21:09 PM PDT 24 |
8788256898 ps |