| T985 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1821000438 |
|
|
Jul 12 08:07:11 PM PDT 24 |
Jul 12 08:15:44 PM PDT 24 |
4301081168 ps |
| T678 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3003001931 |
|
|
Jul 12 08:23:58 PM PDT 24 |
Jul 12 08:34:48 PM PDT 24 |
5011069720 ps |
| T986 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.2932179683 |
|
|
Jul 12 07:56:15 PM PDT 24 |
Jul 12 09:33:54 PM PDT 24 |
23016340224 ps |
| T987 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.1194791316 |
|
|
Jul 12 07:55:10 PM PDT 24 |
Jul 12 08:42:11 PM PDT 24 |
22844843657 ps |
| T988 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.4141540853 |
|
|
Jul 12 07:50:15 PM PDT 24 |
Jul 12 08:29:08 PM PDT 24 |
30013723072 ps |
| T408 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3825773380 |
|
|
Jul 12 08:09:36 PM PDT 24 |
Jul 12 08:27:14 PM PDT 24 |
7194196180 ps |
| T989 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.3204003497 |
|
|
Jul 12 07:54:28 PM PDT 24 |
Jul 12 08:02:26 PM PDT 24 |
4474084956 ps |
| T990 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.203748907 |
|
|
Jul 12 08:09:57 PM PDT 24 |
Jul 12 09:09:37 PM PDT 24 |
17370479392 ps |
| T991 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1662777540 |
|
|
Jul 12 07:52:10 PM PDT 24 |
Jul 12 08:03:08 PM PDT 24 |
5324055102 ps |
| T676 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1504838663 |
|
|
Jul 12 08:23:42 PM PDT 24 |
Jul 12 08:30:00 PM PDT 24 |
4423539444 ps |
| T240 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.3136384430 |
|
|
Jul 12 07:49:00 PM PDT 24 |
Jul 12 08:23:31 PM PDT 24 |
24811489530 ps |
| T992 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.4289643918 |
|
|
Jul 12 07:59:21 PM PDT 24 |
Jul 12 08:12:35 PM PDT 24 |
8895866170 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.4152350654 |
|
|
Jul 12 08:16:13 PM PDT 24 |
Jul 12 08:20:17 PM PDT 24 |
2980766520 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.1062618787 |
|
|
Jul 12 08:06:39 PM PDT 24 |
Jul 12 08:14:20 PM PDT 24 |
4055430600 ps |
| T995 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.4262430824 |
|
|
Jul 12 07:47:46 PM PDT 24 |
Jul 12 07:59:24 PM PDT 24 |
3893920276 ps |
| T339 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3743573463 |
|
|
Jul 12 07:53:02 PM PDT 24 |
Jul 12 08:20:43 PM PDT 24 |
9209630780 ps |
| T996 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.2540333611 |
|
|
Jul 12 07:57:07 PM PDT 24 |
Jul 12 09:03:49 PM PDT 24 |
16142178124 ps |
| T997 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.2912904863 |
|
|
Jul 12 08:08:35 PM PDT 24 |
Jul 12 08:20:23 PM PDT 24 |
4843438584 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.1779569699 |
|
|
Jul 12 08:09:37 PM PDT 24 |
Jul 12 08:27:31 PM PDT 24 |
5559494958 ps |
| T999 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.4181056289 |
|
|
Jul 12 07:56:20 PM PDT 24 |
Jul 12 08:55:32 PM PDT 24 |
14701169446 ps |
| T1000 |
/workspace/coverage/default/0.chip_tap_straps_prod.3603755886 |
|
|
Jul 12 07:49:55 PM PDT 24 |
Jul 12 08:06:16 PM PDT 24 |
8778940895 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.389567200 |
|
|
Jul 12 07:58:26 PM PDT 24 |
Jul 12 08:07:47 PM PDT 24 |
8925936755 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.2963049186 |
|
|
Jul 12 07:47:51 PM PDT 24 |
Jul 12 07:56:32 PM PDT 24 |
6472933966 ps |
| T1003 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.1930102229 |
|
|
Jul 12 08:06:57 PM PDT 24 |
Jul 12 08:16:50 PM PDT 24 |
4369536244 ps |
| T1004 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3637316666 |
|
|
Jul 12 07:50:50 PM PDT 24 |
Jul 12 08:02:52 PM PDT 24 |
4584971552 ps |
| T1005 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.70256497 |
|
|
Jul 12 07:55:45 PM PDT 24 |
Jul 12 08:58:09 PM PDT 24 |
16150144180 ps |
| T732 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.1913237863 |
|
|
Jul 12 08:23:39 PM PDT 24 |
Jul 12 08:33:57 PM PDT 24 |
6216180930 ps |
| T1006 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.3328321081 |
|
|
Jul 12 07:56:28 PM PDT 24 |
Jul 12 09:00:13 PM PDT 24 |
15049904123 ps |
| T1007 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.1581655868 |
|
|
Jul 12 08:03:37 PM PDT 24 |
Jul 12 08:11:43 PM PDT 24 |
6257430036 ps |
| T1008 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.2409659359 |
|
|
Jul 12 08:07:45 PM PDT 24 |
Jul 12 08:32:22 PM PDT 24 |
7180338230 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.4028281207 |
|
|
Jul 12 08:03:58 PM PDT 24 |
Jul 12 08:15:47 PM PDT 24 |
4592876432 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.664263303 |
|
|
Jul 12 08:12:48 PM PDT 24 |
Jul 12 08:20:53 PM PDT 24 |
3249862950 ps |
| T1011 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2522059631 |
|
|
Jul 12 07:58:08 PM PDT 24 |
Jul 12 08:01:46 PM PDT 24 |
2637572380 ps |
| T1012 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.475217385 |
|
|
Jul 12 08:21:25 PM PDT 24 |
Jul 12 08:28:30 PM PDT 24 |
3821836662 ps |
| T1013 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.481495585 |
|
|
Jul 12 07:49:43 PM PDT 24 |
Jul 12 07:52:52 PM PDT 24 |
2700649386 ps |
| T625 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1123554983 |
|
|
Jul 12 07:47:06 PM PDT 24 |
Jul 12 07:49:43 PM PDT 24 |
3478171372 ps |
| T248 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.601828308 |
|
|
Jul 12 07:50:27 PM PDT 24 |
Jul 12 07:53:53 PM PDT 24 |
2659802900 ps |
| T1014 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3506111897 |
|
|
Jul 12 08:09:24 PM PDT 24 |
Jul 12 08:14:43 PM PDT 24 |
3387382259 ps |
| T1015 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2639194660 |
|
|
Jul 12 08:19:43 PM PDT 24 |
Jul 12 08:29:32 PM PDT 24 |
4205654616 ps |
| T1016 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.3335143982 |
|
|
Jul 12 08:09:58 PM PDT 24 |
Jul 12 08:13:30 PM PDT 24 |
2713696380 ps |
| T1017 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.3810499427 |
|
|
Jul 12 07:49:36 PM PDT 24 |
Jul 12 08:05:54 PM PDT 24 |
6222174081 ps |
| T86 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.2127856720 |
|
|
Jul 12 07:48:25 PM PDT 24 |
Jul 12 07:52:35 PM PDT 24 |
3396879555 ps |
| T380 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.682831356 |
|
|
Jul 12 08:12:18 PM PDT 24 |
Jul 12 08:28:39 PM PDT 24 |
20356161712 ps |
| T650 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1336935591 |
|
|
Jul 12 08:18:57 PM PDT 24 |
Jul 12 08:26:44 PM PDT 24 |
6121948264 ps |
| T1018 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3661670884 |
|
|
Jul 12 07:59:30 PM PDT 24 |
Jul 12 08:57:58 PM PDT 24 |
14756386824 ps |
| T212 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.773995969 |
|
|
Jul 12 08:06:56 PM PDT 24 |
Jul 12 08:41:00 PM PDT 24 |
24074800186 ps |
| T318 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.4149473008 |
|
|
Jul 12 07:48:49 PM PDT 24 |
Jul 12 08:14:16 PM PDT 24 |
7339357592 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.4172439676 |
|
|
Jul 12 08:13:51 PM PDT 24 |
Jul 12 08:18:43 PM PDT 24 |
2969003606 ps |
| T239 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.1637005689 |
|
|
Jul 12 08:04:46 PM PDT 24 |
Jul 12 08:13:30 PM PDT 24 |
5162563182 ps |
| T208 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3190611459 |
|
|
Jul 12 08:03:55 PM PDT 24 |
Jul 12 11:07:15 PM PDT 24 |
63300837458 ps |
| T213 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.198834838 |
|
|
Jul 12 07:55:50 PM PDT 24 |
Jul 12 08:02:02 PM PDT 24 |
3215468260 ps |
| T185 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.954231469 |
|
|
Jul 12 07:53:01 PM PDT 24 |
Jul 12 09:24:05 PM PDT 24 |
44936221756 ps |
| T368 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.2399179147 |
|
|
Jul 12 07:53:07 PM PDT 24 |
Jul 12 07:57:04 PM PDT 24 |
2772644306 ps |
| T310 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.1964542206 |
|
|
Jul 12 07:52:47 PM PDT 24 |
Jul 12 08:09:16 PM PDT 24 |
4582980040 ps |
| T1020 |
/workspace/coverage/default/2.rom_e2e_smoke.560190977 |
|
|
Jul 12 08:15:40 PM PDT 24 |
Jul 12 09:25:20 PM PDT 24 |
15220867616 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3176836097 |
|
|
Jul 12 07:49:01 PM PDT 24 |
Jul 12 07:52:13 PM PDT 24 |
2662923224 ps |
| T654 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1394062251 |
|
|
Jul 12 08:21:47 PM PDT 24 |
Jul 12 08:26:58 PM PDT 24 |
4204645416 ps |
| T1022 |
/workspace/coverage/default/2.chip_sw_example_concurrency.2327825118 |
|
|
Jul 12 08:03:41 PM PDT 24 |
Jul 12 08:08:59 PM PDT 24 |
3414463120 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.3624080534 |
|
|
Jul 12 07:54:54 PM PDT 24 |
Jul 12 07:59:21 PM PDT 24 |
2822139192 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.1234040954 |
|
|
Jul 12 08:05:37 PM PDT 24 |
Jul 12 08:51:40 PM PDT 24 |
35431146240 ps |
| T1025 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.4047430611 |
|
|
Jul 12 07:47:48 PM PDT 24 |
Jul 12 08:27:23 PM PDT 24 |
24285192458 ps |
| T1026 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.2894826274 |
|
|
Jul 12 07:56:40 PM PDT 24 |
Jul 12 08:58:47 PM PDT 24 |
15244149195 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.1087592729 |
|
|
Jul 12 08:13:09 PM PDT 24 |
Jul 12 08:19:11 PM PDT 24 |
3203505600 ps |
| T1028 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2734676252 |
|
|
Jul 12 08:22:13 PM PDT 24 |
Jul 12 08:32:31 PM PDT 24 |
5208051382 ps |
| T1029 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3371818059 |
|
|
Jul 12 07:50:46 PM PDT 24 |
Jul 12 11:20:26 PM PDT 24 |
64367373982 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.417162712 |
|
|
Jul 12 07:59:17 PM PDT 24 |
Jul 12 08:26:36 PM PDT 24 |
7548742160 ps |
| T151 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.4157788665 |
|
|
Jul 12 08:04:45 PM PDT 24 |
Jul 12 11:00:49 PM PDT 24 |
59989068344 ps |
| T1031 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.3931634378 |
|
|
Jul 12 08:17:41 PM PDT 24 |
Jul 12 09:20:57 PM PDT 24 |
15375562303 ps |
| T1032 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.517001336 |
|
|
Jul 12 07:46:59 PM PDT 24 |
Jul 12 08:00:39 PM PDT 24 |
5027316632 ps |
| T349 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2382597325 |
|
|
Jul 12 07:55:30 PM PDT 24 |
Jul 12 08:03:48 PM PDT 24 |
3539011280 ps |
| T1033 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.4121078559 |
|
|
Jul 12 08:22:08 PM PDT 24 |
Jul 12 08:31:13 PM PDT 24 |
4861672022 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1952809966 |
|
|
Jul 12 08:07:21 PM PDT 24 |
Jul 12 08:32:41 PM PDT 24 |
13222266781 ps |
| T1035 |
/workspace/coverage/default/1.chip_sival_flash_info_access.1473090756 |
|
|
Jul 12 07:52:14 PM PDT 24 |
Jul 12 07:57:03 PM PDT 24 |
3035009188 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_example_flash.689759116 |
|
|
Jul 12 07:52:13 PM PDT 24 |
Jul 12 07:56:16 PM PDT 24 |
2988191344 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1987066853 |
|
|
Jul 12 08:11:40 PM PDT 24 |
Jul 12 08:15:30 PM PDT 24 |
2465268450 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.3399323822 |
|
|
Jul 12 07:59:33 PM PDT 24 |
Jul 12 08:04:27 PM PDT 24 |
2809775290 ps |
| T722 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2319395692 |
|
|
Jul 12 08:15:18 PM PDT 24 |
Jul 12 08:27:37 PM PDT 24 |
5250335186 ps |
| T183 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.3900272035 |
|
|
Jul 12 07:49:11 PM PDT 24 |
Jul 12 08:08:45 PM PDT 24 |
8562170349 ps |
| T1039 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2281822744 |
|
|
Jul 12 07:49:19 PM PDT 24 |
Jul 12 08:03:14 PM PDT 24 |
5045603238 ps |
| T1040 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3430051541 |
|
|
Jul 12 08:13:29 PM PDT 24 |
Jul 12 08:24:34 PM PDT 24 |
3789685571 ps |
| T1041 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2149892756 |
|
|
Jul 12 08:00:25 PM PDT 24 |
Jul 12 08:33:48 PM PDT 24 |
9068052496 ps |
| T1042 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2381469400 |
|
|
Jul 12 08:07:41 PM PDT 24 |
Jul 12 08:20:11 PM PDT 24 |
9191777388 ps |
| T717 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.4189655877 |
|
|
Jul 12 08:23:44 PM PDT 24 |
Jul 12 08:29:19 PM PDT 24 |
3940701784 ps |
| T1043 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.4081739426 |
|
|
Jul 12 08:06:46 PM PDT 24 |
Jul 12 09:01:33 PM PDT 24 |
20443946505 ps |
| T1044 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.1314810161 |
|
|
Jul 12 07:53:02 PM PDT 24 |
Jul 12 07:56:44 PM PDT 24 |
2695582452 ps |
| T192 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.2138911739 |
|
|
Jul 12 08:09:52 PM PDT 24 |
Jul 12 08:20:11 PM PDT 24 |
4448496552 ps |
| T1045 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.301489934 |
|
|
Jul 12 08:14:21 PM PDT 24 |
Jul 12 08:23:45 PM PDT 24 |
3799748848 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.3222419912 |
|
|
Jul 12 07:50:49 PM PDT 24 |
Jul 12 08:00:30 PM PDT 24 |
3456389264 ps |
| T156 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.205099274 |
|
|
Jul 12 07:58:05 PM PDT 24 |
Jul 12 08:03:45 PM PDT 24 |
3762813234 ps |
| T726 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.3962939947 |
|
|
Jul 12 08:18:48 PM PDT 24 |
Jul 12 08:30:51 PM PDT 24 |
6378126872 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.3261654388 |
|
|
Jul 12 07:56:48 PM PDT 24 |
Jul 12 08:06:48 PM PDT 24 |
4625740968 ps |
| T1048 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2285539737 |
|
|
Jul 12 08:19:50 PM PDT 24 |
Jul 12 08:29:45 PM PDT 24 |
5555119274 ps |
| T1049 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2172905975 |
|
|
Jul 12 07:54:35 PM PDT 24 |
Jul 12 07:58:55 PM PDT 24 |
2848782944 ps |
| T1050 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.2040390244 |
|
|
Jul 12 07:58:29 PM PDT 24 |
Jul 12 09:11:35 PM PDT 24 |
15297682360 ps |
| T1051 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.2729314011 |
|
|
Jul 12 08:17:26 PM PDT 24 |
Jul 12 08:45:03 PM PDT 24 |
7988836776 ps |
| T1052 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.4028956779 |
|
|
Jul 12 08:16:23 PM PDT 24 |
Jul 12 09:23:03 PM PDT 24 |
15069014902 ps |
| T1053 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2989472993 |
|
|
Jul 12 07:55:06 PM PDT 24 |
Jul 12 07:59:42 PM PDT 24 |
3531699740 ps |
| T138 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.3343587459 |
|
|
Jul 12 07:49:09 PM PDT 24 |
Jul 12 07:53:11 PM PDT 24 |
3574054805 ps |
| T1054 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.701584682 |
|
|
Jul 12 08:15:51 PM PDT 24 |
Jul 12 08:28:25 PM PDT 24 |
4570642000 ps |
| T1055 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.1412926715 |
|
|
Jul 12 08:18:00 PM PDT 24 |
Jul 12 08:39:47 PM PDT 24 |
7600240842 ps |
| T1056 |
/workspace/coverage/default/0.chip_sw_example_rom.425374662 |
|
|
Jul 12 07:46:15 PM PDT 24 |
Jul 12 07:48:06 PM PDT 24 |
1803474984 ps |
| T1057 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.285511228 |
|
|
Jul 12 08:14:02 PM PDT 24 |
Jul 12 08:23:24 PM PDT 24 |
3882761269 ps |
| T1058 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.953856780 |
|
|
Jul 12 08:00:53 PM PDT 24 |
Jul 12 09:11:33 PM PDT 24 |
25054055971 ps |
| T249 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.1290952080 |
|
|
Jul 12 07:59:00 PM PDT 24 |
Jul 12 08:04:03 PM PDT 24 |
2963906256 ps |
| T750 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.3242364019 |
|
|
Jul 12 08:17:33 PM PDT 24 |
Jul 12 08:26:31 PM PDT 24 |
4211295920 ps |
| T1059 |
/workspace/coverage/default/2.chip_sw_example_rom.1168512924 |
|
|
Jul 12 08:03:40 PM PDT 24 |
Jul 12 08:05:54 PM PDT 24 |
2696319078 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.2651627031 |
|
|
Jul 12 07:55:23 PM PDT 24 |
Jul 12 08:25:31 PM PDT 24 |
10171803301 ps |
| T731 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.3019183392 |
|
|
Jul 12 08:20:09 PM PDT 24 |
Jul 12 08:29:35 PM PDT 24 |
5063160976 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2029436243 |
|
|
Jul 12 07:47:44 PM PDT 24 |
Jul 12 08:00:18 PM PDT 24 |
4330978003 ps |
| T1062 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2213210317 |
|
|
Jul 12 07:54:41 PM PDT 24 |
Jul 12 08:00:26 PM PDT 24 |
2741504596 ps |
| T1063 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1968709641 |
|
|
Jul 12 08:04:54 PM PDT 24 |
Jul 12 08:15:27 PM PDT 24 |
4421723696 ps |
| T1064 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1189059871 |
|
|
Jul 12 07:49:20 PM PDT 24 |
Jul 12 07:52:51 PM PDT 24 |
2177759392 ps |
| T1065 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.2840670856 |
|
|
Jul 12 08:10:37 PM PDT 24 |
Jul 12 08:15:59 PM PDT 24 |
3373289497 ps |
| T133 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.153304633 |
|
|
Jul 12 08:14:40 PM PDT 24 |
Jul 12 08:30:38 PM PDT 24 |
8281919656 ps |
| T1066 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1236507479 |
|
|
Jul 12 08:19:32 PM PDT 24 |
Jul 12 08:29:18 PM PDT 24 |
5432232470 ps |
| T311 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2736974787 |
|
|
Jul 12 08:03:02 PM PDT 24 |
Jul 12 08:16:52 PM PDT 24 |
4951251324 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2842385948 |
|
|
Jul 12 08:12:04 PM PDT 24 |
Jul 12 08:16:36 PM PDT 24 |
3165988093 ps |
| T1067 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1144967006 |
|
|
Jul 12 08:05:16 PM PDT 24 |
Jul 12 09:24:12 PM PDT 24 |
15343870602 ps |
| T87 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.1117611786 |
|
|
Jul 12 08:02:55 PM PDT 24 |
Jul 12 08:06:47 PM PDT 24 |
2428125216 ps |
| T638 |
/workspace/coverage/default/1.chip_sw_power_idle_load.373269462 |
|
|
Jul 12 08:02:31 PM PDT 24 |
Jul 12 08:12:51 PM PDT 24 |
4115885842 ps |
| T1068 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1639537622 |
|
|
Jul 12 08:04:56 PM PDT 24 |
Jul 12 08:16:36 PM PDT 24 |
4206938675 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.4238730263 |
|
|
Jul 12 08:05:40 PM PDT 24 |
Jul 12 08:12:46 PM PDT 24 |
3764411802 ps |
| T244 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.833038031 |
|
|
Jul 12 08:07:50 PM PDT 24 |
Jul 12 08:19:48 PM PDT 24 |
5390578400 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.1877653090 |
|
|
Jul 12 08:05:35 PM PDT 24 |
Jul 12 08:15:24 PM PDT 24 |
4211370520 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.668526500 |
|
|
Jul 12 08:06:33 PM PDT 24 |
Jul 12 08:08:34 PM PDT 24 |
2520639189 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_gpio.868295376 |
|
|
Jul 12 07:47:58 PM PDT 24 |
Jul 12 07:55:52 PM PDT 24 |
3906847678 ps |
| T730 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.3373749324 |
|
|
Jul 12 08:22:16 PM PDT 24 |
Jul 12 08:31:14 PM PDT 24 |
4058069584 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.161833428 |
|
|
Jul 12 07:59:37 PM PDT 24 |
Jul 12 08:07:43 PM PDT 24 |
3970067460 ps |
| T1073 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.3112198557 |
|
|
Jul 12 07:53:06 PM PDT 24 |
Jul 12 08:03:30 PM PDT 24 |
4583812868 ps |
| T1074 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.3371500895 |
|
|
Jul 12 08:13:07 PM PDT 24 |
Jul 12 08:17:21 PM PDT 24 |
2901276876 ps |
| T619 |
/workspace/coverage/default/2.chip_tap_straps_dev.869425045 |
|
|
Jul 12 08:11:11 PM PDT 24 |
Jul 12 08:29:33 PM PDT 24 |
9289891908 ps |
| T1075 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1741780440 |
|
|
Jul 12 07:59:39 PM PDT 24 |
Jul 12 08:10:11 PM PDT 24 |
5037564720 ps |
| T1076 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.3226705908 |
|
|
Jul 12 07:55:25 PM PDT 24 |
Jul 12 08:08:22 PM PDT 24 |
8926029880 ps |
| T1077 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1205617113 |
|
|
Jul 12 08:16:24 PM PDT 24 |
Jul 12 08:28:00 PM PDT 24 |
4031503936 ps |
| T648 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.703595386 |
|
|
Jul 12 08:20:00 PM PDT 24 |
Jul 12 08:25:59 PM PDT 24 |
3890920102 ps |
| T1078 |
/workspace/coverage/default/2.rom_keymgr_functest.2429015731 |
|
|
Jul 12 08:13:44 PM PDT 24 |
Jul 12 08:25:19 PM PDT 24 |
4790674120 ps |
| T1079 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.384008850 |
|
|
Jul 12 08:07:41 PM PDT 24 |
Jul 12 08:11:55 PM PDT 24 |
2662762200 ps |
| T733 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1695459905 |
|
|
Jul 12 08:22:31 PM PDT 24 |
Jul 12 08:28:18 PM PDT 24 |
3390178798 ps |
| T1080 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.3143507910 |
|
|
Jul 12 07:54:28 PM PDT 24 |
Jul 12 08:05:34 PM PDT 24 |
4765514728 ps |
| T1081 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.3728269029 |
|
|
Jul 12 07:52:47 PM PDT 24 |
Jul 12 08:01:52 PM PDT 24 |
5416296738 ps |
| T1082 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.69996147 |
|
|
Jul 12 08:06:28 PM PDT 24 |
Jul 12 08:52:14 PM PDT 24 |
41744328608 ps |
| T1083 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.3643905848 |
|
|
Jul 12 08:03:37 PM PDT 24 |
Jul 12 08:07:24 PM PDT 24 |
2538027398 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.1993328908 |
|
|
Jul 12 07:47:27 PM PDT 24 |
Jul 12 10:48:49 PM PDT 24 |
60323866541 ps |
| T330 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.4079871607 |
|
|
Jul 12 07:55:52 PM PDT 24 |
Jul 12 08:14:05 PM PDT 24 |
5772876022 ps |
| T1085 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.761691889 |
|
|
Jul 12 07:59:20 PM PDT 24 |
Jul 12 08:37:29 PM PDT 24 |
8199148914 ps |
| T1086 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.4064266582 |
|
|
Jul 12 08:02:23 PM PDT 24 |
Jul 12 08:07:21 PM PDT 24 |
3589856137 ps |
| T270 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.2657249760 |
|
|
Jul 12 08:16:23 PM PDT 24 |
Jul 12 08:31:25 PM PDT 24 |
5446505672 ps |
| T229 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.3047625203 |
|
|
Jul 12 08:03:26 PM PDT 24 |
Jul 12 08:34:30 PM PDT 24 |
10595346964 ps |
| T1087 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.11722730 |
|
|
Jul 12 08:16:40 PM PDT 24 |
Jul 12 08:25:03 PM PDT 24 |
4117050700 ps |
| T1088 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.105500080 |
|
|
Jul 12 08:18:35 PM PDT 24 |
Jul 12 08:28:47 PM PDT 24 |
4428337540 ps |
| T1089 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2155419328 |
|
|
Jul 12 07:52:32 PM PDT 24 |
Jul 12 07:58:52 PM PDT 24 |
3634241386 ps |
| T1090 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.685584406 |
|
|
Jul 12 08:13:17 PM PDT 24 |
Jul 12 08:15:31 PM PDT 24 |
3061100279 ps |
| T1091 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.72752141 |
|
|
Jul 12 07:49:47 PM PDT 24 |
Jul 12 08:00:27 PM PDT 24 |
7301216316 ps |
| T655 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.2217034729 |
|
|
Jul 12 08:17:56 PM PDT 24 |
Jul 12 08:24:43 PM PDT 24 |
4334624968 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2662073032 |
|
|
Jul 12 07:56:30 PM PDT 24 |
Jul 12 08:01:06 PM PDT 24 |
3213681352 ps |
| T1093 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.3742670488 |
|
|
Jul 12 07:56:04 PM PDT 24 |
Jul 12 08:00:09 PM PDT 24 |
2846987024 ps |
| T1094 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.624444741 |
|
|
Jul 12 08:16:03 PM PDT 24 |
Jul 12 09:10:18 PM PDT 24 |
16019416744 ps |
| T71 |
/workspace/coverage/default/3.chip_tap_straps_rma.2407203732 |
|
|
Jul 12 08:16:33 PM PDT 24 |
Jul 12 08:22:10 PM PDT 24 |
4200498396 ps |
| T59 |
/workspace/coverage/default/1.chip_sw_alert_test.1765055106 |
|
|
Jul 12 07:56:44 PM PDT 24 |
Jul 12 08:01:58 PM PDT 24 |
3126311060 ps |
| T1095 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.1729544668 |
|
|
Jul 12 08:10:30 PM PDT 24 |
Jul 12 08:27:25 PM PDT 24 |
7535350764 ps |
| T1096 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.543345964 |
|
|
Jul 12 08:16:42 PM PDT 24 |
Jul 12 08:27:48 PM PDT 24 |
4467919038 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.3608844793 |
|
|
Jul 12 07:47:57 PM PDT 24 |
Jul 12 08:21:53 PM PDT 24 |
20758513340 ps |
| T1098 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1937881730 |
|
|
Jul 12 08:16:46 PM PDT 24 |
Jul 12 09:09:56 PM PDT 24 |
14961224216 ps |
| T1099 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.399919407 |
|
|
Jul 12 08:23:46 PM PDT 24 |
Jul 12 08:29:13 PM PDT 24 |
3796593800 ps |
| T1100 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.3084380968 |
|
|
Jul 12 07:57:32 PM PDT 24 |
Jul 12 08:54:35 PM PDT 24 |
14892104480 ps |
| T1101 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3082325757 |
|
|
Jul 12 08:12:19 PM PDT 24 |
Jul 12 08:16:09 PM PDT 24 |
3549593449 ps |
| T754 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3761400547 |
|
|
Jul 12 08:21:43 PM PDT 24 |
Jul 12 08:30:11 PM PDT 24 |
4331579360 ps |
| T139 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.1104008138 |
|
|
Jul 12 07:59:34 PM PDT 24 |
Jul 12 08:02:44 PM PDT 24 |
2322584478 ps |
| T1102 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3438929534 |
|
|
Jul 12 07:56:19 PM PDT 24 |
Jul 12 08:43:28 PM PDT 24 |
11308441796 ps |
| T1103 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.3935870313 |
|
|
Jul 12 08:08:53 PM PDT 24 |
Jul 12 08:13:11 PM PDT 24 |
2726830312 ps |
| T355 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.4058754710 |
|
|
Jul 12 08:20:21 PM PDT 24 |
Jul 12 08:31:08 PM PDT 24 |
6073475862 ps |
| T684 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.492875058 |
|
|
Jul 12 08:23:22 PM PDT 24 |
Jul 12 08:29:16 PM PDT 24 |
3391824824 ps |
| T1104 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.4271618981 |
|
|
Jul 12 08:21:20 PM PDT 24 |
Jul 12 08:32:57 PM PDT 24 |
5164108792 ps |
| T1105 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.6572205 |
|
|
Jul 12 08:12:39 PM PDT 24 |
Jul 12 08:18:46 PM PDT 24 |
3409962712 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.86750555 |
|
|
Jul 12 07:57:45 PM PDT 24 |
Jul 12 08:57:40 PM PDT 24 |
16590021352 ps |
| T1107 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.2637398729 |
|
|
Jul 12 08:00:03 PM PDT 24 |
Jul 12 09:39:42 PM PDT 24 |
24016683200 ps |
| T1108 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3937967006 |
|
|
Jul 12 08:19:49 PM PDT 24 |
Jul 12 08:26:52 PM PDT 24 |
3948236360 ps |
| T708 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.3796421840 |
|
|
Jul 12 08:20:08 PM PDT 24 |
Jul 12 08:32:08 PM PDT 24 |
5440157454 ps |
| T1109 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2463639535 |
|
|
Jul 12 07:56:13 PM PDT 24 |
Jul 12 09:03:09 PM PDT 24 |
17747053436 ps |
| T679 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.2928745243 |
|
|
Jul 12 08:17:04 PM PDT 24 |
Jul 12 08:26:19 PM PDT 24 |
4630407230 ps |
| T1110 |
/workspace/coverage/default/0.rom_e2e_static_critical.3292707 |
|
|
Jul 12 07:57:05 PM PDT 24 |
Jul 12 09:12:28 PM PDT 24 |
16743695688 ps |
| T1111 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.3353517172 |
|
|
Jul 12 08:07:32 PM PDT 24 |
Jul 12 08:11:33 PM PDT 24 |
2859731136 ps |
| T1112 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2269379014 |
|
|
Jul 12 07:51:45 PM PDT 24 |
Jul 12 08:03:47 PM PDT 24 |
3979710094 ps |
| T1113 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2974775982 |
|
|
Jul 12 08:12:27 PM PDT 24 |
Jul 12 08:20:55 PM PDT 24 |
5156327642 ps |
| T295 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.1195402586 |
|
|
Jul 12 08:00:56 PM PDT 24 |
Jul 12 08:05:30 PM PDT 24 |
2733096092 ps |
| T1114 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2364781631 |
|
|
Jul 12 07:50:31 PM PDT 24 |
Jul 12 08:02:42 PM PDT 24 |
4589374660 ps |
| T709 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.1754443847 |
|
|
Jul 12 08:22:53 PM PDT 24 |
Jul 12 08:35:43 PM PDT 24 |
6103258978 ps |
| T346 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2557420934 |
|
|
Jul 12 08:08:06 PM PDT 24 |
Jul 12 08:21:11 PM PDT 24 |
18774986050 ps |
| T110 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.3306325716 |
|
|
Jul 12 07:50:44 PM PDT 24 |
Jul 12 10:46:34 PM PDT 24 |
67913026167 ps |
| T1115 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.3925098574 |
|
|
Jul 12 08:06:47 PM PDT 24 |
Jul 12 09:09:47 PM PDT 24 |
19153040802 ps |
| T1116 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1193320154 |
|
|
Jul 12 08:16:23 PM PDT 24 |
Jul 12 08:35:30 PM PDT 24 |
12187235005 ps |
| T1117 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.4092683253 |
|
|
Jul 12 07:50:18 PM PDT 24 |
Jul 12 08:08:40 PM PDT 24 |
6925546598 ps |
| T1118 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.190735890 |
|
|
Jul 12 08:15:26 PM PDT 24 |
Jul 12 08:19:12 PM PDT 24 |
2375163868 ps |
| T1119 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.2881074904 |
|
|
Jul 12 08:18:01 PM PDT 24 |
Jul 12 08:31:50 PM PDT 24 |
5239727022 ps |
| T241 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.1178117314 |
|
|
Jul 12 08:11:42 PM PDT 24 |
Jul 12 08:43:33 PM PDT 24 |
21561485783 ps |
| T338 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.99044864 |
|
|
Jul 12 07:49:19 PM PDT 24 |
Jul 12 08:00:38 PM PDT 24 |
4144467838 ps |
| T304 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.1956939193 |
|
|
Jul 12 08:19:24 PM PDT 24 |
Jul 12 08:29:00 PM PDT 24 |
5037886800 ps |
| T728 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.1373426571 |
|
|
Jul 12 08:20:40 PM PDT 24 |
Jul 12 08:30:20 PM PDT 24 |
5086760040 ps |
| T681 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.1682610476 |
|
|
Jul 12 08:23:00 PM PDT 24 |
Jul 12 08:29:18 PM PDT 24 |
4391436988 ps |
| T1120 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2401055906 |
|
|
Jul 12 08:00:33 PM PDT 24 |
Jul 12 08:12:36 PM PDT 24 |
5011837132 ps |
| T1121 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.318374093 |
|
|
Jul 12 08:14:26 PM PDT 24 |
Jul 12 08:26:14 PM PDT 24 |
4217499864 ps |
| T369 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.452527905 |
|
|
Jul 12 08:03:55 PM PDT 24 |
Jul 12 08:06:17 PM PDT 24 |
1838680080 ps |
| T656 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.872657198 |
|
|
Jul 12 08:28:48 PM PDT 24 |
Jul 12 08:36:36 PM PDT 24 |
4916675140 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2848737015 |
|
|
Jul 12 08:06:41 PM PDT 24 |
Jul 12 08:16:08 PM PDT 24 |
5642129137 ps |
| T1123 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.431854917 |
|
|
Jul 12 07:57:20 PM PDT 24 |
Jul 12 08:14:34 PM PDT 24 |
6936139791 ps |
| T296 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.1394843102 |
|
|
Jul 12 08:03:47 PM PDT 24 |
Jul 12 08:09:03 PM PDT 24 |
3250082950 ps |
| T171 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.4284316388 |
|
|
Jul 12 08:11:58 PM PDT 24 |
Jul 12 08:22:06 PM PDT 24 |
5111226798 ps |
| T1124 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3241505230 |
|
|
Jul 12 07:49:49 PM PDT 24 |
Jul 12 07:54:44 PM PDT 24 |
3580186639 ps |
| T1125 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.610819919 |
|
|
Jul 12 07:49:52 PM PDT 24 |
Jul 12 08:11:05 PM PDT 24 |
5626869462 ps |
| T620 |
/workspace/coverage/default/0.chip_tap_straps_dev.2605672251 |
|
|
Jul 12 07:52:21 PM PDT 24 |
Jul 12 08:12:25 PM PDT 24 |
10884489728 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1904300410 |
|
|
Jul 12 07:50:06 PM PDT 24 |
Jul 12 07:51:56 PM PDT 24 |
2086486819 ps |
| T1127 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.872472003 |
|
|
Jul 12 08:12:12 PM PDT 24 |
Jul 12 08:17:09 PM PDT 24 |
3236526284 ps |
| T682 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.3970527655 |
|
|
Jul 12 08:22:32 PM PDT 24 |
Jul 12 08:29:23 PM PDT 24 |
3677614456 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.3455611189 |
|
|
Jul 12 07:50:35 PM PDT 24 |
Jul 12 07:54:13 PM PDT 24 |
3066915850 ps |
| T1129 |
/workspace/coverage/default/0.rom_keymgr_functest.3812448986 |
|
|
Jul 12 07:52:27 PM PDT 24 |
Jul 12 08:01:09 PM PDT 24 |
4911464754 ps |
| T388 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1190252291 |
|
|
Jul 12 08:00:46 PM PDT 24 |
Jul 12 08:30:24 PM PDT 24 |
21566040572 ps |
| T1130 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.2326289860 |
|
|
Jul 12 07:56:43 PM PDT 24 |
Jul 12 11:04:12 PM PDT 24 |
59424384463 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.917859952 |
|
|
Jul 12 07:59:33 PM PDT 24 |
Jul 12 08:10:28 PM PDT 24 |
4434449048 ps |
| T1132 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.512511507 |
|
|
Jul 12 07:59:11 PM PDT 24 |
Jul 12 08:10:21 PM PDT 24 |
4583819716 ps |
| T700 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.105118148 |
|
|
Jul 12 08:22:30 PM PDT 24 |
Jul 12 08:31:50 PM PDT 24 |
4834076610 ps |
| T1133 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2329866196 |
|
|
Jul 12 08:06:47 PM PDT 24 |
Jul 12 08:18:43 PM PDT 24 |
4174266079 ps |
| T1134 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.829975005 |
|
|
Jul 12 08:25:09 PM PDT 24 |
Jul 12 08:31:22 PM PDT 24 |
3677925386 ps |
| T1135 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.32596240 |
|
|
Jul 12 07:46:37 PM PDT 24 |
Jul 12 07:56:19 PM PDT 24 |
4990812992 ps |
| T1136 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.1460714164 |
|
|
Jul 12 07:59:31 PM PDT 24 |
Jul 12 09:49:00 PM PDT 24 |
23215827247 ps |
| T1137 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.1839898139 |
|
|
Jul 12 08:16:11 PM PDT 24 |
Jul 12 09:07:09 PM PDT 24 |
14652106567 ps |
| T1138 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.4049032356 |
|
|
Jul 12 08:13:51 PM PDT 24 |
Jul 12 08:25:20 PM PDT 24 |
4253603376 ps |
| T365 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.2885490549 |
|
|
Jul 12 07:47:23 PM PDT 24 |
Jul 12 08:01:20 PM PDT 24 |
4957199694 ps |
| T1139 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.2216806300 |
|
|
Jul 12 07:48:10 PM PDT 24 |
Jul 12 07:58:53 PM PDT 24 |
5392750954 ps |
| T683 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.854634217 |
|
|
Jul 12 08:08:29 PM PDT 24 |
Jul 12 08:14:11 PM PDT 24 |
3552633360 ps |
| T653 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1402255201 |
|
|
Jul 12 08:17:56 PM PDT 24 |
Jul 12 08:31:34 PM PDT 24 |
4785388964 ps |
| T1140 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1925134778 |
|
|
Jul 12 07:55:51 PM PDT 24 |
Jul 12 08:02:24 PM PDT 24 |
4902898162 ps |
| T1141 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.2620609759 |
|
|
Jul 12 07:54:36 PM PDT 24 |
Jul 12 09:34:29 PM PDT 24 |
48190168900 ps |
| T72 |
/workspace/coverage/default/2.chip_tap_straps_rma.1722375869 |
|
|
Jul 12 08:10:11 PM PDT 24 |
Jul 12 08:13:36 PM PDT 24 |
3207636858 ps |
| T724 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.128260189 |
|
|
Jul 12 07:56:36 PM PDT 24 |
Jul 12 08:04:43 PM PDT 24 |
3512054312 ps |
| T205 |
/workspace/coverage/default/2.chip_jtag_csr_rw.3975120283 |
|
|
Jul 12 08:03:21 PM PDT 24 |
Jul 12 08:40:40 PM PDT 24 |
20294973050 ps |
| T1142 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.751017561 |
|
|
Jul 12 08:06:09 PM PDT 24 |
Jul 12 08:27:37 PM PDT 24 |
6277465644 ps |
| T1143 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.2195049743 |
|
|
Jul 12 07:57:07 PM PDT 24 |
Jul 12 08:57:01 PM PDT 24 |
14981601160 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.1298327674 |
|
|
Jul 12 07:48:58 PM PDT 24 |
Jul 12 08:01:06 PM PDT 24 |
4664834792 ps |
| T753 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.3298967282 |
|
|
Jul 12 08:26:28 PM PDT 24 |
Jul 12 08:36:47 PM PDT 24 |
6510499314 ps |
| T695 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.158695198 |
|
|
Jul 12 08:28:50 PM PDT 24 |
Jul 12 08:37:38 PM PDT 24 |
5598060192 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3285982097 |
|
|
Jul 12 08:08:00 PM PDT 24 |
Jul 12 08:18:29 PM PDT 24 |
7689251412 ps |
| T716 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1411217309 |
|
|
Jul 12 08:14:32 PM PDT 24 |
Jul 12 08:21:55 PM PDT 24 |
4476679900 ps |
| T1146 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2206977994 |
|
|
Jul 12 08:04:28 PM PDT 24 |
Jul 12 11:50:51 PM PDT 24 |
78301758749 ps |
| T1147 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3980255892 |
|
|
Jul 12 07:53:36 PM PDT 24 |
Jul 12 08:02:43 PM PDT 24 |
10511775800 ps |
| T1148 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.3289883265 |
|
|
Jul 12 07:59:09 PM PDT 24 |
Jul 12 08:39:23 PM PDT 24 |
10469376440 ps |
| T1149 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.318786320 |
|
|
Jul 12 07:55:50 PM PDT 24 |
Jul 12 08:18:38 PM PDT 24 |
9889009668 ps |
| T1150 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.2482134635 |
|
|
Jul 12 07:51:22 PM PDT 24 |
Jul 12 08:52:06 PM PDT 24 |
17208326024 ps |
| T1151 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2375523262 |
|
|
Jul 12 08:19:05 PM PDT 24 |
Jul 12 08:29:01 PM PDT 24 |
5679765832 ps |
| T1152 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.2832119004 |
|
|
Jul 12 08:09:57 PM PDT 24 |
Jul 12 08:20:15 PM PDT 24 |
4967765912 ps |
| T254 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.1922394899 |
|
|
Jul 12 07:54:21 PM PDT 24 |
Jul 12 08:31:13 PM PDT 24 |
10828484792 ps |