T942 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.711325053 |
|
|
Jul 13 08:03:48 PM PDT 24 |
Jul 13 08:14:43 PM PDT 24 |
4685843368 ps |
T85 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.1497392305 |
|
|
Jul 13 08:10:07 PM PDT 24 |
Jul 13 08:35:06 PM PDT 24 |
11215611180 ps |
T943 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.2895284278 |
|
|
Jul 13 07:47:45 PM PDT 24 |
Jul 13 07:56:20 PM PDT 24 |
3806484160 ps |
T944 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.2735975519 |
|
|
Jul 13 08:05:55 PM PDT 24 |
Jul 13 08:15:46 PM PDT 24 |
4173295840 ps |
T255 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.2863676538 |
|
|
Jul 13 07:45:54 PM PDT 24 |
Jul 13 08:36:42 PM PDT 24 |
24266022633 ps |
T254 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.2865694883 |
|
|
Jul 13 07:47:33 PM PDT 24 |
Jul 13 07:51:32 PM PDT 24 |
2644202512 ps |
T437 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.1465420537 |
|
|
Jul 13 08:16:13 PM PDT 24 |
Jul 13 08:23:46 PM PDT 24 |
4405592144 ps |
T945 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3250238928 |
|
|
Jul 13 07:48:34 PM PDT 24 |
Jul 13 07:59:42 PM PDT 24 |
4463089208 ps |
T205 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.3714944162 |
|
|
Jul 13 07:47:15 PM PDT 24 |
Jul 13 07:53:25 PM PDT 24 |
3115938180 ps |
T946 |
/workspace/coverage/default/0.chip_sw_kmac_idle.3646303016 |
|
|
Jul 13 07:44:58 PM PDT 24 |
Jul 13 07:48:55 PM PDT 24 |
2972815316 ps |
T272 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.2636386787 |
|
|
Jul 13 08:07:24 PM PDT 24 |
Jul 13 08:19:45 PM PDT 24 |
5604559712 ps |
T947 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2631663415 |
|
|
Jul 13 08:04:08 PM PDT 24 |
Jul 13 08:13:25 PM PDT 24 |
4500857182 ps |
T49 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.1333854292 |
|
|
Jul 13 07:46:20 PM PDT 24 |
Jul 13 07:52:44 PM PDT 24 |
3239192294 ps |
T948 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2454457979 |
|
|
Jul 13 08:04:23 PM PDT 24 |
Jul 13 08:11:43 PM PDT 24 |
5300155782 ps |
T949 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2127927839 |
|
|
Jul 13 07:43:38 PM PDT 24 |
Jul 13 07:54:18 PM PDT 24 |
4047145292 ps |
T308 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2123147212 |
|
|
Jul 13 07:46:45 PM PDT 24 |
Jul 13 08:07:51 PM PDT 24 |
6124889132 ps |
T950 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.3398082937 |
|
|
Jul 13 07:44:10 PM PDT 24 |
Jul 13 08:01:40 PM PDT 24 |
5448847840 ps |
T9 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3492300966 |
|
|
Jul 13 07:45:44 PM PDT 24 |
Jul 13 08:13:46 PM PDT 24 |
20067807500 ps |
T951 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.930094111 |
|
|
Jul 13 07:48:20 PM PDT 24 |
Jul 13 08:09:51 PM PDT 24 |
16835095161 ps |
T738 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.312498723 |
|
|
Jul 13 07:57:57 PM PDT 24 |
Jul 13 08:03:56 PM PDT 24 |
3449090296 ps |
T312 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.3892581583 |
|
|
Jul 13 08:10:45 PM PDT 24 |
Jul 13 08:19:16 PM PDT 24 |
3928696848 ps |
T952 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3396585711 |
|
|
Jul 13 08:06:35 PM PDT 24 |
Jul 13 08:17:18 PM PDT 24 |
3705162752 ps |
T953 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.2601919621 |
|
|
Jul 13 08:02:45 PM PDT 24 |
Jul 13 08:19:36 PM PDT 24 |
5689438572 ps |
T441 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.2829369095 |
|
|
Jul 13 08:16:29 PM PDT 24 |
Jul 13 08:26:48 PM PDT 24 |
5406530064 ps |
T111 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3786256118 |
|
|
Jul 13 07:56:19 PM PDT 24 |
Jul 13 09:09:28 PM PDT 24 |
21778289775 ps |
T954 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.2901123822 |
|
|
Jul 13 08:05:14 PM PDT 24 |
Jul 13 08:44:40 PM PDT 24 |
29384072519 ps |
T955 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.4052505824 |
|
|
Jul 13 07:46:30 PM PDT 24 |
Jul 13 07:54:15 PM PDT 24 |
3600077900 ps |
T785 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.414129969 |
|
|
Jul 13 08:12:38 PM PDT 24 |
Jul 13 08:20:34 PM PDT 24 |
3765041672 ps |
T249 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.4177209072 |
|
|
Jul 13 08:13:17 PM PDT 24 |
Jul 13 08:23:19 PM PDT 24 |
4187507560 ps |
T956 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.938292317 |
|
|
Jul 13 08:06:24 PM PDT 24 |
Jul 13 08:11:28 PM PDT 24 |
3350916444 ps |
T828 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.483848971 |
|
|
Jul 13 08:09:46 PM PDT 24 |
Jul 13 08:17:49 PM PDT 24 |
4119394592 ps |
T393 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.2446861037 |
|
|
Jul 13 08:01:21 PM PDT 24 |
Jul 13 08:05:30 PM PDT 24 |
3015041380 ps |
T329 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.1450189825 |
|
|
Jul 13 08:11:35 PM PDT 24 |
Jul 13 08:18:51 PM PDT 24 |
3707123684 ps |
T957 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1201176334 |
|
|
Jul 13 07:49:07 PM PDT 24 |
Jul 13 08:00:48 PM PDT 24 |
4633228480 ps |
T958 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.1848297671 |
|
|
Jul 13 07:57:43 PM PDT 24 |
Jul 13 08:04:18 PM PDT 24 |
3296151680 ps |
T210 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2000682980 |
|
|
Jul 13 07:51:42 PM PDT 24 |
Jul 13 08:27:10 PM PDT 24 |
7758026228 ps |
T386 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.3800340839 |
|
|
Jul 13 07:58:46 PM PDT 24 |
Jul 13 09:45:04 PM PDT 24 |
24839647240 ps |
T959 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.560806637 |
|
|
Jul 13 08:11:52 PM PDT 24 |
Jul 13 08:37:43 PM PDT 24 |
8523273792 ps |
T825 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2740219860 |
|
|
Jul 13 08:16:50 PM PDT 24 |
Jul 13 08:24:08 PM PDT 24 |
4167757664 ps |
T35 |
/workspace/coverage/default/0.chip_sw_gpio.1917381928 |
|
|
Jul 13 07:49:27 PM PDT 24 |
Jul 13 07:57:44 PM PDT 24 |
4507476508 ps |
T960 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3785613567 |
|
|
Jul 13 08:10:57 PM PDT 24 |
Jul 13 08:21:40 PM PDT 24 |
8376311934 ps |
T265 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.3218254863 |
|
|
Jul 13 07:45:58 PM PDT 24 |
Jul 13 07:53:11 PM PDT 24 |
9194472098 ps |
T264 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.3991836143 |
|
|
Jul 13 07:55:25 PM PDT 24 |
Jul 13 09:04:36 PM PDT 24 |
14541674484 ps |
T961 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2950606059 |
|
|
Jul 13 08:11:31 PM PDT 24 |
Jul 13 08:18:17 PM PDT 24 |
3964308450 ps |
T325 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.614411381 |
|
|
Jul 13 07:48:14 PM PDT 24 |
Jul 13 08:04:07 PM PDT 24 |
4826873960 ps |
T962 |
/workspace/coverage/default/0.chip_sw_example_concurrency.655034699 |
|
|
Jul 13 07:43:01 PM PDT 24 |
Jul 13 07:46:07 PM PDT 24 |
2925576860 ps |
T534 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1963599004 |
|
|
Jul 13 08:05:47 PM PDT 24 |
Jul 13 08:09:51 PM PDT 24 |
2946733442 ps |
T778 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1465348732 |
|
|
Jul 13 08:15:25 PM PDT 24 |
Jul 13 08:22:27 PM PDT 24 |
3297074388 ps |
T324 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.2425469264 |
|
|
Jul 13 07:48:29 PM PDT 24 |
Jul 13 08:04:12 PM PDT 24 |
4743806078 ps |
T266 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.1967277919 |
|
|
Jul 13 08:03:35 PM PDT 24 |
Jul 13 08:14:39 PM PDT 24 |
8355265566 ps |
T353 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.1642632194 |
|
|
Jul 13 08:01:19 PM PDT 24 |
Jul 13 08:19:19 PM PDT 24 |
4879407440 ps |
T963 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.2685193839 |
|
|
Jul 13 07:49:50 PM PDT 24 |
Jul 13 07:56:00 PM PDT 24 |
3740619960 ps |
T964 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.2107580109 |
|
|
Jul 13 08:07:49 PM PDT 24 |
Jul 13 08:11:45 PM PDT 24 |
2851294104 ps |
T965 |
/workspace/coverage/default/0.chip_sw_coremark.1441060769 |
|
|
Jul 13 07:44:35 PM PDT 24 |
Jul 13 11:55:27 PM PDT 24 |
71969186020 ps |
T966 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.205262097 |
|
|
Jul 13 07:49:04 PM PDT 24 |
Jul 13 07:55:35 PM PDT 24 |
4362658800 ps |
T36 |
/workspace/coverage/default/1.chip_sw_gpio.448062678 |
|
|
Jul 13 07:47:04 PM PDT 24 |
Jul 13 07:55:13 PM PDT 24 |
3968297238 ps |
T74 |
/workspace/coverage/default/4.chip_tap_straps_dev.527541208 |
|
|
Jul 13 08:06:41 PM PDT 24 |
Jul 13 08:20:07 PM PDT 24 |
6884875288 ps |
T967 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.3211209649 |
|
|
Jul 13 07:46:10 PM PDT 24 |
Jul 13 07:54:25 PM PDT 24 |
5040457558 ps |
T449 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.3996522385 |
|
|
Jul 13 07:47:48 PM PDT 24 |
Jul 13 08:09:49 PM PDT 24 |
6961625122 ps |
T968 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3642823880 |
|
|
Jul 13 07:49:41 PM PDT 24 |
Jul 13 07:56:46 PM PDT 24 |
4193844068 ps |
T170 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.271238288 |
|
|
Jul 13 07:46:49 PM PDT 24 |
Jul 13 07:49:56 PM PDT 24 |
2527798287 ps |
T969 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2874987758 |
|
|
Jul 13 07:45:51 PM PDT 24 |
Jul 13 07:49:47 PM PDT 24 |
2867641210 ps |
T970 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.989171996 |
|
|
Jul 13 08:15:08 PM PDT 24 |
Jul 13 09:48:13 PM PDT 24 |
17772388060 ps |
T971 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.1219599213 |
|
|
Jul 13 07:48:40 PM PDT 24 |
Jul 13 08:08:36 PM PDT 24 |
8138122740 ps |
T972 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3862808821 |
|
|
Jul 13 07:50:03 PM PDT 24 |
Jul 13 09:19:41 PM PDT 24 |
18675895100 ps |
T355 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.3405998221 |
|
|
Jul 13 08:17:41 PM PDT 24 |
Jul 13 08:29:54 PM PDT 24 |
4873241022 ps |
T823 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.3830437640 |
|
|
Jul 13 08:10:03 PM PDT 24 |
Jul 13 08:18:26 PM PDT 24 |
3930140600 ps |
T973 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.794745688 |
|
|
Jul 13 07:42:39 PM PDT 24 |
Jul 13 07:46:29 PM PDT 24 |
2791275406 ps |
T442 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.2927874884 |
|
|
Jul 13 08:15:22 PM PDT 24 |
Jul 13 08:26:26 PM PDT 24 |
4584966142 ps |
T382 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.1180383681 |
|
|
Jul 13 07:55:23 PM PDT 24 |
Jul 13 08:05:38 PM PDT 24 |
3467888388 ps |
T974 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.4139982165 |
|
|
Jul 13 08:06:07 PM PDT 24 |
Jul 13 08:10:47 PM PDT 24 |
2738733864 ps |
T31 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3070442802 |
|
|
Jul 13 07:45:33 PM PDT 24 |
Jul 13 08:18:41 PM PDT 24 |
22766803174 ps |
T163 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.2014257478 |
|
|
Jul 13 07:58:33 PM PDT 24 |
Jul 13 08:11:40 PM PDT 24 |
5768962730 ps |
T726 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2578327888 |
|
|
Jul 13 07:46:08 PM PDT 24 |
Jul 13 08:07:32 PM PDT 24 |
8285695128 ps |
T757 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.2353722211 |
|
|
Jul 13 07:57:44 PM PDT 24 |
Jul 13 08:09:12 PM PDT 24 |
5784499090 ps |
T975 |
/workspace/coverage/default/2.chip_sw_example_flash.4272657630 |
|
|
Jul 13 07:57:29 PM PDT 24 |
Jul 13 08:01:26 PM PDT 24 |
3252056528 ps |
T834 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.233926948 |
|
|
Jul 13 08:18:14 PM PDT 24 |
Jul 13 08:27:16 PM PDT 24 |
4172898052 ps |
T976 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.311917946 |
|
|
Jul 13 07:49:38 PM PDT 24 |
Jul 13 09:06:45 PM PDT 24 |
15025053584 ps |
T977 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.4234290414 |
|
|
Jul 13 08:00:13 PM PDT 24 |
Jul 13 08:09:15 PM PDT 24 |
3908636804 ps |
T200 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.217609086 |
|
|
Jul 13 07:45:12 PM PDT 24 |
Jul 13 11:16:16 PM PDT 24 |
64511177105 ps |
T978 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.1326341205 |
|
|
Jul 13 07:43:11 PM PDT 24 |
Jul 13 07:46:35 PM PDT 24 |
2716141286 ps |
T134 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.18732122 |
|
|
Jul 13 07:44:46 PM PDT 24 |
Jul 13 07:51:52 PM PDT 24 |
4269579720 ps |
T979 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.2305114255 |
|
|
Jul 13 07:53:35 PM PDT 24 |
Jul 13 08:17:15 PM PDT 24 |
8055120250 ps |
T980 |
/workspace/coverage/default/1.chip_sw_edn_kat.1017246774 |
|
|
Jul 13 07:49:23 PM PDT 24 |
Jul 13 07:59:07 PM PDT 24 |
3700003440 ps |
T535 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.2462844332 |
|
|
Jul 13 07:45:06 PM PDT 24 |
Jul 13 07:49:11 PM PDT 24 |
3097484810 ps |
T86 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.235145194 |
|
|
Jul 13 07:48:40 PM PDT 24 |
Jul 13 08:08:27 PM PDT 24 |
11388530568 ps |
T311 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3539928633 |
|
|
Jul 13 07:48:21 PM PDT 24 |
Jul 13 07:57:38 PM PDT 24 |
4370069243 ps |
T383 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2581961129 |
|
|
Jul 13 07:44:26 PM PDT 24 |
Jul 13 07:53:21 PM PDT 24 |
5546873000 ps |
T814 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.4015862991 |
|
|
Jul 13 08:12:42 PM PDT 24 |
Jul 13 08:18:51 PM PDT 24 |
4312462056 ps |
T175 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.84334017 |
|
|
Jul 13 07:55:21 PM PDT 24 |
Jul 13 08:07:23 PM PDT 24 |
7919188436 ps |
T981 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.3853300479 |
|
|
Jul 13 08:10:58 PM PDT 24 |
Jul 13 08:58:14 PM PDT 24 |
11762386216 ps |
T830 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.595232883 |
|
|
Jul 13 08:16:27 PM PDT 24 |
Jul 13 08:31:47 PM PDT 24 |
4768441434 ps |
T180 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.499946431 |
|
|
Jul 13 07:43:55 PM PDT 24 |
Jul 13 09:21:48 PM PDT 24 |
43342946628 ps |
T982 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.3410068937 |
|
|
Jul 13 08:04:06 PM PDT 24 |
Jul 13 08:14:50 PM PDT 24 |
3545379980 ps |
T366 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.4171097978 |
|
|
Jul 13 08:17:01 PM PDT 24 |
Jul 13 08:24:57 PM PDT 24 |
4136312672 ps |
T983 |
/workspace/coverage/default/2.chip_sw_hmac_enc.1687912440 |
|
|
Jul 13 08:03:13 PM PDT 24 |
Jul 13 08:08:25 PM PDT 24 |
2802909784 ps |
T984 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2424939883 |
|
|
Jul 13 08:00:55 PM PDT 24 |
Jul 13 08:12:25 PM PDT 24 |
7716964786 ps |
T985 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.3453689437 |
|
|
Jul 13 07:58:28 PM PDT 24 |
Jul 13 08:03:41 PM PDT 24 |
3175616078 ps |
T775 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.1490166882 |
|
|
Jul 13 08:14:37 PM PDT 24 |
Jul 13 08:22:42 PM PDT 24 |
4700129960 ps |
T32 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.4122129562 |
|
|
Jul 13 07:49:31 PM PDT 24 |
Jul 13 08:21:42 PM PDT 24 |
22148135728 ps |
T986 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3189991654 |
|
|
Jul 13 08:00:52 PM PDT 24 |
Jul 13 08:29:56 PM PDT 24 |
18775653156 ps |
T987 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1917131256 |
|
|
Jul 13 07:50:46 PM PDT 24 |
Jul 13 08:06:36 PM PDT 24 |
10401034892 ps |
T763 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.33343177 |
|
|
Jul 13 08:10:27 PM PDT 24 |
Jul 13 08:21:53 PM PDT 24 |
5027554280 ps |
T988 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.3615133281 |
|
|
Jul 13 07:49:17 PM PDT 24 |
Jul 13 09:00:35 PM PDT 24 |
14889820895 ps |
T831 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1339848820 |
|
|
Jul 13 08:15:25 PM PDT 24 |
Jul 13 08:22:38 PM PDT 24 |
3589148660 ps |
T989 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.201376138 |
|
|
Jul 13 07:49:11 PM PDT 24 |
Jul 13 08:53:26 PM PDT 24 |
14979934866 ps |
T990 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.318771190 |
|
|
Jul 13 08:10:06 PM PDT 24 |
Jul 13 09:19:16 PM PDT 24 |
14993772336 ps |
T991 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.3726587543 |
|
|
Jul 13 07:47:41 PM PDT 24 |
Jul 13 08:08:13 PM PDT 24 |
5671714622 ps |
T21 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2361202164 |
|
|
Jul 13 07:59:27 PM PDT 24 |
Jul 13 08:04:51 PM PDT 24 |
3215781013 ps |
T706 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2978112265 |
|
|
Jul 13 08:01:53 PM PDT 24 |
Jul 13 08:03:48 PM PDT 24 |
2893260779 ps |
T992 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.2894363922 |
|
|
Jul 13 07:46:25 PM PDT 24 |
Jul 13 08:06:49 PM PDT 24 |
6496885046 ps |
T993 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.2929598568 |
|
|
Jul 13 07:53:33 PM PDT 24 |
Jul 13 09:31:29 PM PDT 24 |
23554465692 ps |
T994 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.1497984838 |
|
|
Jul 13 08:07:14 PM PDT 24 |
Jul 13 08:27:08 PM PDT 24 |
5261559662 ps |
T995 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.783867318 |
|
|
Jul 13 08:00:59 PM PDT 24 |
Jul 13 09:08:31 PM PDT 24 |
18733637528 ps |
T996 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.2122761772 |
|
|
Jul 13 07:43:44 PM PDT 24 |
Jul 13 08:24:16 PM PDT 24 |
19577498616 ps |
T317 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.3408629303 |
|
|
Jul 13 07:59:35 PM PDT 24 |
Jul 13 08:11:07 PM PDT 24 |
4837549000 ps |
T997 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.1036590268 |
|
|
Jul 13 07:45:10 PM PDT 24 |
Jul 13 08:33:23 PM PDT 24 |
12691236400 ps |
T280 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.975249460 |
|
|
Jul 13 08:09:21 PM PDT 24 |
Jul 13 08:16:25 PM PDT 24 |
3900517802 ps |
T768 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.2497549672 |
|
|
Jul 13 08:10:01 PM PDT 24 |
Jul 13 08:22:38 PM PDT 24 |
5011126740 ps |
T756 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.994247021 |
|
|
Jul 13 08:12:48 PM PDT 24 |
Jul 13 08:24:40 PM PDT 24 |
5990244786 ps |
T998 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2377546541 |
|
|
Jul 13 07:45:03 PM PDT 24 |
Jul 13 07:49:19 PM PDT 24 |
2732903720 ps |
T243 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.3982892820 |
|
|
Jul 13 08:08:41 PM PDT 24 |
Jul 13 08:17:25 PM PDT 24 |
4470430640 ps |
T999 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.4063953215 |
|
|
Jul 13 08:10:23 PM PDT 24 |
Jul 13 08:20:16 PM PDT 24 |
5842246856 ps |
T1000 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.94312805 |
|
|
Jul 13 08:06:04 PM PDT 24 |
Jul 13 08:10:50 PM PDT 24 |
3085882560 ps |
T744 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.2955293970 |
|
|
Jul 13 08:17:07 PM PDT 24 |
Jul 13 08:24:17 PM PDT 24 |
3324802612 ps |
T1001 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.1987619298 |
|
|
Jul 13 08:07:01 PM PDT 24 |
Jul 13 08:42:03 PM PDT 24 |
9348518152 ps |
T1002 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.334838379 |
|
|
Jul 13 07:45:03 PM PDT 24 |
Jul 13 07:56:20 PM PDT 24 |
4424469210 ps |
T12 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3883951559 |
|
|
Jul 13 07:52:34 PM PDT 24 |
Jul 13 08:01:39 PM PDT 24 |
6956898760 ps |
T1003 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.815549887 |
|
|
Jul 13 07:53:30 PM PDT 24 |
Jul 13 08:02:44 PM PDT 24 |
4997503972 ps |
T746 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.475027293 |
|
|
Jul 13 08:17:37 PM PDT 24 |
Jul 13 08:23:31 PM PDT 24 |
3257552104 ps |
T1004 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.2901126897 |
|
|
Jul 13 07:58:02 PM PDT 24 |
Jul 13 08:03:15 PM PDT 24 |
3082400624 ps |
T1005 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.2962801218 |
|
|
Jul 13 08:10:21 PM PDT 24 |
Jul 13 08:19:30 PM PDT 24 |
7531606743 ps |
T1006 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1353296302 |
|
|
Jul 13 07:44:35 PM PDT 24 |
Jul 13 07:51:54 PM PDT 24 |
4457732056 ps |
T1007 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.2409755917 |
|
|
Jul 13 08:00:26 PM PDT 24 |
Jul 13 08:23:34 PM PDT 24 |
8824470434 ps |
T1008 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.4162091399 |
|
|
Jul 13 08:04:32 PM PDT 24 |
Jul 13 08:09:44 PM PDT 24 |
3239482016 ps |
T1009 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.2942132278 |
|
|
Jul 13 07:51:12 PM PDT 24 |
Jul 13 08:55:19 PM PDT 24 |
15446506642 ps |
T405 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.3182242223 |
|
|
Jul 13 07:49:29 PM PDT 24 |
Jul 13 07:52:22 PM PDT 24 |
2643608920 ps |
T89 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.76607212 |
|
|
Jul 13 08:17:59 PM PDT 24 |
Jul 13 08:24:07 PM PDT 24 |
3060995160 ps |
T357 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.3138095383 |
|
|
Jul 13 08:13:32 PM PDT 24 |
Jul 13 08:25:24 PM PDT 24 |
5937033900 ps |
T1010 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.4077020614 |
|
|
Jul 13 08:05:52 PM PDT 24 |
Jul 13 08:17:46 PM PDT 24 |
7038726448 ps |
T1011 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.1714935210 |
|
|
Jul 13 08:10:22 PM PDT 24 |
Jul 13 10:23:29 PM PDT 24 |
34927869912 ps |
T1012 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.112626018 |
|
|
Jul 13 08:04:42 PM PDT 24 |
Jul 13 08:09:24 PM PDT 24 |
2995428676 ps |
T176 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.4105063983 |
|
|
Jul 13 07:56:30 PM PDT 24 |
Jul 13 08:00:14 PM PDT 24 |
2526953982 ps |
T288 |
/workspace/coverage/default/3.chip_tap_straps_prod.2750057376 |
|
|
Jul 13 08:06:24 PM PDT 24 |
Jul 13 08:09:13 PM PDT 24 |
2891621315 ps |
T289 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.2479993217 |
|
|
Jul 13 08:07:46 PM PDT 24 |
Jul 13 08:12:28 PM PDT 24 |
3160428914 ps |
T290 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.2381830500 |
|
|
Jul 13 07:53:12 PM PDT 24 |
Jul 13 07:59:44 PM PDT 24 |
3266481080 ps |
T291 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3829346401 |
|
|
Jul 13 07:44:37 PM PDT 24 |
Jul 13 07:56:21 PM PDT 24 |
4073582524 ps |
T292 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.3400064263 |
|
|
Jul 13 07:42:29 PM PDT 24 |
Jul 13 08:04:10 PM PDT 24 |
7315815900 ps |
T293 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.3787727890 |
|
|
Jul 13 08:07:06 PM PDT 24 |
Jul 13 08:12:35 PM PDT 24 |
3179814113 ps |
T294 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.1433294170 |
|
|
Jul 13 07:51:07 PM PDT 24 |
Jul 13 08:51:44 PM PDT 24 |
14219104812 ps |
T295 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.2750069756 |
|
|
Jul 13 08:11:59 PM PDT 24 |
Jul 13 08:22:43 PM PDT 24 |
5422685996 ps |
T296 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1310128341 |
|
|
Jul 13 07:51:17 PM PDT 24 |
Jul 13 07:57:43 PM PDT 24 |
4306829700 ps |
T739 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.932457671 |
|
|
Jul 13 08:13:47 PM PDT 24 |
Jul 13 08:23:00 PM PDT 24 |
5753463728 ps |
T1013 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.1057810404 |
|
|
Jul 13 08:03:20 PM PDT 24 |
Jul 13 08:09:53 PM PDT 24 |
3567413425 ps |
T1014 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3851731466 |
|
|
Jul 13 07:44:25 PM PDT 24 |
Jul 13 08:25:43 PM PDT 24 |
20012914124 ps |
T117 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3262434958 |
|
|
Jul 13 07:57:15 PM PDT 24 |
Jul 13 08:25:26 PM PDT 24 |
12029548363 ps |
T1015 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.3577729389 |
|
|
Jul 13 07:55:48 PM PDT 24 |
Jul 13 09:19:02 PM PDT 24 |
15631032798 ps |
T1016 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.73296645 |
|
|
Jul 13 08:09:17 PM PDT 24 |
Jul 13 08:19:48 PM PDT 24 |
3884308396 ps |
T1017 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1207410129 |
|
|
Jul 13 07:48:51 PM PDT 24 |
Jul 13 08:00:08 PM PDT 24 |
3930638312 ps |
T1018 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.3583971562 |
|
|
Jul 13 08:00:14 PM PDT 24 |
Jul 13 09:39:13 PM PDT 24 |
18146541640 ps |
T1019 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1016921842 |
|
|
Jul 13 08:05:31 PM PDT 24 |
Jul 13 08:17:40 PM PDT 24 |
4580498216 ps |
T703 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1677198066 |
|
|
Jul 13 07:53:45 PM PDT 24 |
Jul 13 08:01:56 PM PDT 24 |
5081672902 ps |
T1020 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.2049485414 |
|
|
Jul 13 08:06:51 PM PDT 24 |
Jul 13 08:27:19 PM PDT 24 |
10831288140 ps |
T707 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.3179803334 |
|
|
Jul 13 07:43:14 PM PDT 24 |
Jul 13 07:44:57 PM PDT 24 |
2995730086 ps |
T1021 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.37007366 |
|
|
Jul 13 07:50:26 PM PDT 24 |
Jul 13 07:53:46 PM PDT 24 |
2850330904 ps |
T1022 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.2358321142 |
|
|
Jul 13 07:55:43 PM PDT 24 |
Jul 13 08:59:34 PM PDT 24 |
11127385126 ps |
T1023 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.3236549142 |
|
|
Jul 13 07:52:53 PM PDT 24 |
Jul 13 08:47:50 PM PDT 24 |
15131501730 ps |
T7 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.3338172580 |
|
|
Jul 13 07:46:19 PM PDT 24 |
Jul 13 07:51:47 PM PDT 24 |
3710502406 ps |
T147 |
/workspace/coverage/default/2.rom_raw_unlock.2837934475 |
|
|
Jul 13 08:06:12 PM PDT 24 |
Jul 13 08:10:15 PM PDT 24 |
5818506120 ps |
T431 |
/workspace/coverage/default/0.chip_sw_example_rom.1429470229 |
|
|
Jul 13 07:42:52 PM PDT 24 |
Jul 13 07:45:01 PM PDT 24 |
2209062380 ps |
T432 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.4097650155 |
|
|
Jul 13 07:50:52 PM PDT 24 |
Jul 13 07:55:07 PM PDT 24 |
2584814932 ps |
T433 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.2487370623 |
|
|
Jul 13 08:01:06 PM PDT 24 |
Jul 13 08:48:18 PM PDT 24 |
11231370328 ps |
T141 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.192551147 |
|
|
Jul 13 08:02:19 PM PDT 24 |
Jul 13 08:08:49 PM PDT 24 |
7203175570 ps |
T434 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.1308948497 |
|
|
Jul 13 08:00:50 PM PDT 24 |
Jul 13 08:06:37 PM PDT 24 |
3008708280 ps |
T239 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.80887880 |
|
|
Jul 13 07:46:52 PM PDT 24 |
Jul 13 09:17:00 PM PDT 24 |
48992087425 ps |
T367 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2029407608 |
|
|
Jul 13 08:16:54 PM PDT 24 |
Jul 13 08:23:12 PM PDT 24 |
3201444250 ps |
T435 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.417196007 |
|
|
Jul 13 08:14:49 PM PDT 24 |
Jul 13 08:24:22 PM PDT 24 |
5088729970 ps |
T803 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.222724743 |
|
|
Jul 13 08:17:41 PM PDT 24 |
Jul 13 08:28:17 PM PDT 24 |
5079326042 ps |
T759 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.2954117999 |
|
|
Jul 13 08:10:54 PM PDT 24 |
Jul 13 08:19:04 PM PDT 24 |
5453676000 ps |
T1024 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.401038393 |
|
|
Jul 13 08:07:11 PM PDT 24 |
Jul 13 08:14:54 PM PDT 24 |
5393413200 ps |
T1025 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2321281876 |
|
|
Jul 13 07:46:51 PM PDT 24 |
Jul 13 07:58:45 PM PDT 24 |
4180546116 ps |
T131 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.3339774236 |
|
|
Jul 13 08:07:47 PM PDT 24 |
Jul 13 08:29:14 PM PDT 24 |
8746548200 ps |
T532 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3383206843 |
|
|
Jul 13 07:46:41 PM PDT 24 |
Jul 13 08:20:44 PM PDT 24 |
13026961937 ps |
T1026 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.1958773649 |
|
|
Jul 13 08:00:42 PM PDT 24 |
Jul 13 08:08:34 PM PDT 24 |
4555760004 ps |
T740 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1389964273 |
|
|
Jul 13 08:16:03 PM PDT 24 |
Jul 13 08:23:19 PM PDT 24 |
3573605690 ps |
T1027 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2520293725 |
|
|
Jul 13 07:53:21 PM PDT 24 |
Jul 13 08:05:17 PM PDT 24 |
4253860872 ps |
T1028 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2384607277 |
|
|
Jul 13 08:06:51 PM PDT 24 |
Jul 13 08:18:00 PM PDT 24 |
4609752404 ps |
T1029 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.3343031502 |
|
|
Jul 13 07:49:30 PM PDT 24 |
Jul 13 08:15:13 PM PDT 24 |
6198037768 ps |
T1030 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.1458518236 |
|
|
Jul 13 07:57:23 PM PDT 24 |
Jul 13 08:06:12 PM PDT 24 |
3268236028 ps |
T360 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.3975216231 |
|
|
Jul 13 07:48:21 PM PDT 24 |
Jul 13 07:54:40 PM PDT 24 |
3034073200 ps |
T1031 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.2898856566 |
|
|
Jul 13 07:50:28 PM PDT 24 |
Jul 13 08:57:30 PM PDT 24 |
15123690684 ps |
T67 |
/workspace/coverage/default/2.chip_tap_straps_rma.1883139744 |
|
|
Jul 13 08:05:26 PM PDT 24 |
Jul 13 08:19:08 PM PDT 24 |
8166798828 ps |
T1032 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.1737002151 |
|
|
Jul 13 07:59:05 PM PDT 24 |
Jul 13 08:03:44 PM PDT 24 |
2458509708 ps |
T132 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1717660216 |
|
|
Jul 13 07:51:10 PM PDT 24 |
Jul 13 08:06:29 PM PDT 24 |
7605793560 ps |
T760 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.3715620133 |
|
|
Jul 13 08:15:39 PM PDT 24 |
Jul 13 08:23:17 PM PDT 24 |
3436662350 ps |
T1033 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.997237504 |
|
|
Jul 13 07:53:12 PM PDT 24 |
Jul 13 08:02:03 PM PDT 24 |
4549819822 ps |
T1034 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.1302817153 |
|
|
Jul 13 07:57:41 PM PDT 24 |
Jul 13 08:03:39 PM PDT 24 |
3605499480 ps |
T68 |
/workspace/coverage/default/0.chip_tap_straps_rma.3133739854 |
|
|
Jul 13 07:43:38 PM PDT 24 |
Jul 13 07:46:26 PM PDT 24 |
2687115420 ps |
T1035 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1039445050 |
|
|
Jul 13 08:05:59 PM PDT 24 |
Jul 13 08:12:34 PM PDT 24 |
5528182024 ps |
T33 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.130325546 |
|
|
Jul 13 07:45:23 PM PDT 24 |
Jul 13 08:18:47 PM PDT 24 |
7965146510 ps |
T767 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.2349421571 |
|
|
Jul 13 08:17:13 PM PDT 24 |
Jul 13 08:29:28 PM PDT 24 |
5100035548 ps |
T745 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.627233927 |
|
|
Jul 13 08:09:38 PM PDT 24 |
Jul 13 08:20:50 PM PDT 24 |
5879349362 ps |
T708 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2794830427 |
|
|
Jul 13 07:44:57 PM PDT 24 |
Jul 13 07:47:40 PM PDT 24 |
3643800279 ps |
T826 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3518978951 |
|
|
Jul 13 08:17:06 PM PDT 24 |
Jul 13 08:22:51 PM PDT 24 |
3675483146 ps |
T1036 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.1655994393 |
|
|
Jul 13 07:45:43 PM PDT 24 |
Jul 13 08:03:58 PM PDT 24 |
5330561044 ps |
T1037 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.1412736744 |
|
|
Jul 13 07:57:08 PM PDT 24 |
Jul 13 08:02:34 PM PDT 24 |
3083533074 ps |
T709 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.4022240744 |
|
|
Jul 13 07:45:18 PM PDT 24 |
Jul 13 07:47:23 PM PDT 24 |
2781164396 ps |
T1038 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.419932459 |
|
|
Jul 13 08:05:36 PM PDT 24 |
Jul 13 09:11:07 PM PDT 24 |
24798006729 ps |
T235 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1471415169 |
|
|
Jul 13 07:54:37 PM PDT 24 |
Jul 13 08:33:59 PM PDT 24 |
22539377644 ps |
T228 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.2335808755 |
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|
Jul 13 07:46:57 PM PDT 24 |
Jul 13 08:25:08 PM PDT 24 |
9002417474 ps |
T79 |
/workspace/coverage/default/2.chip_jtag_csr_rw.1426618264 |
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|
Jul 13 07:56:59 PM PDT 24 |
Jul 13 08:21:34 PM PDT 24 |
13837846374 ps |
T1039 |
/workspace/coverage/default/0.chip_sw_aes_idle.2874318070 |
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|
Jul 13 07:48:25 PM PDT 24 |
Jul 13 07:52:20 PM PDT 24 |
2838963600 ps |
T741 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.1153512244 |
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|
Jul 13 08:15:23 PM PDT 24 |
Jul 13 08:24:55 PM PDT 24 |
5230085354 ps |
T1040 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.2931731446 |
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|
Jul 13 07:46:11 PM PDT 24 |
Jul 13 07:50:49 PM PDT 24 |
2740823117 ps |
T177 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.1904101098 |
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|
Jul 13 07:44:26 PM PDT 24 |
Jul 13 07:48:30 PM PDT 24 |
3473642886 ps |
T142 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1173172706 |
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|
Jul 13 07:44:25 PM PDT 24 |
Jul 13 07:53:49 PM PDT 24 |
9487461544 ps |
T1041 |
/workspace/coverage/default/2.rom_e2e_smoke.1326311444 |
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|
Jul 13 08:09:11 PM PDT 24 |
Jul 13 09:10:30 PM PDT 24 |
15025555120 ps |
T361 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.2323291042 |
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|
Jul 13 08:01:29 PM PDT 24 |
Jul 13 08:08:00 PM PDT 24 |
3294651948 ps |
T1042 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3812343725 |
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|
Jul 13 08:06:59 PM PDT 24 |
Jul 13 08:13:42 PM PDT 24 |
3605646562 ps |
T172 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.3427287018 |
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|
Jul 13 07:50:15 PM PDT 24 |
Jul 13 08:03:22 PM PDT 24 |
7743961904 ps |
T1043 |
/workspace/coverage/default/1.chip_sival_flash_info_access.1804126120 |
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|
Jul 13 07:45:35 PM PDT 24 |
Jul 13 07:49:49 PM PDT 24 |
2630827860 ps |
T1044 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.2492352656 |
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|
Jul 13 07:51:02 PM PDT 24 |
Jul 13 07:56:33 PM PDT 24 |
2366350970 ps |
T1045 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.3977963279 |
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|
Jul 13 07:48:24 PM PDT 24 |
Jul 13 07:56:06 PM PDT 24 |
3306191400 ps |
T1046 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.479878036 |
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|
Jul 13 07:53:54 PM PDT 24 |
Jul 13 09:02:30 PM PDT 24 |
13961348920 ps |
T332 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.3056800667 |
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|
Jul 13 08:02:13 PM PDT 24 |
Jul 13 08:12:57 PM PDT 24 |
3839118730 ps |
T1047 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.429836153 |
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|
Jul 13 08:09:31 PM PDT 24 |
Jul 13 09:00:05 PM PDT 24 |
11499417107 ps |
T1048 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.546345453 |
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|
Jul 13 08:09:22 PM PDT 24 |
Jul 13 08:26:41 PM PDT 24 |
5269765504 ps |
T387 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.1185687662 |
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|
Jul 13 08:06:28 PM PDT 24 |
Jul 13 08:10:54 PM PDT 24 |
2417756360 ps |
T328 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.1303866440 |
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|
Jul 13 07:47:30 PM PDT 24 |
Jul 13 08:00:26 PM PDT 24 |
4049316116 ps |
T1049 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.108112945 |
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|
Jul 13 08:02:54 PM PDT 24 |
Jul 13 08:08:01 PM PDT 24 |
3152254312 ps |
T816 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.2799514481 |
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|
Jul 13 08:08:40 PM PDT 24 |
Jul 13 08:14:47 PM PDT 24 |
4190662636 ps |
T1050 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.2681420888 |
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|
Jul 13 08:09:05 PM PDT 24 |
Jul 13 08:14:52 PM PDT 24 |
3676242548 ps |
T72 |
/workspace/coverage/default/4.chip_tap_straps_rma.2133975793 |
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|
Jul 13 08:07:38 PM PDT 24 |
Jul 13 08:15:42 PM PDT 24 |
4202162353 ps |
T817 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.2932549599 |
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|
Jul 13 08:12:26 PM PDT 24 |
Jul 13 08:19:27 PM PDT 24 |
3763081368 ps |
T1051 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.1763020876 |
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|
Jul 13 07:51:07 PM PDT 24 |
Jul 13 07:55:32 PM PDT 24 |
3451109808 ps |
T334 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.1261645982 |
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|
Jul 13 08:04:13 PM PDT 24 |
Jul 13 08:09:52 PM PDT 24 |
3472949160 ps |
T1052 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.3632728161 |
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|
Jul 13 07:51:21 PM PDT 24 |
Jul 13 08:53:18 PM PDT 24 |
17196515896 ps |
T1053 |
/workspace/coverage/default/0.chip_sw_example_flash.3816343447 |
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|
Jul 13 07:46:18 PM PDT 24 |
Jul 13 07:51:17 PM PDT 24 |
2966377114 ps |
T13 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.1241669082 |
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|
Jul 13 07:53:07 PM PDT 24 |
Jul 13 08:25:18 PM PDT 24 |
22461739648 ps |
T1054 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.224435043 |
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|
Jul 13 08:00:08 PM PDT 24 |
Jul 13 08:05:21 PM PDT 24 |
2632465560 ps |
T802 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2740306854 |
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|
Jul 13 08:16:19 PM PDT 24 |
Jul 13 08:22:28 PM PDT 24 |
3762382404 ps |
T47 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.820921547 |
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|
Jul 13 08:00:34 PM PDT 24 |
Jul 13 08:10:02 PM PDT 24 |
6248070754 ps |
T1055 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.122427979 |
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|
Jul 13 07:48:09 PM PDT 24 |
Jul 13 07:54:03 PM PDT 24 |
3695866104 ps |
T1056 |
/workspace/coverage/default/1.chip_sw_example_rom.1258146833 |
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|
Jul 13 07:44:33 PM PDT 24 |
Jul 13 07:46:18 PM PDT 24 |
2205717684 ps |
T297 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1248038361 |
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|
Jul 13 08:03:22 PM PDT 24 |
Jul 13 08:18:07 PM PDT 24 |
6942546795 ps |
T1057 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.1070118837 |
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|
Jul 13 07:49:09 PM PDT 24 |
Jul 13 08:54:56 PM PDT 24 |
19169915053 ps |
T241 |
/workspace/coverage/default/2.chip_sw_flash_init.1046890906 |
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|
Jul 13 08:01:25 PM PDT 24 |
Jul 13 08:36:08 PM PDT 24 |
18134953472 ps |
T727 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3221901551 |
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|
Jul 13 07:58:55 PM PDT 24 |
Jul 13 08:20:27 PM PDT 24 |
8418681216 ps |
T1058 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.255473234 |
|
|
Jul 13 08:02:24 PM PDT 24 |
Jul 13 08:26:23 PM PDT 24 |
8292418080 ps |
T1059 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.3627017736 |
|
|
Jul 13 08:15:11 PM PDT 24 |
Jul 13 08:26:28 PM PDT 24 |
5074514000 ps |