| T443 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1847240614 |
|
|
Jul 13 08:19:15 PM PDT 24 |
Jul 13 08:30:00 PM PDT 24 |
5609278984 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1364163132 |
|
|
Jul 13 07:50:11 PM PDT 24 |
Jul 13 08:33:20 PM PDT 24 |
20948415721 ps |
| T812 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.2986356765 |
|
|
Jul 13 08:12:34 PM PDT 24 |
Jul 13 08:20:25 PM PDT 24 |
3385558718 ps |
| T808 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.1425160024 |
|
|
Jul 13 08:13:52 PM PDT 24 |
Jul 13 08:19:15 PM PDT 24 |
3034827002 ps |
| T26 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.2779606712 |
|
|
Jul 13 08:00:26 PM PDT 24 |
Jul 13 08:08:48 PM PDT 24 |
4727420418 ps |
| T1061 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.3344441488 |
|
|
Jul 13 07:47:57 PM PDT 24 |
Jul 13 08:06:34 PM PDT 24 |
8051020599 ps |
| T42 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3155090009 |
|
|
Jul 13 07:47:11 PM PDT 24 |
Jul 13 07:51:30 PM PDT 24 |
2696815208 ps |
| T1062 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.634566691 |
|
|
Jul 13 08:02:50 PM PDT 24 |
Jul 13 08:09:43 PM PDT 24 |
4141184072 ps |
| T1063 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1080260622 |
|
|
Jul 13 07:52:40 PM PDT 24 |
Jul 13 08:05:47 PM PDT 24 |
8925433501 ps |
| T75 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.2415393657 |
|
|
Jul 13 07:42:27 PM PDT 24 |
Jul 13 07:48:23 PM PDT 24 |
3218943276 ps |
| T1064 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.2142402031 |
|
|
Jul 13 08:00:02 PM PDT 24 |
Jul 13 08:07:46 PM PDT 24 |
3843896994 ps |
| T1065 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.1707376933 |
|
|
Jul 13 08:09:07 PM PDT 24 |
Jul 13 08:13:30 PM PDT 24 |
3016464248 ps |
| T1066 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.4019453700 |
|
|
Jul 13 07:48:26 PM PDT 24 |
Jul 13 07:55:18 PM PDT 24 |
4917654596 ps |
| T750 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3606052604 |
|
|
Jul 13 08:12:43 PM PDT 24 |
Jul 13 08:19:27 PM PDT 24 |
4166222148 ps |
| T1067 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1216618793 |
|
|
Jul 13 08:00:07 PM PDT 24 |
Jul 13 09:19:58 PM PDT 24 |
15313738660 ps |
| T1068 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3957064274 |
|
|
Jul 13 07:52:17 PM PDT 24 |
Jul 13 08:05:49 PM PDT 24 |
4885404082 ps |
| T1069 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.229624168 |
|
|
Jul 13 08:13:48 PM PDT 24 |
Jul 13 08:20:34 PM PDT 24 |
3593736500 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.3484335934 |
|
|
Jul 13 08:03:28 PM PDT 24 |
Jul 13 08:29:32 PM PDT 24 |
8237947829 ps |
| T1071 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.2360945864 |
|
|
Jul 13 07:49:29 PM PDT 24 |
Jul 13 08:57:30 PM PDT 24 |
15978242868 ps |
| T1072 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.3128122530 |
|
|
Jul 13 07:48:28 PM PDT 24 |
Jul 13 07:52:33 PM PDT 24 |
3035192360 ps |
| T201 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.1300759978 |
|
|
Jul 13 07:45:34 PM PDT 24 |
Jul 13 11:39:53 PM PDT 24 |
77713531996 ps |
| T337 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.3064906573 |
|
|
Jul 13 07:47:30 PM PDT 24 |
Jul 13 07:55:53 PM PDT 24 |
4047829416 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_flash_init.237482108 |
|
|
Jul 13 07:44:59 PM PDT 24 |
Jul 13 08:27:57 PM PDT 24 |
20772262218 ps |
| T62 |
/workspace/coverage/default/2.chip_sw_alert_test.3037331470 |
|
|
Jul 13 08:02:25 PM PDT 24 |
Jul 13 08:07:38 PM PDT 24 |
3233717144 ps |
| T440 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.115986997 |
|
|
Jul 13 08:02:21 PM PDT 24 |
Jul 13 11:42:24 PM PDT 24 |
255823788306 ps |
| T1074 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.2787225452 |
|
|
Jul 13 08:10:28 PM PDT 24 |
Jul 13 08:13:55 PM PDT 24 |
2629667300 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.997975122 |
|
|
Jul 13 07:43:40 PM PDT 24 |
Jul 13 07:49:16 PM PDT 24 |
3074460220 ps |
| T273 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1605302892 |
|
|
Jul 13 08:03:03 PM PDT 24 |
Jul 13 08:13:14 PM PDT 24 |
3364451028 ps |
| T43 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.546286925 |
|
|
Jul 13 07:59:17 PM PDT 24 |
Jul 13 08:03:59 PM PDT 24 |
3123134940 ps |
| T320 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.1399711410 |
|
|
Jul 13 07:50:16 PM PDT 24 |
Jul 13 08:20:22 PM PDT 24 |
7120516940 ps |
| T354 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.1484666781 |
|
|
Jul 13 07:47:48 PM PDT 24 |
Jul 13 07:56:55 PM PDT 24 |
3607865144 ps |
| T1075 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.3321533072 |
|
|
Jul 13 07:54:04 PM PDT 24 |
Jul 13 08:58:39 PM PDT 24 |
15196973899 ps |
| T438 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.2513352750 |
|
|
Jul 13 07:48:05 PM PDT 24 |
Jul 13 08:30:31 PM PDT 24 |
11521822823 ps |
| T1076 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.1669369237 |
|
|
Jul 13 07:56:12 PM PDT 24 |
Jul 13 08:00:06 PM PDT 24 |
2422087042 ps |
| T770 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2938217923 |
|
|
Jul 13 08:15:07 PM PDT 24 |
Jul 13 08:26:09 PM PDT 24 |
5784824056 ps |
| T436 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.3888613735 |
|
|
Jul 13 07:51:59 PM PDT 24 |
Jul 13 08:35:44 PM PDT 24 |
32317339545 ps |
| T771 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.4221828968 |
|
|
Jul 13 08:17:28 PM PDT 24 |
Jul 13 08:30:37 PM PDT 24 |
5385507990 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.243690222 |
|
|
Jul 13 07:45:28 PM PDT 24 |
Jul 13 08:03:21 PM PDT 24 |
5589537458 ps |
| T1078 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.2985164652 |
|
|
Jul 13 08:10:10 PM PDT 24 |
Jul 13 08:18:20 PM PDT 24 |
5988195900 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3329030512 |
|
|
Jul 13 07:44:28 PM PDT 24 |
Jul 13 07:58:00 PM PDT 24 |
6020032160 ps |
| T1080 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.1279720656 |
|
|
Jul 13 07:52:50 PM PDT 24 |
Jul 13 08:02:04 PM PDT 24 |
5087341500 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.1591540152 |
|
|
Jul 13 07:58:07 PM PDT 24 |
Jul 13 08:09:51 PM PDT 24 |
4477583860 ps |
| T835 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.475671706 |
|
|
Jul 13 08:14:55 PM PDT 24 |
Jul 13 08:24:33 PM PDT 24 |
5593694910 ps |
| T1082 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.3261092640 |
|
|
Jul 13 07:43:55 PM PDT 24 |
Jul 13 07:51:13 PM PDT 24 |
5850947226 ps |
| T1083 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.711858575 |
|
|
Jul 13 07:44:57 PM PDT 24 |
Jul 13 08:03:30 PM PDT 24 |
5821251920 ps |
| T237 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1440171631 |
|
|
Jul 13 07:49:17 PM PDT 24 |
Jul 13 09:32:17 PM PDT 24 |
47958271787 ps |
| T1084 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1278017044 |
|
|
Jul 13 08:01:58 PM PDT 24 |
Jul 13 08:26:35 PM PDT 24 |
13043079401 ps |
| T10 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1754109387 |
|
|
Jul 13 07:50:58 PM PDT 24 |
Jul 13 07:55:38 PM PDT 24 |
3186663714 ps |
| T416 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.1733371184 |
|
|
Jul 13 07:47:29 PM PDT 24 |
Jul 13 07:49:34 PM PDT 24 |
3030275617 ps |
| T173 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.534282254 |
|
|
Jul 13 08:02:48 PM PDT 24 |
Jul 13 08:14:43 PM PDT 24 |
5835627878 ps |
| T417 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.2048429924 |
|
|
Jul 13 07:57:12 PM PDT 24 |
Jul 13 08:01:58 PM PDT 24 |
3016531880 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.530642830 |
|
|
Jul 13 08:00:47 PM PDT 24 |
Jul 13 08:11:55 PM PDT 24 |
3871229782 ps |
| T419 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.2318224212 |
|
|
Jul 13 08:09:14 PM PDT 24 |
Jul 13 08:29:39 PM PDT 24 |
10953006047 ps |
| T420 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.687794352 |
|
|
Jul 13 07:54:47 PM PDT 24 |
Jul 13 08:05:54 PM PDT 24 |
4773523309 ps |
| T421 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.355695526 |
|
|
Jul 13 07:49:19 PM PDT 24 |
Jul 13 09:01:33 PM PDT 24 |
18551216405 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.3443889182 |
|
|
Jul 13 07:44:55 PM PDT 24 |
Jul 13 07:49:44 PM PDT 24 |
3579739061 ps |
| T422 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3919820751 |
|
|
Jul 13 07:44:28 PM PDT 24 |
Jul 13 07:57:30 PM PDT 24 |
4037013680 ps |
| T1085 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.3152363585 |
|
|
Jul 13 07:50:08 PM PDT 24 |
Jul 13 08:01:14 PM PDT 24 |
7511761360 ps |
| T1086 |
/workspace/coverage/default/1.rom_keymgr_functest.3075120594 |
|
|
Jul 13 07:59:53 PM PDT 24 |
Jul 13 08:09:00 PM PDT 24 |
5845007688 ps |
| T1087 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2748712904 |
|
|
Jul 13 08:06:59 PM PDT 24 |
Jul 13 08:12:27 PM PDT 24 |
2905385104 ps |
| T798 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.28894805 |
|
|
Jul 13 08:15:49 PM PDT 24 |
Jul 13 08:26:01 PM PDT 24 |
5751955996 ps |
| T1088 |
/workspace/coverage/default/2.chip_sw_edn_kat.994482509 |
|
|
Jul 13 08:02:38 PM PDT 24 |
Jul 13 08:13:01 PM PDT 24 |
3475524166 ps |
| T1089 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.2888496944 |
|
|
Jul 13 07:47:53 PM PDT 24 |
Jul 13 07:56:31 PM PDT 24 |
4533810653 ps |
| T202 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.4125091058 |
|
|
Jul 13 07:45:20 PM PDT 24 |
Jul 13 11:07:57 PM PDT 24 |
64712620919 ps |
| T37 |
/workspace/coverage/default/2.chip_sw_gpio.85539986 |
|
|
Jul 13 07:59:32 PM PDT 24 |
Jul 13 08:08:02 PM PDT 24 |
4045626298 ps |
| T1090 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.760701131 |
|
|
Jul 13 07:59:59 PM PDT 24 |
Jul 13 09:52:43 PM PDT 24 |
24115584241 ps |
| T780 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.4280217113 |
|
|
Jul 13 08:18:29 PM PDT 24 |
Jul 13 08:27:22 PM PDT 24 |
5510675860 ps |
| T1091 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.886726745 |
|
|
Jul 13 08:01:33 PM PDT 24 |
Jul 13 08:05:48 PM PDT 24 |
3108691352 ps |
| T80 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3720224847 |
|
|
Jul 13 07:45:52 PM PDT 24 |
Jul 13 08:09:37 PM PDT 24 |
11916337952 ps |
| T829 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.3099355595 |
|
|
Jul 13 08:14:57 PM PDT 24 |
Jul 13 08:21:40 PM PDT 24 |
4145782416 ps |
| T1092 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3222275037 |
|
|
Jul 13 08:03:31 PM PDT 24 |
Jul 13 08:07:36 PM PDT 24 |
2517320608 ps |
| T693 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1007243111 |
|
|
Jul 13 08:09:32 PM PDT 24 |
Jul 13 09:44:00 PM PDT 24 |
26820199346 ps |
| T1093 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.406351618 |
|
|
Jul 13 07:52:45 PM PDT 24 |
Jul 13 08:08:54 PM PDT 24 |
6966725456 ps |
| T732 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3442334368 |
|
|
Jul 13 07:47:17 PM PDT 24 |
Jul 13 08:37:09 PM PDT 24 |
32055784271 ps |
| T1094 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.4009231338 |
|
|
Jul 13 07:54:37 PM PDT 24 |
Jul 13 07:57:53 PM PDT 24 |
2328786966 ps |
| T281 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.2984487829 |
|
|
Jul 13 08:16:50 PM PDT 24 |
Jul 13 08:23:16 PM PDT 24 |
3591748056 ps |
| T128 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.836829810 |
|
|
Jul 13 07:48:53 PM PDT 24 |
Jul 13 07:55:52 PM PDT 24 |
4875528132 ps |
| T766 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.3290563773 |
|
|
Jul 13 08:13:39 PM PDT 24 |
Jul 13 08:19:50 PM PDT 24 |
3993087626 ps |
| T1095 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.4231775977 |
|
|
Jul 13 07:44:13 PM PDT 24 |
Jul 13 07:52:40 PM PDT 24 |
4024289154 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.1773966222 |
|
|
Jul 13 07:44:43 PM PDT 24 |
Jul 13 07:59:14 PM PDT 24 |
4957061720 ps |
| T1096 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.3441315287 |
|
|
Jul 13 08:15:12 PM PDT 24 |
Jul 13 08:25:01 PM PDT 24 |
4941161232 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.948541209 |
|
|
Jul 13 07:51:34 PM PDT 24 |
Jul 13 08:25:21 PM PDT 24 |
9081303612 ps |
| T358 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.3305492666 |
|
|
Jul 13 08:11:16 PM PDT 24 |
Jul 13 08:21:40 PM PDT 24 |
6093803392 ps |
| T1098 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.820133223 |
|
|
Jul 13 08:03:46 PM PDT 24 |
Jul 13 08:32:34 PM PDT 24 |
8725532568 ps |
| T1099 |
/workspace/coverage/default/2.rom_e2e_static_critical.2028025667 |
|
|
Jul 13 08:13:19 PM PDT 24 |
Jul 13 09:34:08 PM PDT 24 |
17310578512 ps |
| T1100 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.228238667 |
|
|
Jul 13 08:12:27 PM PDT 24 |
Jul 13 09:29:42 PM PDT 24 |
17087632280 ps |
| T1101 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.3635819527 |
|
|
Jul 13 07:50:42 PM PDT 24 |
Jul 13 08:12:45 PM PDT 24 |
6256186200 ps |
| T1102 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.2147556691 |
|
|
Jul 13 08:14:41 PM PDT 24 |
Jul 13 08:23:13 PM PDT 24 |
7194359728 ps |
| T742 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.349467477 |
|
|
Jul 13 08:16:33 PM PDT 24 |
Jul 13 08:27:15 PM PDT 24 |
4579585440 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3275319305 |
|
|
Jul 13 07:50:45 PM PDT 24 |
Jul 13 08:05:19 PM PDT 24 |
8344653904 ps |
| T216 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.2115561382 |
|
|
Jul 13 07:48:05 PM PDT 24 |
Jul 13 08:49:09 PM PDT 24 |
20876363113 ps |
| T1104 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2371918538 |
|
|
Jul 13 07:45:54 PM PDT 24 |
Jul 13 07:50:19 PM PDT 24 |
2926682438 ps |
| T99 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.800614913 |
|
|
Jul 13 07:53:20 PM PDT 24 |
Jul 13 08:22:04 PM PDT 24 |
26386359520 ps |
| T1105 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.1681719278 |
|
|
Jul 13 08:12:36 PM PDT 24 |
Jul 13 08:55:58 PM PDT 24 |
12885689920 ps |
| T1106 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.1201152817 |
|
|
Jul 13 07:45:09 PM PDT 24 |
Jul 13 07:55:26 PM PDT 24 |
6084694390 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.658713374 |
|
|
Jul 13 07:46:07 PM PDT 24 |
Jul 13 07:56:28 PM PDT 24 |
4057581960 ps |
| T1108 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.3985923950 |
|
|
Jul 13 07:45:27 PM PDT 24 |
Jul 13 07:48:41 PM PDT 24 |
3003525000 ps |
| T1109 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.459445391 |
|
|
Jul 13 08:07:43 PM PDT 24 |
Jul 13 08:19:44 PM PDT 24 |
4916184516 ps |
| T133 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3146402605 |
|
|
Jul 13 08:03:58 PM PDT 24 |
Jul 13 08:27:22 PM PDT 24 |
7422595696 ps |
| T819 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.2485711866 |
|
|
Jul 13 08:09:34 PM PDT 24 |
Jul 13 08:15:34 PM PDT 24 |
3262989528 ps |
| T1110 |
/workspace/coverage/default/1.rom_e2e_static_critical.3604458872 |
|
|
Jul 13 08:00:06 PM PDT 24 |
Jul 13 09:14:13 PM PDT 24 |
17564853012 ps |
| T1111 |
/workspace/coverage/default/1.chip_sw_aes_entropy.3536735142 |
|
|
Jul 13 07:49:37 PM PDT 24 |
Jul 13 07:53:33 PM PDT 24 |
2838860478 ps |
| T1112 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.1145521171 |
|
|
Jul 13 08:10:16 PM PDT 24 |
Jul 13 08:19:08 PM PDT 24 |
5086814160 ps |
| T1113 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.3389813493 |
|
|
Jul 13 07:49:17 PM PDT 24 |
Jul 13 07:53:11 PM PDT 24 |
2635329826 ps |
| T100 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1755163923 |
|
|
Jul 13 08:05:25 PM PDT 24 |
Jul 13 08:41:26 PM PDT 24 |
25083651566 ps |
| T1114 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2291824745 |
|
|
Jul 13 07:48:40 PM PDT 24 |
Jul 13 07:56:47 PM PDT 24 |
5219156460 ps |
| T335 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.997166209 |
|
|
Jul 13 07:52:55 PM PDT 24 |
Jul 13 08:00:48 PM PDT 24 |
3496754000 ps |
| T1115 |
/workspace/coverage/default/1.chip_tap_straps_dev.882445016 |
|
|
Jul 13 07:52:38 PM PDT 24 |
Jul 13 08:05:48 PM PDT 24 |
7667485470 ps |
| T793 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.892866470 |
|
|
Jul 13 08:12:08 PM PDT 24 |
Jul 13 08:19:55 PM PDT 24 |
3320320486 ps |
| T275 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3260687084 |
|
|
Jul 13 07:55:47 PM PDT 24 |
Jul 13 08:03:57 PM PDT 24 |
4224576431 ps |
| T1116 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.4252601385 |
|
|
Jul 13 08:02:28 PM PDT 24 |
Jul 13 08:07:21 PM PDT 24 |
3381587521 ps |
| T1117 |
/workspace/coverage/default/1.chip_sw_aes_idle.3720885182 |
|
|
Jul 13 07:49:05 PM PDT 24 |
Jul 13 07:53:27 PM PDT 24 |
3308384188 ps |
| T1118 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.4027240697 |
|
|
Jul 13 08:04:31 PM PDT 24 |
Jul 13 08:11:37 PM PDT 24 |
4735447320 ps |
| T1119 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.692265929 |
|
|
Jul 13 08:03:44 PM PDT 24 |
Jul 13 08:12:54 PM PDT 24 |
5602094530 ps |
| T1120 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.4188064197 |
|
|
Jul 13 08:01:11 PM PDT 24 |
Jul 13 08:10:50 PM PDT 24 |
4129852770 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1616118255 |
|
|
Jul 13 07:43:19 PM PDT 24 |
Jul 13 08:04:00 PM PDT 24 |
6250472168 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3542711612 |
|
|
Jul 13 08:00:09 PM PDT 24 |
Jul 13 08:46:30 PM PDT 24 |
29756399007 ps |
| T1123 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.1379908588 |
|
|
Jul 13 08:06:24 PM PDT 24 |
Jul 13 08:17:18 PM PDT 24 |
4340272932 ps |
| T1124 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1167338461 |
|
|
Jul 13 08:02:29 PM PDT 24 |
Jul 13 09:32:19 PM PDT 24 |
20052444710 ps |
| T1125 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.47043952 |
|
|
Jul 13 08:05:31 PM PDT 24 |
Jul 13 08:15:43 PM PDT 24 |
4174760536 ps |
| T1126 |
/workspace/coverage/default/1.chip_sw_kmac_idle.283351349 |
|
|
Jul 13 07:50:02 PM PDT 24 |
Jul 13 07:54:28 PM PDT 24 |
2661080220 ps |
| T1127 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.3572370580 |
|
|
Jul 13 07:46:16 PM PDT 24 |
Jul 13 07:54:58 PM PDT 24 |
3761327880 ps |
| T1128 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.2268691993 |
|
|
Jul 13 07:48:16 PM PDT 24 |
Jul 13 07:57:52 PM PDT 24 |
8873698563 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.654658733 |
|
|
Jul 13 07:48:01 PM PDT 24 |
Jul 13 07:59:16 PM PDT 24 |
4761433820 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.1471424083 |
|
|
Jul 13 08:02:12 PM PDT 24 |
Jul 13 08:41:34 PM PDT 24 |
10306990424 ps |
| T351 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2429962256 |
|
|
Jul 13 07:45:50 PM PDT 24 |
Jul 13 11:39:50 PM PDT 24 |
79160876496 ps |
| T815 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.2686280047 |
|
|
Jul 13 08:15:33 PM PDT 24 |
Jul 13 08:23:46 PM PDT 24 |
4918347840 ps |
| T1131 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3327637103 |
|
|
Jul 13 07:45:22 PM PDT 24 |
Jul 13 07:53:36 PM PDT 24 |
7026291382 ps |
| T1132 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.4223474772 |
|
|
Jul 13 08:10:37 PM PDT 24 |
Jul 13 09:06:06 PM PDT 24 |
14924047800 ps |
| T1133 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3686446216 |
|
|
Jul 13 07:43:52 PM PDT 24 |
Jul 13 07:52:08 PM PDT 24 |
7235422880 ps |
| T152 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.2736917862 |
|
|
Jul 13 08:04:16 PM PDT 24 |
Jul 13 08:14:33 PM PDT 24 |
3785849098 ps |
| T1134 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1154407856 |
|
|
Jul 13 08:05:08 PM PDT 24 |
Jul 13 08:09:59 PM PDT 24 |
3795023125 ps |
| T1135 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.2172707840 |
|
|
Jul 13 08:05:01 PM PDT 24 |
Jul 13 08:15:30 PM PDT 24 |
6538062057 ps |
| T1136 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.1382213492 |
|
|
Jul 13 07:51:30 PM PDT 24 |
Jul 13 08:05:05 PM PDT 24 |
8473246680 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.2506381884 |
|
|
Jul 13 07:59:08 PM PDT 24 |
Jul 13 08:12:21 PM PDT 24 |
4928068622 ps |
| T1138 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.2349570810 |
|
|
Jul 13 07:43:02 PM PDT 24 |
Jul 13 07:52:20 PM PDT 24 |
4048283824 ps |
| T1139 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.590603757 |
|
|
Jul 13 08:01:06 PM PDT 24 |
Jul 13 09:11:00 PM PDT 24 |
15131351911 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.4079182899 |
|
|
Jul 13 07:47:17 PM PDT 24 |
Jul 13 08:16:50 PM PDT 24 |
8603749732 ps |
| T330 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.3673851339 |
|
|
Jul 13 07:46:05 PM PDT 24 |
Jul 13 08:05:20 PM PDT 24 |
6021579136 ps |
| T321 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.484480052 |
|
|
Jul 13 08:02:57 PM PDT 24 |
Jul 13 08:25:27 PM PDT 24 |
6470704580 ps |
| T1141 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.1476315742 |
|
|
Jul 13 07:49:53 PM PDT 24 |
Jul 13 08:13:15 PM PDT 24 |
8173603480 ps |
| T1142 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.230301665 |
|
|
Jul 13 07:54:00 PM PDT 24 |
Jul 13 08:04:23 PM PDT 24 |
4736694908 ps |
| T690 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1843840872 |
|
|
Jul 13 07:46:13 PM PDT 24 |
Jul 13 07:56:16 PM PDT 24 |
3479406344 ps |
| T795 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2658015613 |
|
|
Jul 13 08:15:55 PM PDT 24 |
Jul 13 08:21:45 PM PDT 24 |
3459453664 ps |
| T1143 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.3584340485 |
|
|
Jul 13 07:44:33 PM PDT 24 |
Jul 13 08:14:24 PM PDT 24 |
9472914505 ps |
| T728 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.3051028271 |
|
|
Jul 13 08:08:34 PM PDT 24 |
Jul 13 08:18:56 PM PDT 24 |
10338168200 ps |
| T1144 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2362578449 |
|
|
Jul 13 08:16:26 PM PDT 24 |
Jul 13 08:23:39 PM PDT 24 |
3834729652 ps |
| T157 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.4123881670 |
|
|
Jul 13 07:59:27 PM PDT 24 |
Jul 13 08:03:59 PM PDT 24 |
3096910093 ps |
| T1145 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2088856976 |
|
|
Jul 13 07:50:29 PM PDT 24 |
Jul 13 09:20:40 PM PDT 24 |
47394245666 ps |
| T1146 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.895536664 |
|
|
Jul 13 08:01:22 PM PDT 24 |
Jul 13 08:19:47 PM PDT 24 |
6528259560 ps |
| T1147 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.96683121 |
|
|
Jul 13 07:48:16 PM PDT 24 |
Jul 13 07:52:05 PM PDT 24 |
2977442856 ps |
| T762 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.2130602499 |
|
|
Jul 13 08:12:54 PM PDT 24 |
Jul 13 08:20:28 PM PDT 24 |
3891503354 ps |
| T711 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.2923109374 |
|
|
Jul 13 08:12:44 PM PDT 24 |
Jul 13 08:24:18 PM PDT 24 |
4787356120 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.2801943208 |
|
|
Jul 13 07:43:07 PM PDT 24 |
Jul 13 08:40:58 PM PDT 24 |
11605563614 ps |
| T531 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2236695727 |
|
|
Jul 13 07:47:03 PM PDT 24 |
Jul 13 08:03:10 PM PDT 24 |
5185264832 ps |
| T752 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.3202191656 |
|
|
Jul 13 08:18:12 PM PDT 24 |
Jul 13 08:25:15 PM PDT 24 |
3800414600 ps |
| T820 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2113293600 |
|
|
Jul 13 08:15:45 PM PDT 24 |
Jul 13 08:30:59 PM PDT 24 |
4715680612 ps |
| T69 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.2451410809 |
|
|
Jul 13 08:06:22 PM PDT 24 |
Jul 13 08:08:47 PM PDT 24 |
2399729855 ps |
| T1148 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2469574060 |
|
|
Jul 13 08:00:31 PM PDT 24 |
Jul 13 08:07:25 PM PDT 24 |
5799178494 ps |
| T1149 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.3215478981 |
|
|
Jul 13 07:48:39 PM PDT 24 |
Jul 13 09:17:08 PM PDT 24 |
26944247074 ps |
| T800 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1760671203 |
|
|
Jul 13 08:11:04 PM PDT 24 |
Jul 13 08:23:15 PM PDT 24 |
5138470100 ps |
| T1150 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.1503521048 |
|
|
Jul 13 07:48:50 PM PDT 24 |
Jul 13 08:12:45 PM PDT 24 |
8864125880 ps |
| T1151 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.1523227083 |
|
|
Jul 13 08:12:54 PM PDT 24 |
Jul 13 08:24:06 PM PDT 24 |
5797940360 ps |
| T784 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1030856622 |
|
|
Jul 13 08:15:31 PM PDT 24 |
Jul 13 08:21:30 PM PDT 24 |
3874042480 ps |
| T1152 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.2452147067 |
|
|
Jul 13 07:52:15 PM PDT 24 |
Jul 13 08:20:12 PM PDT 24 |
8374584712 ps |
| T1153 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.1203097381 |
|
|
Jul 13 07:54:18 PM PDT 24 |
Jul 13 07:59:17 PM PDT 24 |
2520164044 ps |
| T153 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3806673033 |
|
|
Jul 13 07:47:38 PM PDT 24 |
Jul 13 07:57:14 PM PDT 24 |
3797026218 ps |
| T319 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3255250526 |
|
|
Jul 13 07:48:36 PM PDT 24 |
Jul 13 08:17:02 PM PDT 24 |
11831524270 ps |
| T408 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3812669046 |
|
|
Jul 13 08:06:31 PM PDT 24 |
Jul 13 08:13:17 PM PDT 24 |
6851538930 ps |
| T733 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.2406711919 |
|
|
Jul 13 07:46:20 PM PDT 24 |
Jul 13 07:50:57 PM PDT 24 |
2551889550 ps |
| T1154 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.2751746611 |
|
|
Jul 13 07:45:38 PM PDT 24 |
Jul 13 07:49:42 PM PDT 24 |
2361083688 ps |
| T1155 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.184964396 |
|
|
Jul 13 07:51:35 PM PDT 24 |
Jul 13 11:06:20 PM PDT 24 |
255101002800 ps |
| T1156 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.2835128267 |
|
|
Jul 13 08:17:54 PM PDT 24 |
Jul 13 08:27:56 PM PDT 24 |
4297055614 ps |
| T178 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.3130476051 |
|
|
Jul 13 07:56:27 PM PDT 24 |
Jul 13 08:01:12 PM PDT 24 |
2415265844 ps |
| T389 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3744373172 |
|
|
Jul 13 08:02:05 PM PDT 24 |
Jul 13 08:25:25 PM PDT 24 |
7020565554 ps |
| T352 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2188916478 |
|
|
Jul 13 08:08:39 PM PDT 24 |
Jul 13 08:35:54 PM PDT 24 |
8692596184 ps |
| T148 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1241588156 |
|
|
Jul 13 07:59:26 PM PDT 24 |
Jul 13 10:46:20 PM PDT 24 |
58565676703 ps |
| T304 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.4009091792 |
|
|
Jul 13 08:05:35 PM PDT 24 |
Jul 13 08:12:17 PM PDT 24 |
4275669104 ps |
| T390 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2490097664 |
|
|
Jul 13 07:45:52 PM PDT 24 |
Jul 13 08:08:42 PM PDT 24 |
7306553697 ps |
| T391 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.3749364417 |
|
|
Jul 13 07:58:05 PM PDT 24 |
Jul 13 08:01:52 PM PDT 24 |
2894415024 ps |
| T217 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.3256883779 |
|
|
Jul 13 08:04:07 PM PDT 24 |
Jul 13 09:18:41 PM PDT 24 |
20733897586 ps |
| T392 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.4173992124 |
|
|
Jul 13 07:46:32 PM PDT 24 |
Jul 13 07:56:33 PM PDT 24 |
5063833330 ps |
| T305 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1903326639 |
|
|
Jul 13 07:45:02 PM PDT 24 |
Jul 13 07:50:58 PM PDT 24 |
4819054676 ps |
| T1157 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.290761332 |
|
|
Jul 13 08:03:29 PM PDT 24 |
Jul 13 08:14:09 PM PDT 24 |
3867611704 ps |
| T1158 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.4291634901 |
|
|
Jul 13 08:07:53 PM PDT 24 |
Jul 13 08:29:22 PM PDT 24 |
7574324666 ps |
| T1159 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2624646869 |
|
|
Jul 13 07:49:20 PM PDT 24 |
Jul 13 07:54:47 PM PDT 24 |
3044623300 ps |
| T285 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.528661680 |
|
|
Jul 13 08:04:36 PM PDT 24 |
Jul 13 08:10:52 PM PDT 24 |
3709200040 ps |
| T1160 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.2154572507 |
|
|
Jul 13 08:06:06 PM PDT 24 |
Jul 13 09:12:37 PM PDT 24 |
15236681456 ps |
| T1161 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.3492609864 |
|
|
Jul 13 07:58:33 PM PDT 24 |
Jul 13 08:03:42 PM PDT 24 |
2694030996 ps |
| T1162 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2161871461 |
|
|
Jul 13 07:52:34 PM PDT 24 |
Jul 13 08:03:58 PM PDT 24 |
5054641224 ps |
| T196 |
/workspace/coverage/default/0.chip_jtag_mem_access.840449222 |
|
|
Jul 13 07:36:01 PM PDT 24 |
Jul 13 07:59:00 PM PDT 24 |
13074836885 ps |
| T1163 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.3775586502 |
|
|
Jul 13 08:09:59 PM PDT 24 |
Jul 13 09:31:00 PM PDT 24 |
21834826270 ps |
| T1164 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3779527800 |
|
|
Jul 13 08:07:19 PM PDT 24 |
Jul 13 08:35:18 PM PDT 24 |
13703080128 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.1591414589 |
|
|
Jul 13 08:00:29 PM PDT 24 |
Jul 13 08:17:16 PM PDT 24 |
5296209180 ps |
| T821 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.577719386 |
|
|
Jul 13 08:17:52 PM PDT 24 |
Jul 13 08:28:13 PM PDT 24 |
5825221310 ps |
| T748 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1106114847 |
|
|
Jul 13 08:16:44 PM PDT 24 |
Jul 13 08:27:24 PM PDT 24 |
5160985510 ps |
| T730 |
/workspace/coverage/default/0.rom_raw_unlock.109553559 |
|
|
Jul 13 07:46:40 PM PDT 24 |
Jul 13 07:51:17 PM PDT 24 |
6533772746 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.4263862310 |
|
|
Jul 13 07:50:37 PM PDT 24 |
Jul 13 08:17:18 PM PDT 24 |
6406596248 ps |
| T1167 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2300608779 |
|
|
Jul 13 07:44:42 PM PDT 24 |
Jul 13 07:51:51 PM PDT 24 |
5023912022 ps |
| T1168 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.3611596048 |
|
|
Jul 13 08:02:24 PM PDT 24 |
Jul 13 08:33:59 PM PDT 24 |
9828734745 ps |
| T1169 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3204243977 |
|
|
Jul 13 07:51:51 PM PDT 24 |
Jul 13 08:58:50 PM PDT 24 |
14335439620 ps |
| T1170 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.3149196722 |
|
|
Jul 13 07:46:04 PM PDT 24 |
Jul 13 07:51:31 PM PDT 24 |
3063331272 ps |
| T1171 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.3074612028 |
|
|
Jul 13 07:50:41 PM PDT 24 |
Jul 13 09:02:00 PM PDT 24 |
14401085904 ps |
| T1172 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.3937503317 |
|
|
Jul 13 07:51:11 PM PDT 24 |
Jul 13 08:42:23 PM PDT 24 |
10747697848 ps |
| T1173 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.152377506 |
|
|
Jul 13 07:55:01 PM PDT 24 |
Jul 13 07:59:46 PM PDT 24 |
2376342712 ps |
| T1174 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.3224275869 |
|
|
Jul 13 08:02:48 PM PDT 24 |
Jul 13 09:00:09 PM PDT 24 |
14161197184 ps |
| T1175 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.902516780 |
|
|
Jul 13 08:02:55 PM PDT 24 |
Jul 13 08:07:34 PM PDT 24 |
2906315566 ps |
| T1176 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3049996350 |
|
|
Jul 13 08:03:29 PM PDT 24 |
Jul 13 08:12:21 PM PDT 24 |
4473107732 ps |
| T1177 |
/workspace/coverage/default/1.chip_tap_straps_rma.1329318724 |
|
|
Jul 13 07:54:15 PM PDT 24 |
Jul 13 08:07:56 PM PDT 24 |
7567018845 ps |
| T1178 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3623212781 |
|
|
Jul 13 07:54:29 PM PDT 24 |
Jul 13 08:18:52 PM PDT 24 |
6878105205 ps |
| T1179 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2042633920 |
|
|
Jul 13 07:50:17 PM PDT 24 |
Jul 13 08:56:53 PM PDT 24 |
14462457310 ps |
| T348 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.270972924 |
|
|
Jul 13 07:52:12 PM PDT 24 |
Jul 13 07:55:57 PM PDT 24 |
2998723802 ps |
| T769 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2732638405 |
|
|
Jul 13 08:17:17 PM PDT 24 |
Jul 13 08:28:19 PM PDT 24 |
5611185608 ps |
| T368 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.2395908281 |
|
|
Jul 13 08:16:20 PM PDT 24 |
Jul 13 08:27:30 PM PDT 24 |
4421737540 ps |
| T1180 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.4268619928 |
|
|
Jul 13 07:45:52 PM PDT 24 |
Jul 13 07:59:48 PM PDT 24 |
5211708918 ps |
| T1181 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.1259345022 |
|
|
Jul 13 08:09:52 PM PDT 24 |
Jul 13 08:20:58 PM PDT 24 |
4362433640 ps |
| T206 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.1643563725 |
|
|
Jul 13 07:48:20 PM PDT 24 |
Jul 13 07:54:04 PM PDT 24 |
3782986575 ps |
| T1182 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2031576795 |
|
|
Jul 13 07:48:01 PM PDT 24 |
Jul 13 07:51:56 PM PDT 24 |
2584641400 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1147872993 |
|
|
Jul 13 07:44:45 PM PDT 24 |
Jul 13 07:55:09 PM PDT 24 |
4539027516 ps |
| T1184 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.2161523325 |
|
|
Jul 13 07:47:21 PM PDT 24 |
Jul 13 08:04:59 PM PDT 24 |
5520189220 ps |
| T704 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.2770804565 |
|
|
Jul 13 08:07:06 PM PDT 24 |
Jul 13 08:19:21 PM PDT 24 |
6396897561 ps |
| T1185 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.2743011978 |
|
|
Jul 13 07:46:16 PM PDT 24 |
Jul 13 07:51:16 PM PDT 24 |
2888905219 ps |
| T1186 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.627238447 |
|
|
Jul 13 07:52:18 PM PDT 24 |
Jul 13 07:57:28 PM PDT 24 |
3123525560 ps |
| T1187 |
/workspace/coverage/default/0.chip_sw_power_idle_load.383160322 |
|
|
Jul 13 07:45:21 PM PDT 24 |
Jul 13 07:57:57 PM PDT 24 |
4275713862 ps |
| T1188 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.777753571 |
|
|
Jul 13 07:49:32 PM PDT 24 |
Jul 13 08:19:03 PM PDT 24 |
9245153822 ps |
| T743 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1578417130 |
|
|
Jul 13 08:12:25 PM PDT 24 |
Jul 13 08:20:57 PM PDT 24 |
5273075624 ps |
| T822 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3926606306 |
|
|
Jul 13 08:16:51 PM PDT 24 |
Jul 13 08:23:15 PM PDT 24 |
3544529960 ps |
| T229 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.910760407 |
|
|
Jul 13 07:50:50 PM PDT 24 |
Jul 13 08:27:07 PM PDT 24 |
10482694460 ps |
| T1189 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2270181327 |
|
|
Jul 13 07:57:37 PM PDT 24 |
Jul 13 08:13:18 PM PDT 24 |
7210139811 ps |
| T369 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.393399238 |
|
|
Jul 13 08:15:51 PM PDT 24 |
Jul 13 08:27:04 PM PDT 24 |
5988588680 ps |
| T1190 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.4210004797 |
|
|
Jul 13 07:46:25 PM PDT 24 |
Jul 13 07:57:20 PM PDT 24 |
6147818140 ps |
| T1191 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1880542439 |
|
|
Jul 13 07:49:21 PM PDT 24 |
Jul 13 08:06:03 PM PDT 24 |
6895714660 ps |
| T1192 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3379409987 |
|
|
Jul 13 07:54:32 PM PDT 24 |
Jul 13 09:02:16 PM PDT 24 |
20738243051 ps |
| T331 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.270087718 |
|
|
Jul 13 07:59:42 PM PDT 24 |
Jul 13 08:15:08 PM PDT 24 |
5405593194 ps |
| T799 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.860552502 |
|
|
Jul 13 08:11:22 PM PDT 24 |
Jul 13 08:19:15 PM PDT 24 |
4163842100 ps |
| T282 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.363117336 |
|
|
Jul 13 08:18:13 PM PDT 24 |
Jul 13 08:31:11 PM PDT 24 |
6130528926 ps |
| T409 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3701452495 |
|
|
Jul 13 07:44:29 PM PDT 24 |
Jul 13 08:13:10 PM PDT 24 |
23859482232 ps |
| T710 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2109266633 |
|
|
Jul 13 07:46:59 PM PDT 24 |
Jul 13 07:48:55 PM PDT 24 |
2611935315 ps |
| T1193 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.1038221045 |
|
|
Jul 13 07:44:34 PM PDT 24 |
Jul 13 07:50:35 PM PDT 24 |
3473763400 ps |
| T1194 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.996557199 |
|
|
Jul 13 07:44:36 PM PDT 24 |
Jul 13 07:55:13 PM PDT 24 |
4382716456 ps |
| T1195 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.177851495 |
|
|
Jul 13 07:52:56 PM PDT 24 |
Jul 13 09:01:11 PM PDT 24 |
14872163156 ps |
| T747 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.2913607104 |
|
|
Jul 13 08:15:24 PM PDT 24 |
Jul 13 08:28:31 PM PDT 24 |
4931070888 ps |
| T207 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.2191963501 |
|
|
Jul 13 07:46:16 PM PDT 24 |
Jul 13 07:57:18 PM PDT 24 |
4807118404 ps |
| T1196 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3676489466 |
|
|
Jul 13 07:53:53 PM PDT 24 |
Jul 13 08:20:55 PM PDT 24 |
6660831276 ps |
| T1197 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.811838429 |
|
|
Jul 13 08:00:01 PM PDT 24 |
Jul 13 08:01:52 PM PDT 24 |
2449746975 ps |
| T444 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.2964084162 |
|
|
Jul 13 08:13:33 PM PDT 24 |
Jul 13 08:21:23 PM PDT 24 |
3375129360 ps |
| T1198 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2324529789 |
|
|
Jul 13 07:46:30 PM PDT 24 |
Jul 13 07:51:06 PM PDT 24 |
2662442968 ps |
| T753 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1687920245 |
|
|
Jul 13 08:09:55 PM PDT 24 |
Jul 13 08:22:44 PM PDT 24 |
6149517268 ps |
| T1199 |
/workspace/coverage/default/2.chip_sw_aes_idle.1685013622 |
|
|
Jul 13 08:01:54 PM PDT 24 |
Jul 13 08:06:53 PM PDT 24 |
2777567904 ps |
| T774 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.69367926 |
|
|
Jul 13 08:11:52 PM PDT 24 |
Jul 13 08:21:35 PM PDT 24 |
4546764480 ps |