| T924 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.15827167 |
|
|
Jul 14 08:12:55 PM PDT 24 |
Jul 14 08:22:57 PM PDT 24 |
6912432708 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.2060012522 |
|
|
Jul 14 07:51:49 PM PDT 24 |
Jul 14 08:22:53 PM PDT 24 |
7617839704 ps |
| T743 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3413103526 |
|
|
Jul 14 08:25:36 PM PDT 24 |
Jul 14 08:34:19 PM PDT 24 |
4453329904 ps |
| T173 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2153820160 |
|
|
Jul 14 08:00:25 PM PDT 24 |
Jul 14 08:02:44 PM PDT 24 |
3504556842 ps |
| T350 |
/workspace/coverage/default/0.chip_sw_hmac_enc.184906135 |
|
|
Jul 14 07:53:05 PM PDT 24 |
Jul 14 07:58:22 PM PDT 24 |
3258400718 ps |
| T925 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.3546606228 |
|
|
Jul 14 08:11:15 PM PDT 24 |
Jul 14 08:18:06 PM PDT 24 |
4980664618 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_edn_kat.260014959 |
|
|
Jul 14 07:59:14 PM PDT 24 |
Jul 14 08:10:01 PM PDT 24 |
3100978874 ps |
| T927 |
/workspace/coverage/default/2.chip_sw_example_rom.2912869426 |
|
|
Jul 14 08:05:46 PM PDT 24 |
Jul 14 08:08:10 PM PDT 24 |
2434964960 ps |
| T928 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2337977472 |
|
|
Jul 14 07:51:37 PM PDT 24 |
Jul 14 08:40:24 PM PDT 24 |
12576286709 ps |
| T744 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.1798015387 |
|
|
Jul 14 08:27:23 PM PDT 24 |
Jul 14 08:37:56 PM PDT 24 |
5271948872 ps |
| T702 |
/workspace/coverage/default/2.chip_sw_power_idle_load.2461515166 |
|
|
Jul 14 08:16:28 PM PDT 24 |
Jul 14 08:27:04 PM PDT 24 |
4643126444 ps |
| T929 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.2183553310 |
|
|
Jul 14 07:54:00 PM PDT 24 |
Jul 14 07:59:28 PM PDT 24 |
3326082712 ps |
| T321 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.43434633 |
|
|
Jul 14 08:02:35 PM PDT 24 |
Jul 14 08:26:24 PM PDT 24 |
6649248880 ps |
| T930 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1863664854 |
|
|
Jul 14 08:16:26 PM PDT 24 |
Jul 14 08:23:51 PM PDT 24 |
4891637667 ps |
| T157 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.831044611 |
|
|
Jul 14 08:10:48 PM PDT 24 |
Jul 14 08:16:49 PM PDT 24 |
3132746925 ps |
| T931 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3328088307 |
|
|
Jul 14 07:53:00 PM PDT 24 |
Jul 14 08:13:11 PM PDT 24 |
9938430245 ps |
| T247 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1749683516 |
|
|
Jul 14 08:20:39 PM PDT 24 |
Jul 14 08:33:12 PM PDT 24 |
6017337572 ps |
| T932 |
/workspace/coverage/default/1.chip_sw_example_flash.1075161354 |
|
|
Jul 14 08:00:54 PM PDT 24 |
Jul 14 08:03:58 PM PDT 24 |
2294497564 ps |
| T36 |
/workspace/coverage/default/2.chip_sw_gpio.3014484173 |
|
|
Jul 14 08:07:58 PM PDT 24 |
Jul 14 08:16:35 PM PDT 24 |
4158990781 ps |
| T933 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.800346932 |
|
|
Jul 14 08:01:31 PM PDT 24 |
Jul 14 08:06:56 PM PDT 24 |
3060235481 ps |
| T222 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.146444593 |
|
|
Jul 14 08:02:22 PM PDT 24 |
Jul 14 09:35:39 PM PDT 24 |
16826258204 ps |
| T168 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1131768489 |
|
|
Jul 14 07:55:11 PM PDT 24 |
Jul 14 08:03:55 PM PDT 24 |
4545268624 ps |
| T740 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.3500665178 |
|
|
Jul 14 08:28:09 PM PDT 24 |
Jul 14 08:33:19 PM PDT 24 |
3934499824 ps |
| T934 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2956734205 |
|
|
Jul 14 08:07:28 PM PDT 24 |
Jul 14 08:29:03 PM PDT 24 |
5779356735 ps |
| T731 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.2639288933 |
|
|
Jul 14 08:18:49 PM PDT 24 |
Jul 14 08:25:56 PM PDT 24 |
3296167350 ps |
| T241 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.1088147187 |
|
|
Jul 14 08:16:38 PM PDT 24 |
Jul 14 08:26:12 PM PDT 24 |
6280327116 ps |
| T789 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.959233321 |
|
|
Jul 14 08:22:32 PM PDT 24 |
Jul 14 08:32:36 PM PDT 24 |
6426970912 ps |
| T754 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2023674084 |
|
|
Jul 14 08:21:14 PM PDT 24 |
Jul 14 08:30:14 PM PDT 24 |
5330030224 ps |
| T333 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.2009155898 |
|
|
Jul 14 07:57:14 PM PDT 24 |
Jul 14 08:07:34 PM PDT 24 |
4495378704 ps |
| T935 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2634727392 |
|
|
Jul 14 08:05:48 PM PDT 24 |
Jul 14 08:25:49 PM PDT 24 |
7327474414 ps |
| T936 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.672331786 |
|
|
Jul 14 08:01:06 PM PDT 24 |
Jul 14 08:40:38 PM PDT 24 |
28269101168 ps |
| T729 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1367431718 |
|
|
Jul 14 08:18:15 PM PDT 24 |
Jul 14 08:25:23 PM PDT 24 |
3527202714 ps |
| T937 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2999149502 |
|
|
Jul 14 08:00:01 PM PDT 24 |
Jul 14 08:03:15 PM PDT 24 |
2303046928 ps |
| T938 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.133944407 |
|
|
Jul 14 08:09:25 PM PDT 24 |
Jul 14 08:31:41 PM PDT 24 |
5741015528 ps |
| T939 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.2925685200 |
|
|
Jul 14 08:01:24 PM PDT 24 |
Jul 14 09:09:23 PM PDT 24 |
14856423000 ps |
| T940 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1641031116 |
|
|
Jul 14 08:10:00 PM PDT 24 |
Jul 14 09:06:57 PM PDT 24 |
15268369474 ps |
| T763 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.665782036 |
|
|
Jul 14 08:25:47 PM PDT 24 |
Jul 14 08:31:51 PM PDT 24 |
3632502454 ps |
| T726 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1070186742 |
|
|
Jul 14 08:15:18 PM PDT 24 |
Jul 14 08:21:53 PM PDT 24 |
3397629864 ps |
| T782 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.499426201 |
|
|
Jul 14 08:23:25 PM PDT 24 |
Jul 14 08:29:27 PM PDT 24 |
4555180064 ps |
| T941 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2663329958 |
|
|
Jul 14 08:02:11 PM PDT 24 |
Jul 14 08:15:53 PM PDT 24 |
4857665614 ps |
| T145 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.2298846773 |
|
|
Jul 14 07:52:58 PM PDT 24 |
Jul 14 08:02:53 PM PDT 24 |
3952736712 ps |
| T203 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.804298639 |
|
|
Jul 14 07:58:33 PM PDT 24 |
Jul 14 08:03:56 PM PDT 24 |
3059205479 ps |
| T140 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.3731748929 |
|
|
Jul 14 08:01:27 PM PDT 24 |
Jul 14 08:05:29 PM PDT 24 |
2949564819 ps |
| T141 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.1053499814 |
|
|
Jul 14 08:08:48 PM PDT 24 |
Jul 14 08:17:59 PM PDT 24 |
7689491416 ps |
| T942 |
/workspace/coverage/default/2.rom_e2e_smoke.1080290928 |
|
|
Jul 14 08:19:46 PM PDT 24 |
Jul 14 09:12:24 PM PDT 24 |
14821881578 ps |
| T25 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.2348011128 |
|
|
Jul 14 07:52:35 PM PDT 24 |
Jul 14 08:01:00 PM PDT 24 |
4376829602 ps |
| T320 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.4170460823 |
|
|
Jul 14 07:54:53 PM PDT 24 |
Jul 14 08:04:09 PM PDT 24 |
5268265440 ps |
| T738 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.4055080737 |
|
|
Jul 14 08:22:19 PM PDT 24 |
Jul 14 08:29:11 PM PDT 24 |
4324746598 ps |
| T364 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.251054169 |
|
|
Jul 14 08:24:22 PM PDT 24 |
Jul 14 08:33:11 PM PDT 24 |
4132552888 ps |
| T365 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.1834825562 |
|
|
Jul 14 08:25:47 PM PDT 24 |
Jul 14 08:35:33 PM PDT 24 |
5601907510 ps |
| T943 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.4273061686 |
|
|
Jul 14 07:52:17 PM PDT 24 |
Jul 14 08:15:25 PM PDT 24 |
9453666328 ps |
| T787 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.1973193588 |
|
|
Jul 14 08:20:14 PM PDT 24 |
Jul 14 08:29:38 PM PDT 24 |
3579329592 ps |
| T739 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2047772583 |
|
|
Jul 14 08:20:25 PM PDT 24 |
Jul 14 08:26:35 PM PDT 24 |
3729581636 ps |
| T758 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.2121662288 |
|
|
Jul 14 08:24:46 PM PDT 24 |
Jul 14 08:29:54 PM PDT 24 |
3556963444 ps |
| T944 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.2066046529 |
|
|
Jul 14 08:15:48 PM PDT 24 |
Jul 14 08:20:41 PM PDT 24 |
2964995290 ps |
| T225 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.939326741 |
|
|
Jul 14 08:12:09 PM PDT 24 |
Jul 14 08:31:47 PM PDT 24 |
6344848712 ps |
| T945 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1302260612 |
|
|
Jul 14 07:57:09 PM PDT 24 |
Jul 14 08:05:15 PM PDT 24 |
4203229560 ps |
| T946 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2380228677 |
|
|
Jul 14 07:54:59 PM PDT 24 |
Jul 14 08:05:47 PM PDT 24 |
4047450912 ps |
| T947 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.3602950315 |
|
|
Jul 14 08:05:11 PM PDT 24 |
Jul 14 08:13:19 PM PDT 24 |
3149252296 ps |
| T948 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.798349549 |
|
|
Jul 14 08:13:09 PM PDT 24 |
Jul 14 08:19:48 PM PDT 24 |
3447255624 ps |
| T721 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.702219370 |
|
|
Jul 14 08:23:04 PM PDT 24 |
Jul 14 08:32:29 PM PDT 24 |
4553871880 ps |
| T949 |
/workspace/coverage/default/1.rom_e2e_smoke.2716077324 |
|
|
Jul 14 08:10:05 PM PDT 24 |
Jul 14 09:15:14 PM PDT 24 |
14338106980 ps |
| T182 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.615868097 |
|
|
Jul 14 08:03:01 PM PDT 24 |
Jul 14 08:08:03 PM PDT 24 |
2867122696 ps |
| T400 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.261354949 |
|
|
Jul 14 08:22:53 PM PDT 24 |
Jul 14 08:33:33 PM PDT 24 |
5614880990 ps |
| T401 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.2784584250 |
|
|
Jul 14 07:54:36 PM PDT 24 |
Jul 14 08:23:10 PM PDT 24 |
13039220996 ps |
| T250 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.3389888959 |
|
|
Jul 14 08:13:03 PM PDT 24 |
Jul 14 08:18:46 PM PDT 24 |
3785125476 ps |
| T402 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.3926677364 |
|
|
Jul 14 08:24:18 PM PDT 24 |
Jul 14 08:30:25 PM PDT 24 |
3679331746 ps |
| T235 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.431293967 |
|
|
Jul 14 07:54:55 PM PDT 24 |
Jul 14 08:30:08 PM PDT 24 |
23460510063 ps |
| T362 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.1361419381 |
|
|
Jul 14 07:54:50 PM PDT 24 |
Jul 14 07:58:39 PM PDT 24 |
3364927866 ps |
| T322 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2724990830 |
|
|
Jul 14 07:57:47 PM PDT 24 |
Jul 14 08:15:43 PM PDT 24 |
5194529720 ps |
| T403 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.2661092202 |
|
|
Jul 14 07:56:02 PM PDT 24 |
Jul 14 08:31:27 PM PDT 24 |
9031347986 ps |
| T258 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.3924610630 |
|
|
Jul 14 07:56:38 PM PDT 24 |
Jul 14 08:34:28 PM PDT 24 |
10732576861 ps |
| T309 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.63203712 |
|
|
Jul 14 08:12:04 PM PDT 24 |
Jul 14 08:18:35 PM PDT 24 |
4111250852 ps |
| T311 |
/workspace/coverage/default/0.chip_sw_example_concurrency.789387534 |
|
|
Jul 14 07:51:29 PM PDT 24 |
Jul 14 07:55:58 PM PDT 24 |
3299524264 ps |
| T312 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1207129274 |
|
|
Jul 14 07:57:14 PM PDT 24 |
Jul 14 08:02:03 PM PDT 24 |
3511517100 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.208838395 |
|
|
Jul 14 08:00:32 PM PDT 24 |
Jul 14 08:17:57 PM PDT 24 |
5620514616 ps |
| T314 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2450208771 |
|
|
Jul 14 07:53:53 PM PDT 24 |
Jul 14 08:07:21 PM PDT 24 |
12596234824 ps |
| T315 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.3518933581 |
|
|
Jul 14 08:10:43 PM PDT 24 |
Jul 14 08:33:29 PM PDT 24 |
8603098416 ps |
| T316 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.3056250788 |
|
|
Jul 14 08:00:42 PM PDT 24 |
Jul 14 08:39:36 PM PDT 24 |
32856298125 ps |
| T317 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1088834587 |
|
|
Jul 14 07:53:17 PM PDT 24 |
Jul 14 08:21:03 PM PDT 24 |
17225714550 ps |
| T318 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1031581305 |
|
|
Jul 14 07:54:53 PM PDT 24 |
Jul 14 08:10:13 PM PDT 24 |
7271442126 ps |
| T319 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2261849729 |
|
|
Jul 14 08:25:51 PM PDT 24 |
Jul 14 08:31:38 PM PDT 24 |
3728917288 ps |
| T351 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.4136153777 |
|
|
Jul 14 08:08:32 PM PDT 24 |
Jul 14 08:22:47 PM PDT 24 |
4468862253 ps |
| T368 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.3427555134 |
|
|
Jul 14 08:11:56 PM PDT 24 |
Jul 14 08:18:08 PM PDT 24 |
3379499960 ps |
| T950 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.1348409940 |
|
|
Jul 14 08:13:25 PM PDT 24 |
Jul 14 08:32:41 PM PDT 24 |
8540059896 ps |
| T951 |
/workspace/coverage/default/2.rom_e2e_static_critical.3148160756 |
|
|
Jul 14 08:20:45 PM PDT 24 |
Jul 14 09:27:19 PM PDT 24 |
17612431332 ps |
| T952 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.2750564540 |
|
|
Jul 14 08:01:41 PM PDT 24 |
Jul 14 09:09:41 PM PDT 24 |
14327149967 ps |
| T327 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3137968005 |
|
|
Jul 14 08:07:28 PM PDT 24 |
Jul 14 08:19:42 PM PDT 24 |
4526603072 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.2336198274 |
|
|
Jul 14 08:11:41 PM PDT 24 |
Jul 14 08:16:29 PM PDT 24 |
3008463230 ps |
| T667 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.3564447162 |
|
|
Jul 14 08:19:54 PM PDT 24 |
Jul 14 09:45:30 PM PDT 24 |
26281578440 ps |
| T954 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.3896690884 |
|
|
Jul 14 07:55:08 PM PDT 24 |
Jul 14 08:01:07 PM PDT 24 |
3577888440 ps |
| T955 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.3346540725 |
|
|
Jul 14 07:58:35 PM PDT 24 |
Jul 14 08:18:57 PM PDT 24 |
5660206859 ps |
| T471 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.3885513350 |
|
|
Jul 14 07:57:33 PM PDT 24 |
Jul 14 08:50:14 PM PDT 24 |
22125976357 ps |
| T808 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.2291557443 |
|
|
Jul 14 08:22:27 PM PDT 24 |
Jul 14 08:27:57 PM PDT 24 |
3930894594 ps |
| T275 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.2238006685 |
|
|
Jul 14 08:16:07 PM PDT 24 |
Jul 14 08:34:35 PM PDT 24 |
6246972480 ps |
| T279 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.2107143942 |
|
|
Jul 14 08:01:35 PM PDT 24 |
Jul 14 09:14:59 PM PDT 24 |
14812308644 ps |
| T154 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3164581107 |
|
|
Jul 14 07:52:09 PM PDT 24 |
Jul 14 07:59:00 PM PDT 24 |
3703937084 ps |
| T280 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3507657769 |
|
|
Jul 14 08:23:04 PM PDT 24 |
Jul 14 08:31:17 PM PDT 24 |
4715195640 ps |
| T281 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.4144835586 |
|
|
Jul 14 08:22:37 PM PDT 24 |
Jul 14 08:33:01 PM PDT 24 |
4722131228 ps |
| T282 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2988984990 |
|
|
Jul 14 08:20:13 PM PDT 24 |
Jul 14 08:31:03 PM PDT 24 |
6278788220 ps |
| T283 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.3480649836 |
|
|
Jul 14 08:11:16 PM PDT 24 |
Jul 14 08:20:20 PM PDT 24 |
3644180876 ps |
| T284 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.3995418149 |
|
|
Jul 14 08:22:43 PM PDT 24 |
Jul 14 08:29:28 PM PDT 24 |
3595804772 ps |
| T174 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1538549707 |
|
|
Jul 14 07:54:18 PM PDT 24 |
Jul 14 07:59:34 PM PDT 24 |
4138018924 ps |
| T285 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3905676301 |
|
|
Jul 14 07:59:32 PM PDT 24 |
Jul 14 09:07:20 PM PDT 24 |
16079424903 ps |
| T47 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1309669928 |
|
|
Jul 14 07:52:58 PM PDT 24 |
Jul 14 08:00:15 PM PDT 24 |
5500738600 ps |
| T956 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.834294317 |
|
|
Jul 14 08:01:21 PM PDT 24 |
Jul 14 09:14:51 PM PDT 24 |
18454362234 ps |
| T26 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.1763160934 |
|
|
Jul 14 07:52:02 PM PDT 24 |
Jul 14 08:07:01 PM PDT 24 |
7472934961 ps |
| T200 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.3209098598 |
|
|
Jul 14 08:00:11 PM PDT 24 |
Jul 14 11:12:52 PM PDT 24 |
65368499808 ps |
| T242 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.1286223790 |
|
|
Jul 14 08:25:20 PM PDT 24 |
Jul 14 08:38:15 PM PDT 24 |
6607218110 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_flash_init.1020543378 |
|
|
Jul 14 07:51:00 PM PDT 24 |
Jul 14 08:25:13 PM PDT 24 |
20561746177 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2360872004 |
|
|
Jul 14 08:01:56 PM PDT 24 |
Jul 14 08:43:28 PM PDT 24 |
11176814580 ps |
| T958 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.1278788096 |
|
|
Jul 14 08:15:09 PM PDT 24 |
Jul 14 08:26:36 PM PDT 24 |
8235962626 ps |
| T151 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.373031450 |
|
|
Jul 14 08:00:47 PM PDT 24 |
Jul 14 08:22:58 PM PDT 24 |
6951658641 ps |
| T959 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2582818250 |
|
|
Jul 14 08:01:14 PM PDT 24 |
Jul 14 08:18:04 PM PDT 24 |
8978010613 ps |
| T352 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2831259452 |
|
|
Jul 14 08:14:05 PM PDT 24 |
Jul 14 08:26:51 PM PDT 24 |
4782819844 ps |
| T328 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.312220096 |
|
|
Jul 14 08:07:53 PM PDT 24 |
Jul 14 08:22:56 PM PDT 24 |
5043240448 ps |
| T960 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.4249876712 |
|
|
Jul 14 08:09:47 PM PDT 24 |
Jul 14 08:16:36 PM PDT 24 |
4928422478 ps |
| T727 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.1807917554 |
|
|
Jul 14 08:23:42 PM PDT 24 |
Jul 14 08:35:02 PM PDT 24 |
6654332648 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.3392016068 |
|
|
Jul 14 08:07:29 PM PDT 24 |
Jul 14 08:33:34 PM PDT 24 |
9172729110 ps |
| T752 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1479668051 |
|
|
Jul 14 08:21:02 PM PDT 24 |
Jul 14 08:28:21 PM PDT 24 |
4064095416 ps |
| T712 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1494741290 |
|
|
Jul 14 07:58:27 PM PDT 24 |
Jul 14 11:15:38 PM PDT 24 |
254353657272 ps |
| T32 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.1813050431 |
|
|
Jul 14 07:56:14 PM PDT 24 |
Jul 14 08:33:33 PM PDT 24 |
23742602844 ps |
| T962 |
/workspace/coverage/default/2.chip_sw_aes_enc.1732855270 |
|
|
Jul 14 08:16:59 PM PDT 24 |
Jul 14 08:21:55 PM PDT 24 |
2884308880 ps |
| T232 |
/workspace/coverage/default/2.chip_sw_flash_init.4006600123 |
|
|
Jul 14 08:08:41 PM PDT 24 |
Jul 14 08:44:49 PM PDT 24 |
24024710305 ps |
| T753 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1654397744 |
|
|
Jul 14 08:20:38 PM PDT 24 |
Jul 14 08:25:51 PM PDT 24 |
3310956976 ps |
| T161 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.2286171808 |
|
|
Jul 14 07:59:25 PM PDT 24 |
Jul 14 08:03:45 PM PDT 24 |
3010914296 ps |
| T963 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.3108069593 |
|
|
Jul 14 08:18:21 PM PDT 24 |
Jul 14 09:18:17 PM PDT 24 |
15427828132 ps |
| T964 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2064457301 |
|
|
Jul 14 08:19:36 PM PDT 24 |
Jul 14 09:02:42 PM PDT 24 |
13841584630 ps |
| T965 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.1948355083 |
|
|
Jul 14 08:18:35 PM PDT 24 |
Jul 14 08:34:03 PM PDT 24 |
13015009063 ps |
| T966 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3415700464 |
|
|
Jul 14 07:57:07 PM PDT 24 |
Jul 14 08:06:13 PM PDT 24 |
6150373510 ps |
| T967 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.3987856878 |
|
|
Jul 14 08:02:21 PM PDT 24 |
Jul 14 08:04:54 PM PDT 24 |
2443135319 ps |
| T968 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2137354495 |
|
|
Jul 14 08:02:01 PM PDT 24 |
Jul 14 08:07:14 PM PDT 24 |
3177503710 ps |
| T969 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.823714321 |
|
|
Jul 14 08:13:41 PM PDT 24 |
Jul 14 08:22:37 PM PDT 24 |
4717412140 ps |
| T137 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1103548072 |
|
|
Jul 14 07:53:26 PM PDT 24 |
Jul 14 07:59:29 PM PDT 24 |
3289976564 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.1814731166 |
|
|
Jul 14 07:53:39 PM PDT 24 |
Jul 14 08:03:28 PM PDT 24 |
5603719820 ps |
| T970 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3744463347 |
|
|
Jul 14 07:53:03 PM PDT 24 |
Jul 14 08:04:34 PM PDT 24 |
4103457742 ps |
| T768 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.1291066821 |
|
|
Jul 14 08:23:10 PM PDT 24 |
Jul 14 08:32:15 PM PDT 24 |
5271223800 ps |
| T233 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2029489787 |
|
|
Jul 14 08:03:51 PM PDT 24 |
Jul 14 08:35:03 PM PDT 24 |
25156789439 ps |
| T747 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.2310079745 |
|
|
Jul 14 08:20:30 PM PDT 24 |
Jul 14 08:27:52 PM PDT 24 |
3359758240 ps |
| T84 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.4153570442 |
|
|
Jul 14 08:00:41 PM PDT 24 |
Jul 14 08:06:55 PM PDT 24 |
4370805420 ps |
| T254 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.125877029 |
|
|
Jul 14 08:06:18 PM PDT 24 |
Jul 14 08:09:20 PM PDT 24 |
2734127748 ps |
| T971 |
/workspace/coverage/default/4.chip_tap_straps_dev.1786363399 |
|
|
Jul 14 08:16:24 PM PDT 24 |
Jul 14 08:21:08 PM PDT 24 |
4195198095 ps |
| T127 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3452877499 |
|
|
Jul 14 07:54:39 PM PDT 24 |
Jul 14 08:02:10 PM PDT 24 |
5031252294 ps |
| T807 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.3677987633 |
|
|
Jul 14 08:22:35 PM PDT 24 |
Jul 14 08:28:52 PM PDT 24 |
3803258824 ps |
| T412 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3185429917 |
|
|
Jul 14 08:13:53 PM PDT 24 |
Jul 14 08:19:24 PM PDT 24 |
3581589800 ps |
| T452 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.3183204341 |
|
|
Jul 14 08:01:33 PM PDT 24 |
Jul 14 08:08:26 PM PDT 24 |
3536061427 ps |
| T453 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.3593898054 |
|
|
Jul 14 07:52:11 PM PDT 24 |
Jul 14 08:30:38 PM PDT 24 |
10923322140 ps |
| T454 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.1559825033 |
|
|
Jul 14 07:54:52 PM PDT 24 |
Jul 14 08:26:49 PM PDT 24 |
8832155912 ps |
| T455 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3511098306 |
|
|
Jul 14 08:03:28 PM PDT 24 |
Jul 14 08:27:34 PM PDT 24 |
14684112808 ps |
| T456 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.477138326 |
|
|
Jul 14 08:03:10 PM PDT 24 |
Jul 14 08:16:54 PM PDT 24 |
7476440744 ps |
| T183 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3566440537 |
|
|
Jul 14 07:56:57 PM PDT 24 |
Jul 14 08:03:52 PM PDT 24 |
3715665040 ps |
| T457 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.2075649295 |
|
|
Jul 14 08:12:35 PM PDT 24 |
Jul 14 08:31:35 PM PDT 24 |
7371135340 ps |
| T458 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.139575712 |
|
|
Jul 14 07:58:16 PM PDT 24 |
Jul 14 08:01:48 PM PDT 24 |
2897843910 ps |
| T459 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3091738464 |
|
|
Jul 14 08:01:40 PM PDT 24 |
Jul 14 09:12:02 PM PDT 24 |
14686743000 ps |
| T759 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.166820510 |
|
|
Jul 14 08:22:02 PM PDT 24 |
Jul 14 08:28:06 PM PDT 24 |
3603267656 ps |
| T972 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.2076508990 |
|
|
Jul 14 08:23:41 PM PDT 24 |
Jul 14 08:35:24 PM PDT 24 |
4267139320 ps |
| T973 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3001488409 |
|
|
Jul 14 07:56:00 PM PDT 24 |
Jul 14 08:46:13 PM PDT 24 |
28994313305 ps |
| T228 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3859986771 |
|
|
Jul 14 08:11:02 PM PDT 24 |
Jul 14 09:28:53 PM PDT 24 |
16924909144 ps |
| T974 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3431270753 |
|
|
Jul 14 07:54:39 PM PDT 24 |
Jul 14 08:03:22 PM PDT 24 |
6126448958 ps |
| T769 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2028420052 |
|
|
Jul 14 08:25:48 PM PDT 24 |
Jul 14 08:33:51 PM PDT 24 |
5296836392 ps |
| T751 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.964407970 |
|
|
Jul 14 08:18:18 PM PDT 24 |
Jul 14 08:23:52 PM PDT 24 |
3855900642 ps |
| T756 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1386583003 |
|
|
Jul 14 08:18:32 PM PDT 24 |
Jul 14 08:24:21 PM PDT 24 |
3486629240 ps |
| T975 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.4037811444 |
|
|
Jul 14 08:08:58 PM PDT 24 |
Jul 14 08:16:43 PM PDT 24 |
5096590774 ps |
| T976 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.2858220880 |
|
|
Jul 14 08:02:50 PM PDT 24 |
Jul 14 08:59:12 PM PDT 24 |
15210668872 ps |
| T678 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2406855748 |
|
|
Jul 14 07:57:00 PM PDT 24 |
Jul 14 07:59:01 PM PDT 24 |
2258682205 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.2296006967 |
|
|
Jul 14 08:14:45 PM PDT 24 |
Jul 14 08:20:35 PM PDT 24 |
3773991752 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3442935863 |
|
|
Jul 14 08:13:41 PM PDT 24 |
Jul 14 08:30:45 PM PDT 24 |
5222573430 ps |
| T979 |
/workspace/coverage/default/0.chip_sw_aes_entropy.3026945283 |
|
|
Jul 14 07:54:28 PM PDT 24 |
Jul 14 07:58:39 PM PDT 24 |
3010735200 ps |
| T353 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1423040996 |
|
|
Jul 14 08:07:32 PM PDT 24 |
Jul 14 08:12:18 PM PDT 24 |
3645584980 ps |
| T980 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1331128508 |
|
|
Jul 14 08:17:20 PM PDT 24 |
Jul 14 08:22:52 PM PDT 24 |
5751030696 ps |
| T981 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1083409890 |
|
|
Jul 14 08:25:45 PM PDT 24 |
Jul 14 08:31:01 PM PDT 24 |
3815622048 ps |
| T982 |
/workspace/coverage/default/0.rom_keymgr_functest.1158419395 |
|
|
Jul 14 08:00:16 PM PDT 24 |
Jul 14 08:07:36 PM PDT 24 |
4037279802 ps |
| T983 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.922939986 |
|
|
Jul 14 08:18:55 PM PDT 24 |
Jul 14 09:15:59 PM PDT 24 |
14942415840 ps |
| T984 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.1698616541 |
|
|
Jul 14 08:05:55 PM PDT 24 |
Jul 14 08:11:33 PM PDT 24 |
6692704380 ps |
| T748 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1598553932 |
|
|
Jul 14 08:23:52 PM PDT 24 |
Jul 14 08:35:25 PM PDT 24 |
6162278100 ps |
| T48 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2554756858 |
|
|
Jul 14 07:59:04 PM PDT 24 |
Jul 14 08:06:58 PM PDT 24 |
6373539884 ps |
| T358 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.3436858439 |
|
|
Jul 14 08:20:22 PM PDT 24 |
Jul 14 08:31:24 PM PDT 24 |
5352926120 ps |
| T410 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.4187985276 |
|
|
Jul 14 08:04:09 PM PDT 24 |
Jul 14 08:13:01 PM PDT 24 |
9777693573 ps |
| T985 |
/workspace/coverage/default/0.chip_sw_coremark.2700448731 |
|
|
Jul 14 07:53:58 PM PDT 24 |
Jul 14 11:56:24 PM PDT 24 |
71998019224 ps |
| T310 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.2864198052 |
|
|
Jul 14 08:18:42 PM PDT 24 |
Jul 14 08:27:04 PM PDT 24 |
4182627588 ps |
| T243 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.1831003809 |
|
|
Jul 14 08:09:23 PM PDT 24 |
Jul 14 08:40:20 PM PDT 24 |
13189613300 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_power_idle_load.1195201866 |
|
|
Jul 14 08:05:33 PM PDT 24 |
Jul 14 08:16:46 PM PDT 24 |
4930386940 ps |
| T772 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2791475433 |
|
|
Jul 14 08:21:22 PM PDT 24 |
Jul 14 08:30:33 PM PDT 24 |
4932080672 ps |
| T987 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.3585133451 |
|
|
Jul 14 07:52:16 PM PDT 24 |
Jul 14 07:56:18 PM PDT 24 |
2925940456 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3966354207 |
|
|
Jul 14 08:15:17 PM PDT 24 |
Jul 14 08:27:27 PM PDT 24 |
4401330024 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.1353458007 |
|
|
Jul 14 08:07:33 PM PDT 24 |
Jul 14 08:25:53 PM PDT 24 |
7389167930 ps |
| T369 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1390600018 |
|
|
Jul 14 07:53:17 PM PDT 24 |
Jul 14 08:15:41 PM PDT 24 |
11030936115 ps |
| T784 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.2566244420 |
|
|
Jul 14 08:23:18 PM PDT 24 |
Jul 14 08:34:29 PM PDT 24 |
4505812240 ps |
| T990 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.488167043 |
|
|
Jul 14 08:11:38 PM PDT 24 |
Jul 14 08:23:40 PM PDT 24 |
4741361260 ps |
| T991 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.1658679011 |
|
|
Jul 14 08:16:54 PM PDT 24 |
Jul 14 08:28:05 PM PDT 24 |
4464576510 ps |
| T331 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.1740832235 |
|
|
Jul 14 07:53:25 PM PDT 24 |
Jul 14 08:28:30 PM PDT 24 |
8014170496 ps |
| T230 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2071646083 |
|
|
Jul 14 08:00:51 PM PDT 24 |
Jul 14 09:31:36 PM PDT 24 |
45881679120 ps |
| T992 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.2138337227 |
|
|
Jul 14 08:07:49 PM PDT 24 |
Jul 14 08:30:59 PM PDT 24 |
9090973442 ps |
| T231 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.4107375797 |
|
|
Jul 14 08:10:48 PM PDT 24 |
Jul 14 09:39:53 PM PDT 24 |
49779211720 ps |
| T22 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.33503415 |
|
|
Jul 14 07:57:43 PM PDT 24 |
Jul 14 08:03:53 PM PDT 24 |
3307683202 ps |
| T236 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.773757919 |
|
|
Jul 14 07:59:31 PM PDT 24 |
Jul 14 09:37:27 PM PDT 24 |
47016254020 ps |
| T993 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.2107003791 |
|
|
Jul 14 07:57:30 PM PDT 24 |
Jul 14 08:01:31 PM PDT 24 |
2690872660 ps |
| T994 |
/workspace/coverage/default/0.chip_sw_aes_enc.1331362060 |
|
|
Jul 14 07:52:15 PM PDT 24 |
Jul 14 07:57:22 PM PDT 24 |
2807994976 ps |
| T783 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.933392519 |
|
|
Jul 14 08:25:01 PM PDT 24 |
Jul 14 08:32:23 PM PDT 24 |
3798998182 ps |
| T805 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3474616594 |
|
|
Jul 14 08:21:36 PM PDT 24 |
Jul 14 08:29:44 PM PDT 24 |
4086248630 ps |
| T128 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2175279678 |
|
|
Jul 14 08:12:12 PM PDT 24 |
Jul 14 08:20:13 PM PDT 24 |
5051796492 ps |
| T995 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.157378567 |
|
|
Jul 14 08:16:17 PM PDT 24 |
Jul 14 08:24:19 PM PDT 24 |
6797140980 ps |
| T204 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.1920974077 |
|
|
Jul 14 07:53:15 PM PDT 24 |
Jul 14 08:03:48 PM PDT 24 |
4020380199 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2759286469 |
|
|
Jul 14 08:11:47 PM PDT 24 |
Jul 14 08:33:19 PM PDT 24 |
10549841650 ps |
| T997 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.382353664 |
|
|
Jul 14 08:11:24 PM PDT 24 |
Jul 14 08:42:28 PM PDT 24 |
10608339300 ps |
| T998 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.289337768 |
|
|
Jul 14 07:58:55 PM PDT 24 |
Jul 14 08:12:27 PM PDT 24 |
8707667236 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.2321894014 |
|
|
Jul 14 07:59:59 PM PDT 24 |
Jul 14 08:20:03 PM PDT 24 |
5761990996 ps |
| T755 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.192445749 |
|
|
Jul 14 08:24:57 PM PDT 24 |
Jul 14 08:31:02 PM PDT 24 |
3504295400 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.362805135 |
|
|
Jul 14 07:53:29 PM PDT 24 |
Jul 14 07:57:20 PM PDT 24 |
3176560192 ps |
| T1000 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.1688065798 |
|
|
Jul 14 08:02:29 PM PDT 24 |
Jul 14 09:03:18 PM PDT 24 |
13835056062 ps |
| T779 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3382178526 |
|
|
Jul 14 08:25:08 PM PDT 24 |
Jul 14 08:30:59 PM PDT 24 |
3461741780 ps |
| T276 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.61606963 |
|
|
Jul 14 08:14:49 PM PDT 24 |
Jul 14 08:29:58 PM PDT 24 |
5767276184 ps |
| T1001 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.3989521437 |
|
|
Jul 14 07:57:24 PM PDT 24 |
Jul 14 09:16:48 PM PDT 24 |
23942647810 ps |
| T291 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3085190720 |
|
|
Jul 14 08:23:12 PM PDT 24 |
Jul 14 08:30:33 PM PDT 24 |
3848588910 ps |
| T13 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.1769569874 |
|
|
Jul 14 07:52:00 PM PDT 24 |
Jul 14 07:56:18 PM PDT 24 |
3155631430 ps |
| T679 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2626218932 |
|
|
Jul 14 08:00:19 PM PDT 24 |
Jul 14 08:02:40 PM PDT 24 |
2354779370 ps |
| T1002 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.1618816408 |
|
|
Jul 14 08:09:47 PM PDT 24 |
Jul 14 09:12:49 PM PDT 24 |
15116952440 ps |
| T288 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.26946087 |
|
|
Jul 14 07:56:24 PM PDT 24 |
Jul 14 08:04:47 PM PDT 24 |
4870214404 ps |
| T397 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3610080045 |
|
|
Jul 14 08:10:49 PM PDT 24 |
Jul 14 08:22:19 PM PDT 24 |
7222478112 ps |
| T1003 |
/workspace/coverage/default/0.chip_tap_straps_dev.296769817 |
|
|
Jul 14 07:55:45 PM PDT 24 |
Jul 14 07:58:34 PM PDT 24 |
2416493030 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.468163981 |
|
|
Jul 14 08:15:36 PM PDT 24 |
Jul 14 08:34:38 PM PDT 24 |
6202040048 ps |
| T1005 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3317631372 |
|
|
Jul 14 07:53:42 PM PDT 24 |
Jul 14 08:02:14 PM PDT 24 |
4517530399 ps |
| T1006 |
/workspace/coverage/default/0.chip_sival_flash_info_access.841198485 |
|
|
Jul 14 07:52:07 PM PDT 24 |
Jul 14 07:58:24 PM PDT 24 |
3709572860 ps |
| T1007 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.4279928173 |
|
|
Jul 14 08:14:26 PM PDT 24 |
Jul 14 08:22:24 PM PDT 24 |
2953622920 ps |
| T733 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3937714427 |
|
|
Jul 14 07:53:09 PM PDT 24 |
Jul 14 08:01:22 PM PDT 24 |
4836138616 ps |
| T77 |
/workspace/coverage/default/4.chip_tap_straps_rma.2365516051 |
|
|
Jul 14 08:15:41 PM PDT 24 |
Jul 14 08:26:10 PM PDT 24 |
6365659390 ps |
| T719 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.2100313241 |
|
|
Jul 14 08:25:29 PM PDT 24 |
Jul 14 08:34:28 PM PDT 24 |
5670261872 ps |
| T1008 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.3718134794 |
|
|
Jul 14 08:12:58 PM PDT 24 |
Jul 14 08:42:38 PM PDT 24 |
8172503158 ps |
| T730 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1079944910 |
|
|
Jul 14 08:15:50 PM PDT 24 |
Jul 14 08:23:28 PM PDT 24 |
3246730866 ps |
| T346 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1091810712 |
|
|
Jul 14 08:07:13 PM PDT 24 |
Jul 14 08:18:53 PM PDT 24 |
4524187411 ps |
| T663 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.1276243832 |
|
|
Jul 14 07:59:41 PM PDT 24 |
Jul 14 08:10:33 PM PDT 24 |
3458817472 ps |
| T1009 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.3675292122 |
|
|
Jul 14 08:03:40 PM PDT 24 |
Jul 14 09:17:09 PM PDT 24 |
16229839414 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.2562700278 |
|
|
Jul 14 08:17:05 PM PDT 24 |
Jul 14 08:20:24 PM PDT 24 |
2150969612 ps |
| T1011 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.3236821347 |
|
|
Jul 14 08:00:04 PM PDT 24 |
Jul 14 08:03:42 PM PDT 24 |
2666734524 ps |
| T790 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1776152449 |
|
|
Jul 14 08:25:40 PM PDT 24 |
Jul 14 08:32:11 PM PDT 24 |
3820974960 ps |
| T185 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1348617628 |
|
|
Jul 14 07:52:22 PM PDT 24 |
Jul 14 09:25:52 PM PDT 24 |
43075446502 ps |
| T737 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2559968987 |
|
|
Jul 14 07:53:15 PM PDT 24 |
Jul 14 08:12:05 PM PDT 24 |
8576996132 ps |
| T359 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.1708203678 |
|
|
Jul 14 08:03:17 PM PDT 24 |
Jul 14 08:15:26 PM PDT 24 |
4229834320 ps |
| T1012 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.4125844642 |
|
|
Jul 14 08:19:51 PM PDT 24 |
Jul 14 08:27:09 PM PDT 24 |
3625174968 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3480980388 |
|
|
Jul 14 08:14:59 PM PDT 24 |
Jul 14 08:25:37 PM PDT 24 |
4948875869 ps |
| T811 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1978729097 |
|
|
Jul 14 08:26:47 PM PDT 24 |
Jul 14 08:32:22 PM PDT 24 |
4188321064 ps |
| T1013 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.3993637581 |
|
|
Jul 14 07:58:43 PM PDT 24 |
Jul 14 08:27:07 PM PDT 24 |
7758384812 ps |
| T175 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2127670253 |
|
|
Jul 14 07:59:02 PM PDT 24 |
Jul 14 08:01:58 PM PDT 24 |
3850266860 ps |
| T33 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.2695183258 |
|
|
Jul 14 07:58:01 PM PDT 24 |
Jul 14 08:29:12 PM PDT 24 |
22824033352 ps |
| T1014 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.3477474020 |
|
|
Jul 14 08:22:45 PM PDT 24 |
Jul 14 08:34:51 PM PDT 24 |
5913366408 ps |
| T111 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.1468189856 |
|
|
Jul 14 08:16:04 PM PDT 24 |
Jul 14 09:30:37 PM PDT 24 |
23545586559 ps |
| T1015 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.705575628 |
|
|
Jul 14 08:09:48 PM PDT 24 |
Jul 14 08:20:49 PM PDT 24 |
8749471562 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.1160796548 |
|
|
Jul 14 08:08:23 PM PDT 24 |
Jul 14 08:13:02 PM PDT 24 |
2312056548 ps |
| T347 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.4181111476 |
|
|
Jul 14 08:00:32 PM PDT 24 |
Jul 14 08:10:35 PM PDT 24 |
3848902544 ps |
| T261 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.3836879310 |
|
|
Jul 14 07:52:49 PM PDT 24 |
Jul 14 08:02:51 PM PDT 24 |
6374861076 ps |