| T1032 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1816497129 |
|
|
Jul 15 08:02:24 PM PDT 24 |
Jul 15 08:23:24 PM PDT 24 |
7167047065 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_flash_init.3293317940 |
|
|
Jul 15 08:16:33 PM PDT 24 |
Jul 15 08:50:09 PM PDT 24 |
24418240850 ps |
| T1034 |
/workspace/coverage/default/2.rom_e2e_smoke.1259334598 |
|
|
Jul 15 08:27:24 PM PDT 24 |
Jul 15 09:21:52 PM PDT 24 |
15127980750 ps |
| T1035 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1018100366 |
|
|
Jul 15 08:16:36 PM PDT 24 |
Jul 15 08:32:54 PM PDT 24 |
6443231546 ps |
| T703 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.4252925183 |
|
|
Jul 15 08:22:26 PM PDT 24 |
Jul 15 08:33:06 PM PDT 24 |
5086550304 ps |
| T237 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.625127079 |
|
|
Jul 15 08:03:29 PM PDT 24 |
Jul 15 09:16:59 PM PDT 24 |
17508370712 ps |
| T781 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.3366990458 |
|
|
Jul 15 08:33:27 PM PDT 24 |
Jul 15 08:40:06 PM PDT 24 |
3234494202 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3082044576 |
|
|
Jul 15 08:12:45 PM PDT 24 |
Jul 15 09:17:54 PM PDT 24 |
41658528889 ps |
| T211 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2647098076 |
|
|
Jul 15 08:04:38 PM PDT 24 |
Jul 15 08:10:53 PM PDT 24 |
3220410847 ps |
| T335 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.3928539327 |
|
|
Jul 15 08:21:41 PM PDT 24 |
Jul 15 08:35:26 PM PDT 24 |
4077370700 ps |
| T820 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.973057228 |
|
|
Jul 15 08:35:15 PM PDT 24 |
Jul 15 08:40:35 PM PDT 24 |
3460473350 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.1167665768 |
|
|
Jul 15 08:20:27 PM PDT 24 |
Jul 15 08:23:51 PM PDT 24 |
2774979530 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_edn_kat.2581200779 |
|
|
Jul 15 08:11:26 PM PDT 24 |
Jul 15 08:22:17 PM PDT 24 |
3536913752 ps |
| T1039 |
/workspace/coverage/default/0.chip_sw_hmac_enc.3402126537 |
|
|
Jul 15 08:05:04 PM PDT 24 |
Jul 15 08:10:48 PM PDT 24 |
3702090808 ps |
| T206 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.3647545262 |
|
|
Jul 15 08:05:29 PM PDT 24 |
Jul 15 11:38:59 PM PDT 24 |
65579112968 ps |
| T1040 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.962147810 |
|
|
Jul 15 08:24:48 PM PDT 24 |
Jul 15 08:46:04 PM PDT 24 |
9724221647 ps |
| T1041 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.1074497274 |
|
|
Jul 15 08:25:02 PM PDT 24 |
Jul 15 08:36:05 PM PDT 24 |
4219693292 ps |
| T828 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.1966274789 |
|
|
Jul 15 08:29:40 PM PDT 24 |
Jul 15 08:38:24 PM PDT 24 |
5927962180 ps |
| T1042 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.584252455 |
|
|
Jul 15 08:08:51 PM PDT 24 |
Jul 15 08:25:17 PM PDT 24 |
6070899717 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.690475537 |
|
|
Jul 15 08:14:49 PM PDT 24 |
Jul 15 08:18:55 PM PDT 24 |
3053718971 ps |
| T1044 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1744961861 |
|
|
Jul 15 08:03:03 PM PDT 24 |
Jul 15 08:07:34 PM PDT 24 |
2895815108 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.3214088340 |
|
|
Jul 15 08:12:16 PM PDT 24 |
Jul 15 08:18:14 PM PDT 24 |
3822625328 ps |
| T749 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1091476982 |
|
|
Jul 15 08:31:02 PM PDT 24 |
Jul 15 08:36:44 PM PDT 24 |
3717893448 ps |
| T792 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.2228982333 |
|
|
Jul 15 08:31:03 PM PDT 24 |
Jul 15 08:40:16 PM PDT 24 |
6087906504 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.3363526034 |
|
|
Jul 15 08:02:48 PM PDT 24 |
Jul 15 08:14:33 PM PDT 24 |
6825264048 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.3629959426 |
|
|
Jul 15 08:09:52 PM PDT 24 |
Jul 15 08:27:00 PM PDT 24 |
10209545344 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.2890327133 |
|
|
Jul 15 08:21:54 PM PDT 24 |
Jul 15 08:30:42 PM PDT 24 |
6143909500 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.4096593517 |
|
|
Jul 15 08:18:39 PM PDT 24 |
Jul 15 08:38:10 PM PDT 24 |
6549324727 ps |
| T1050 |
/workspace/coverage/default/0.rom_e2e_smoke.2483193213 |
|
|
Jul 15 08:11:58 PM PDT 24 |
Jul 15 09:17:53 PM PDT 24 |
15256375986 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.4049932432 |
|
|
Jul 15 08:08:07 PM PDT 24 |
Jul 15 08:16:44 PM PDT 24 |
5497222664 ps |
| T1052 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.1513550827 |
|
|
Jul 15 08:26:56 PM PDT 24 |
Jul 15 08:37:01 PM PDT 24 |
5039740891 ps |
| T1053 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3918453779 |
|
|
Jul 15 08:15:26 PM PDT 24 |
Jul 15 08:19:47 PM PDT 24 |
2829519200 ps |
| T747 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.3404536573 |
|
|
Jul 15 08:07:04 PM PDT 24 |
Jul 15 08:40:43 PM PDT 24 |
11927909622 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.575836665 |
|
|
Jul 15 08:10:32 PM PDT 24 |
Jul 15 09:17:51 PM PDT 24 |
18464674028 ps |
| T824 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.401182505 |
|
|
Jul 15 08:28:38 PM PDT 24 |
Jul 15 08:36:21 PM PDT 24 |
3639890040 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.282914094 |
|
|
Jul 15 08:21:04 PM PDT 24 |
Jul 15 08:41:09 PM PDT 24 |
5201934080 ps |
| T758 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1160371677 |
|
|
Jul 15 08:27:36 PM PDT 24 |
Jul 15 08:33:25 PM PDT 24 |
3474609070 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.908813562 |
|
|
Jul 15 08:25:22 PM PDT 24 |
Jul 15 08:31:25 PM PDT 24 |
3161867902 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.2857628876 |
|
|
Jul 15 08:17:02 PM PDT 24 |
Jul 15 08:20:46 PM PDT 24 |
3159301316 ps |
| T254 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.3943437327 |
|
|
Jul 15 08:30:57 PM PDT 24 |
Jul 15 08:40:00 PM PDT 24 |
4516851692 ps |
| T285 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.3396728371 |
|
|
Jul 15 08:26:39 PM PDT 24 |
Jul 15 08:37:04 PM PDT 24 |
6204731664 ps |
| T1058 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.2496590792 |
|
|
Jul 15 08:26:53 PM PDT 24 |
Jul 15 08:36:39 PM PDT 24 |
4389161164 ps |
| T1059 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.2088194589 |
|
|
Jul 15 08:15:12 PM PDT 24 |
Jul 15 08:22:06 PM PDT 24 |
5052447666 ps |
| T1060 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.2338026619 |
|
|
Jul 15 08:34:49 PM PDT 24 |
Jul 15 08:44:32 PM PDT 24 |
4902925790 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2982243191 |
|
|
Jul 15 08:04:34 PM PDT 24 |
Jul 15 08:09:18 PM PDT 24 |
3155044182 ps |
| T1062 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1473645379 |
|
|
Jul 15 08:19:48 PM PDT 24 |
Jul 15 09:15:40 PM PDT 24 |
27745302746 ps |
| T1063 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.2922069111 |
|
|
Jul 15 08:28:22 PM PDT 24 |
Jul 15 08:32:12 PM PDT 24 |
2588228410 ps |
| T351 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.1698008581 |
|
|
Jul 15 08:05:46 PM PDT 24 |
Jul 15 08:19:25 PM PDT 24 |
4907028863 ps |
| T454 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.1195128873 |
|
|
Jul 15 08:17:25 PM PDT 24 |
Jul 15 08:21:58 PM PDT 24 |
2827549096 ps |
| T159 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.427923659 |
|
|
Jul 15 08:19:34 PM PDT 24 |
Jul 15 11:46:56 PM PDT 24 |
255299121256 ps |
| T740 |
/workspace/coverage/default/2.rom_raw_unlock.1872301751 |
|
|
Jul 15 08:23:56 PM PDT 24 |
Jul 15 08:28:28 PM PDT 24 |
4829548920 ps |
| T451 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.3633267990 |
|
|
Jul 15 08:07:28 PM PDT 24 |
Jul 15 08:41:00 PM PDT 24 |
7533195624 ps |
| T1064 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.496903124 |
|
|
Jul 15 08:06:46 PM PDT 24 |
Jul 15 08:11:47 PM PDT 24 |
3444537930 ps |
| T1065 |
/workspace/coverage/default/2.chip_sw_power_idle_load.3111610134 |
|
|
Jul 15 08:24:01 PM PDT 24 |
Jul 15 08:35:47 PM PDT 24 |
4090159176 ps |
| T40 |
/workspace/coverage/default/0.chip_sw_gpio.1507516024 |
|
|
Jul 15 08:01:15 PM PDT 24 |
Jul 15 08:08:59 PM PDT 24 |
4563691544 ps |
| T109 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.3416249252 |
|
|
Jul 15 08:22:52 PM PDT 24 |
Jul 15 09:13:28 PM PDT 24 |
21935174067 ps |
| T185 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.2615410608 |
|
|
Jul 15 08:07:29 PM PDT 24 |
Jul 15 08:15:40 PM PDT 24 |
3911550856 ps |
| T1066 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.2213616986 |
|
|
Jul 15 08:03:08 PM PDT 24 |
Jul 15 08:09:48 PM PDT 24 |
2585296380 ps |
| T212 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.4044220540 |
|
|
Jul 15 08:09:00 PM PDT 24 |
Jul 15 08:16:37 PM PDT 24 |
4342035474 ps |
| T334 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.3936015662 |
|
|
Jul 15 08:11:33 PM PDT 24 |
Jul 15 08:32:33 PM PDT 24 |
5812764218 ps |
| T1067 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.3101695536 |
|
|
Jul 15 08:09:27 PM PDT 24 |
Jul 15 09:10:29 PM PDT 24 |
14320779848 ps |
| T708 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2042955334 |
|
|
Jul 15 08:02:15 PM PDT 24 |
Jul 15 08:04:32 PM PDT 24 |
3077869125 ps |
| T1068 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2504730941 |
|
|
Jul 15 08:22:47 PM PDT 24 |
Jul 15 08:27:24 PM PDT 24 |
2811018376 ps |
| T1069 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.254066252 |
|
|
Jul 15 08:25:28 PM PDT 24 |
Jul 15 08:33:41 PM PDT 24 |
7543251854 ps |
| T782 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.2927469777 |
|
|
Jul 15 08:31:35 PM PDT 24 |
Jul 15 08:40:33 PM PDT 24 |
6071192108 ps |
| T142 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.787212270 |
|
|
Jul 15 08:14:23 PM PDT 24 |
Jul 15 09:18:46 PM PDT 24 |
27952506577 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.2314780062 |
|
|
Jul 15 08:23:30 PM PDT 24 |
Jul 15 08:29:19 PM PDT 24 |
3233627084 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.373973825 |
|
|
Jul 15 08:21:49 PM PDT 24 |
Jul 15 08:31:40 PM PDT 24 |
6013975920 ps |
| T1072 |
/workspace/coverage/default/2.rom_keymgr_functest.2452171090 |
|
|
Jul 15 08:26:54 PM PDT 24 |
Jul 15 08:36:58 PM PDT 24 |
5235994218 ps |
| T818 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.335556445 |
|
|
Jul 15 08:34:14 PM PDT 24 |
Jul 15 08:40:16 PM PDT 24 |
3487349088 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1112603372 |
|
|
Jul 15 08:01:33 PM PDT 24 |
Jul 15 08:19:56 PM PDT 24 |
5861921466 ps |
| T1074 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.573152236 |
|
|
Jul 15 08:17:07 PM PDT 24 |
Jul 15 08:35:36 PM PDT 24 |
9397759321 ps |
| T1075 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.726464569 |
|
|
Jul 15 08:04:50 PM PDT 24 |
Jul 15 08:08:49 PM PDT 24 |
2853023090 ps |
| T1076 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.1159367483 |
|
|
Jul 15 08:16:09 PM PDT 24 |
Jul 15 08:21:12 PM PDT 24 |
2613930518 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.4148479502 |
|
|
Jul 15 08:03:17 PM PDT 24 |
Jul 15 08:37:55 PM PDT 24 |
8547190104 ps |
| T814 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.953646702 |
|
|
Jul 15 08:28:56 PM PDT 24 |
Jul 15 08:35:28 PM PDT 24 |
3608295528 ps |
| T1078 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.158676281 |
|
|
Jul 15 08:11:19 PM PDT 24 |
Jul 15 08:15:14 PM PDT 24 |
2226249320 ps |
| T295 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.3374818872 |
|
|
Jul 15 08:31:28 PM PDT 24 |
Jul 15 08:45:00 PM PDT 24 |
5922135886 ps |
| T1079 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.2728311059 |
|
|
Jul 15 08:32:22 PM PDT 24 |
Jul 15 08:42:18 PM PDT 24 |
4312899560 ps |
| T1080 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.1296431624 |
|
|
Jul 15 08:19:14 PM PDT 24 |
Jul 15 08:21:27 PM PDT 24 |
2989706464 ps |
| T1081 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.403795504 |
|
|
Jul 15 08:28:04 PM PDT 24 |
Jul 15 09:47:41 PM PDT 24 |
22722397208 ps |
| T1082 |
/workspace/coverage/default/0.chip_sw_example_flash.1193511905 |
|
|
Jul 15 08:03:34 PM PDT 24 |
Jul 15 08:08:31 PM PDT 24 |
2952414156 ps |
| T1083 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2412581049 |
|
|
Jul 15 08:13:08 PM PDT 24 |
Jul 15 08:43:38 PM PDT 24 |
22301949377 ps |
| T1084 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.197701284 |
|
|
Jul 15 08:12:35 PM PDT 24 |
Jul 15 08:18:16 PM PDT 24 |
3360472966 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3778203066 |
|
|
Jul 15 08:01:52 PM PDT 24 |
Jul 15 08:08:27 PM PDT 24 |
4193409744 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3956316811 |
|
|
Jul 15 08:04:05 PM PDT 24 |
Jul 15 08:36:53 PM PDT 24 |
7714689240 ps |
| T1086 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.800626450 |
|
|
Jul 15 08:09:53 PM PDT 24 |
Jul 15 09:06:54 PM PDT 24 |
15017890514 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.3859420790 |
|
|
Jul 15 08:10:45 PM PDT 24 |
Jul 15 08:28:54 PM PDT 24 |
8013805230 ps |
| T1088 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.471285000 |
|
|
Jul 15 08:22:53 PM PDT 24 |
Jul 15 08:30:47 PM PDT 24 |
3437734252 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_example_flash.1582707572 |
|
|
Jul 15 08:16:02 PM PDT 24 |
Jul 15 08:20:29 PM PDT 24 |
2912014680 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2839996762 |
|
|
Jul 15 08:18:59 PM PDT 24 |
Jul 15 08:21:01 PM PDT 24 |
2335893785 ps |
| T1091 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.4260381370 |
|
|
Jul 15 08:28:23 PM PDT 24 |
Jul 15 08:34:54 PM PDT 24 |
3857520102 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.1947073212 |
|
|
Jul 15 08:12:41 PM PDT 24 |
Jul 15 08:25:38 PM PDT 24 |
7114318952 ps |
| T203 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.2631356651 |
|
|
Jul 15 08:17:15 PM PDT 24 |
Jul 15 08:32:21 PM PDT 24 |
6283460309 ps |
| T286 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.1111193610 |
|
|
Jul 15 08:22:49 PM PDT 24 |
Jul 15 08:33:38 PM PDT 24 |
4820494735 ps |
| T785 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1638237811 |
|
|
Jul 15 08:28:05 PM PDT 24 |
Jul 15 08:34:58 PM PDT 24 |
3119387298 ps |
| T1093 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.3493079078 |
|
|
Jul 15 08:33:02 PM PDT 24 |
Jul 15 08:39:41 PM PDT 24 |
3040961180 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.2565820052 |
|
|
Jul 15 08:20:42 PM PDT 24 |
Jul 15 09:31:48 PM PDT 24 |
20980721110 ps |
| T1095 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.3946170728 |
|
|
Jul 15 08:28:43 PM PDT 24 |
Jul 15 08:43:00 PM PDT 24 |
8910589527 ps |
| T213 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.490764640 |
|
|
Jul 15 08:05:53 PM PDT 24 |
Jul 15 08:15:50 PM PDT 24 |
4796547501 ps |
| T1096 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.760830376 |
|
|
Jul 15 08:31:28 PM PDT 24 |
Jul 15 08:40:59 PM PDT 24 |
4729518408 ps |
| T1097 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.3392231142 |
|
|
Jul 15 08:29:16 PM PDT 24 |
Jul 15 08:52:39 PM PDT 24 |
8677254296 ps |
| T1098 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.3706517279 |
|
|
Jul 15 08:26:29 PM PDT 24 |
Jul 15 09:29:18 PM PDT 24 |
18061497936 ps |
| T825 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.628263114 |
|
|
Jul 15 08:30:17 PM PDT 24 |
Jul 15 08:41:48 PM PDT 24 |
4976299680 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.3106908460 |
|
|
Jul 15 08:04:31 PM PDT 24 |
Jul 15 08:07:38 PM PDT 24 |
2462088806 ps |
| T1100 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.3481398358 |
|
|
Jul 15 08:16:45 PM PDT 24 |
Jul 15 08:33:13 PM PDT 24 |
7443645224 ps |
| T756 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.2705482063 |
|
|
Jul 15 08:32:39 PM PDT 24 |
Jul 15 08:38:46 PM PDT 24 |
3499553648 ps |
| T733 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.858406247 |
|
|
Jul 15 08:30:02 PM PDT 24 |
Jul 15 08:36:52 PM PDT 24 |
3804295600 ps |
| T1101 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1744537691 |
|
|
Jul 15 08:13:18 PM PDT 24 |
Jul 15 09:14:46 PM PDT 24 |
24890287378 ps |
| T1102 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.1279452556 |
|
|
Jul 15 08:24:08 PM PDT 24 |
Jul 15 08:28:51 PM PDT 24 |
3568152832 ps |
| T763 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3728478842 |
|
|
Jul 15 08:30:38 PM PDT 24 |
Jul 15 08:36:55 PM PDT 24 |
3244599600 ps |
| T1103 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3146515684 |
|
|
Jul 15 08:22:45 PM PDT 24 |
Jul 15 08:41:49 PM PDT 24 |
7861629006 ps |
| T287 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.4262711588 |
|
|
Jul 15 08:18:54 PM PDT 24 |
Jul 15 08:27:05 PM PDT 24 |
3700091820 ps |
| T1104 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.3182206316 |
|
|
Jul 15 08:10:01 PM PDT 24 |
Jul 15 09:42:05 PM PDT 24 |
23372269090 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3277824274 |
|
|
Jul 15 08:04:18 PM PDT 24 |
Jul 15 08:34:00 PM PDT 24 |
10605137732 ps |
| T796 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.241378088 |
|
|
Jul 15 08:27:25 PM PDT 24 |
Jul 15 08:38:15 PM PDT 24 |
5175225372 ps |
| T772 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.1069413006 |
|
|
Jul 15 08:19:30 PM PDT 24 |
Jul 15 08:23:58 PM PDT 24 |
2632805081 ps |
| T1105 |
/workspace/coverage/default/1.chip_tap_straps_dev.2645462049 |
|
|
Jul 15 08:12:16 PM PDT 24 |
Jul 15 08:34:42 PM PDT 24 |
12568859834 ps |
| T324 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.3180935200 |
|
|
Jul 15 08:28:12 PM PDT 24 |
Jul 15 08:35:42 PM PDT 24 |
3807096416 ps |
| T1106 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3752796604 |
|
|
Jul 15 08:06:05 PM PDT 24 |
Jul 15 09:20:40 PM PDT 24 |
24842684574 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.839018924 |
|
|
Jul 15 08:18:05 PM PDT 24 |
Jul 15 08:36:55 PM PDT 24 |
6204211752 ps |
| T1108 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2625073628 |
|
|
Jul 15 08:30:56 PM PDT 24 |
Jul 15 08:40:15 PM PDT 24 |
4916851720 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.1639216978 |
|
|
Jul 15 08:05:13 PM PDT 24 |
Jul 15 08:09:34 PM PDT 24 |
3183143197 ps |
| T751 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.4278443688 |
|
|
Jul 15 08:30:33 PM PDT 24 |
Jul 15 08:38:43 PM PDT 24 |
3876774280 ps |
| T455 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3851475937 |
|
|
Jul 15 08:21:42 PM PDT 24 |
Jul 15 08:39:19 PM PDT 24 |
7674117419 ps |
| T439 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.3939520921 |
|
|
Jul 15 08:23:29 PM PDT 24 |
Jul 15 08:42:21 PM PDT 24 |
22586747800 ps |
| T1110 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.1285462413 |
|
|
Jul 15 08:20:50 PM PDT 24 |
Jul 15 09:14:20 PM PDT 24 |
15244321840 ps |
| T1111 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.577056027 |
|
|
Jul 15 08:18:55 PM PDT 24 |
Jul 15 09:36:54 PM PDT 24 |
16060110673 ps |
| T1112 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1467027359 |
|
|
Jul 15 08:12:08 PM PDT 24 |
Jul 15 10:02:58 PM PDT 24 |
48640129800 ps |
| T789 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1503432122 |
|
|
Jul 15 08:29:33 PM PDT 24 |
Jul 15 08:38:01 PM PDT 24 |
3949426900 ps |
| T188 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1132694890 |
|
|
Jul 15 08:01:16 PM PDT 24 |
Jul 15 09:27:25 PM PDT 24 |
43453269146 ps |
| T1113 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3242250832 |
|
|
Jul 15 08:20:57 PM PDT 24 |
Jul 15 08:24:57 PM PDT 24 |
2667007834 ps |
| T827 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.201467615 |
|
|
Jul 15 08:33:42 PM PDT 24 |
Jul 15 08:44:36 PM PDT 24 |
5204812856 ps |
| T1114 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3397268628 |
|
|
Jul 15 08:20:50 PM PDT 24 |
Jul 15 08:31:45 PM PDT 24 |
5322716980 ps |
| T400 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.3117266141 |
|
|
Jul 15 08:12:11 PM PDT 24 |
Jul 15 08:24:24 PM PDT 24 |
8008553368 ps |
| T15 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.4025417797 |
|
|
Jul 15 08:02:13 PM PDT 24 |
Jul 15 08:06:27 PM PDT 24 |
2837422880 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1814105794 |
|
|
Jul 15 08:06:12 PM PDT 24 |
Jul 15 08:31:16 PM PDT 24 |
13585223240 ps |
| T1116 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.2017083176 |
|
|
Jul 15 08:32:13 PM PDT 24 |
Jul 15 08:38:50 PM PDT 24 |
3489083608 ps |
| T1117 |
/workspace/coverage/default/3.chip_tap_straps_prod.3358412047 |
|
|
Jul 15 08:24:46 PM PDT 24 |
Jul 15 08:48:59 PM PDT 24 |
12227435749 ps |
| T220 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3994932182 |
|
|
Jul 15 08:06:50 PM PDT 24 |
Jul 15 08:10:46 PM PDT 24 |
3017520366 ps |
| T1118 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.2990666250 |
|
|
Jul 15 08:01:44 PM PDT 24 |
Jul 15 08:09:03 PM PDT 24 |
4285730264 ps |
| T1119 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3628909013 |
|
|
Jul 15 08:29:00 PM PDT 24 |
Jul 15 08:35:05 PM PDT 24 |
4047501480 ps |
| T774 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.2738381983 |
|
|
Jul 15 08:33:36 PM PDT 24 |
Jul 15 08:42:41 PM PDT 24 |
5828131094 ps |
| T810 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.3814017807 |
|
|
Jul 15 08:31:13 PM PDT 24 |
Jul 15 08:45:05 PM PDT 24 |
6073639496 ps |
| T1120 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2834700300 |
|
|
Jul 15 08:05:18 PM PDT 24 |
Jul 15 09:52:19 PM PDT 24 |
29516331820 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.2132261615 |
|
|
Jul 15 08:09:47 PM PDT 24 |
Jul 15 08:16:27 PM PDT 24 |
3161821794 ps |
| T1122 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3356151785 |
|
|
Jul 15 08:14:55 PM PDT 24 |
Jul 15 09:12:46 PM PDT 24 |
15656691726 ps |
| T776 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.60660631 |
|
|
Jul 15 08:32:20 PM PDT 24 |
Jul 15 08:39:37 PM PDT 24 |
4430614154 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3906156948 |
|
|
Jul 15 08:22:19 PM PDT 24 |
Jul 15 08:34:10 PM PDT 24 |
3852867400 ps |
| T737 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.3411221485 |
|
|
Jul 15 08:31:10 PM PDT 24 |
Jul 15 08:38:02 PM PDT 24 |
3732242132 ps |
| T377 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1763774994 |
|
|
Jul 15 08:32:41 PM PDT 24 |
Jul 15 08:40:13 PM PDT 24 |
3836204500 ps |
| T816 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.2498396149 |
|
|
Jul 15 08:30:50 PM PDT 24 |
Jul 15 08:38:05 PM PDT 24 |
3579111528 ps |
| T162 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.2392998772 |
|
|
Jul 15 08:08:38 PM PDT 24 |
Jul 15 08:10:24 PM PDT 24 |
2868767672 ps |
| T332 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.462124409 |
|
|
Jul 15 08:05:08 PM PDT 24 |
Jul 15 08:25:52 PM PDT 24 |
5247256016 ps |
| T1123 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.3757297351 |
|
|
Jul 15 08:03:44 PM PDT 24 |
Jul 15 08:12:43 PM PDT 24 |
4798888020 ps |
| T51 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.3193350922 |
|
|
Jul 15 08:09:09 PM PDT 24 |
Jul 15 08:16:46 PM PDT 24 |
3524882661 ps |
| T741 |
/workspace/coverage/default/0.rom_raw_unlock.2016689785 |
|
|
Jul 15 08:06:27 PM PDT 24 |
Jul 15 08:10:20 PM PDT 24 |
6478954475 ps |
| T1124 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.1350802228 |
|
|
Jul 15 08:12:38 PM PDT 24 |
Jul 15 08:52:33 PM PDT 24 |
11021904894 ps |
| T81 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.400070455 |
|
|
Jul 15 08:03:49 PM PDT 24 |
Jul 15 08:24:28 PM PDT 24 |
10642172638 ps |
| T1125 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3402294948 |
|
|
Jul 15 08:19:31 PM PDT 24 |
Jul 15 08:30:32 PM PDT 24 |
6734935060 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2986938380 |
|
|
Jul 15 08:02:35 PM PDT 24 |
Jul 15 08:34:42 PM PDT 24 |
21669421092 ps |
| T761 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3408645851 |
|
|
Jul 15 08:27:44 PM PDT 24 |
Jul 15 08:35:06 PM PDT 24 |
3607282640 ps |
| T1126 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.720110474 |
|
|
Jul 15 08:11:40 PM PDT 24 |
Jul 15 09:13:38 PM PDT 24 |
15683879192 ps |
| T1127 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.674101178 |
|
|
Jul 15 08:04:10 PM PDT 24 |
Jul 15 09:12:18 PM PDT 24 |
19144541082 ps |
| T349 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.1508524354 |
|
|
Jul 15 08:22:21 PM PDT 24 |
Jul 15 08:29:42 PM PDT 24 |
4350701126 ps |
| T1128 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.810759247 |
|
|
Jul 15 08:15:41 PM PDT 24 |
Jul 15 08:20:18 PM PDT 24 |
3213212318 ps |
| T1129 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.4222575365 |
|
|
Jul 15 08:07:01 PM PDT 24 |
Jul 15 08:12:14 PM PDT 24 |
2796644936 ps |
| T1130 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1073236007 |
|
|
Jul 15 08:13:04 PM PDT 24 |
Jul 15 08:24:41 PM PDT 24 |
4762164876 ps |
| T535 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2711144173 |
|
|
Jul 15 08:20:06 PM PDT 24 |
Jul 15 08:34:15 PM PDT 24 |
4625262032 ps |
| T1131 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.923558869 |
|
|
Jul 15 08:20:01 PM PDT 24 |
Jul 15 08:33:55 PM PDT 24 |
5726398360 ps |
| T186 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.554154189 |
|
|
Jul 15 08:17:17 PM PDT 24 |
Jul 15 09:40:57 PM PDT 24 |
43697163230 ps |
| T1132 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.2775456749 |
|
|
Jul 15 08:21:24 PM PDT 24 |
Jul 15 08:39:22 PM PDT 24 |
5962124826 ps |
| T1133 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2722316487 |
|
|
Jul 15 08:05:18 PM PDT 24 |
Jul 15 08:10:08 PM PDT 24 |
2760651371 ps |
| T1134 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.875272948 |
|
|
Jul 15 08:09:30 PM PDT 24 |
Jul 15 09:06:52 PM PDT 24 |
14332049278 ps |
| T1135 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.3855626347 |
|
|
Jul 15 08:25:30 PM PDT 24 |
Jul 15 08:29:17 PM PDT 24 |
2308548918 ps |
| T1136 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.4126529371 |
|
|
Jul 15 08:15:20 PM PDT 24 |
Jul 15 08:40:20 PM PDT 24 |
7355655401 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.3600782729 |
|
|
Jul 15 08:16:16 PM PDT 24 |
Jul 15 11:14:29 PM PDT 24 |
60254658586 ps |
| T813 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.1286377871 |
|
|
Jul 15 08:35:40 PM PDT 24 |
Jul 15 08:41:33 PM PDT 24 |
3607400784 ps |
| T266 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1224811571 |
|
|
Jul 15 08:33:41 PM PDT 24 |
Jul 15 08:40:09 PM PDT 24 |
3780840250 ps |
| T790 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2200678821 |
|
|
Jul 15 08:31:32 PM PDT 24 |
Jul 15 08:39:26 PM PDT 24 |
3685857072 ps |
| T1138 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.292167904 |
|
|
Jul 15 08:20:41 PM PDT 24 |
Jul 15 08:24:26 PM PDT 24 |
2722609373 ps |
| T296 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.68261221 |
|
|
Jul 15 08:27:06 PM PDT 24 |
Jul 15 08:33:46 PM PDT 24 |
3342290984 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3578072714 |
|
|
Jul 15 08:20:44 PM PDT 24 |
Jul 15 08:27:33 PM PDT 24 |
6338742540 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3688101119 |
|
|
Jul 15 08:08:03 PM PDT 24 |
Jul 15 08:17:41 PM PDT 24 |
3866687564 ps |
| T786 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.2703474367 |
|
|
Jul 15 08:30:59 PM PDT 24 |
Jul 15 08:37:18 PM PDT 24 |
3203593292 ps |
| T1141 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1068691259 |
|
|
Jul 15 08:08:59 PM PDT 24 |
Jul 15 10:56:25 PM PDT 24 |
58277689780 ps |
| T1142 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2713348801 |
|
|
Jul 15 08:28:45 PM PDT 24 |
Jul 15 09:20:18 PM PDT 24 |
15961353218 ps |
| T717 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.157474953 |
|
|
Jul 15 08:10:41 PM PDT 24 |
Jul 15 08:14:16 PM PDT 24 |
3212834600 ps |
| T1143 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.3962322624 |
|
|
Jul 15 08:24:18 PM PDT 24 |
Jul 15 08:52:35 PM PDT 24 |
9191952826 ps |
| T720 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.3670519860 |
|
|
Jul 15 08:23:31 PM PDT 24 |
Jul 15 08:27:01 PM PDT 24 |
2548603070 ps |
| T313 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.67027839 |
|
|
Jul 15 08:21:59 PM PDT 24 |
Jul 15 08:34:15 PM PDT 24 |
8222907670 ps |
| T788 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1666441738 |
|
|
Jul 15 08:29:18 PM PDT 24 |
Jul 15 08:35:58 PM PDT 24 |
3644709520 ps |
| T450 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1662690201 |
|
|
Jul 15 08:33:00 PM PDT 24 |
Jul 15 08:38:45 PM PDT 24 |
4128715008 ps |
| T780 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.839934850 |
|
|
Jul 15 08:29:14 PM PDT 24 |
Jul 15 08:40:29 PM PDT 24 |
6116954264 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3703485905 |
|
|
Jul 15 08:02:23 PM PDT 24 |
Jul 15 08:30:28 PM PDT 24 |
7193387764 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.1891659118 |
|
|
Jul 15 08:20:21 PM PDT 24 |
Jul 15 08:29:15 PM PDT 24 |
4152909000 ps |
| T1146 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1484433944 |
|
|
Jul 15 08:18:37 PM PDT 24 |
Jul 15 09:12:10 PM PDT 24 |
15140941752 ps |
| T801 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.612320981 |
|
|
Jul 15 08:33:25 PM PDT 24 |
Jul 15 08:39:17 PM PDT 24 |
3457258316 ps |
| T1147 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.2105838017 |
|
|
Jul 15 08:30:03 PM PDT 24 |
Jul 15 09:21:14 PM PDT 24 |
26562528645 ps |
| T1148 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.3863363393 |
|
|
Jul 15 08:11:53 PM PDT 24 |
Jul 15 08:16:42 PM PDT 24 |
2790928195 ps |
| T1149 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.2154102167 |
|
|
Jul 15 08:08:41 PM PDT 24 |
Jul 15 08:57:01 PM PDT 24 |
11679765116 ps |
| T817 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.3374098861 |
|
|
Jul 15 08:31:17 PM PDT 24 |
Jul 15 08:36:38 PM PDT 24 |
3129446000 ps |
| T41 |
/workspace/coverage/default/2.chip_sw_gpio.4076574650 |
|
|
Jul 15 08:17:09 PM PDT 24 |
Jul 15 08:25:22 PM PDT 24 |
3794613830 ps |
| T378 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.856479659 |
|
|
Jul 15 08:33:52 PM PDT 24 |
Jul 15 08:44:32 PM PDT 24 |
6268656608 ps |
| T381 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2829531898 |
|
|
Jul 15 08:31:37 PM PDT 24 |
Jul 15 08:43:00 PM PDT 24 |
4940454828 ps |
| T382 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.2456752409 |
|
|
Jul 15 08:31:52 PM PDT 24 |
Jul 15 08:40:42 PM PDT 24 |
4371729018 ps |
| T383 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3654688129 |
|
|
Jul 15 08:14:40 PM PDT 24 |
Jul 15 09:18:42 PM PDT 24 |
14891906304 ps |
| T265 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.2158983722 |
|
|
Jul 15 08:21:54 PM PDT 24 |
Jul 15 08:28:43 PM PDT 24 |
4021838012 ps |
| T384 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.900616749 |
|
|
Jul 15 08:07:18 PM PDT 24 |
Jul 15 08:29:28 PM PDT 24 |
9451214832 ps |
| T385 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.2596896950 |
|
|
Jul 15 08:31:39 PM PDT 24 |
Jul 15 08:39:13 PM PDT 24 |
3341720770 ps |
| T386 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.3644477437 |
|
|
Jul 15 08:33:04 PM PDT 24 |
Jul 15 08:45:05 PM PDT 24 |
5432592306 ps |
| T387 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1733625652 |
|
|
Jul 15 08:24:56 PM PDT 24 |
Jul 15 08:28:41 PM PDT 24 |
2946549840 ps |
| T388 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1061234287 |
|
|
Jul 15 08:25:40 PM PDT 24 |
Jul 15 08:29:17 PM PDT 24 |
3135068856 ps |
| T1150 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.446535351 |
|
|
Jul 15 08:20:47 PM PDT 24 |
Jul 15 08:26:34 PM PDT 24 |
3409403974 ps |
| T791 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2097500560 |
|
|
Jul 15 08:29:31 PM PDT 24 |
Jul 15 08:41:08 PM PDT 24 |
5600727890 ps |
| T1151 |
/workspace/coverage/default/1.rom_e2e_smoke.2405943112 |
|
|
Jul 15 08:17:52 PM PDT 24 |
Jul 15 09:15:33 PM PDT 24 |
14874907042 ps |
| T1152 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.4129467233 |
|
|
Jul 15 08:16:16 PM PDT 24 |
Jul 15 08:27:12 PM PDT 24 |
5092183900 ps |
| T536 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.404122767 |
|
|
Jul 15 08:10:27 PM PDT 24 |
Jul 15 08:21:56 PM PDT 24 |
4566386928 ps |
| T1153 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.319667860 |
|
|
Jul 15 08:04:03 PM PDT 24 |
Jul 15 08:23:50 PM PDT 24 |
10538977980 ps |
| T343 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2775434544 |
|
|
Jul 15 08:27:09 PM PDT 24 |
Jul 15 08:35:25 PM PDT 24 |
5101343331 ps |
| T688 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.89648508 |
|
|
Jul 15 08:19:53 PM PDT 24 |
Jul 15 08:31:52 PM PDT 24 |
2718147384 ps |
| T1154 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.3109495901 |
|
|
Jul 15 08:07:42 PM PDT 24 |
Jul 15 08:14:53 PM PDT 24 |
5689996886 ps |
| T752 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.859259763 |
|
|
Jul 15 08:33:27 PM PDT 24 |
Jul 15 08:40:07 PM PDT 24 |
3968889370 ps |
| T297 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.970786587 |
|
|
Jul 15 08:33:26 PM PDT 24 |
Jul 15 08:39:00 PM PDT 24 |
3142315484 ps |
| T709 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3920463479 |
|
|
Jul 15 08:33:37 PM PDT 24 |
Jul 15 08:44:23 PM PDT 24 |
4636890360 ps |
| T794 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.3404879127 |
|
|
Jul 15 08:32:10 PM PDT 24 |
Jul 15 08:37:40 PM PDT 24 |
4137764760 ps |
| T352 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2860714818 |
|
|
Jul 15 08:05:26 PM PDT 24 |
Jul 15 08:16:53 PM PDT 24 |
4056353230 ps |
| T1155 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.2554277575 |
|
|
Jul 15 08:20:19 PM PDT 24 |
Jul 15 08:27:51 PM PDT 24 |
4146885656 ps |
| T1156 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3465697443 |
|
|
Jul 15 08:22:27 PM PDT 24 |
Jul 15 08:29:29 PM PDT 24 |
5162135420 ps |
| T1157 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.1137036902 |
|
|
Jul 15 08:10:20 PM PDT 24 |
Jul 15 09:14:30 PM PDT 24 |
15058571423 ps |
| T1158 |
/workspace/coverage/default/2.chip_sw_aes_idle.1052916608 |
|
|
Jul 15 08:20:05 PM PDT 24 |
Jul 15 08:24:35 PM PDT 24 |
3518483056 ps |
| T1159 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.1329801037 |
|
|
Jul 15 08:10:04 PM PDT 24 |
Jul 15 09:06:50 PM PDT 24 |
24960619000 ps |
| T1160 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1241809669 |
|
|
Jul 15 08:11:40 PM PDT 24 |
Jul 15 09:24:46 PM PDT 24 |
17474658075 ps |
| T829 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.1182402197 |
|
|
Jul 15 08:29:59 PM PDT 24 |
Jul 15 08:39:25 PM PDT 24 |
5766659476 ps |
| T1161 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3197288118 |
|
|
Jul 15 08:13:03 PM PDT 24 |
Jul 15 08:29:43 PM PDT 24 |
6341275921 ps |
| T1162 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.3935925611 |
|
|
Jul 15 08:13:59 PM PDT 24 |
Jul 15 08:17:34 PM PDT 24 |
3357293205 ps |
| T1163 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2967741328 |
|
|
Jul 15 08:10:31 PM PDT 24 |
Jul 15 08:14:08 PM PDT 24 |
2708321176 ps |
| T215 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.283139681 |
|
|
Jul 15 08:08:44 PM PDT 24 |
Jul 15 08:19:48 PM PDT 24 |
4175285813 ps |
| T1164 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3048581987 |
|
|
Jul 15 08:17:42 PM PDT 24 |
Jul 15 08:29:42 PM PDT 24 |
4260492000 ps |
| T365 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2757503150 |
|
|
Jul 15 08:06:11 PM PDT 24 |
Jul 15 08:16:53 PM PDT 24 |
4066636641 ps |
| T1165 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2438608951 |
|
|
Jul 15 08:06:05 PM PDT 24 |
Jul 15 08:18:09 PM PDT 24 |
4430652292 ps |
| T767 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.4292586398 |
|
|
Jul 15 08:04:55 PM PDT 24 |
Jul 15 08:13:35 PM PDT 24 |
4273294996 ps |
| T759 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1090462852 |
|
|
Jul 15 08:29:30 PM PDT 24 |
Jul 15 08:40:21 PM PDT 24 |
5707332448 ps |
| T1166 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.3758716245 |
|
|
Jul 15 08:08:14 PM PDT 24 |
Jul 15 08:17:50 PM PDT 24 |
5775661640 ps |
| T1167 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.514659544 |
|
|
Jul 15 08:03:11 PM PDT 24 |
Jul 15 08:06:01 PM PDT 24 |
3226644680 ps |
| T1168 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.1580511421 |
|
|
Jul 15 08:26:42 PM PDT 24 |
Jul 15 10:02:06 PM PDT 24 |
22186823872 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.2358270469 |
|
|
Jul 15 08:03:22 PM PDT 24 |
Jul 15 08:08:14 PM PDT 24 |
3627173280 ps |
| T1169 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2950618432 |
|
|
Jul 15 08:19:03 PM PDT 24 |
Jul 15 08:40:45 PM PDT 24 |
22751999358 ps |
| T1170 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.3378813086 |
|
|
Jul 15 08:04:12 PM PDT 24 |
Jul 15 08:14:56 PM PDT 24 |
6260172024 ps |
| T372 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3608444848 |
|
|
Jul 15 08:09:04 PM PDT 24 |
Jul 15 08:17:40 PM PDT 24 |
4340532120 ps |