| T1026 |
/workspace/coverage/default/2.chip_sw_example_flash.4290059745 |
|
|
Jul 16 08:40:34 PM PDT 24 |
Jul 16 08:44:26 PM PDT 24 |
2360204536 ps |
| T278 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.2170767507 |
|
|
Jul 16 08:29:48 PM PDT 24 |
Jul 16 08:37:23 PM PDT 24 |
3641348696 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.1971814594 |
|
|
Jul 16 08:46:21 PM PDT 24 |
Jul 16 08:52:49 PM PDT 24 |
4617134796 ps |
| T681 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1762625047 |
|
|
Jul 16 08:59:20 PM PDT 24 |
Jul 16 09:12:31 PM PDT 24 |
6028440328 ps |
| T1028 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3303325158 |
|
|
Jul 16 08:30:05 PM PDT 24 |
Jul 16 08:50:07 PM PDT 24 |
7436864184 ps |
| T788 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1170641091 |
|
|
Jul 16 08:59:34 PM PDT 24 |
Jul 16 09:05:43 PM PDT 24 |
3575849618 ps |
| T1029 |
/workspace/coverage/default/0.rom_keymgr_functest.3374949118 |
|
|
Jul 16 08:30:31 PM PDT 24 |
Jul 16 08:37:31 PM PDT 24 |
3946328650 ps |
| T1030 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.2145468481 |
|
|
Jul 16 08:27:27 PM PDT 24 |
Jul 16 08:46:25 PM PDT 24 |
6338633183 ps |
| T1031 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.2185438748 |
|
|
Jul 16 08:35:41 PM PDT 24 |
Jul 16 09:26:19 PM PDT 24 |
11543919710 ps |
| T1032 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.1652550430 |
|
|
Jul 16 08:49:20 PM PDT 24 |
Jul 16 08:57:00 PM PDT 24 |
3742733162 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3138522487 |
|
|
Jul 16 08:46:57 PM PDT 24 |
Jul 16 09:13:36 PM PDT 24 |
6344923528 ps |
| T511 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2525522830 |
|
|
Jul 16 08:30:31 PM PDT 24 |
Jul 16 08:46:10 PM PDT 24 |
4876962400 ps |
| T1034 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1899037196 |
|
|
Jul 16 08:57:35 PM PDT 24 |
Jul 16 09:02:57 PM PDT 24 |
3914707172 ps |
| T1035 |
/workspace/coverage/default/4.chip_tap_straps_prod.1791574059 |
|
|
Jul 16 08:50:29 PM PDT 24 |
Jul 16 08:53:01 PM PDT 24 |
2161145756 ps |
| T771 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2214503265 |
|
|
Jul 16 08:57:15 PM PDT 24 |
Jul 16 09:06:58 PM PDT 24 |
4757507832 ps |
| T147 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2666708442 |
|
|
Jul 16 08:31:09 PM PDT 24 |
Jul 16 08:43:20 PM PDT 24 |
4450840250 ps |
| T202 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.3080187732 |
|
|
Jul 16 08:28:10 PM PDT 24 |
Jul 16 08:34:34 PM PDT 24 |
3243403687 ps |
| T20 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.3456028284 |
|
|
Jul 16 08:41:49 PM PDT 24 |
Jul 16 08:47:09 PM PDT 24 |
3201192375 ps |
| T803 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.1488506366 |
|
|
Jul 16 08:56:15 PM PDT 24 |
Jul 16 09:02:53 PM PDT 24 |
3943432724 ps |
| T148 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.2540444057 |
|
|
Jul 16 08:36:20 PM PDT 24 |
Jul 16 08:44:54 PM PDT 24 |
4376411750 ps |
| T1036 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1822483845 |
|
|
Jul 16 08:34:22 PM PDT 24 |
Jul 16 08:55:28 PM PDT 24 |
7398025639 ps |
| T682 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.3220343183 |
|
|
Jul 16 08:55:09 PM PDT 24 |
Jul 16 09:03:19 PM PDT 24 |
4972210360 ps |
| T807 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.683687087 |
|
|
Jul 16 08:56:15 PM PDT 24 |
Jul 16 09:09:06 PM PDT 24 |
5642521090 ps |
| T1037 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.976714548 |
|
|
Jul 16 08:26:53 PM PDT 24 |
Jul 16 08:32:58 PM PDT 24 |
5169275960 ps |
| T50 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2892596500 |
|
|
Jul 16 08:42:21 PM PDT 24 |
Jul 16 08:48:54 PM PDT 24 |
3589029324 ps |
| T149 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.694891445 |
|
|
Jul 16 08:46:38 PM PDT 24 |
Jul 16 08:54:58 PM PDT 24 |
3466848706 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1634018935 |
|
|
Jul 16 08:38:32 PM PDT 24 |
Jul 16 08:46:04 PM PDT 24 |
4412076908 ps |
| T420 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.3980474605 |
|
|
Jul 16 08:59:52 PM PDT 24 |
Jul 16 09:05:38 PM PDT 24 |
3926359984 ps |
| T157 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.2659690610 |
|
|
Jul 16 09:01:45 PM PDT 24 |
Jul 16 09:12:47 PM PDT 24 |
5660823070 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3829258750 |
|
|
Jul 16 08:46:24 PM PDT 24 |
Jul 16 08:55:47 PM PDT 24 |
5353312832 ps |
| T1040 |
/workspace/coverage/default/1.rom_e2e_static_critical.552949907 |
|
|
Jul 16 08:46:21 PM PDT 24 |
Jul 16 09:45:19 PM PDT 24 |
17561977520 ps |
| T1041 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.4258492561 |
|
|
Jul 16 08:55:04 PM PDT 24 |
Jul 16 09:54:44 PM PDT 24 |
16815906320 ps |
| T200 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3733680793 |
|
|
Jul 16 08:25:44 PM PDT 24 |
Jul 16 11:35:31 PM PDT 24 |
58640441331 ps |
| T279 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.3792386798 |
|
|
Jul 16 08:35:27 PM PDT 24 |
Jul 16 08:45:52 PM PDT 24 |
5454942134 ps |
| T48 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.230515225 |
|
|
Jul 16 08:29:15 PM PDT 24 |
Jul 16 08:37:40 PM PDT 24 |
6196989370 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.193748331 |
|
|
Jul 16 08:32:59 PM PDT 24 |
Jul 16 08:46:34 PM PDT 24 |
4589077496 ps |
| T368 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3583186029 |
|
|
Jul 16 08:54:01 PM PDT 24 |
Jul 16 09:00:02 PM PDT 24 |
5050894128 ps |
| T177 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1906854661 |
|
|
Jul 16 08:49:07 PM PDT 24 |
Jul 16 08:53:34 PM PDT 24 |
3268876940 ps |
| T1042 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3421613070 |
|
|
Jul 16 08:39:31 PM PDT 24 |
Jul 16 08:45:36 PM PDT 24 |
3452121114 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_example_flash.93581357 |
|
|
Jul 16 08:33:16 PM PDT 24 |
Jul 16 08:36:56 PM PDT 24 |
2202415900 ps |
| T280 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2982671008 |
|
|
Jul 16 08:49:19 PM PDT 24 |
Jul 16 08:58:49 PM PDT 24 |
5192572332 ps |
| T295 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3231717771 |
|
|
Jul 16 08:30:08 PM PDT 24 |
Jul 16 08:35:43 PM PDT 24 |
2384025218 ps |
| T1044 |
/workspace/coverage/default/2.rom_e2e_static_critical.2389937033 |
|
|
Jul 16 08:52:56 PM PDT 24 |
Jul 16 09:55:18 PM PDT 24 |
16964723140 ps |
| T197 |
/workspace/coverage/default/2.chip_jtag_mem_access.1890742260 |
|
|
Jul 16 08:40:04 PM PDT 24 |
Jul 16 09:02:11 PM PDT 24 |
13685932694 ps |
| T171 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.859040956 |
|
|
Jul 16 08:43:30 PM PDT 24 |
Jul 16 08:46:03 PM PDT 24 |
3853874674 ps |
| T793 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.1374583132 |
|
|
Jul 16 08:56:06 PM PDT 24 |
Jul 16 09:05:10 PM PDT 24 |
6098136000 ps |
| T128 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2081941176 |
|
|
Jul 16 08:49:17 PM PDT 24 |
Jul 16 09:05:42 PM PDT 24 |
6914996742 ps |
| T1045 |
/workspace/coverage/default/4.chip_tap_straps_dev.1996331520 |
|
|
Jul 16 08:50:26 PM PDT 24 |
Jul 16 08:56:22 PM PDT 24 |
4558625133 ps |
| T805 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.1532812112 |
|
|
Jul 16 08:56:44 PM PDT 24 |
Jul 16 09:04:23 PM PDT 24 |
4301509016 ps |
| T794 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.1449615243 |
|
|
Jul 16 08:58:22 PM PDT 24 |
Jul 16 09:09:22 PM PDT 24 |
6028718870 ps |
| T1046 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2324941765 |
|
|
Jul 16 08:37:22 PM PDT 24 |
Jul 16 08:56:42 PM PDT 24 |
11968233998 ps |
| T318 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.66898813 |
|
|
Jul 16 08:28:23 PM PDT 24 |
Jul 16 08:58:40 PM PDT 24 |
11782508936 ps |
| T359 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1980122483 |
|
|
Jul 16 08:47:58 PM PDT 24 |
Jul 16 09:11:40 PM PDT 24 |
12310260339 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1962996390 |
|
|
Jul 16 08:35:10 PM PDT 24 |
Jul 16 09:10:23 PM PDT 24 |
11256659564 ps |
| T227 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.4148570415 |
|
|
Jul 16 08:36:27 PM PDT 24 |
Jul 16 08:59:27 PM PDT 24 |
6786992808 ps |
| T1048 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.436460914 |
|
|
Jul 16 09:01:50 PM PDT 24 |
Jul 16 09:10:09 PM PDT 24 |
5004520880 ps |
| T665 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2744293069 |
|
|
Jul 16 08:29:21 PM PDT 24 |
Jul 16 08:31:27 PM PDT 24 |
2600402526 ps |
| T296 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.3184465520 |
|
|
Jul 16 08:37:00 PM PDT 24 |
Jul 16 08:41:17 PM PDT 24 |
3156432718 ps |
| T1049 |
/workspace/coverage/default/0.chip_sw_aes_enc.3367396212 |
|
|
Jul 16 08:28:02 PM PDT 24 |
Jul 16 08:32:16 PM PDT 24 |
2888111612 ps |
| T350 |
/workspace/coverage/default/0.chip_sw_hmac_enc.3660047498 |
|
|
Jul 16 08:31:36 PM PDT 24 |
Jul 16 08:35:18 PM PDT 24 |
2191722282 ps |
| T743 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1088319021 |
|
|
Jul 16 09:02:54 PM PDT 24 |
Jul 16 09:08:57 PM PDT 24 |
3356030040 ps |
| T1050 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3363219674 |
|
|
Jul 16 08:46:28 PM PDT 24 |
Jul 16 08:53:14 PM PDT 24 |
2783111752 ps |
| T1051 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.4167392033 |
|
|
Jul 16 08:44:34 PM PDT 24 |
Jul 16 09:05:01 PM PDT 24 |
8896244266 ps |
| T1052 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.737110387 |
|
|
Jul 16 08:37:10 PM PDT 24 |
Jul 16 08:51:20 PM PDT 24 |
9075300574 ps |
| T1053 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.2515416539 |
|
|
Jul 16 08:27:46 PM PDT 24 |
Jul 16 11:43:22 PM PDT 24 |
65052233312 ps |
| T387 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2623986673 |
|
|
Jul 16 08:36:50 PM PDT 24 |
Jul 16 10:16:26 PM PDT 24 |
24229992492 ps |
| T779 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.111424467 |
|
|
Jul 16 08:58:45 PM PDT 24 |
Jul 16 09:07:57 PM PDT 24 |
4903435460 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.3182308764 |
|
|
Jul 16 08:34:35 PM PDT 24 |
Jul 16 08:47:40 PM PDT 24 |
3922130092 ps |
| T10 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.2535420192 |
|
|
Jul 16 08:42:18 PM PDT 24 |
Jul 16 08:48:47 PM PDT 24 |
4700188328 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1613306298 |
|
|
Jul 16 08:43:42 PM PDT 24 |
Jul 16 10:18:47 PM PDT 24 |
48769911650 ps |
| T1056 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.630095366 |
|
|
Jul 16 08:30:25 PM PDT 24 |
Jul 16 08:37:02 PM PDT 24 |
3080614120 ps |
| T1057 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.1283227624 |
|
|
Jul 16 08:41:27 PM PDT 24 |
Jul 16 08:45:01 PM PDT 24 |
2419273080 ps |
| T1058 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.2868831406 |
|
|
Jul 16 08:28:24 PM PDT 24 |
Jul 16 08:44:39 PM PDT 24 |
8917219668 ps |
| T1059 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3801459772 |
|
|
Jul 16 08:42:50 PM PDT 24 |
Jul 16 08:47:23 PM PDT 24 |
3386980188 ps |
| T1060 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.271488447 |
|
|
Jul 16 08:42:59 PM PDT 24 |
Jul 16 08:58:20 PM PDT 24 |
10564511405 ps |
| T1061 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1977379619 |
|
|
Jul 16 08:34:26 PM PDT 24 |
Jul 16 08:48:21 PM PDT 24 |
4665497568 ps |
| T198 |
/workspace/coverage/default/0.chip_jtag_mem_access.621667275 |
|
|
Jul 16 08:21:09 PM PDT 24 |
Jul 16 08:44:39 PM PDT 24 |
13790354288 ps |
| T1062 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2740232373 |
|
|
Jul 16 08:48:18 PM PDT 24 |
Jul 16 08:51:08 PM PDT 24 |
3293657958 ps |
| T1063 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.566277646 |
|
|
Jul 16 08:45:41 PM PDT 24 |
Jul 16 09:18:12 PM PDT 24 |
6849293728 ps |
| T751 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.1128428624 |
|
|
Jul 16 08:56:37 PM PDT 24 |
Jul 16 09:02:00 PM PDT 24 |
4356415442 ps |
| T1064 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3273497183 |
|
|
Jul 16 08:44:33 PM PDT 24 |
Jul 16 09:33:13 PM PDT 24 |
11621626662 ps |
| T1065 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.4267674192 |
|
|
Jul 16 08:53:58 PM PDT 24 |
Jul 16 09:49:02 PM PDT 24 |
14847580520 ps |
| T1066 |
/workspace/coverage/default/0.chip_sw_example_concurrency.2103603833 |
|
|
Jul 16 08:27:12 PM PDT 24 |
Jul 16 08:31:01 PM PDT 24 |
2355570992 ps |
| T1067 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.983224198 |
|
|
Jul 16 08:55:28 PM PDT 24 |
Jul 16 09:14:02 PM PDT 24 |
14154426909 ps |
| T103 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.4060838403 |
|
|
Jul 16 08:48:51 PM PDT 24 |
Jul 16 08:56:45 PM PDT 24 |
7543172400 ps |
| T718 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3349258332 |
|
|
Jul 16 08:56:27 PM PDT 24 |
Jul 16 09:02:39 PM PDT 24 |
3304624196 ps |
| T1068 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.710024967 |
|
|
Jul 16 08:42:22 PM PDT 24 |
Jul 16 08:53:43 PM PDT 24 |
4417839852 ps |
| T1069 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.3168452442 |
|
|
Jul 16 08:35:00 PM PDT 24 |
Jul 16 08:39:42 PM PDT 24 |
2505514134 ps |
| T397 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.2476303265 |
|
|
Jul 16 08:37:27 PM PDT 24 |
Jul 16 08:42:59 PM PDT 24 |
2869762696 ps |
| T1070 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3545003123 |
|
|
Jul 16 08:27:53 PM PDT 24 |
Jul 16 09:34:16 PM PDT 24 |
42150819354 ps |
| T75 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.4181341268 |
|
|
Jul 16 08:27:05 PM PDT 24 |
Jul 16 08:32:28 PM PDT 24 |
3261795064 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.205372248 |
|
|
Jul 16 08:48:36 PM PDT 24 |
Jul 16 09:10:36 PM PDT 24 |
9119721592 ps |
| T1072 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.2473166033 |
|
|
Jul 16 08:27:18 PM PDT 24 |
Jul 16 08:33:01 PM PDT 24 |
3564369832 ps |
| T1073 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.340972584 |
|
|
Jul 16 08:50:41 PM PDT 24 |
Jul 16 09:23:13 PM PDT 24 |
9235494870 ps |
| T1074 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.468442869 |
|
|
Jul 16 08:59:30 PM PDT 24 |
Jul 16 09:07:57 PM PDT 24 |
4477941588 ps |
| T1075 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.2789333375 |
|
|
Jul 16 08:57:18 PM PDT 24 |
Jul 16 09:06:48 PM PDT 24 |
5568913806 ps |
| T162 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.3283032586 |
|
|
Jul 16 08:30:34 PM PDT 24 |
Jul 16 08:40:50 PM PDT 24 |
4557980134 ps |
| T1076 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2432677466 |
|
|
Jul 16 08:48:00 PM PDT 24 |
Jul 16 09:39:47 PM PDT 24 |
40637392024 ps |
| T1077 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.732134641 |
|
|
Jul 16 08:40:35 PM PDT 24 |
Jul 16 08:44:13 PM PDT 24 |
2813269208 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.4165690420 |
|
|
Jul 16 08:27:05 PM PDT 24 |
Jul 16 08:39:11 PM PDT 24 |
5142443960 ps |
| T1079 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.1433067614 |
|
|
Jul 16 08:34:32 PM PDT 24 |
Jul 16 08:54:00 PM PDT 24 |
9189809335 ps |
| T1080 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4081257623 |
|
|
Jul 16 08:41:57 PM PDT 24 |
Jul 16 09:10:29 PM PDT 24 |
12905340895 ps |
| T1081 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2768872750 |
|
|
Jul 16 08:39:25 PM PDT 24 |
Jul 16 09:20:15 PM PDT 24 |
25898763922 ps |
| T203 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.916016630 |
|
|
Jul 16 08:44:02 PM PDT 24 |
Jul 16 08:53:30 PM PDT 24 |
4518763140 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2555118339 |
|
|
Jul 16 08:38:38 PM PDT 24 |
Jul 16 09:00:45 PM PDT 24 |
7808237078 ps |
| T1083 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.3547989739 |
|
|
Jul 16 08:47:28 PM PDT 24 |
Jul 16 08:55:43 PM PDT 24 |
4686199164 ps |
| T1084 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.252597430 |
|
|
Jul 16 08:51:58 PM PDT 24 |
Jul 16 09:16:10 PM PDT 24 |
8639231938 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.4077532555 |
|
|
Jul 16 08:29:20 PM PDT 24 |
Jul 16 08:37:47 PM PDT 24 |
9410507477 ps |
| T204 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.1774991298 |
|
|
Jul 16 08:39:22 PM PDT 24 |
Jul 16 08:49:15 PM PDT 24 |
4622722423 ps |
| T1086 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1162274241 |
|
|
Jul 16 08:33:45 PM PDT 24 |
Jul 16 08:38:24 PM PDT 24 |
3740841364 ps |
| T255 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1241243006 |
|
|
Jul 16 09:00:05 PM PDT 24 |
Jul 16 09:09:27 PM PDT 24 |
5326377250 ps |
| T21 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.1731317403 |
|
|
Jul 16 08:30:17 PM PDT 24 |
Jul 16 08:34:49 PM PDT 24 |
2591809826 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.3438331009 |
|
|
Jul 16 08:40:45 PM PDT 24 |
Jul 16 08:45:09 PM PDT 24 |
2881936620 ps |
| T1088 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.2124433514 |
|
|
Jul 16 08:30:52 PM PDT 24 |
Jul 16 08:59:36 PM PDT 24 |
7262199004 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3051071105 |
|
|
Jul 16 08:43:27 PM PDT 24 |
Jul 16 08:54:27 PM PDT 24 |
4786205832 ps |
| T786 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.4056611085 |
|
|
Jul 16 08:56:27 PM PDT 24 |
Jul 16 09:07:12 PM PDT 24 |
4864427640 ps |
| T1090 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1482253635 |
|
|
Jul 16 08:50:23 PM PDT 24 |
Jul 16 09:16:34 PM PDT 24 |
13518373548 ps |
| T1091 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.1282563989 |
|
|
Jul 16 08:45:17 PM PDT 24 |
Jul 16 09:00:52 PM PDT 24 |
6068679768 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1568282809 |
|
|
Jul 16 08:32:38 PM PDT 24 |
Jul 16 09:19:40 PM PDT 24 |
25613735044 ps |
| T796 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.382096201 |
|
|
Jul 16 09:00:16 PM PDT 24 |
Jul 16 09:05:48 PM PDT 24 |
3293553232 ps |
| T322 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.2584345088 |
|
|
Jul 16 08:29:34 PM PDT 24 |
Jul 16 08:40:04 PM PDT 24 |
4738673476 ps |
| T658 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.2980491818 |
|
|
Jul 16 08:44:44 PM PDT 24 |
Jul 16 08:55:15 PM PDT 24 |
2696196308 ps |
| T1093 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.4113998154 |
|
|
Jul 16 08:48:07 PM PDT 24 |
Jul 16 09:25:39 PM PDT 24 |
26115718440 ps |
| T1094 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.3441326591 |
|
|
Jul 16 08:52:51 PM PDT 24 |
Jul 16 09:03:38 PM PDT 24 |
4559382440 ps |
| T1095 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.4241979590 |
|
|
Jul 16 08:39:18 PM PDT 24 |
Jul 16 08:47:47 PM PDT 24 |
6877349176 ps |
| T1096 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.2814813238 |
|
|
Jul 16 08:52:44 PM PDT 24 |
Jul 16 09:12:24 PM PDT 24 |
7894242200 ps |
| T245 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.1287713160 |
|
|
Jul 16 08:59:25 PM PDT 24 |
Jul 16 09:09:06 PM PDT 24 |
5484841050 ps |
| T287 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1801915809 |
|
|
Jul 16 08:46:27 PM PDT 24 |
Jul 16 09:00:34 PM PDT 24 |
4572125488 ps |
| T288 |
/workspace/coverage/default/0.chip_sw_example_flash.2483149342 |
|
|
Jul 16 08:27:48 PM PDT 24 |
Jul 16 08:32:58 PM PDT 24 |
3265551300 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1121448769 |
|
|
Jul 16 08:47:02 PM PDT 24 |
Jul 16 08:51:31 PM PDT 24 |
2361501292 ps |
| T290 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.952155856 |
|
|
Jul 16 08:59:27 PM PDT 24 |
Jul 16 09:08:30 PM PDT 24 |
5719504816 ps |
| T291 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3162695704 |
|
|
Jul 16 08:56:40 PM PDT 24 |
Jul 16 09:06:56 PM PDT 24 |
6046389520 ps |
| T92 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.3879776297 |
|
|
Jul 16 09:00:08 PM PDT 24 |
Jul 16 09:06:31 PM PDT 24 |
3334324816 ps |
| T292 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.1054636343 |
|
|
Jul 16 08:45:16 PM PDT 24 |
Jul 16 10:04:13 PM PDT 24 |
15321345802 ps |
| T293 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1118597556 |
|
|
Jul 16 08:58:52 PM PDT 24 |
Jul 16 09:04:38 PM PDT 24 |
3184025800 ps |
| T294 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.1121986795 |
|
|
Jul 16 08:44:47 PM PDT 24 |
Jul 16 09:58:50 PM PDT 24 |
14773735432 ps |
| T351 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.1862644657 |
|
|
Jul 16 08:30:44 PM PDT 24 |
Jul 16 08:36:38 PM PDT 24 |
3023407870 ps |
| T1097 |
/workspace/coverage/default/2.chip_sw_aes_idle.2765607222 |
|
|
Jul 16 08:44:24 PM PDT 24 |
Jul 16 08:50:03 PM PDT 24 |
3322975668 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.3120531962 |
|
|
Jul 16 08:34:00 PM PDT 24 |
Jul 16 08:38:04 PM PDT 24 |
3080939104 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.1860015754 |
|
|
Jul 16 08:32:55 PM PDT 24 |
Jul 16 08:37:42 PM PDT 24 |
3399134084 ps |
| T347 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.1434602513 |
|
|
Jul 16 08:45:47 PM PDT 24 |
Jul 16 08:50:53 PM PDT 24 |
2381461024 ps |
| T804 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.3195783238 |
|
|
Jul 16 08:56:19 PM PDT 24 |
Jul 16 09:04:06 PM PDT 24 |
4700858160 ps |
| T1100 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2754483219 |
|
|
Jul 16 08:28:05 PM PDT 24 |
Jul 16 08:37:10 PM PDT 24 |
9438149880 ps |
| T70 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.3458703794 |
|
|
Jul 16 08:49:48 PM PDT 24 |
Jul 16 09:02:29 PM PDT 24 |
7560449077 ps |
| T1101 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.4036747545 |
|
|
Jul 16 08:37:45 PM PDT 24 |
Jul 16 08:50:38 PM PDT 24 |
8376164526 ps |
| T761 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.175756697 |
|
|
Jul 16 08:59:25 PM PDT 24 |
Jul 16 09:06:27 PM PDT 24 |
3881739072 ps |
| T666 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1735727913 |
|
|
Jul 16 08:27:50 PM PDT 24 |
Jul 16 08:29:47 PM PDT 24 |
2258297686 ps |
| T667 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.729554075 |
|
|
Jul 16 08:26:30 PM PDT 24 |
Jul 16 08:28:54 PM PDT 24 |
2783739801 ps |
| T1102 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.2891178343 |
|
|
Jul 16 08:37:25 PM PDT 24 |
Jul 16 08:45:57 PM PDT 24 |
3845818128 ps |
| T1103 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.1123723344 |
|
|
Jul 16 08:37:00 PM PDT 24 |
Jul 16 08:55:59 PM PDT 24 |
5855169950 ps |
| T1104 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.551283659 |
|
|
Jul 16 08:34:22 PM PDT 24 |
Jul 16 08:44:49 PM PDT 24 |
18690342728 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.286693907 |
|
|
Jul 16 08:28:17 PM PDT 24 |
Jul 16 08:32:46 PM PDT 24 |
4015090530 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.505428070 |
|
|
Jul 16 08:27:29 PM PDT 24 |
Jul 16 08:32:07 PM PDT 24 |
3578041940 ps |
| T281 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.4246974336 |
|
|
Jul 16 08:44:30 PM PDT 24 |
Jul 16 08:53:01 PM PDT 24 |
3367607616 ps |
| T717 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.2544396327 |
|
|
Jul 16 08:59:24 PM PDT 24 |
Jul 16 09:04:44 PM PDT 24 |
4219628906 ps |
| T659 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.543687286 |
|
|
Jul 16 08:29:05 PM PDT 24 |
Jul 16 08:39:09 PM PDT 24 |
3084534008 ps |
| T331 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.1550573287 |
|
|
Jul 16 08:42:11 PM PDT 24 |
Jul 16 08:49:51 PM PDT 24 |
3567228174 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.4139396976 |
|
|
Jul 16 08:34:00 PM PDT 24 |
Jul 16 08:52:12 PM PDT 24 |
6178126000 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2039863252 |
|
|
Jul 16 08:36:07 PM PDT 24 |
Jul 16 09:07:48 PM PDT 24 |
7160147136 ps |
| T1108 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1129170128 |
|
|
Jul 16 08:58:46 PM PDT 24 |
Jul 16 09:04:49 PM PDT 24 |
3999436428 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.2065431195 |
|
|
Jul 16 08:32:48 PM PDT 24 |
Jul 16 08:36:19 PM PDT 24 |
2579405466 ps |
| T1109 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.985243742 |
|
|
Jul 16 08:47:21 PM PDT 24 |
Jul 16 09:01:39 PM PDT 24 |
4881241368 ps |
| T1110 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.2052177927 |
|
|
Jul 16 08:42:59 PM PDT 24 |
Jul 16 10:19:48 PM PDT 24 |
48944602999 ps |
| T1111 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.639027016 |
|
|
Jul 16 08:34:24 PM PDT 24 |
Jul 16 09:33:58 PM PDT 24 |
14622466172 ps |
| T763 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.3967817893 |
|
|
Jul 16 09:00:33 PM PDT 24 |
Jul 16 09:12:18 PM PDT 24 |
5839411348 ps |
| T1112 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.778013751 |
|
|
Jul 16 08:47:57 PM PDT 24 |
Jul 16 08:58:31 PM PDT 24 |
4745237300 ps |
| T1113 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.1506308974 |
|
|
Jul 16 08:38:11 PM PDT 24 |
Jul 16 08:42:36 PM PDT 24 |
2919077131 ps |
| T1114 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2120786395 |
|
|
Jul 16 08:32:59 PM PDT 24 |
Jul 16 08:39:52 PM PDT 24 |
4298234195 ps |
| T1115 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.2500132700 |
|
|
Jul 16 08:34:54 PM PDT 24 |
Jul 16 08:58:08 PM PDT 24 |
6719495528 ps |
| T1116 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.1999525173 |
|
|
Jul 16 08:35:10 PM PDT 24 |
Jul 16 09:43:25 PM PDT 24 |
15777461678 ps |
| T812 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.1459817417 |
|
|
Jul 16 08:58:48 PM PDT 24 |
Jul 16 09:05:22 PM PDT 24 |
3507288860 ps |
| T1117 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2924506636 |
|
|
Jul 16 08:31:13 PM PDT 24 |
Jul 16 08:35:44 PM PDT 24 |
2989750178 ps |
| T205 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.3039215781 |
|
|
Jul 16 08:33:53 PM PDT 24 |
Jul 16 08:39:02 PM PDT 24 |
3130480032 ps |
| T1118 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.4110532539 |
|
|
Jul 16 08:55:06 PM PDT 24 |
Jul 16 09:20:29 PM PDT 24 |
8606769096 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.3566251448 |
|
|
Jul 16 08:45:30 PM PDT 24 |
Jul 16 09:10:44 PM PDT 24 |
9012129768 ps |
| T769 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.3782351796 |
|
|
Jul 16 09:00:22 PM PDT 24 |
Jul 16 09:11:03 PM PDT 24 |
5794637936 ps |
| T726 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.2825244617 |
|
|
Jul 16 08:57:34 PM PDT 24 |
Jul 16 09:04:09 PM PDT 24 |
3988707710 ps |
| T328 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2279494723 |
|
|
Jul 16 08:42:29 PM PDT 24 |
Jul 16 08:59:02 PM PDT 24 |
5226854464 ps |
| T1119 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.4068640302 |
|
|
Jul 16 08:28:53 PM PDT 24 |
Jul 16 08:46:36 PM PDT 24 |
5984046614 ps |
| T789 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.4121598240 |
|
|
Jul 16 08:57:15 PM PDT 24 |
Jul 16 09:05:27 PM PDT 24 |
4449380696 ps |
| T1120 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.3841830323 |
|
|
Jul 16 08:33:28 PM PDT 24 |
Jul 16 08:54:54 PM PDT 24 |
8298820818 ps |
| T321 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.1180206995 |
|
|
Jul 16 08:29:45 PM PDT 24 |
Jul 16 08:59:08 PM PDT 24 |
7975786068 ps |
| T1121 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.2288942299 |
|
|
Jul 16 08:40:46 PM PDT 24 |
Jul 16 08:46:19 PM PDT 24 |
3627518586 ps |
| T1122 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1346682635 |
|
|
Jul 16 09:02:17 PM PDT 24 |
Jul 16 09:14:12 PM PDT 24 |
5761221098 ps |
| T1123 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.1856158981 |
|
|
Jul 16 08:41:02 PM PDT 24 |
Jul 16 08:44:23 PM PDT 24 |
3302281812 ps |
| T1124 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.671114197 |
|
|
Jul 16 08:56:15 PM PDT 24 |
Jul 16 09:10:44 PM PDT 24 |
13157147144 ps |
| T1125 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3844564263 |
|
|
Jul 16 08:29:28 PM PDT 24 |
Jul 16 08:37:33 PM PDT 24 |
2900550576 ps |
| T206 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2918679112 |
|
|
Jul 16 08:45:36 PM PDT 24 |
Jul 16 09:19:01 PM PDT 24 |
23232269964 ps |
| T363 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.1792321018 |
|
|
Jul 16 08:56:36 PM PDT 24 |
Jul 16 09:02:05 PM PDT 24 |
3499758080 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.4100903302 |
|
|
Jul 16 08:35:54 PM PDT 24 |
Jul 16 08:44:13 PM PDT 24 |
5029219052 ps |
| T1127 |
/workspace/coverage/default/1.chip_tap_straps_prod.457585973 |
|
|
Jul 16 08:36:35 PM PDT 24 |
Jul 16 08:54:16 PM PDT 24 |
10413763654 ps |
| T1128 |
/workspace/coverage/default/0.chip_tap_straps_prod.588539010 |
|
|
Jul 16 08:36:45 PM PDT 24 |
Jul 16 08:39:21 PM PDT 24 |
2712839442 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.201488713 |
|
|
Jul 16 08:29:09 PM PDT 24 |
Jul 16 08:33:36 PM PDT 24 |
3252924800 ps |
| T1130 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3516104612 |
|
|
Jul 16 08:27:44 PM PDT 24 |
Jul 16 08:31:16 PM PDT 24 |
3389860296 ps |
| T254 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.2438552448 |
|
|
Jul 16 08:30:36 PM PDT 24 |
Jul 16 08:59:54 PM PDT 24 |
11373063016 ps |
| T750 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.444356264 |
|
|
Jul 16 09:00:11 PM PDT 24 |
Jul 16 09:09:30 PM PDT 24 |
5573324630 ps |
| T1131 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.3987293560 |
|
|
Jul 16 08:46:17 PM PDT 24 |
Jul 16 08:51:26 PM PDT 24 |
3048192340 ps |
| T1132 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1085644443 |
|
|
Jul 16 08:29:38 PM PDT 24 |
Jul 16 08:41:13 PM PDT 24 |
4130261652 ps |
| T1133 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2922834424 |
|
|
Jul 16 08:58:28 PM PDT 24 |
Jul 16 09:04:49 PM PDT 24 |
3519478024 ps |
| T1134 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.298812051 |
|
|
Jul 16 08:28:26 PM PDT 24 |
Jul 16 08:38:34 PM PDT 24 |
4782680952 ps |
| T1135 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.350702885 |
|
|
Jul 16 08:48:32 PM PDT 24 |
Jul 16 08:54:05 PM PDT 24 |
3255357898 ps |
| T781 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1861863832 |
|
|
Jul 16 08:55:14 PM PDT 24 |
Jul 16 09:01:35 PM PDT 24 |
3522954294 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3230744726 |
|
|
Jul 16 08:42:05 PM PDT 24 |
Jul 16 11:58:00 PM PDT 24 |
64483263021 ps |
| T163 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.758799527 |
|
|
Jul 16 08:37:18 PM PDT 24 |
Jul 16 08:46:01 PM PDT 24 |
4137025664 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_aes_enc.1434989095 |
|
|
Jul 16 08:46:07 PM PDT 24 |
Jul 16 08:50:16 PM PDT 24 |
2752431796 ps |
| T1138 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.1883426914 |
|
|
Jul 16 08:58:06 PM PDT 24 |
Jul 16 09:05:23 PM PDT 24 |
3395477862 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.4156925787 |
|
|
Jul 16 08:52:51 PM PDT 24 |
Jul 16 09:19:58 PM PDT 24 |
9948233984 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.2803216652 |
|
|
Jul 16 08:27:52 PM PDT 24 |
Jul 16 08:59:37 PM PDT 24 |
7565462444 ps |
| T1141 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.654958401 |
|
|
Jul 16 08:35:16 PM PDT 24 |
Jul 16 09:44:47 PM PDT 24 |
15325756450 ps |
| T1142 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.1192474360 |
|
|
Jul 16 08:49:31 PM PDT 24 |
Jul 16 09:04:28 PM PDT 24 |
5753817044 ps |
| T1143 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.1586735000 |
|
|
Jul 16 08:37:51 PM PDT 24 |
Jul 16 08:43:02 PM PDT 24 |
2950807000 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.4214788675 |
|
|
Jul 16 08:28:23 PM PDT 24 |
Jul 16 08:35:18 PM PDT 24 |
6194209926 ps |
| T1145 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.3495694425 |
|
|
Jul 16 08:27:08 PM PDT 24 |
Jul 16 08:58:14 PM PDT 24 |
8450581164 ps |
| T1146 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.635711212 |
|
|
Jul 16 08:29:35 PM PDT 24 |
Jul 16 09:03:59 PM PDT 24 |
18073573876 ps |
| T802 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.3230700741 |
|
|
Jul 16 08:51:36 PM PDT 24 |
Jul 16 09:03:24 PM PDT 24 |
5739297986 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.694559480 |
|
|
Jul 16 08:33:24 PM PDT 24 |
Jul 16 08:39:33 PM PDT 24 |
2967114310 ps |
| T660 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.1410037982 |
|
|
Jul 16 08:49:22 PM PDT 24 |
Jul 17 01:49:45 AM PDT 24 |
140725906730 ps |
| T1148 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.713804448 |
|
|
Jul 16 08:55:42 PM PDT 24 |
Jul 16 09:31:58 PM PDT 24 |
13348396082 ps |
| T755 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.448671799 |
|
|
Jul 16 08:57:32 PM PDT 24 |
Jul 16 09:06:53 PM PDT 24 |
4776110340 ps |
| T745 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.3927632143 |
|
|
Jul 16 09:02:46 PM PDT 24 |
Jul 16 09:14:38 PM PDT 24 |
6254036176 ps |
| T1149 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.3357613113 |
|
|
Jul 16 08:55:22 PM PDT 24 |
Jul 16 10:08:16 PM PDT 24 |
22790159870 ps |
| T791 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.1603442284 |
|
|
Jul 16 08:58:16 PM PDT 24 |
Jul 16 09:10:12 PM PDT 24 |
4926535124 ps |
| T710 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.3988869429 |
|
|
Jul 16 08:26:52 PM PDT 24 |
Jul 16 08:32:11 PM PDT 24 |
3488943377 ps |
| T1150 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.2185118211 |
|
|
Jul 16 09:00:37 PM PDT 24 |
Jul 16 09:11:13 PM PDT 24 |
5708626060 ps |
| T1151 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.2210649557 |
|
|
Jul 16 08:43:58 PM PDT 24 |
Jul 16 09:44:19 PM PDT 24 |
15870141610 ps |
| T1152 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2318719214 |
|
|
Jul 16 08:45:13 PM PDT 24 |
Jul 16 09:00:58 PM PDT 24 |
4297351096 ps |
| T1153 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.286664421 |
|
|
Jul 16 08:40:20 PM PDT 24 |
Jul 16 08:47:20 PM PDT 24 |
6023099740 ps |
| T302 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1001095731 |
|
|
Jul 16 08:46:22 PM PDT 24 |
Jul 16 09:00:35 PM PDT 24 |
9028586709 ps |
| T774 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2156205804 |
|
|
Jul 16 08:59:28 PM PDT 24 |
Jul 16 09:08:03 PM PDT 24 |
4993118730 ps |
| T792 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.2173195935 |
|
|
Jul 16 09:00:03 PM PDT 24 |
Jul 16 09:11:16 PM PDT 24 |
5463734120 ps |
| T1154 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1054832682 |
|
|
Jul 16 08:29:56 PM PDT 24 |
Jul 16 08:33:48 PM PDT 24 |
3149318298 ps |
| T343 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.517725766 |
|
|
Jul 16 08:41:20 PM PDT 24 |
Jul 16 08:45:37 PM PDT 24 |
2352101000 ps |
| T1155 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.2147416665 |
|
|
Jul 16 08:45:27 PM PDT 24 |
Jul 16 10:14:20 PM PDT 24 |
15038562362 ps |
| T1156 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3186235404 |
|
|
Jul 16 08:37:54 PM PDT 24 |
Jul 16 08:50:03 PM PDT 24 |
4593262534 ps |
| T1157 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2099451150 |
|
|
Jul 16 08:55:15 PM PDT 24 |
Jul 16 09:59:07 PM PDT 24 |
15839334237 ps |
| T1158 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2268522406 |
|
|
Jul 16 08:56:23 PM PDT 24 |
Jul 16 09:04:56 PM PDT 24 |
5069305524 ps |
| T1159 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3456931065 |
|
|
Jul 16 08:52:04 PM PDT 24 |
Jul 16 09:06:31 PM PDT 24 |
9031449806 ps |
| T1160 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.1676673295 |
|
|
Jul 16 08:36:14 PM PDT 24 |
Jul 16 08:45:26 PM PDT 24 |
5547314840 ps |
| T1161 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.2112109698 |
|
|
Jul 16 08:56:42 PM PDT 24 |
Jul 16 09:32:54 PM PDT 24 |
11658921843 ps |
| T1162 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2867329695 |
|
|
Jul 16 08:33:21 PM PDT 24 |
Jul 16 08:44:26 PM PDT 24 |
5349679676 ps |
| T1163 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.561580241 |
|
|
Jul 16 09:01:33 PM PDT 24 |
Jul 16 09:08:13 PM PDT 24 |
4229110884 ps |
| T282 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3905772309 |
|
|
Jul 16 08:45:53 PM PDT 24 |
Jul 16 08:56:30 PM PDT 24 |
5516418602 ps |
| T1164 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.2950492354 |
|
|
Jul 16 08:34:09 PM PDT 24 |
Jul 16 08:36:53 PM PDT 24 |
2162811336 ps |
| T756 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.3488460572 |
|
|
Jul 16 08:59:39 PM PDT 24 |
Jul 16 09:05:56 PM PDT 24 |
3685421800 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.833520715 |
|
|
Jul 16 08:46:58 PM PDT 24 |
Jul 16 09:00:17 PM PDT 24 |
4240631800 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.1573909421 |
|
|
Jul 16 08:35:39 PM PDT 24 |
Jul 16 09:03:50 PM PDT 24 |
7834519488 ps |
| T1167 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2781668412 |
|
|
Jul 16 08:34:30 PM PDT 24 |
Jul 16 11:59:42 PM PDT 24 |
64739132333 ps |
| T1168 |
/workspace/coverage/default/0.chip_tap_straps_rma.3126999829 |
|
|
Jul 16 08:26:54 PM PDT 24 |
Jul 16 08:41:03 PM PDT 24 |
9051394982 ps |
| T1169 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2482733250 |
|
|
Jul 16 08:42:46 PM PDT 24 |
Jul 16 09:01:20 PM PDT 24 |
4910221976 ps |
| T360 |
/workspace/coverage/default/2.chip_sival_flash_info_access.2334349939 |
|
|
Jul 16 08:43:02 PM PDT 24 |
Jul 16 08:48:09 PM PDT 24 |
2427056120 ps |