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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.22 95.64 94.14 95.45 95.00 97.53 99.54


Total test records in report: 2933
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T1352 /workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2179413798 Jul 16 08:30:39 PM PDT 24 Jul 16 08:35:53 PM PDT 24 6124448786 ps
T1353 /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.1618396000 Jul 16 08:29:47 PM PDT 24 Jul 16 08:40:28 PM PDT 24 4494990144 ps
T1354 /workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.444143830 Jul 16 08:48:21 PM PDT 24 Jul 16 08:58:18 PM PDT 24 4751358844 ps
T1355 /workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.1519451988 Jul 16 08:38:58 PM PDT 24 Jul 16 08:43:05 PM PDT 24 3059253349 ps
T1356 /workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.48695055 Jul 16 08:58:15 PM PDT 24 Jul 16 09:04:55 PM PDT 24 4024243544 ps
T1357 /workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.1148762349 Jul 16 08:49:28 PM PDT 24 Jul 16 08:57:31 PM PDT 24 4262775306 ps
T800 /workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.148927748 Jul 16 09:00:18 PM PDT 24 Jul 16 09:06:10 PM PDT 24 3636849056 ps
T423 /workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.2016788135 Jul 16 08:29:23 PM PDT 24 Jul 16 09:13:27 PM PDT 24 33120401529 ps
T313 /workspace/coverage/default/2.chip_plic_all_irqs_0.2781151327 Jul 16 08:47:00 PM PDT 24 Jul 16 09:07:02 PM PDT 24 6450234920 ps
T768 /workspace/coverage/default/78.chip_sw_all_escalation_resets.2328833658 Jul 16 09:00:14 PM PDT 24 Jul 16 09:12:08 PM PDT 24 6059818838 ps
T1358 /workspace/coverage/default/2.rom_keymgr_functest.2689674358 Jul 16 08:49:38 PM PDT 24 Jul 16 08:56:46 PM PDT 24 5517636274 ps
T1359 /workspace/coverage/default/2.chip_sw_keymgr_key_derivation.751191967 Jul 16 08:45:05 PM PDT 24 Jul 16 09:28:05 PM PDT 24 12354623020 ps
T1360 /workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.1970671650 Jul 16 08:35:16 PM PDT 24 Jul 16 08:54:33 PM PDT 24 6711942037 ps
T78 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_reset_error.4188718094 Jul 16 08:17:30 PM PDT 24 Jul 16 08:21:04 PM PDT 24 307492877 ps
T79 /workspace/coverage/cover_reg_top/2.xbar_stress_all.3849945630 Jul 16 08:05:36 PM PDT 24 Jul 16 08:10:42 PM PDT 24 8862323626 ps
T80 /workspace/coverage/cover_reg_top/50.xbar_stress_all_with_error.1122156801 Jul 16 08:12:21 PM PDT 24 Jul 16 08:13:59 PM PDT 24 1199806127 ps
T673 /workspace/coverage/cover_reg_top/41.xbar_access_same_device_slow_rsp.3295090230 Jul 16 08:10:36 PM PDT 24 Jul 16 08:15:29 PM PDT 24 16759355950 ps
T82 /workspace/coverage/cover_reg_top/20.xbar_stress_all_with_rand_reset.2844693471 Jul 16 08:08:04 PM PDT 24 Jul 16 08:14:35 PM PDT 24 5818523988 ps
T435 /workspace/coverage/cover_reg_top/61.xbar_random_slow_rsp.1925136096 Jul 16 08:13:52 PM PDT 24 Jul 16 08:16:50 PM PDT 24 9998490943 ps
T513 /workspace/coverage/cover_reg_top/8.xbar_access_same_device_slow_rsp.840774918 Jul 16 08:06:22 PM PDT 24 Jul 16 08:33:45 PM PDT 24 93955479686 ps
T436 /workspace/coverage/cover_reg_top/30.xbar_error_and_unmapped_addr.3522237797 Jul 16 08:09:06 PM PDT 24 Jul 16 08:09:45 PM PDT 24 959547809 ps
T516 /workspace/coverage/cover_reg_top/21.xbar_error_and_unmapped_addr.4222457765 Jul 16 08:08:03 PM PDT 24 Jul 16 08:08:38 PM PDT 24 309773141 ps
T517 /workspace/coverage/cover_reg_top/97.xbar_unmapped_addr.148022063 Jul 16 08:18:48 PM PDT 24 Jul 16 08:19:22 PM PDT 24 308418382 ps
T512 /workspace/coverage/cover_reg_top/65.xbar_stress_all_with_reset_error.4284020783 Jul 16 08:14:14 PM PDT 24 Jul 16 08:19:46 PM PDT 24 6566540368 ps
T503 /workspace/coverage/cover_reg_top/94.xbar_same_source.1014210419 Jul 16 08:18:30 PM PDT 24 Jul 16 08:19:32 PM PDT 24 2067648426 ps
T514 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_error.2143053286 Jul 16 08:11:54 PM PDT 24 Jul 16 08:13:59 PM PDT 24 1944578322 ps
T126 /workspace/coverage/cover_reg_top/1.chip_csr_hw_reset.1149343475 Jul 16 08:05:33 PM PDT 24 Jul 16 08:12:20 PM PDT 24 6842188299 ps
T417 /workspace/coverage/cover_reg_top/51.xbar_random_slow_rsp.3780049767 Jul 16 08:12:20 PM PDT 24 Jul 16 08:19:54 PM PDT 24 25265597248 ps
T138 /workspace/coverage/cover_reg_top/5.chip_csr_rw.234530561 Jul 16 08:06:01 PM PDT 24 Jul 16 08:14:45 PM PDT 24 5695052893 ps
T672 /workspace/coverage/cover_reg_top/42.xbar_error_and_unmapped_addr.2853376150 Jul 16 08:10:57 PM PDT 24 Jul 16 08:11:24 PM PDT 24 241365521 ps
T518 /workspace/coverage/cover_reg_top/82.xbar_access_same_device.490699677 Jul 16 08:16:25 PM PDT 24 Jul 16 08:17:29 PM PDT 24 1037368509 ps
T437 /workspace/coverage/cover_reg_top/35.xbar_stress_all_with_rand_reset.3943139326 Jul 16 08:09:50 PM PDT 24 Jul 16 08:23:33 PM PDT 24 7473884748 ps
T649 /workspace/coverage/cover_reg_top/48.xbar_smoke_large_delays.2386900970 Jul 16 08:11:48 PM PDT 24 Jul 16 08:13:12 PM PDT 24 6833785932 ps
T456 /workspace/coverage/cover_reg_top/16.xbar_stress_all.1117506502 Jul 16 08:07:23 PM PDT 24 Jul 16 08:10:09 PM PDT 24 2183144401 ps
T515 /workspace/coverage/cover_reg_top/65.xbar_random_large_delays.1215718592 Jul 16 08:14:13 PM PDT 24 Jul 16 08:32:14 PM PDT 24 96657250071 ps
T637 /workspace/coverage/cover_reg_top/71.xbar_smoke_large_delays.2888746906 Jul 16 08:15:03 PM PDT 24 Jul 16 08:17:05 PM PDT 24 10529221980 ps
T574 /workspace/coverage/cover_reg_top/55.xbar_unmapped_addr.511013841 Jul 16 08:12:54 PM PDT 24 Jul 16 08:13:22 PM PDT 24 232189964 ps
T612 /workspace/coverage/cover_reg_top/39.xbar_random_large_delays.535532981 Jul 16 08:10:19 PM PDT 24 Jul 16 08:26:53 PM PDT 24 85375192224 ps
T139 /workspace/coverage/cover_reg_top/10.chip_same_csr_outstanding.2461638455 Jul 16 08:06:47 PM PDT 24 Jul 16 09:09:22 PM PDT 24 28634854227 ps
T521 /workspace/coverage/cover_reg_top/29.chip_tl_errors.440452238 Jul 16 08:08:52 PM PDT 24 Jul 16 08:12:09 PM PDT 24 3349654516 ps
T613 /workspace/coverage/cover_reg_top/57.xbar_smoke_zero_delays.870713826 Jul 16 08:13:32 PM PDT 24 Jul 16 08:13:39 PM PDT 24 43692969 ps
T563 /workspace/coverage/cover_reg_top/68.xbar_random_zero_delays.2429171279 Jul 16 08:14:30 PM PDT 24 Jul 16 08:15:12 PM PDT 24 546140254 ps
T827 /workspace/coverage/cover_reg_top/58.xbar_smoke.202906554 Jul 16 08:13:34 PM PDT 24 Jul 16 08:13:45 PM PDT 24 196098752 ps
T609 /workspace/coverage/cover_reg_top/86.xbar_random_large_delays.3135463351 Jul 16 08:17:12 PM PDT 24 Jul 16 08:21:16 PM PDT 24 21592877327 ps
T605 /workspace/coverage/cover_reg_top/69.xbar_stress_all.1873832427 Jul 16 08:15:21 PM PDT 24 Jul 16 08:16:15 PM PDT 24 662468985 ps
T1361 /workspace/coverage/cover_reg_top/92.xbar_stress_all.4138335516 Jul 16 08:18:12 PM PDT 24 Jul 16 08:18:20 PM PDT 24 73590594 ps
T606 /workspace/coverage/cover_reg_top/37.xbar_random_large_delays.2186385651 Jul 16 08:10:03 PM PDT 24 Jul 16 08:14:57 PM PDT 24 26498429706 ps
T831 /workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.2075117814 Jul 16 08:10:06 PM PDT 24 Jul 16 08:55:32 PM PDT 24 141878129570 ps
T446 /workspace/coverage/cover_reg_top/59.xbar_same_source.541724726 Jul 16 08:13:34 PM PDT 24 Jul 16 08:14:12 PM PDT 24 1104417084 ps
T523 /workspace/coverage/cover_reg_top/16.chip_tl_errors.254094620 Jul 16 08:07:23 PM PDT 24 Jul 16 08:10:40 PM PDT 24 3060744325 ps
T675 /workspace/coverage/cover_reg_top/2.xbar_stress_all_with_error.1180219013 Jul 16 08:05:31 PM PDT 24 Jul 16 08:15:35 PM PDT 24 18758341293 ps
T438 /workspace/coverage/cover_reg_top/66.xbar_stress_all_with_rand_reset.725383084 Jul 16 08:14:14 PM PDT 24 Jul 16 08:20:13 PM PDT 24 6886835888 ps
T1362 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_rand_reset.2853692656 Jul 16 08:11:37 PM PDT 24 Jul 16 08:11:44 PM PDT 24 7432915 ps
T1363 /workspace/coverage/cover_reg_top/58.xbar_smoke_zero_delays.1629274183 Jul 16 08:13:32 PM PDT 24 Jul 16 08:13:40 PM PDT 24 45847934 ps
T601 /workspace/coverage/cover_reg_top/13.xbar_random_zero_delays.2465788450 Jul 16 08:07:12 PM PDT 24 Jul 16 08:07:58 PM PDT 24 552442709 ps
T140 /workspace/coverage/cover_reg_top/2.chip_same_csr_outstanding.2967633617 Jul 16 08:05:33 PM PDT 24 Jul 16 08:47:17 PM PDT 24 16354425046 ps
T813 /workspace/coverage/cover_reg_top/58.xbar_access_same_device.442656180 Jul 16 08:13:25 PM PDT 24 Jul 16 08:14:34 PM PDT 24 1018756872 ps
T439 /workspace/coverage/cover_reg_top/33.xbar_stress_all_with_rand_reset.143288100 Jul 16 08:09:32 PM PDT 24 Jul 16 08:13:00 PM PDT 24 952862160 ps
T552 /workspace/coverage/cover_reg_top/24.xbar_random_slow_rsp.3273974770 Jul 16 08:08:19 PM PDT 24 Jul 16 08:23:17 PM PDT 24 55357920919 ps
T1364 /workspace/coverage/cover_reg_top/34.xbar_unmapped_addr.3083521556 Jul 16 08:09:50 PM PDT 24 Jul 16 08:10:54 PM PDT 24 1330375154 ps
T819 /workspace/coverage/cover_reg_top/49.xbar_access_same_device.2173121583 Jul 16 08:11:51 PM PDT 24 Jul 16 08:12:22 PM PDT 24 390180684 ps
T623 /workspace/coverage/cover_reg_top/60.xbar_random_slow_rsp.1651340528 Jul 16 08:13:45 PM PDT 24 Jul 16 08:27:50 PM PDT 24 44307815803 ps
T524 /workspace/coverage/cover_reg_top/80.xbar_random_large_delays.3695803674 Jul 16 08:16:28 PM PDT 24 Jul 16 08:25:11 PM PDT 24 44760323135 ps
T839 /workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.1369056287 Jul 16 08:05:31 PM PDT 24 Jul 16 08:11:55 PM PDT 24 23708863028 ps
T400 /workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.3893073818 Jul 16 08:06:51 PM PDT 24 Jul 16 08:15:42 PM PDT 24 6216757600 ps
T835 /workspace/coverage/cover_reg_top/19.xbar_smoke_slow_rsp.1882922719 Jul 16 08:08:01 PM PDT 24 Jul 16 08:09:16 PM PDT 24 4602624530 ps
T625 /workspace/coverage/cover_reg_top/15.xbar_random_zero_delays.809561877 Jul 16 08:07:20 PM PDT 24 Jul 16 08:07:42 PM PDT 24 234262805 ps
T1365 /workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.4198070209 Jul 16 08:18:54 PM PDT 24 Jul 16 08:19:17 PM PDT 24 469247554 ps
T1366 /workspace/coverage/cover_reg_top/91.xbar_smoke_zero_delays.172504305 Jul 16 08:17:49 PM PDT 24 Jul 16 08:17:57 PM PDT 24 48639825 ps
T1367 /workspace/coverage/cover_reg_top/1.xbar_smoke_slow_rsp.2301794985 Jul 16 08:05:30 PM PDT 24 Jul 16 08:07:15 PM PDT 24 5932718413 ps
T640 /workspace/coverage/cover_reg_top/6.xbar_smoke.2816160804 Jul 16 08:06:02 PM PDT 24 Jul 16 08:06:11 PM PDT 24 58680896 ps
T1368 /workspace/coverage/cover_reg_top/32.xbar_smoke_slow_rsp.675376440 Jul 16 08:09:18 PM PDT 24 Jul 16 08:11:04 PM PDT 24 6250567955 ps
T870 /workspace/coverage/cover_reg_top/81.xbar_stress_all_with_rand_reset.1213074060 Jul 16 08:16:26 PM PDT 24 Jul 16 08:17:02 PM PDT 24 85943151 ps
T485 /workspace/coverage/cover_reg_top/74.xbar_random_slow_rsp.4149955900 Jul 16 08:15:37 PM PDT 24 Jul 16 08:30:30 PM PDT 24 48327916622 ps
T401 /workspace/coverage/cover_reg_top/19.chip_csr_rw.4106239694 Jul 16 08:08:04 PM PDT 24 Jul 16 08:13:08 PM PDT 24 4309975778 ps
T1369 /workspace/coverage/cover_reg_top/71.xbar_error_random.1356510897 Jul 16 08:15:02 PM PDT 24 Jul 16 08:15:31 PM PDT 24 811096770 ps
T443 /workspace/coverage/cover_reg_top/98.xbar_stress_all.726101888 Jul 16 08:19:04 PM PDT 24 Jul 16 08:20:33 PM PDT 24 989995618 ps
T565 /workspace/coverage/cover_reg_top/32.xbar_smoke_zero_delays.4231936005 Jul 16 08:09:18 PM PDT 24 Jul 16 08:09:25 PM PDT 24 41546310 ps
T402 /workspace/coverage/cover_reg_top/4.chip_csr_aliasing.2129312238 Jul 16 08:05:48 PM PDT 24 Jul 16 09:42:36 PM PDT 24 37572506905 ps
T440 /workspace/coverage/cover_reg_top/46.xbar_access_same_device.2222661866 Jul 16 08:11:16 PM PDT 24 Jul 16 08:12:06 PM PDT 24 670715203 ps
T494 /workspace/coverage/cover_reg_top/56.xbar_random.3985553801 Jul 16 08:13:27 PM PDT 24 Jul 16 08:15:12 PM PDT 24 2674802595 ps
T1370 /workspace/coverage/cover_reg_top/65.xbar_error_random.108638766 Jul 16 08:14:12 PM PDT 24 Jul 16 08:14:43 PM PDT 24 346078561 ps
T551 /workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.1750403478 Jul 16 08:18:27 PM PDT 24 Jul 16 08:18:57 PM PDT 24 639617062 ps
T447 /workspace/coverage/cover_reg_top/22.xbar_stress_all_with_rand_reset.3466054657 Jul 16 08:08:24 PM PDT 24 Jul 16 08:16:32 PM PDT 24 3581169016 ps
T502 /workspace/coverage/cover_reg_top/22.xbar_smoke.1350798449 Jul 16 08:08:24 PM PDT 24 Jul 16 08:08:33 PM PDT 24 149283657 ps
T578 /workspace/coverage/cover_reg_top/2.xbar_random_large_delays.31158123 Jul 16 08:05:34 PM PDT 24 Jul 16 08:15:27 PM PDT 24 56554609700 ps
T1371 /workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.2902070654 Jul 16 08:06:51 PM PDT 24 Jul 16 08:07:40 PM PDT 24 1112987385 ps
T1372 /workspace/coverage/cover_reg_top/98.xbar_error_and_unmapped_addr.1865284804 Jul 16 08:19:04 PM PDT 24 Jul 16 08:19:45 PM PDT 24 1117778706 ps
T611 /workspace/coverage/cover_reg_top/2.xbar_unmapped_addr.85362500 Jul 16 08:05:29 PM PDT 24 Jul 16 08:06:03 PM PDT 24 806364394 ps
T614 /workspace/coverage/cover_reg_top/2.xbar_smoke_zero_delays.3139893932 Jul 16 08:05:34 PM PDT 24 Jul 16 08:05:45 PM PDT 24 54180721 ps
T1373 /workspace/coverage/cover_reg_top/40.xbar_smoke.4214632679 Jul 16 08:10:21 PM PDT 24 Jul 16 08:10:28 PM PDT 24 45602391 ps
T532 /workspace/coverage/cover_reg_top/64.xbar_smoke_zero_delays.705521532 Jul 16 08:14:13 PM PDT 24 Jul 16 08:14:21 PM PDT 24 39057309 ps
T403 /workspace/coverage/cover_reg_top/2.chip_csr_mem_rw_with_rand_reset.940462152 Jul 16 08:05:30 PM PDT 24 Jul 16 08:19:41 PM PDT 24 11227243105 ps
T1374 /workspace/coverage/cover_reg_top/89.xbar_error_and_unmapped_addr.2550966147 Jul 16 08:17:47 PM PDT 24 Jul 16 08:18:27 PM PDT 24 969988840 ps
T817 /workspace/coverage/cover_reg_top/11.xbar_access_same_device_slow_rsp.1168755469 Jul 16 08:06:45 PM PDT 24 Jul 16 08:21:44 PM PDT 24 56520400838 ps
T823 /workspace/coverage/cover_reg_top/70.xbar_access_same_device.2062482842 Jul 16 08:15:03 PM PDT 24 Jul 16 08:16:11 PM PDT 24 1566947417 ps
T824 /workspace/coverage/cover_reg_top/66.xbar_stress_all_with_reset_error.2932350302 Jul 16 08:14:13 PM PDT 24 Jul 16 08:18:59 PM PDT 24 4830093769 ps
T449 /workspace/coverage/cover_reg_top/14.xbar_stress_all_with_rand_reset.2420510643 Jul 16 08:07:21 PM PDT 24 Jul 16 08:12:36 PM PDT 24 2616416766 ps
T678 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.423334890 Jul 16 08:18:31 PM PDT 24 Jul 16 08:21:10 PM PDT 24 2058106111 ps
T1375 /workspace/coverage/cover_reg_top/42.xbar_smoke_large_delays.4236344871 Jul 16 08:10:37 PM PDT 24 Jul 16 08:12:05 PM PDT 24 7596344190 ps
T838 /workspace/coverage/cover_reg_top/47.xbar_access_same_device_slow_rsp.1390618351 Jul 16 08:11:31 PM PDT 24 Jul 16 08:20:39 PM PDT 24 30957935267 ps
T1376 /workspace/coverage/cover_reg_top/54.xbar_smoke_zero_delays.140565156 Jul 16 08:12:53 PM PDT 24 Jul 16 08:13:01 PM PDT 24 49795438 ps
T1377 /workspace/coverage/cover_reg_top/85.xbar_smoke_large_delays.2517809633 Jul 16 08:17:11 PM PDT 24 Jul 16 08:18:02 PM PDT 24 4394737328 ps
T621 /workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.771585587 Jul 16 08:18:11 PM PDT 24 Jul 16 08:19:34 PM PDT 24 5050542283 ps
T1378 /workspace/coverage/cover_reg_top/49.xbar_random_slow_rsp.663825504 Jul 16 08:11:53 PM PDT 24 Jul 16 08:13:50 PM PDT 24 6847403490 ps
T1379 /workspace/coverage/cover_reg_top/73.xbar_smoke_slow_rsp.1337811736 Jul 16 08:15:20 PM PDT 24 Jul 16 08:16:48 PM PDT 24 5038500756 ps
T1380 /workspace/coverage/cover_reg_top/27.xbar_smoke.42209186 Jul 16 08:08:37 PM PDT 24 Jul 16 08:08:45 PM PDT 24 164694227 ps
T474 /workspace/coverage/cover_reg_top/40.xbar_stress_all_with_rand_reset.693969803 Jul 16 08:10:43 PM PDT 24 Jul 16 08:13:29 PM PDT 24 1820890605 ps
T598 /workspace/coverage/cover_reg_top/20.xbar_unmapped_addr.533692936 Jul 16 08:08:03 PM PDT 24 Jul 16 08:08:24 PM PDT 24 157109453 ps
T840 /workspace/coverage/cover_reg_top/2.xbar_access_same_device_slow_rsp.36741463 Jul 16 08:05:35 PM PDT 24 Jul 16 08:11:35 PM PDT 24 19621387648 ps
T1381 /workspace/coverage/cover_reg_top/53.xbar_error_random.2335686700 Jul 16 08:13:02 PM PDT 24 Jul 16 08:13:21 PM PDT 24 487045205 ps
T715 /workspace/coverage/cover_reg_top/11.xbar_error_random.4265812259 Jul 16 08:06:48 PM PDT 24 Jul 16 08:07:02 PM PDT 24 112985939 ps
T568 /workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.2517576000 Jul 16 08:18:50 PM PDT 24 Jul 16 08:19:12 PM PDT 24 197038755 ps
T834 /workspace/coverage/cover_reg_top/26.xbar_access_same_device_slow_rsp.751693197 Jul 16 08:08:37 PM PDT 24 Jul 16 08:39:32 PM PDT 24 101354499109 ps
T582 /workspace/coverage/cover_reg_top/31.xbar_stress_all_with_reset_error.396750984 Jul 16 08:09:22 PM PDT 24 Jul 16 08:16:12 PM PDT 24 4135421796 ps
T629 /workspace/coverage/cover_reg_top/19.xbar_same_source.258141635 Jul 16 08:08:03 PM PDT 24 Jul 16 08:09:15 PM PDT 24 2476226162 ps
T1382 /workspace/coverage/cover_reg_top/28.xbar_same_source.940701291 Jul 16 08:08:50 PM PDT 24 Jul 16 08:08:58 PM PDT 24 132494610 ps
T448 /workspace/coverage/cover_reg_top/97.xbar_random_slow_rsp.742978570 Jul 16 08:18:54 PM PDT 24 Jul 16 08:32:59 PM PDT 24 43174353119 ps
T1383 /workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.3818341462 Jul 16 08:05:56 PM PDT 24 Jul 16 08:06:11 PM PDT 24 152581780 ps
T540 /workspace/coverage/cover_reg_top/80.xbar_random_zero_delays.3624592332 Jul 16 08:16:25 PM PDT 24 Jul 16 08:16:54 PM PDT 24 273234128 ps
T404 /workspace/coverage/cover_reg_top/2.chip_csr_aliasing.797595190 Jul 16 08:05:34 PM PDT 24 Jul 16 09:46:32 PM PDT 24 38180349331 ps
T1384 /workspace/coverage/cover_reg_top/38.xbar_smoke_slow_rsp.1101914192 Jul 16 08:10:08 PM PDT 24 Jul 16 08:11:59 PM PDT 24 6392269796 ps
T444 /workspace/coverage/cover_reg_top/15.xbar_access_same_device_slow_rsp.3224057528 Jul 16 08:07:27 PM PDT 24 Jul 16 08:34:47 PM PDT 24 82984518585 ps
T496 /workspace/coverage/cover_reg_top/92.xbar_stress_all_with_rand_reset.1877913291 Jul 16 08:18:15 PM PDT 24 Jul 16 08:30:07 PM PDT 24 12250687092 ps
T445 /workspace/coverage/cover_reg_top/41.xbar_unmapped_addr.1623485677 Jul 16 08:10:38 PM PDT 24 Jul 16 08:11:02 PM PDT 24 530040184 ps
T527 /workspace/coverage/cover_reg_top/54.xbar_error_random.457940585 Jul 16 08:12:55 PM PDT 24 Jul 16 08:13:18 PM PDT 24 250418952 ps
T676 /workspace/coverage/cover_reg_top/17.xbar_stress_all_with_error.181328198 Jul 16 08:07:38 PM PDT 24 Jul 16 08:13:00 PM PDT 24 3920382971 ps
T820 /workspace/coverage/cover_reg_top/91.xbar_access_same_device.1125845582 Jul 16 08:17:52 PM PDT 24 Jul 16 08:18:54 PM PDT 24 1346144935 ps
T1385 /workspace/coverage/cover_reg_top/85.xbar_error_and_unmapped_addr.2017999640 Jul 16 08:17:11 PM PDT 24 Jul 16 08:17:54 PM PDT 24 1154562240 ps
T1386 /workspace/coverage/cover_reg_top/89.xbar_smoke_zero_delays.2909353375 Jul 16 08:17:42 PM PDT 24 Jul 16 08:17:49 PM PDT 24 49829687 ps
T1387 /workspace/coverage/cover_reg_top/84.xbar_stress_all_with_error.3138931569 Jul 16 08:17:12 PM PDT 24 Jul 16 08:17:24 PM PDT 24 278607879 ps
T583 /workspace/coverage/cover_reg_top/60.xbar_random_zero_delays.1302283254 Jul 16 08:13:42 PM PDT 24 Jul 16 08:14:24 PM PDT 24 441780062 ps
T677 /workspace/coverage/cover_reg_top/77.xbar_error_random.1691924035 Jul 16 08:15:51 PM PDT 24 Jul 16 08:16:23 PM PDT 24 921718163 ps
T828 /workspace/coverage/cover_reg_top/24.xbar_stress_all_with_reset_error.1018177526 Jul 16 08:08:20 PM PDT 24 Jul 16 08:11:28 PM PDT 24 2259802466 ps
T1388 /workspace/coverage/cover_reg_top/47.xbar_error_and_unmapped_addr.433548179 Jul 16 08:11:49 PM PDT 24 Jul 16 08:12:24 PM PDT 24 324585775 ps
T405 /workspace/coverage/cover_reg_top/13.chip_csr_mem_rw_with_rand_reset.247771163 Jul 16 08:07:11 PM PDT 24 Jul 16 08:19:34 PM PDT 24 9264806001 ps
T1389 /workspace/coverage/cover_reg_top/86.xbar_same_source.3966128016 Jul 16 08:17:10 PM PDT 24 Jul 16 08:17:18 PM PDT 24 59459297 ps
T1390 /workspace/coverage/cover_reg_top/39.xbar_same_source.3088510230 Jul 16 08:10:19 PM PDT 24 Jul 16 08:10:34 PM PDT 24 437143768 ps
T1391 /workspace/coverage/cover_reg_top/74.xbar_error_random.1235498768 Jul 16 08:15:38 PM PDT 24 Jul 16 08:16:01 PM PDT 24 240051910 ps
T620 /workspace/coverage/cover_reg_top/59.xbar_random_slow_rsp.4152434586 Jul 16 08:13:30 PM PDT 24 Jul 16 08:19:36 PM PDT 24 21098244273 ps
T528 /workspace/coverage/cover_reg_top/80.xbar_access_same_device.3116557793 Jul 16 08:16:26 PM PDT 24 Jul 16 08:17:00 PM PDT 24 392503359 ps
T461 /workspace/coverage/cover_reg_top/93.xbar_random.2616994250 Jul 16 08:18:17 PM PDT 24 Jul 16 08:18:55 PM PDT 24 459844916 ps
T1392 /workspace/coverage/cover_reg_top/12.xbar_smoke.1319442772 Jul 16 08:07:12 PM PDT 24 Jul 16 08:07:19 PM PDT 24 40211555 ps
T1393 /workspace/coverage/cover_reg_top/25.xbar_smoke_zero_delays.539769152 Jul 16 08:08:18 PM PDT 24 Jul 16 08:08:25 PM PDT 24 51927360 ps
T450 /workspace/coverage/cover_reg_top/10.xbar_stress_all_with_rand_reset.1068655679 Jul 16 08:06:47 PM PDT 24 Jul 16 08:14:03 PM PDT 24 3211614867 ps
T468 /workspace/coverage/cover_reg_top/35.xbar_access_same_device_slow_rsp.3088651568 Jul 16 08:09:53 PM PDT 24 Jul 16 08:41:42 PM PDT 24 98101758547 ps
T1394 /workspace/coverage/cover_reg_top/15.xbar_smoke.3642660493 Jul 16 08:07:22 PM PDT 24 Jul 16 08:07:32 PM PDT 24 192513468 ps
T1395 /workspace/coverage/cover_reg_top/78.xbar_unmapped_addr.909238529 Jul 16 08:16:08 PM PDT 24 Jul 16 08:16:15 PM PDT 24 71928032 ps
T1396 /workspace/coverage/cover_reg_top/57.xbar_smoke_large_delays.897657919 Jul 16 08:13:30 PM PDT 24 Jul 16 08:14:57 PM PDT 24 7788177479 ps
T544 /workspace/coverage/cover_reg_top/31.xbar_random_slow_rsp.3892106337 Jul 16 08:09:17 PM PDT 24 Jul 16 08:20:35 PM PDT 24 39411213956 ps
T519 /workspace/coverage/cover_reg_top/3.chip_tl_errors.3485787954 Jul 16 08:05:48 PM PDT 24 Jul 16 08:10:10 PM PDT 24 4026943492 ps
T619 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_error.2311022641 Jul 16 08:09:11 PM PDT 24 Jul 16 08:12:47 PM PDT 24 6141224376 ps
T617 /workspace/coverage/cover_reg_top/50.xbar_random_large_delays.3528718594 Jul 16 08:11:53 PM PDT 24 Jul 16 08:35:38 PM PDT 24 119932183014 ps
T1397 /workspace/coverage/cover_reg_top/31.xbar_smoke_slow_rsp.2866544998 Jul 16 08:09:17 PM PDT 24 Jul 16 08:10:28 PM PDT 24 4136901966 ps
T505 /workspace/coverage/cover_reg_top/65.xbar_random.907002495 Jul 16 08:13:59 PM PDT 24 Jul 16 08:15:16 PM PDT 24 2318604417 ps
T1398 /workspace/coverage/cover_reg_top/67.xbar_error_and_unmapped_addr.223036088 Jul 16 08:14:31 PM PDT 24 Jul 16 08:15:08 PM PDT 24 304468435 ps
T1399 /workspace/coverage/cover_reg_top/19.xbar_smoke_large_delays.971411078 Jul 16 08:07:46 PM PDT 24 Jul 16 08:09:40 PM PDT 24 9893211075 ps
T836 /workspace/coverage/cover_reg_top/37.xbar_access_same_device_slow_rsp.2271638949 Jul 16 08:10:02 PM PDT 24 Jul 16 08:18:11 PM PDT 24 27328839229 ps
T560 /workspace/coverage/cover_reg_top/71.xbar_random_slow_rsp.3369809801 Jul 16 08:14:58 PM PDT 24 Jul 16 08:32:01 PM PDT 24 56128241174 ps
T841 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_reset_error.391184219 Jul 16 08:08:00 PM PDT 24 Jul 16 08:14:32 PM PDT 24 7485277124 ps
T406 /workspace/coverage/cover_reg_top/0.chip_csr_mem_rw_with_rand_reset.1110033340 Jul 16 08:05:24 PM PDT 24 Jul 16 08:12:59 PM PDT 24 5922638758 ps
T599 /workspace/coverage/cover_reg_top/90.xbar_error_and_unmapped_addr.529824108 Jul 16 08:17:50 PM PDT 24 Jul 16 08:18:16 PM PDT 24 230377880 ps
T849 /workspace/coverage/cover_reg_top/94.xbar_access_same_device.2723089550 Jul 16 08:18:29 PM PDT 24 Jul 16 08:18:40 PM PDT 24 173998521 ps
T542 /workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.1886608708 Jul 16 08:06:20 PM PDT 24 Jul 16 08:06:45 PM PDT 24 310200197 ps
T821 /workspace/coverage/cover_reg_top/29.xbar_access_same_device_slow_rsp.3729914229 Jul 16 08:08:53 PM PDT 24 Jul 16 08:41:27 PM PDT 24 106880977478 ps
T441 /workspace/coverage/cover_reg_top/36.xbar_random_large_delays.1076955440 Jul 16 08:09:52 PM PDT 24 Jul 16 08:32:09 PM PDT 24 104583712070 ps
T1400 /workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.2931937468 Jul 16 08:18:10 PM PDT 24 Jul 16 08:18:18 PM PDT 24 42790979 ps
T1401 /workspace/coverage/cover_reg_top/12.xbar_error_and_unmapped_addr.1358234619 Jul 16 08:06:52 PM PDT 24 Jul 16 08:07:21 PM PDT 24 675943502 ps
T479 /workspace/coverage/cover_reg_top/49.xbar_random_large_delays.1319087441 Jul 16 08:11:53 PM PDT 24 Jul 16 08:24:17 PM PDT 24 65427560135 ps
T654 /workspace/coverage/cover_reg_top/99.xbar_stress_all.232648747 Jul 16 08:19:28 PM PDT 24 Jul 16 08:21:14 PM PDT 24 2934522367 ps
T822 /workspace/coverage/cover_reg_top/33.xbar_access_same_device_slow_rsp.3414471327 Jul 16 08:09:31 PM PDT 24 Jul 16 08:30:22 PM PDT 24 82213724973 ps
T1402 /workspace/coverage/cover_reg_top/43.xbar_stress_all_with_error.3063209073 Jul 16 08:10:57 PM PDT 24 Jul 16 08:14:22 PM PDT 24 3303694658 ps
T442 /workspace/coverage/cover_reg_top/14.xbar_stress_all.3994376347 Jul 16 08:07:20 PM PDT 24 Jul 16 08:10:20 PM PDT 24 1833150595 ps
T1403 /workspace/coverage/cover_reg_top/95.xbar_error_random.1208009119 Jul 16 08:18:26 PM PDT 24 Jul 16 08:19:02 PM PDT 24 907956989 ps
T1404 /workspace/coverage/cover_reg_top/36.xbar_error_and_unmapped_addr.303278422 Jul 16 08:10:05 PM PDT 24 Jul 16 08:10:15 PM PDT 24 172075837 ps
T1405 /workspace/coverage/cover_reg_top/43.xbar_access_same_device.3871466401 Jul 16 08:10:56 PM PDT 24 Jul 16 08:11:30 PM PDT 24 338761957 ps
T389 /workspace/coverage/cover_reg_top/15.chip_csr_rw.4100517180 Jul 16 08:07:41 PM PDT 24 Jul 16 08:16:21 PM PDT 24 5887673955 ps
T495 /workspace/coverage/cover_reg_top/96.xbar_random_zero_delays.1610383874 Jul 16 08:18:50 PM PDT 24 Jul 16 08:19:39 PM PDT 24 557655038 ps
T1406 /workspace/coverage/cover_reg_top/36.xbar_smoke_slow_rsp.3168581816 Jul 16 08:09:54 PM PDT 24 Jul 16 08:11:18 PM PDT 24 4615770017 ps
T632 /workspace/coverage/cover_reg_top/91.xbar_same_source.3088775699 Jul 16 08:17:52 PM PDT 24 Jul 16 08:18:10 PM PDT 24 200575313 ps
T594 /workspace/coverage/cover_reg_top/44.xbar_same_source.3766418375 Jul 16 08:11:22 PM PDT 24 Jul 16 08:12:31 PM PDT 24 2504265696 ps
T1407 /workspace/coverage/cover_reg_top/89.xbar_smoke_large_delays.370487023 Jul 16 08:17:27 PM PDT 24 Jul 16 08:19:12 PM PDT 24 9819235951 ps
T506 /workspace/coverage/cover_reg_top/7.chip_csr_mem_rw_with_rand_reset.2243305500 Jul 16 08:06:21 PM PDT 24 Jul 16 08:18:06 PM PDT 24 10789023265 ps
T1408 /workspace/coverage/cover_reg_top/59.xbar_smoke.1308206640 Jul 16 08:13:30 PM PDT 24 Jul 16 08:13:41 PM PDT 24 212637868 ps
T497 /workspace/coverage/cover_reg_top/60.xbar_stress_all.170173120 Jul 16 08:13:47 PM PDT 24 Jul 16 08:19:47 PM PDT 24 10110844854 ps
T1409 /workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.1937297731 Jul 16 08:17:49 PM PDT 24 Jul 16 08:18:44 PM PDT 24 1425039452 ps
T1410 /workspace/coverage/cover_reg_top/30.xbar_smoke_slow_rsp.1971296995 Jul 16 08:09:08 PM PDT 24 Jul 16 08:10:10 PM PDT 24 3756369684 ps
T475 /workspace/coverage/cover_reg_top/41.xbar_same_source.2200785871 Jul 16 08:10:43 PM PDT 24 Jul 16 08:11:25 PM PDT 24 526199076 ps
T548 /workspace/coverage/cover_reg_top/38.xbar_smoke_zero_delays.3947507613 Jul 16 08:10:04 PM PDT 24 Jul 16 08:10:11 PM PDT 24 44444699 ps
T1411 /workspace/coverage/cover_reg_top/99.xbar_smoke_slow_rsp.2501590067 Jul 16 08:19:06 PM PDT 24 Jul 16 08:20:00 PM PDT 24 3030084845 ps
T1412 /workspace/coverage/cover_reg_top/33.xbar_random_slow_rsp.3531844166 Jul 16 08:09:30 PM PDT 24 Jul 16 08:10:40 PM PDT 24 3930234438 ps
T543 /workspace/coverage/cover_reg_top/29.xbar_random_zero_delays.3010278989 Jul 16 08:08:56 PM PDT 24 Jul 16 08:09:16 PM PDT 24 197064710 ps
T825 /workspace/coverage/cover_reg_top/21.xbar_access_same_device_slow_rsp.710977665 Jul 16 08:08:02 PM PDT 24 Jul 16 08:32:49 PM PDT 24 86590167957 ps
T850 /workspace/coverage/cover_reg_top/87.xbar_access_same_device_slow_rsp.1758376697 Jul 16 08:17:28 PM PDT 24 Jul 16 08:34:55 PM PDT 24 49705889756 ps
T1413 /workspace/coverage/cover_reg_top/92.xbar_error_random.356666246 Jul 16 08:18:13 PM PDT 24 Jul 16 08:18:44 PM PDT 24 923015674 ps
T826 /workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.1423758462 Jul 16 08:18:50 PM PDT 24 Jul 16 08:32:29 PM PDT 24 45352649437 ps
T1414 /workspace/coverage/cover_reg_top/97.xbar_stress_all_with_error.2914470664 Jul 16 08:18:51 PM PDT 24 Jul 16 08:21:43 PM PDT 24 2251358557 ps
T1415 /workspace/coverage/cover_reg_top/78.xbar_random.296989023 Jul 16 08:15:51 PM PDT 24 Jul 16 08:16:11 PM PDT 24 435979209 ps
T1416 /workspace/coverage/cover_reg_top/59.xbar_unmapped_addr.778196102 Jul 16 08:13:32 PM PDT 24 Jul 16 08:14:10 PM PDT 24 292098307 ps
T814 /workspace/coverage/cover_reg_top/7.xbar_stress_all_with_error.1536786901 Jul 16 08:06:23 PM PDT 24 Jul 16 08:09:26 PM PDT 24 5260617353 ps
T829 /workspace/coverage/cover_reg_top/53.xbar_access_same_device_slow_rsp.3931969466 Jul 16 08:12:54 PM PDT 24 Jul 16 08:53:18 PM PDT 24 124510451718 ps
T457 /workspace/coverage/cover_reg_top/36.xbar_same_source.1476723757 Jul 16 08:10:06 PM PDT 24 Jul 16 08:11:01 PM PDT 24 1921042230 ps
T1417 /workspace/coverage/cover_reg_top/63.xbar_error_and_unmapped_addr.3284222097 Jul 16 08:13:52 PM PDT 24 Jul 16 08:14:12 PM PDT 24 394712934 ps
T644 /workspace/coverage/cover_reg_top/84.xbar_random.644099244 Jul 16 08:16:45 PM PDT 24 Jul 16 08:17:37 PM PDT 24 1433275392 ps
T1418 /workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.2779940211 Jul 16 08:06:35 PM PDT 24 Jul 16 08:08:32 PM PDT 24 1454521803 ps
T486 /workspace/coverage/cover_reg_top/46.xbar_stress_all.3036703215 Jul 16 08:11:38 PM PDT 24 Jul 16 08:16:32 PM PDT 24 7989287595 ps
T832 /workspace/coverage/cover_reg_top/58.xbar_stress_all_with_reset_error.1260182238 Jul 16 08:13:33 PM PDT 24 Jul 16 08:17:18 PM PDT 24 2218396379 ps
T1419 /workspace/coverage/cover_reg_top/27.xbar_smoke_slow_rsp.3208936976 Jul 16 08:08:40 PM PDT 24 Jul 16 08:09:52 PM PDT 24 4176715621 ps
T1420 /workspace/coverage/cover_reg_top/52.xbar_random_zero_delays.2270997569 Jul 16 08:12:21 PM PDT 24 Jul 16 08:12:42 PM PDT 24 218401671 ps
T547 /workspace/coverage/cover_reg_top/78.xbar_random_slow_rsp.1704070991 Jul 16 08:16:18 PM PDT 24 Jul 16 08:28:36 PM PDT 24 41927867060 ps
T520 /workspace/coverage/cover_reg_top/12.chip_tl_errors.949457680 Jul 16 08:07:10 PM PDT 24 Jul 16 08:12:26 PM PDT 24 3920532228 ps
T451 /workspace/coverage/cover_reg_top/31.xbar_unmapped_addr.2108866196 Jul 16 08:09:20 PM PDT 24 Jul 16 08:09:36 PM PDT 24 104544848 ps
T1421 /workspace/coverage/cover_reg_top/5.xbar_smoke_zero_delays.3142407178 Jul 16 08:05:57 PM PDT 24 Jul 16 08:06:04 PM PDT 24 38134378 ps
T815 /workspace/coverage/cover_reg_top/5.xbar_access_same_device_slow_rsp.1368488595 Jul 16 08:05:57 PM PDT 24 Jul 16 08:19:02 PM PDT 24 48314766523 ps
T458 /workspace/coverage/cover_reg_top/24.xbar_access_same_device_slow_rsp.3722173308 Jul 16 08:08:17 PM PDT 24 Jul 16 08:50:35 PM PDT 24 145655365680 ps
T564 /workspace/coverage/cover_reg_top/60.xbar_unmapped_addr.3851855053 Jul 16 08:13:51 PM PDT 24 Jul 16 08:14:23 PM PDT 24 847639035 ps
T842 /workspace/coverage/cover_reg_top/12.xbar_stress_all_with_reset_error.338187137 Jul 16 08:06:52 PM PDT 24 Jul 16 08:17:05 PM PDT 24 14819937685 ps
T567 /workspace/coverage/cover_reg_top/27.xbar_random_zero_delays.4162872582 Jul 16 08:08:43 PM PDT 24 Jul 16 08:09:18 PM PDT 24 455680262 ps
T1422 /workspace/coverage/cover_reg_top/56.xbar_error_and_unmapped_addr.2716042082 Jul 16 08:13:24 PM PDT 24 Jul 16 08:13:46 PM PDT 24 574050623 ps
T1423 /workspace/coverage/cover_reg_top/49.xbar_smoke_slow_rsp.2997891280 Jul 16 08:11:53 PM PDT 24 Jul 16 08:13:31 PM PDT 24 5354203941 ps
T608 /workspace/coverage/cover_reg_top/6.xbar_unmapped_addr.3238095091 Jul 16 08:06:03 PM PDT 24 Jul 16 08:07:11 PM PDT 24 1470387011 ps
T616 /workspace/coverage/cover_reg_top/49.xbar_stress_all_with_rand_reset.2794004088 Jul 16 08:11:52 PM PDT 24 Jul 16 08:12:53 PM PDT 24 130760601 ps
T851 /workspace/coverage/cover_reg_top/53.xbar_stress_all_with_reset_error.2021210890 Jul 16 08:12:53 PM PDT 24 Jul 16 08:19:15 PM PDT 24 2454995842 ps
T477 /workspace/coverage/cover_reg_top/42.xbar_stress_all_with_rand_reset.856593125 Jul 16 08:10:55 PM PDT 24 Jul 16 08:26:27 PM PDT 24 18533700282 ps
T1424 /workspace/coverage/cover_reg_top/34.xbar_smoke.2219069156 Jul 16 08:09:32 PM PDT 24 Jul 16 08:09:43 PM PDT 24 204580615 ps
T1425 /workspace/coverage/cover_reg_top/17.xbar_smoke_large_delays.3310058936 Jul 16 08:07:39 PM PDT 24 Jul 16 08:09:09 PM PDT 24 8402023193 ps
T538 /workspace/coverage/cover_reg_top/81.xbar_random_zero_delays.924204599 Jul 16 08:16:27 PM PDT 24 Jul 16 08:17:04 PM PDT 24 381813135 ps
T1426 /workspace/coverage/cover_reg_top/21.xbar_unmapped_addr.334407843 Jul 16 08:07:44 PM PDT 24 Jul 16 08:07:55 PM PDT 24 116975116 ps
T856 /workspace/coverage/cover_reg_top/29.xbar_stress_all_with_reset_error.1798777143 Jul 16 08:09:06 PM PDT 24 Jul 16 08:10:33 PM PDT 24 331859290 ps
T1427 /workspace/coverage/cover_reg_top/52.xbar_error_and_unmapped_addr.253563593 Jul 16 08:12:21 PM PDT 24 Jul 16 08:12:35 PM PDT 24 86284500 ps
T1428 /workspace/coverage/cover_reg_top/20.xbar_error_and_unmapped_addr.2198959030 Jul 16 08:07:41 PM PDT 24 Jul 16 08:08:02 PM PDT 24 152702226 ps
T1429 /workspace/coverage/cover_reg_top/25.xbar_error_random.621493304 Jul 16 08:08:22 PM PDT 24 Jul 16 08:08:57 PM PDT 24 389965405 ps
T1430 /workspace/coverage/cover_reg_top/2.xbar_smoke_large_delays.1348728162 Jul 16 08:05:34 PM PDT 24 Jul 16 08:07:26 PM PDT 24 9419369178 ps
T1431 /workspace/coverage/cover_reg_top/80.xbar_smoke_large_delays.2430445010 Jul 16 08:16:11 PM PDT 24 Jul 16 08:17:30 PM PDT 24 6815306790 ps
T593 /workspace/coverage/cover_reg_top/18.xbar_stress_all.312271791 Jul 16 08:08:03 PM PDT 24 Jul 16 08:08:36 PM PDT 24 728569399 ps
T1432 /workspace/coverage/cover_reg_top/46.xbar_random_slow_rsp.2695345353 Jul 16 08:11:18 PM PDT 24 Jul 16 08:19:32 PM PDT 24 29352754449 ps
T1433 /workspace/coverage/cover_reg_top/77.xbar_smoke_zero_delays.716844112 Jul 16 08:15:49 PM PDT 24 Jul 16 08:15:57 PM PDT 24 43083237 ps
T1434 /workspace/coverage/cover_reg_top/60.xbar_same_source.255552546 Jul 16 08:13:43 PM PDT 24 Jul 16 08:13:51 PM PDT 24 67492567 ps
T1435 /workspace/coverage/cover_reg_top/81.xbar_random_large_delays.271069314 Jul 16 08:16:26 PM PDT 24 Jul 16 08:18:29 PM PDT 24 10867486588 ps
T535 /workspace/coverage/cover_reg_top/96.xbar_stress_all.2236829947 Jul 16 08:19:31 PM PDT 24 Jul 16 08:20:13 PM PDT 24 1295507966 ps
T1436 /workspace/coverage/cover_reg_top/32.xbar_error_and_unmapped_addr.1865342560 Jul 16 08:09:32 PM PDT 24 Jul 16 08:10:01 PM PDT 24 286296825 ps
T1437 /workspace/coverage/cover_reg_top/32.xbar_access_same_device.1115222419 Jul 16 08:09:17 PM PDT 24 Jul 16 08:10:26 PM PDT 24 1697974862 ps
T591 /workspace/coverage/cover_reg_top/39.xbar_stress_all.355528270 Jul 16 08:10:19 PM PDT 24 Jul 16 08:14:29 PM PDT 24 3132658766 ps
T525 /workspace/coverage/cover_reg_top/7.chip_tl_errors.2716724560 Jul 16 08:06:21 PM PDT 24 Jul 16 08:09:26 PM PDT 24 3091414984 ps
T533 /workspace/coverage/cover_reg_top/85.xbar_random_zero_delays.1914997998 Jul 16 08:17:10 PM PDT 24 Jul 16 08:18:07 PM PDT 24 619327144 ps
T852 /workspace/coverage/cover_reg_top/54.xbar_access_same_device.1724917940 Jul 16 08:12:56 PM PDT 24 Jul 16 08:14:05 PM PDT 24 1028843531 ps
T1438 /workspace/coverage/cover_reg_top/13.xbar_unmapped_addr.1244285747 Jul 16 08:07:09 PM PDT 24 Jul 16 08:07:25 PM PDT 24 297001092 ps
T1439 /workspace/coverage/cover_reg_top/79.xbar_stress_all_with_error.2881070632 Jul 16 08:16:24 PM PDT 24 Jul 16 08:18:19 PM PDT 24 1462364812 ps
T1440 /workspace/coverage/cover_reg_top/2.xbar_error_and_unmapped_addr.3521704562 Jul 16 08:05:36 PM PDT 24 Jul 16 08:06:15 PM PDT 24 877961849 ps
T1441 /workspace/coverage/cover_reg_top/29.xbar_random_slow_rsp.2254346702 Jul 16 08:08:50 PM PDT 24 Jul 16 08:12:06 PM PDT 24 10338279086 ps
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