| T456 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.2400313753 |
|
|
Jul 18 08:30:18 PM PDT 24 |
Jul 18 08:35:38 PM PDT 24 |
2966426520 ps |
| T992 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.3532603215 |
|
|
Jul 18 08:22:08 PM PDT 24 |
Jul 18 09:11:22 PM PDT 24 |
11267972100 ps |
| T319 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.624497964 |
|
|
Jul 18 08:53:20 PM PDT 24 |
Jul 18 09:05:36 PM PDT 24 |
6563080720 ps |
| T835 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.3948520487 |
|
|
Jul 18 08:45:35 PM PDT 24 |
Jul 18 08:51:43 PM PDT 24 |
3695061972 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.3143907062 |
|
|
Jul 18 08:32:31 PM PDT 24 |
Jul 18 08:39:00 PM PDT 24 |
5115808048 ps |
| T187 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2676807724 |
|
|
Jul 18 08:34:04 PM PDT 24 |
Jul 18 08:49:39 PM PDT 24 |
7346242571 ps |
| T994 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.994543779 |
|
|
Jul 18 08:20:44 PM PDT 24 |
Jul 18 08:28:30 PM PDT 24 |
5414032200 ps |
| T782 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3733193511 |
|
|
Jul 18 08:46:39 PM PDT 24 |
Jul 18 08:54:23 PM PDT 24 |
4117588656 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.3597179285 |
|
|
Jul 18 08:31:14 PM PDT 24 |
Jul 18 08:36:01 PM PDT 24 |
2979196760 ps |
| T391 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.2147822286 |
|
|
Jul 18 08:32:20 PM PDT 24 |
Jul 18 08:37:03 PM PDT 24 |
3014995888 ps |
| T996 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.168709830 |
|
|
Jul 18 08:15:00 PM PDT 24 |
Jul 18 08:24:01 PM PDT 24 |
5433536960 ps |
| T789 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.1603853408 |
|
|
Jul 18 08:29:30 PM PDT 24 |
Jul 18 08:43:34 PM PDT 24 |
5319843144 ps |
| T997 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.3144551304 |
|
|
Jul 18 08:34:11 PM PDT 24 |
Jul 18 08:37:24 PM PDT 24 |
2131543154 ps |
| T350 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.1011197008 |
|
|
Jul 18 08:20:16 PM PDT 24 |
Jul 18 08:31:50 PM PDT 24 |
3745904350 ps |
| T405 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.2027195792 |
|
|
Jul 18 08:27:22 PM PDT 24 |
Jul 18 08:50:18 PM PDT 24 |
8380935792 ps |
| T788 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.175972625 |
|
|
Jul 18 08:47:28 PM PDT 24 |
Jul 18 08:52:25 PM PDT 24 |
3738054510 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.1388087909 |
|
|
Jul 18 08:39:49 PM PDT 24 |
Jul 18 09:04:24 PM PDT 24 |
8555415472 ps |
| T181 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2086694991 |
|
|
Jul 18 08:38:25 PM PDT 24 |
Jul 18 08:43:23 PM PDT 24 |
2510435587 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.3847115982 |
|
|
Jul 18 08:15:18 PM PDT 24 |
Jul 18 08:25:19 PM PDT 24 |
8269870220 ps |
| T1000 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.4059361756 |
|
|
Jul 18 08:40:23 PM PDT 24 |
Jul 18 08:48:43 PM PDT 24 |
6428333042 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.189189369 |
|
|
Jul 18 08:31:06 PM PDT 24 |
Jul 18 08:40:57 PM PDT 24 |
5433404168 ps |
| T1002 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2239872085 |
|
|
Jul 18 08:30:58 PM PDT 24 |
Jul 18 08:49:08 PM PDT 24 |
5395198328 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.3105130780 |
|
|
Jul 18 08:13:29 PM PDT 24 |
Jul 18 08:49:15 PM PDT 24 |
32582374536 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.1459748081 |
|
|
Jul 18 08:32:51 PM PDT 24 |
Jul 18 08:37:07 PM PDT 24 |
2931282346 ps |
| T207 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2766973073 |
|
|
Jul 18 08:31:01 PM PDT 24 |
Jul 19 12:26:53 AM PDT 24 |
76938935680 ps |
| T875 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.3200030743 |
|
|
Jul 18 08:49:30 PM PDT 24 |
Jul 18 08:56:00 PM PDT 24 |
3674802360 ps |
| T1004 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.3183090070 |
|
|
Jul 18 08:39:56 PM PDT 24 |
Jul 18 08:50:33 PM PDT 24 |
3807346100 ps |
| T834 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1675982092 |
|
|
Jul 18 08:53:30 PM PDT 24 |
Jul 18 09:02:18 PM PDT 24 |
4323682100 ps |
| T739 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.100537118 |
|
|
Jul 18 08:32:04 PM PDT 24 |
Jul 18 08:37:54 PM PDT 24 |
3342282946 ps |
| T1005 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.1617094326 |
|
|
Jul 18 08:42:08 PM PDT 24 |
Jul 18 09:47:55 PM PDT 24 |
18247444524 ps |
| T329 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.787437560 |
|
|
Jul 18 08:13:36 PM PDT 24 |
Jul 18 08:29:46 PM PDT 24 |
5542827252 ps |
| T46 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.572854423 |
|
|
Jul 18 08:33:20 PM PDT 24 |
Jul 18 08:42:08 PM PDT 24 |
5564807996 ps |
| T1006 |
/workspace/coverage/default/1.rom_keymgr_functest.1695998641 |
|
|
Jul 18 08:29:44 PM PDT 24 |
Jul 18 08:41:45 PM PDT 24 |
4956290980 ps |
| T1007 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.914541608 |
|
|
Jul 18 08:52:01 PM PDT 24 |
Jul 18 09:26:11 PM PDT 24 |
12858597428 ps |
| T836 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.2175840214 |
|
|
Jul 18 08:50:13 PM PDT 24 |
Jul 18 09:00:51 PM PDT 24 |
4910762870 ps |
| T188 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.2711790698 |
|
|
Jul 18 08:14:27 PM PDT 24 |
Jul 18 08:20:32 PM PDT 24 |
4310489016 ps |
| T157 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.1968299905 |
|
|
Jul 18 08:16:35 PM PDT 24 |
Jul 18 08:21:32 PM PDT 24 |
4241172960 ps |
| T740 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2310304119 |
|
|
Jul 18 08:15:09 PM PDT 24 |
Jul 18 08:17:22 PM PDT 24 |
3212947466 ps |
| T1008 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.2640412933 |
|
|
Jul 18 08:39:18 PM PDT 24 |
Jul 18 08:42:38 PM PDT 24 |
2477398479 ps |
| T71 |
/workspace/coverage/default/2.chip_tap_straps_rma.3949180795 |
|
|
Jul 18 08:37:27 PM PDT 24 |
Jul 18 08:49:43 PM PDT 24 |
7306423970 ps |
| T854 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2440938484 |
|
|
Jul 18 08:48:19 PM PDT 24 |
Jul 18 08:59:20 PM PDT 24 |
4165621784 ps |
| T1009 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2715965839 |
|
|
Jul 18 08:46:48 PM PDT 24 |
Jul 18 09:04:22 PM PDT 24 |
9976400256 ps |
| T1010 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.904414087 |
|
|
Jul 18 08:41:19 PM PDT 24 |
Jul 18 08:52:28 PM PDT 24 |
3618284800 ps |
| T328 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3581559370 |
|
|
Jul 18 08:26:58 PM PDT 24 |
Jul 18 08:38:45 PM PDT 24 |
4329329816 ps |
| T1011 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.3628868938 |
|
|
Jul 18 08:16:18 PM PDT 24 |
Jul 18 09:04:24 PM PDT 24 |
11452822976 ps |
| T85 |
/workspace/coverage/default/1.rom_raw_unlock.2708965098 |
|
|
Jul 18 08:30:09 PM PDT 24 |
Jul 18 08:34:52 PM PDT 24 |
6058335440 ps |
| T886 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2580230554 |
|
|
Jul 18 08:48:04 PM PDT 24 |
Jul 18 08:56:58 PM PDT 24 |
4164413160 ps |
| T741 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.794030815 |
|
|
Jul 18 08:16:22 PM PDT 24 |
Jul 18 08:18:06 PM PDT 24 |
2305335191 ps |
| T144 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.369864610 |
|
|
Jul 18 08:42:21 PM PDT 24 |
Jul 18 09:00:25 PM PDT 24 |
7507934280 ps |
| T356 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.3258061966 |
|
|
Jul 18 08:30:31 PM PDT 24 |
Jul 18 08:34:49 PM PDT 24 |
3041986080 ps |
| T1012 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.2111668138 |
|
|
Jul 18 08:14:07 PM PDT 24 |
Jul 18 08:29:00 PM PDT 24 |
6130500080 ps |
| T233 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.822511991 |
|
|
Jul 18 08:25:13 PM PDT 24 |
Jul 18 08:52:32 PM PDT 24 |
8643596770 ps |
| T1013 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.561813877 |
|
|
Jul 18 08:40:47 PM PDT 24 |
Jul 18 08:56:29 PM PDT 24 |
11780875933 ps |
| T86 |
/workspace/coverage/default/2.rom_raw_unlock.3561884734 |
|
|
Jul 18 08:41:00 PM PDT 24 |
Jul 18 08:45:28 PM PDT 24 |
5382241092 ps |
| T184 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1518315367 |
|
|
Jul 18 08:12:32 PM PDT 24 |
Jul 18 09:39:38 PM PDT 24 |
44321302492 ps |
| T320 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.1339499032 |
|
|
Jul 18 08:50:29 PM PDT 24 |
Jul 18 08:59:24 PM PDT 24 |
4866028180 ps |
| T1014 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.4275224329 |
|
|
Jul 18 08:39:26 PM PDT 24 |
Jul 18 08:44:18 PM PDT 24 |
3083131224 ps |
| T299 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.689072699 |
|
|
Jul 18 08:45:37 PM PDT 24 |
Jul 18 08:51:40 PM PDT 24 |
4075585460 ps |
| T1015 |
/workspace/coverage/default/2.rom_keymgr_functest.3413194551 |
|
|
Jul 18 08:39:28 PM PDT 24 |
Jul 18 08:47:31 PM PDT 24 |
4085188756 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.261041757 |
|
|
Jul 18 08:17:20 PM PDT 24 |
Jul 18 08:35:56 PM PDT 24 |
5805847870 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.3645849057 |
|
|
Jul 18 08:34:13 PM PDT 24 |
Jul 18 08:39:56 PM PDT 24 |
3089556456 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3221224083 |
|
|
Jul 18 08:16:00 PM PDT 24 |
Jul 18 08:20:17 PM PDT 24 |
2729974230 ps |
| T827 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.3803787768 |
|
|
Jul 18 08:46:22 PM PDT 24 |
Jul 18 08:55:13 PM PDT 24 |
5484046176 ps |
| T1019 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3507787911 |
|
|
Jul 18 08:24:41 PM PDT 24 |
Jul 18 09:40:01 PM PDT 24 |
18829602391 ps |
| T1020 |
/workspace/coverage/default/1.chip_sw_example_rom.148927998 |
|
|
Jul 18 08:16:26 PM PDT 24 |
Jul 18 08:18:21 PM PDT 24 |
3090386392 ps |
| T1021 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.4079501568 |
|
|
Jul 18 08:40:21 PM PDT 24 |
Jul 18 08:45:57 PM PDT 24 |
2479456888 ps |
| T1022 |
/workspace/coverage/default/0.chip_sw_aes_entropy.2650997987 |
|
|
Jul 18 08:14:22 PM PDT 24 |
Jul 18 08:18:11 PM PDT 24 |
2814951752 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2927449724 |
|
|
Jul 18 08:12:56 PM PDT 24 |
Jul 18 08:29:24 PM PDT 24 |
8478691048 ps |
| T776 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.3681228252 |
|
|
Jul 18 08:49:48 PM PDT 24 |
Jul 18 08:59:56 PM PDT 24 |
6238759040 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.647491319 |
|
|
Jul 18 08:35:32 PM PDT 24 |
Jul 18 09:02:19 PM PDT 24 |
14521501030 ps |
| T1025 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1991131248 |
|
|
Jul 18 08:42:45 PM PDT 24 |
Jul 18 09:47:27 PM PDT 24 |
19711163900 ps |
| T330 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.623639272 |
|
|
Jul 18 08:27:01 PM PDT 24 |
Jul 18 08:46:49 PM PDT 24 |
5855205050 ps |
| T807 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.4070546612 |
|
|
Jul 18 08:47:11 PM PDT 24 |
Jul 18 08:57:06 PM PDT 24 |
5106301808 ps |
| T219 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.3048456497 |
|
|
Jul 18 08:13:32 PM PDT 24 |
Jul 18 08:28:47 PM PDT 24 |
5258920474 ps |
| T792 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.4088083387 |
|
|
Jul 18 08:43:51 PM PDT 24 |
Jul 18 08:50:53 PM PDT 24 |
3712111932 ps |
| T858 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.3605555685 |
|
|
Jul 18 08:51:42 PM PDT 24 |
Jul 18 08:58:26 PM PDT 24 |
3387267720 ps |
| T848 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.433944802 |
|
|
Jul 18 08:50:36 PM PDT 24 |
Jul 18 08:55:32 PM PDT 24 |
3576567248 ps |
| T1026 |
/workspace/coverage/default/1.rom_e2e_static_critical.3281339381 |
|
|
Jul 18 08:32:02 PM PDT 24 |
Jul 18 09:37:58 PM PDT 24 |
17484483000 ps |
| T1027 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.63902442 |
|
|
Jul 18 08:13:39 PM PDT 24 |
Jul 18 08:33:18 PM PDT 24 |
7995844880 ps |
| T333 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2046905841 |
|
|
Jul 18 08:21:08 PM PDT 24 |
Jul 18 08:57:11 PM PDT 24 |
11571020168 ps |
| T182 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.410745580 |
|
|
Jul 18 08:14:36 PM PDT 24 |
Jul 18 08:31:35 PM PDT 24 |
7910258664 ps |
| T729 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.439644913 |
|
|
Jul 18 08:38:16 PM PDT 24 |
Jul 18 09:41:41 PM PDT 24 |
24755625011 ps |
| T341 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.971108829 |
|
|
Jul 18 08:25:54 PM PDT 24 |
Jul 18 08:37:41 PM PDT 24 |
3669688410 ps |
| T125 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1263286955 |
|
|
Jul 18 08:38:22 PM PDT 24 |
Jul 18 08:57:34 PM PDT 24 |
7356563145 ps |
| T1028 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.3936523745 |
|
|
Jul 18 08:23:42 PM PDT 24 |
Jul 18 09:57:56 PM PDT 24 |
22950833428 ps |
| T413 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.2749701367 |
|
|
Jul 18 08:26:22 PM PDT 24 |
Jul 18 08:29:24 PM PDT 24 |
2740458244 ps |
| T736 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.4137420123 |
|
|
Jul 18 08:37:34 PM PDT 24 |
Jul 18 08:47:03 PM PDT 24 |
5488333252 ps |
| T170 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.637987537 |
|
|
Jul 18 08:28:29 PM PDT 24 |
Jul 18 08:38:22 PM PDT 24 |
4908008548 ps |
| T240 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.1104673909 |
|
|
Jul 18 08:31:46 PM PDT 24 |
Jul 18 10:12:53 PM PDT 24 |
48512554519 ps |
| T166 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.473215608 |
|
|
Jul 18 08:31:35 PM PDT 24 |
Jul 18 08:33:18 PM PDT 24 |
2548807105 ps |
| T1029 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.931104714 |
|
|
Jul 18 08:36:20 PM PDT 24 |
Jul 18 08:45:23 PM PDT 24 |
3450671768 ps |
| T34 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.1807439413 |
|
|
Jul 18 08:30:12 PM PDT 24 |
Jul 18 08:35:55 PM PDT 24 |
2550452855 ps |
| T1030 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.3376411342 |
|
|
Jul 18 08:25:08 PM PDT 24 |
Jul 18 08:49:57 PM PDT 24 |
7804309336 ps |
| T781 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3799734877 |
|
|
Jul 18 08:50:54 PM PDT 24 |
Jul 18 08:56:17 PM PDT 24 |
3847088888 ps |
| T120 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.3832428996 |
|
|
Jul 18 08:42:33 PM PDT 24 |
Jul 18 09:26:22 PM PDT 24 |
21633627052 ps |
| T161 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.3476665174 |
|
|
Jul 18 08:35:14 PM PDT 24 |
Jul 18 08:45:07 PM PDT 24 |
3275629056 ps |
| T1031 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.1298031802 |
|
|
Jul 18 08:38:12 PM PDT 24 |
Jul 18 08:43:05 PM PDT 24 |
3160857583 ps |
| T375 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.20487666 |
|
|
Jul 18 08:47:29 PM PDT 24 |
Jul 18 08:53:23 PM PDT 24 |
3161745828 ps |
| T378 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.2457594964 |
|
|
Jul 18 08:35:10 PM PDT 24 |
Jul 18 08:40:44 PM PDT 24 |
2291088168 ps |
| T379 |
/workspace/coverage/default/1.chip_sw_aes_entropy.2002669056 |
|
|
Jul 18 08:22:56 PM PDT 24 |
Jul 18 08:26:47 PM PDT 24 |
2547330500 ps |
| T380 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.4042889680 |
|
|
Jul 18 08:47:11 PM PDT 24 |
Jul 18 09:00:43 PM PDT 24 |
6324242744 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.1786448782 |
|
|
Jul 18 08:13:28 PM PDT 24 |
Jul 18 08:19:18 PM PDT 24 |
3804491592 ps |
| T381 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.3991524205 |
|
|
Jul 18 08:48:44 PM PDT 24 |
Jul 18 08:54:31 PM PDT 24 |
3388716884 ps |
| T382 |
/workspace/coverage/default/1.chip_sw_aes_enc.1429646872 |
|
|
Jul 18 08:23:31 PM PDT 24 |
Jul 18 08:30:40 PM PDT 24 |
3115936128 ps |
| T353 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.4246814228 |
|
|
Jul 18 08:20:50 PM PDT 24 |
Jul 18 08:49:29 PM PDT 24 |
8329847760 ps |
| T179 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1460972692 |
|
|
Jul 18 08:41:10 PM PDT 24 |
Jul 18 08:51:55 PM PDT 24 |
5272586160 ps |
| T150 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.4192310690 |
|
|
Jul 18 08:34:51 PM PDT 24 |
Jul 18 08:44:30 PM PDT 24 |
9395028230 ps |
| T1032 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2680767369 |
|
|
Jul 18 08:42:26 PM PDT 24 |
Jul 18 08:51:00 PM PDT 24 |
4939478880 ps |
| T352 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.452846632 |
|
|
Jul 18 08:39:33 PM PDT 24 |
Jul 18 08:49:09 PM PDT 24 |
4311515003 ps |
| T1033 |
/workspace/coverage/default/0.chip_sw_kmac_idle.2539878076 |
|
|
Jul 18 08:14:41 PM PDT 24 |
Jul 18 08:19:03 PM PDT 24 |
2327746360 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.1171703800 |
|
|
Jul 18 08:38:30 PM PDT 24 |
Jul 18 08:57:00 PM PDT 24 |
5772359270 ps |
| T823 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.3706984 |
|
|
Jul 18 08:47:41 PM PDT 24 |
Jul 18 08:57:22 PM PDT 24 |
4462841144 ps |
| T259 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1678083596 |
|
|
Jul 18 08:39:29 PM PDT 24 |
Jul 18 08:45:27 PM PDT 24 |
4914490004 ps |
| T414 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.2627229498 |
|
|
Jul 18 08:25:04 PM PDT 24 |
Jul 18 08:29:27 PM PDT 24 |
3031454170 ps |
| T1035 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.2143610948 |
|
|
Jul 18 08:16:01 PM PDT 24 |
Jul 18 08:39:46 PM PDT 24 |
10324829566 ps |
| T1036 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.679056896 |
|
|
Jul 18 08:18:53 PM PDT 24 |
Jul 18 09:25:14 PM PDT 24 |
15487224228 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.3247905903 |
|
|
Jul 18 08:35:38 PM PDT 24 |
Jul 18 08:38:59 PM PDT 24 |
2652473346 ps |
| T76 |
/workspace/coverage/default/0.chip_tap_straps_rma.4226702772 |
|
|
Jul 18 08:16:07 PM PDT 24 |
Jul 18 08:23:35 PM PDT 24 |
4966396751 ps |
| T1038 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.2253804240 |
|
|
Jul 18 08:44:49 PM PDT 24 |
Jul 18 09:29:23 PM PDT 24 |
10818981570 ps |
| T791 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.1679487276 |
|
|
Jul 18 08:16:50 PM PDT 24 |
Jul 18 08:31:30 PM PDT 24 |
7737278544 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.1276109391 |
|
|
Jul 18 08:45:47 PM PDT 24 |
Jul 18 08:48:52 PM PDT 24 |
2228357128 ps |
| T1040 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.2702757611 |
|
|
Jul 18 08:30:15 PM PDT 24 |
Jul 18 08:42:43 PM PDT 24 |
3631197854 ps |
| T1041 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3469312533 |
|
|
Jul 18 08:22:30 PM PDT 24 |
Jul 18 11:51:23 PM PDT 24 |
254992690664 ps |
| T1042 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.2362038799 |
|
|
Jul 18 08:34:48 PM PDT 24 |
Jul 18 08:39:39 PM PDT 24 |
2182436248 ps |
| T151 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.2150056802 |
|
|
Jul 18 08:25:47 PM PDT 24 |
Jul 18 08:30:35 PM PDT 24 |
2664438627 ps |
| T1043 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.1561112865 |
|
|
Jul 18 08:36:19 PM PDT 24 |
Jul 18 08:54:25 PM PDT 24 |
7450169600 ps |
| T869 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.2641258997 |
|
|
Jul 18 08:48:55 PM PDT 24 |
Jul 18 09:00:03 PM PDT 24 |
5540114904 ps |
| T60 |
/workspace/coverage/default/1.chip_jtag_csr_rw.4046416673 |
|
|
Jul 18 08:19:17 PM PDT 24 |
Jul 18 08:34:31 PM PDT 24 |
10646082198 ps |
| T244 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.1154389445 |
|
|
Jul 18 08:20:03 PM PDT 24 |
Jul 18 08:26:56 PM PDT 24 |
4159076726 ps |
| T790 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.2221787204 |
|
|
Jul 18 08:47:23 PM PDT 24 |
Jul 18 08:52:47 PM PDT 24 |
3704889684 ps |
| T882 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3200612743 |
|
|
Jul 18 08:49:06 PM PDT 24 |
Jul 18 08:54:13 PM PDT 24 |
3401511030 ps |
| T183 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.735832409 |
|
|
Jul 18 08:27:22 PM PDT 24 |
Jul 18 08:32:55 PM PDT 24 |
2773081352 ps |
| T10 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.3099869422 |
|
|
Jul 18 08:37:13 PM PDT 24 |
Jul 18 09:00:31 PM PDT 24 |
19966255848 ps |
| T1044 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.85047690 |
|
|
Jul 18 08:20:09 PM PDT 24 |
Jul 18 08:24:10 PM PDT 24 |
2869807500 ps |
| T865 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.1945424911 |
|
|
Jul 18 08:49:08 PM PDT 24 |
Jul 18 08:55:49 PM PDT 24 |
3403275278 ps |
| T1045 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.849753940 |
|
|
Jul 18 08:35:25 PM PDT 24 |
Jul 18 09:07:45 PM PDT 24 |
8864835536 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.219089507 |
|
|
Jul 18 08:16:17 PM PDT 24 |
Jul 18 08:20:05 PM PDT 24 |
2681351985 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3883046806 |
|
|
Jul 18 08:27:35 PM PDT 24 |
Jul 18 08:38:30 PM PDT 24 |
4588990112 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2385791532 |
|
|
Jul 18 08:39:31 PM PDT 24 |
Jul 18 08:44:40 PM PDT 24 |
3611732912 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3194829302 |
|
|
Jul 18 08:31:19 PM PDT 24 |
Jul 18 08:42:01 PM PDT 24 |
4420561346 ps |
| T777 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.2178191066 |
|
|
Jul 18 08:50:42 PM PDT 24 |
Jul 18 08:55:43 PM PDT 24 |
4267315784 ps |
| T1050 |
/workspace/coverage/default/0.chip_tap_straps_dev.3654477489 |
|
|
Jul 18 08:17:46 PM PDT 24 |
Jul 18 08:21:04 PM PDT 24 |
2672713379 ps |
| T291 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3142900781 |
|
|
Jul 18 08:36:06 PM PDT 24 |
Jul 18 08:46:51 PM PDT 24 |
4207515617 ps |
| T1051 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.954784967 |
|
|
Jul 18 08:13:28 PM PDT 24 |
Jul 18 08:18:31 PM PDT 24 |
3243531862 ps |
| T185 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.685571746 |
|
|
Jul 18 08:31:25 PM PDT 24 |
Jul 18 10:12:23 PM PDT 24 |
43583841260 ps |
| T1052 |
/workspace/coverage/default/0.chip_sw_hmac_enc.808876993 |
|
|
Jul 18 08:15:51 PM PDT 24 |
Jul 18 08:20:52 PM PDT 24 |
3217349904 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.2531634116 |
|
|
Jul 18 08:15:49 PM PDT 24 |
Jul 18 08:24:02 PM PDT 24 |
4167229558 ps |
| T87 |
/workspace/coverage/default/1.chip_jtag_mem_access.2725728590 |
|
|
Jul 18 08:19:34 PM PDT 24 |
Jul 18 08:45:55 PM PDT 24 |
13675827736 ps |
| T1053 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.1698935976 |
|
|
Jul 18 08:26:33 PM PDT 24 |
Jul 18 08:31:35 PM PDT 24 |
2761711896 ps |
| T1054 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3681734621 |
|
|
Jul 18 08:18:20 PM PDT 24 |
Jul 18 08:22:11 PM PDT 24 |
3066534668 ps |
| T365 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.2355430623 |
|
|
Jul 18 08:32:12 PM PDT 24 |
Jul 18 08:38:50 PM PDT 24 |
3880255730 ps |
| T1055 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.2132890867 |
|
|
Jul 18 08:18:56 PM PDT 24 |
Jul 18 08:29:12 PM PDT 24 |
4638133928 ps |
| T742 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2209328031 |
|
|
Jul 18 08:31:45 PM PDT 24 |
Jul 18 08:33:36 PM PDT 24 |
2362921593 ps |
| T345 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.2006992077 |
|
|
Jul 18 08:36:35 PM PDT 24 |
Jul 18 08:45:17 PM PDT 24 |
3987669834 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3852450224 |
|
|
Jul 18 08:36:01 PM PDT 24 |
Jul 18 08:46:59 PM PDT 24 |
3573632792 ps |
| T22 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.730842586 |
|
|
Jul 18 08:30:47 PM PDT 24 |
Jul 18 08:41:07 PM PDT 24 |
4663444255 ps |
| T842 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.1868656175 |
|
|
Jul 18 08:51:21 PM PDT 24 |
Jul 18 08:59:31 PM PDT 24 |
5258477816 ps |
| T315 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.1676932485 |
|
|
Jul 18 08:25:22 PM PDT 24 |
Jul 18 08:40:18 PM PDT 24 |
9190891711 ps |
| T1057 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.343942160 |
|
|
Jul 18 08:32:48 PM PDT 24 |
Jul 18 09:28:36 PM PDT 24 |
15164305160 ps |
| T787 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.925494377 |
|
|
Jul 18 08:43:06 PM PDT 24 |
Jul 18 08:48:44 PM PDT 24 |
3408955624 ps |
| T1058 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.2300255400 |
|
|
Jul 18 08:26:33 PM PDT 24 |
Jul 18 09:34:43 PM PDT 24 |
15856258100 ps |
| T860 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.4089873445 |
|
|
Jul 18 08:41:56 PM PDT 24 |
Jul 18 08:47:37 PM PDT 24 |
3962276960 ps |
| T411 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.1858999992 |
|
|
Jul 18 08:26:16 PM PDT 24 |
Jul 18 08:31:55 PM PDT 24 |
5121303128 ps |
| T268 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.351033381 |
|
|
Jul 18 08:49:51 PM PDT 24 |
Jul 18 08:56:19 PM PDT 24 |
4257563968 ps |
| T764 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2420487107 |
|
|
Jul 18 08:16:51 PM PDT 24 |
Jul 18 08:39:13 PM PDT 24 |
9603266890 ps |
| T1059 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2263651280 |
|
|
Jul 18 08:12:45 PM PDT 24 |
Jul 18 08:39:34 PM PDT 24 |
9480765662 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.2870278205 |
|
|
Jul 18 08:22:18 PM PDT 24 |
Jul 18 08:25:22 PM PDT 24 |
2957656464 ps |
| T281 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.2301009634 |
|
|
Jul 18 08:12:08 PM PDT 24 |
Jul 18 08:25:27 PM PDT 24 |
5086257570 ps |
| T283 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1980516286 |
|
|
Jul 18 08:48:28 PM PDT 24 |
Jul 18 08:56:25 PM PDT 24 |
4226226654 ps |
| T284 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.2840111818 |
|
|
Jul 18 08:26:02 PM PDT 24 |
Jul 18 08:52:12 PM PDT 24 |
7706174264 ps |
| T285 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2660621728 |
|
|
Jul 18 08:15:44 PM PDT 24 |
Jul 18 08:20:06 PM PDT 24 |
3090918622 ps |
| T286 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.425023134 |
|
|
Jul 18 08:23:07 PM PDT 24 |
Jul 18 09:24:06 PM PDT 24 |
11370952964 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.1838641660 |
|
|
Jul 18 08:12:29 PM PDT 24 |
Jul 18 08:22:59 PM PDT 24 |
4864841608 ps |
| T20 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.31807529 |
|
|
Jul 18 08:29:11 PM PDT 24 |
Jul 18 08:35:14 PM PDT 24 |
3222354137 ps |
| T288 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.3163658650 |
|
|
Jul 18 08:42:38 PM PDT 24 |
Jul 18 09:16:07 PM PDT 24 |
13761706040 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3941318467 |
|
|
Jul 18 08:34:30 PM PDT 24 |
Jul 18 08:58:30 PM PDT 24 |
6523534760 ps |
| T290 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1998640171 |
|
|
Jul 18 08:34:56 PM PDT 24 |
Jul 18 08:39:27 PM PDT 24 |
2367870103 ps |
| T360 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.2261785457 |
|
|
Jul 18 08:31:28 PM PDT 24 |
Jul 18 08:43:04 PM PDT 24 |
4096162760 ps |
| T797 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2998800227 |
|
|
Jul 18 08:43:57 PM PDT 24 |
Jul 18 08:49:51 PM PDT 24 |
3098894536 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.787062829 |
|
|
Jul 18 08:17:01 PM PDT 24 |
Jul 18 08:28:55 PM PDT 24 |
4742186498 ps |
| T1062 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3079974995 |
|
|
Jul 18 08:38:45 PM PDT 24 |
Jul 18 08:43:49 PM PDT 24 |
2954169346 ps |
| T264 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.2136393030 |
|
|
Jul 18 08:16:27 PM PDT 24 |
Jul 18 08:42:45 PM PDT 24 |
24514060302 ps |
| T88 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2125435692 |
|
|
Jul 18 08:29:08 PM PDT 24 |
Jul 18 08:53:43 PM PDT 24 |
11670677160 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1423368811 |
|
|
Jul 18 08:18:47 PM PDT 24 |
Jul 18 08:29:43 PM PDT 24 |
4699652489 ps |
| T305 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.1154995889 |
|
|
Jul 18 08:16:34 PM PDT 24 |
Jul 18 08:19:55 PM PDT 24 |
3206361524 ps |
| T822 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.3096595673 |
|
|
Jul 18 08:51:09 PM PDT 24 |
Jul 18 08:59:27 PM PDT 24 |
4010107610 ps |
| T1064 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.3962331066 |
|
|
Jul 18 08:14:08 PM PDT 24 |
Jul 18 08:18:08 PM PDT 24 |
3458881300 ps |
| T856 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.3634501971 |
|
|
Jul 18 08:48:58 PM PDT 24 |
Jul 18 08:59:25 PM PDT 24 |
4518692344 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.679541999 |
|
|
Jul 18 08:20:15 PM PDT 24 |
Jul 18 08:30:18 PM PDT 24 |
7459731648 ps |
| T1066 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.2358101505 |
|
|
Jul 18 08:43:53 PM PDT 24 |
Jul 18 09:42:23 PM PDT 24 |
15786108916 ps |
| T265 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.1527322937 |
|
|
Jul 18 08:22:23 PM PDT 24 |
Jul 18 09:19:44 PM PDT 24 |
25043213094 ps |
| T35 |
/workspace/coverage/default/2.chip_sw_gpio.3967765744 |
|
|
Jul 18 08:30:23 PM PDT 24 |
Jul 18 08:38:48 PM PDT 24 |
4870285317 ps |
| T1067 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2317684585 |
|
|
Jul 18 08:39:03 PM PDT 24 |
Jul 18 08:59:22 PM PDT 24 |
6775399028 ps |
| T337 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2239127690 |
|
|
Jul 18 08:29:55 PM PDT 24 |
Jul 18 08:42:55 PM PDT 24 |
4607081692 ps |
| T1068 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.2745153189 |
|
|
Jul 18 08:34:15 PM PDT 24 |
Jul 18 09:38:30 PM PDT 24 |
14635425750 ps |
| T213 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.3233312924 |
|
|
Jul 18 08:32:44 PM PDT 24 |
Jul 18 08:39:54 PM PDT 24 |
3480513912 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.230954583 |
|
|
Jul 18 08:41:38 PM PDT 24 |
Jul 18 08:51:52 PM PDT 24 |
6654472702 ps |
| T824 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.58234569 |
|
|
Jul 18 08:46:39 PM PDT 24 |
Jul 18 08:53:40 PM PDT 24 |
3616316804 ps |
| T242 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.3523390706 |
|
|
Jul 18 08:19:57 PM PDT 24 |
Jul 18 09:50:30 PM PDT 24 |
46344010521 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.1484250717 |
|
|
Jul 18 08:35:23 PM PDT 24 |
Jul 18 09:23:34 PM PDT 24 |
14232938850 ps |
| T1070 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.3100903882 |
|
|
Jul 18 08:47:24 PM PDT 24 |
Jul 18 08:54:52 PM PDT 24 |
3861380960 ps |
| T1071 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.2577380846 |
|
|
Jul 18 08:19:15 PM PDT 24 |
Jul 18 08:26:37 PM PDT 24 |
6785147040 ps |
| T847 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.39679918 |
|
|
Jul 18 08:48:07 PM PDT 24 |
Jul 18 08:53:37 PM PDT 24 |
3765361722 ps |
| T843 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.3554726804 |
|
|
Jul 18 08:50:42 PM PDT 24 |
Jul 18 08:58:40 PM PDT 24 |
4349840150 ps |
| T1072 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.2043429112 |
|
|
Jul 18 08:26:09 PM PDT 24 |
Jul 18 09:19:10 PM PDT 24 |
11077434540 ps |
| T1073 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2303842949 |
|
|
Jul 18 08:25:29 PM PDT 24 |
Jul 18 08:29:20 PM PDT 24 |
2166158856 ps |
| T246 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.520862341 |
|
|
Jul 18 08:12:41 PM PDT 24 |
Jul 18 09:54:03 PM PDT 24 |
49329072904 ps |
| T1074 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.988676425 |
|
|
Jul 18 08:19:12 PM PDT 24 |
Jul 18 08:25:52 PM PDT 24 |
5618380242 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.1447448053 |
|
|
Jul 18 08:13:09 PM PDT 24 |
Jul 18 08:25:37 PM PDT 24 |
6826224642 ps |
| T810 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1915553051 |
|
|
Jul 18 08:51:18 PM PDT 24 |
Jul 18 09:00:28 PM PDT 24 |
5498472790 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2303200509 |
|
|
Jul 18 08:15:32 PM PDT 24 |
Jul 18 08:21:51 PM PDT 24 |
3454711656 ps |
| T354 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.8605870 |
|
|
Jul 18 08:31:01 PM PDT 24 |
Jul 18 08:48:18 PM PDT 24 |
4800767006 ps |
| T392 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.1381532925 |
|
|
Jul 18 08:17:55 PM PDT 24 |
Jul 18 08:35:45 PM PDT 24 |
5313816160 ps |
| T881 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.1646786499 |
|
|
Jul 18 08:43:44 PM PDT 24 |
Jul 18 08:49:45 PM PDT 24 |
4205485800 ps |
| T844 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.3953951253 |
|
|
Jul 18 08:49:52 PM PDT 24 |
Jul 18 08:56:20 PM PDT 24 |
3880869254 ps |
| T269 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.3605218534 |
|
|
Jul 18 08:13:58 PM PDT 24 |
Jul 18 08:27:26 PM PDT 24 |
6723041832 ps |
| T1075 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.265263205 |
|
|
Jul 18 08:44:21 PM PDT 24 |
Jul 18 09:40:56 PM PDT 24 |
14906384616 ps |
| T162 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2007296105 |
|
|
Jul 18 08:15:25 PM PDT 24 |
Jul 18 08:26:31 PM PDT 24 |
4154304748 ps |
| T1076 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2527163608 |
|
|
Jul 18 08:38:44 PM PDT 24 |
Jul 18 08:41:50 PM PDT 24 |
2585682945 ps |
| T321 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.3285029 |
|
|
Jul 18 08:44:11 PM PDT 24 |
Jul 18 08:50:28 PM PDT 24 |
2940832760 ps |
| T857 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.3095123624 |
|
|
Jul 18 08:50:46 PM PDT 24 |
Jul 18 08:59:33 PM PDT 24 |
5532318204 ps |
| T1077 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2331098649 |
|
|
Jul 18 08:23:31 PM PDT 24 |
Jul 18 09:01:27 PM PDT 24 |
19738262751 ps |
| T397 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.2758857481 |
|
|
Jul 18 08:38:36 PM PDT 24 |
Jul 18 08:40:44 PM PDT 24 |
2036738450 ps |
| T1078 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.1470287966 |
|
|
Jul 18 08:21:52 PM PDT 24 |
Jul 18 08:27:35 PM PDT 24 |
3506932602 ps |
| T9 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.3251244639 |
|
|
Jul 18 08:18:43 PM PDT 24 |
Jul 18 08:26:35 PM PDT 24 |
3709463440 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1850012747 |
|
|
Jul 18 08:13:55 PM PDT 24 |
Jul 18 08:31:50 PM PDT 24 |
5739980364 ps |
| T1080 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.1929225720 |
|
|
Jul 18 08:45:29 PM PDT 24 |
Jul 18 08:55:17 PM PDT 24 |
4312233806 ps |
| T808 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3387707363 |
|
|
Jul 18 08:52:16 PM PDT 24 |
Jul 18 09:00:09 PM PDT 24 |
4504647718 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_edn_kat.3516409884 |
|
|
Jul 18 08:34:23 PM PDT 24 |
Jul 18 08:45:51 PM PDT 24 |
3436619840 ps |
| T743 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2136297932 |
|
|
Jul 18 08:15:09 PM PDT 24 |
Jul 18 08:17:18 PM PDT 24 |
2557567404 ps |
| T215 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.336095073 |
|
|
Jul 18 08:20:30 PM PDT 24 |
Jul 18 08:25:28 PM PDT 24 |
3149936177 ps |
| T830 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.662626511 |
|
|
Jul 18 08:47:21 PM PDT 24 |
Jul 18 08:57:10 PM PDT 24 |
4904372500 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.864502686 |
|
|
Jul 18 08:34:23 PM PDT 24 |
Jul 18 08:40:27 PM PDT 24 |
3416911404 ps |
| T1083 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3370311369 |
|
|
Jul 18 08:33:00 PM PDT 24 |
Jul 18 09:08:15 PM PDT 24 |
32564963068 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2708534389 |
|
|
Jul 18 08:16:35 PM PDT 24 |
Jul 18 09:25:16 PM PDT 24 |
24751879890 ps |
| T1085 |
/workspace/coverage/default/2.chip_sw_example_flash.3619790978 |
|
|
Jul 18 08:29:50 PM PDT 24 |
Jul 18 08:33:32 PM PDT 24 |
2217835892 ps |
| T744 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1817647671 |
|
|
Jul 18 08:31:31 PM PDT 24 |
Jul 18 08:33:28 PM PDT 24 |
2307782250 ps |
| T1086 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.3373078601 |
|
|
Jul 18 08:28:49 PM PDT 24 |
Jul 18 08:33:48 PM PDT 24 |
2473225900 ps |
| T1087 |
/workspace/coverage/default/0.chip_sw_edn_kat.3471349826 |
|
|
Jul 18 08:23:41 PM PDT 24 |
Jul 18 08:33:30 PM PDT 24 |
3631642968 ps |
| T1088 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2408825969 |
|
|
Jul 18 08:23:22 PM PDT 24 |
Jul 18 09:15:44 PM PDT 24 |
11315710708 ps |
| T369 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.1073525502 |
|
|
Jul 18 08:25:10 PM PDT 24 |
Jul 18 08:28:51 PM PDT 24 |
2324494479 ps |
| T755 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1892031768 |
|
|
Jul 18 08:16:33 PM PDT 24 |
Jul 18 08:22:29 PM PDT 24 |
3463470280 ps |
| T1089 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2710416508 |
|
|
Jul 18 08:28:06 PM PDT 24 |
Jul 18 08:48:58 PM PDT 24 |
8578411913 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.6191616 |
|
|
Jul 18 08:35:31 PM PDT 24 |
Jul 18 09:06:34 PM PDT 24 |
22160702366 ps |
| T1091 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.2230810054 |
|
|
Jul 18 08:16:34 PM PDT 24 |
Jul 18 08:27:45 PM PDT 24 |
5340393788 ps |
| T415 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.3211009457 |
|
|
Jul 18 08:45:30 PM PDT 24 |
Jul 18 08:55:06 PM PDT 24 |
4939663480 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.2944257791 |
|
|
Jul 18 08:27:04 PM PDT 24 |
Jul 18 08:34:45 PM PDT 24 |
5654257780 ps |
| T1093 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.640548234 |
|
|
Jul 18 08:27:55 PM PDT 24 |
Jul 18 08:33:46 PM PDT 24 |
2937765396 ps |
| T292 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.1593216788 |
|
|
Jul 18 08:14:26 PM PDT 24 |
Jul 18 08:24:55 PM PDT 24 |
3088658524 ps |
| T293 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.3246698266 |
|
|
Jul 18 08:20:53 PM PDT 24 |
Jul 18 08:31:57 PM PDT 24 |
3780405320 ps |