| T1094 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.2377380183 |
|
|
Jul 18 08:17:07 PM PDT 24 |
Jul 18 08:21:45 PM PDT 24 |
2881208988 ps |
| T1095 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.178496872 |
|
|
Jul 18 08:22:57 PM PDT 24 |
Jul 18 09:21:08 PM PDT 24 |
15442533576 ps |
| T837 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.2833773167 |
|
|
Jul 18 08:47:51 PM PDT 24 |
Jul 18 09:01:02 PM PDT 24 |
4918203360 ps |
| T1096 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.3147816890 |
|
|
Jul 18 08:43:12 PM PDT 24 |
Jul 18 09:08:49 PM PDT 24 |
8208034052 ps |
| T372 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2569067794 |
|
|
Jul 18 08:27:15 PM PDT 24 |
Jul 18 08:36:23 PM PDT 24 |
6327688604 ps |
| T1097 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.1124534710 |
|
|
Jul 18 08:42:12 PM PDT 24 |
Jul 18 09:35:16 PM PDT 24 |
15897764409 ps |
| T457 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.2586255901 |
|
|
Jul 18 08:13:55 PM PDT 24 |
Jul 18 08:32:56 PM PDT 24 |
6618606760 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.2699270845 |
|
|
Jul 18 08:28:56 PM PDT 24 |
Jul 18 08:32:31 PM PDT 24 |
3263196006 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.504938068 |
|
|
Jul 18 08:16:10 PM PDT 24 |
Jul 18 08:23:24 PM PDT 24 |
4419460538 ps |
| T1100 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1493289939 |
|
|
Jul 18 08:38:38 PM PDT 24 |
Jul 18 08:48:05 PM PDT 24 |
4204737360 ps |
| T1101 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.1968080802 |
|
|
Jul 18 08:29:50 PM PDT 24 |
Jul 18 08:34:31 PM PDT 24 |
2729625362 ps |
| T245 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.1140058428 |
|
|
Jul 18 08:13:18 PM PDT 24 |
Jul 18 08:23:09 PM PDT 24 |
5356593952 ps |
| T1102 |
/workspace/coverage/default/0.chip_tap_straps_prod.2870520586 |
|
|
Jul 18 08:14:05 PM PDT 24 |
Jul 18 08:17:04 PM PDT 24 |
2872470355 ps |
| T1103 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.147890892 |
|
|
Jul 18 08:13:53 PM PDT 24 |
Jul 18 08:20:47 PM PDT 24 |
3075682280 ps |
| T798 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.135454308 |
|
|
Jul 18 08:49:14 PM PDT 24 |
Jul 18 08:58:47 PM PDT 24 |
5351203120 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1087120093 |
|
|
Jul 18 08:27:51 PM PDT 24 |
Jul 18 08:35:57 PM PDT 24 |
4908595144 ps |
| T270 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.1575711130 |
|
|
Jul 18 08:32:45 PM PDT 24 |
Jul 18 08:44:10 PM PDT 24 |
5383595520 ps |
| T1104 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.246688922 |
|
|
Jul 18 08:43:53 PM PDT 24 |
Jul 18 09:36:13 PM PDT 24 |
14576168923 ps |
| T1105 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2080738465 |
|
|
Jul 18 08:21:16 PM PDT 24 |
Jul 18 08:35:05 PM PDT 24 |
4058266216 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.1514092683 |
|
|
Jul 18 08:23:25 PM PDT 24 |
Jul 18 08:37:12 PM PDT 24 |
7904975484 ps |
| T825 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.2602650636 |
|
|
Jul 18 08:48:22 PM PDT 24 |
Jul 18 08:57:56 PM PDT 24 |
4486269336 ps |
| T1107 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.4063422314 |
|
|
Jul 18 08:15:58 PM PDT 24 |
Jul 18 08:21:51 PM PDT 24 |
3499200660 ps |
| T829 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3101388694 |
|
|
Jul 18 08:45:08 PM PDT 24 |
Jul 18 08:54:50 PM PDT 24 |
5532591152 ps |
| T347 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.583362219 |
|
|
Jul 18 08:13:54 PM PDT 24 |
Jul 18 08:24:27 PM PDT 24 |
4385196208 ps |
| T811 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.593741552 |
|
|
Jul 18 08:45:08 PM PDT 24 |
Jul 18 08:53:42 PM PDT 24 |
4526873144 ps |
| T368 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.938697486 |
|
|
Jul 18 08:32:20 PM PDT 24 |
Jul 18 08:42:43 PM PDT 24 |
4283913413 ps |
| T357 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.2201874860 |
|
|
Jul 18 08:51:12 PM PDT 24 |
Jul 18 09:02:13 PM PDT 24 |
4606316880 ps |
| T1108 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.2168797111 |
|
|
Jul 18 08:40:46 PM PDT 24 |
Jul 18 08:49:24 PM PDT 24 |
4298202937 ps |
| T282 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3006358674 |
|
|
Jul 18 08:17:31 PM PDT 24 |
Jul 18 08:30:41 PM PDT 24 |
5303822000 ps |
| T845 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1130208592 |
|
|
Jul 18 08:45:39 PM PDT 24 |
Jul 18 08:54:35 PM PDT 24 |
4566499712 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.3555142197 |
|
|
Jul 18 08:13:26 PM PDT 24 |
Jul 18 08:18:17 PM PDT 24 |
3502649602 ps |
| T801 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2980033872 |
|
|
Jul 18 08:40:55 PM PDT 24 |
Jul 18 08:50:48 PM PDT 24 |
4616898890 ps |
| T453 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.527131059 |
|
|
Jul 18 08:17:21 PM PDT 24 |
Jul 18 08:23:45 PM PDT 24 |
3418903435 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.3420197873 |
|
|
Jul 18 08:14:52 PM PDT 24 |
Jul 18 08:25:18 PM PDT 24 |
4459323260 ps |
| T775 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.2941882528 |
|
|
Jul 18 08:42:58 PM PDT 24 |
Jul 18 08:53:54 PM PDT 24 |
5542360220 ps |
| T395 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.4175417420 |
|
|
Jul 18 08:24:03 PM PDT 24 |
Jul 18 10:11:21 PM PDT 24 |
24867732674 ps |
| T786 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.2720047380 |
|
|
Jul 18 08:51:16 PM PDT 24 |
Jul 18 09:02:53 PM PDT 24 |
5490452800 ps |
| T1111 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3696644640 |
|
|
Jul 18 08:28:58 PM PDT 24 |
Jul 18 09:33:02 PM PDT 24 |
24777333053 ps |
| T1112 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.665731175 |
|
|
Jul 18 08:17:29 PM PDT 24 |
Jul 18 08:22:00 PM PDT 24 |
3554400527 ps |
| T803 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3069386735 |
|
|
Jul 18 08:42:54 PM PDT 24 |
Jul 18 08:49:32 PM PDT 24 |
3989613488 ps |
| T1113 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.4292649812 |
|
|
Jul 18 08:40:02 PM PDT 24 |
Jul 18 08:50:15 PM PDT 24 |
8074709604 ps |
| T343 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.2818666611 |
|
|
Jul 18 08:21:20 PM PDT 24 |
Jul 18 08:29:42 PM PDT 24 |
3990242386 ps |
| T47 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2175716992 |
|
|
Jul 18 08:21:56 PM PDT 24 |
Jul 18 08:29:54 PM PDT 24 |
5464759054 ps |
| T306 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2469532005 |
|
|
Jul 18 08:15:41 PM PDT 24 |
Jul 18 08:20:35 PM PDT 24 |
3365041590 ps |
| T1114 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2922703695 |
|
|
Jul 18 08:24:36 PM PDT 24 |
Jul 18 08:30:17 PM PDT 24 |
3292811400 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.1246853829 |
|
|
Jul 18 08:12:29 PM PDT 24 |
Jul 18 08:17:02 PM PDT 24 |
2589095693 ps |
| T752 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.1188619789 |
|
|
Jul 18 08:33:11 PM PDT 24 |
Jul 18 08:38:32 PM PDT 24 |
3409398100 ps |
| T1116 |
/workspace/coverage/default/0.rom_e2e_smoke.2059435427 |
|
|
Jul 18 08:28:03 PM PDT 24 |
Jul 18 09:29:52 PM PDT 24 |
14614261264 ps |
| T1117 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.4004614984 |
|
|
Jul 18 08:13:54 PM PDT 24 |
Jul 18 08:32:33 PM PDT 24 |
8806805028 ps |
| T1118 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.100405923 |
|
|
Jul 18 08:30:33 PM PDT 24 |
Jul 18 08:44:17 PM PDT 24 |
4186031956 ps |
| T1119 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.3201140370 |
|
|
Jul 18 08:23:43 PM PDT 24 |
Jul 18 08:27:37 PM PDT 24 |
2853518792 ps |
| T1120 |
/workspace/coverage/default/0.chip_sw_aes_enc.1831365192 |
|
|
Jul 18 08:12:59 PM PDT 24 |
Jul 18 08:16:47 PM PDT 24 |
2722534324 ps |
| T371 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.2198110187 |
|
|
Jul 18 08:33:02 PM PDT 24 |
Jul 18 09:33:52 PM PDT 24 |
25127308188 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.2971191847 |
|
|
Jul 18 08:15:38 PM PDT 24 |
Jul 18 08:25:36 PM PDT 24 |
4818204702 ps |
| T876 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.649395560 |
|
|
Jul 18 08:40:39 PM PDT 24 |
Jul 18 08:47:16 PM PDT 24 |
4106883802 ps |
| T239 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.3186072517 |
|
|
Jul 18 08:20:57 PM PDT 24 |
Jul 18 09:48:57 PM PDT 24 |
50039568210 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.3486111255 |
|
|
Jul 18 08:36:39 PM PDT 24 |
Jul 18 08:53:25 PM PDT 24 |
6755029100 ps |
| T1123 |
/workspace/coverage/default/2.chip_tap_straps_prod.5480469 |
|
|
Jul 18 08:38:59 PM PDT 24 |
Jul 18 08:56:08 PM PDT 24 |
10409195898 ps |
| T756 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.311444154 |
|
|
Jul 18 08:27:36 PM PDT 24 |
Jul 18 08:31:46 PM PDT 24 |
3592282150 ps |
| T831 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.807516203 |
|
|
Jul 18 08:50:51 PM PDT 24 |
Jul 18 08:58:36 PM PDT 24 |
3741615400 ps |
| T334 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.456820386 |
|
|
Jul 18 08:24:22 PM PDT 24 |
Jul 18 08:46:46 PM PDT 24 |
6292429296 ps |
| T812 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.369025123 |
|
|
Jul 18 08:51:33 PM PDT 24 |
Jul 18 09:00:52 PM PDT 24 |
4286055188 ps |
| T1124 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1017279602 |
|
|
Jul 18 08:42:45 PM PDT 24 |
Jul 18 08:50:24 PM PDT 24 |
3773421370 ps |
| T348 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.4271283124 |
|
|
Jul 18 08:19:07 PM PDT 24 |
Jul 18 08:31:12 PM PDT 24 |
3759638746 ps |
| T1125 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.1565608260 |
|
|
Jul 18 08:23:58 PM PDT 24 |
Jul 18 08:46:33 PM PDT 24 |
6578749995 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.3663217505 |
|
|
Jul 18 08:14:00 PM PDT 24 |
Jul 18 08:35:21 PM PDT 24 |
7296085046 ps |
| T1127 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.2258505091 |
|
|
Jul 18 08:27:11 PM PDT 24 |
Jul 18 08:35:13 PM PDT 24 |
5094861792 ps |
| T1128 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.2361733572 |
|
|
Jul 18 08:33:04 PM PDT 24 |
Jul 18 08:42:05 PM PDT 24 |
4007374766 ps |
| T1129 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2161657378 |
|
|
Jul 18 08:26:40 PM PDT 24 |
Jul 18 08:36:00 PM PDT 24 |
4627016780 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_kmac_idle.4118543392 |
|
|
Jul 18 08:36:10 PM PDT 24 |
Jul 18 08:40:19 PM PDT 24 |
3220135988 ps |
| T1131 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.1399971381 |
|
|
Jul 18 08:40:50 PM PDT 24 |
Jul 18 09:08:43 PM PDT 24 |
8618148724 ps |
| T1132 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.2059227967 |
|
|
Jul 18 08:15:46 PM PDT 24 |
Jul 18 08:34:07 PM PDT 24 |
6989081632 ps |
| T1133 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1202816475 |
|
|
Jul 18 08:26:25 PM PDT 24 |
Jul 18 08:39:41 PM PDT 24 |
4961988480 ps |
| T208 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1359030432 |
|
|
Jul 18 08:31:17 PM PDT 24 |
Jul 18 11:41:33 PM PDT 24 |
60189808452 ps |
| T1134 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.3752213777 |
|
|
Jul 18 08:13:26 PM PDT 24 |
Jul 18 08:42:10 PM PDT 24 |
10002959062 ps |
| T870 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.1820916726 |
|
|
Jul 18 08:47:24 PM PDT 24 |
Jul 18 08:56:25 PM PDT 24 |
4343063480 ps |
| T1135 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.2823500061 |
|
|
Jul 18 08:20:12 PM PDT 24 |
Jul 18 09:29:35 PM PDT 24 |
14346559100 ps |
| T1136 |
/workspace/coverage/default/0.rom_keymgr_functest.3941562035 |
|
|
Jul 18 08:22:48 PM PDT 24 |
Jul 18 08:32:54 PM PDT 24 |
3991180078 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.698229835 |
|
|
Jul 18 08:20:02 PM PDT 24 |
Jul 18 08:28:24 PM PDT 24 |
5354170400 ps |
| T300 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.595900570 |
|
|
Jul 18 08:18:33 PM PDT 24 |
Jul 18 08:29:09 PM PDT 24 |
5358711392 ps |
| T234 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.3981269021 |
|
|
Jul 18 08:36:19 PM PDT 24 |
Jul 18 09:00:40 PM PDT 24 |
9292102948 ps |
| T433 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.24614555 |
|
|
Jul 18 08:42:44 PM PDT 24 |
Jul 18 08:53:45 PM PDT 24 |
4453335564 ps |
| T24 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.1248981117 |
|
|
Jul 18 08:22:03 PM PDT 24 |
Jul 18 08:33:10 PM PDT 24 |
4505488786 ps |
| T434 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.1198056351 |
|
|
Jul 18 08:21:45 PM PDT 24 |
Jul 18 08:55:15 PM PDT 24 |
8747813692 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.1258553522 |
|
|
Jul 18 08:19:38 PM PDT 24 |
Jul 18 09:00:39 PM PDT 24 |
26683228645 ps |
| T435 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1199382710 |
|
|
Jul 18 08:40:52 PM PDT 24 |
Jul 18 08:53:04 PM PDT 24 |
6370438784 ps |
| T436 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.77258045 |
|
|
Jul 18 08:49:00 PM PDT 24 |
Jul 18 08:54:34 PM PDT 24 |
4034132168 ps |
| T437 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.3507094684 |
|
|
Jul 18 08:19:56 PM PDT 24 |
Jul 18 08:55:14 PM PDT 24 |
24758609400 ps |
| T12 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1735685716 |
|
|
Jul 18 08:31:52 PM PDT 24 |
Jul 18 08:38:36 PM PDT 24 |
3927535908 ps |
| T1137 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.3793209943 |
|
|
Jul 18 08:40:25 PM PDT 24 |
Jul 18 08:44:23 PM PDT 24 |
2530580071 ps |
| T1138 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.1783662755 |
|
|
Jul 18 08:42:41 PM PDT 24 |
Jul 18 09:37:51 PM PDT 24 |
27412764659 ps |
| T832 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3219595184 |
|
|
Jul 18 08:47:34 PM PDT 24 |
Jul 18 08:55:46 PM PDT 24 |
5556945332 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.2196440916 |
|
|
Jul 18 08:36:39 PM PDT 24 |
Jul 18 08:54:09 PM PDT 24 |
6309751725 ps |
| T1140 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1035480038 |
|
|
Jul 18 08:31:43 PM PDT 24 |
Jul 18 08:44:40 PM PDT 24 |
4324520158 ps |
| T401 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3873814572 |
|
|
Jul 18 08:17:21 PM PDT 24 |
Jul 18 08:23:05 PM PDT 24 |
3105884818 ps |
| T266 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.2778125354 |
|
|
Jul 18 08:19:07 PM PDT 24 |
Jul 18 08:51:09 PM PDT 24 |
10727882510 ps |
| T1141 |
/workspace/coverage/default/2.rom_e2e_self_hash.1007025573 |
|
|
Jul 18 08:45:17 PM PDT 24 |
Jul 18 10:25:27 PM PDT 24 |
25959784062 ps |
| T862 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.3960788082 |
|
|
Jul 18 08:40:13 PM PDT 24 |
Jul 18 08:47:40 PM PDT 24 |
3560632860 ps |
| T1142 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2233580653 |
|
|
Jul 18 08:14:52 PM PDT 24 |
Jul 18 08:18:28 PM PDT 24 |
3314658610 ps |
| T1143 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.3561574534 |
|
|
Jul 18 08:35:19 PM PDT 24 |
Jul 18 08:40:10 PM PDT 24 |
3049157822 ps |
| T1144 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.2925755168 |
|
|
Jul 18 08:33:22 PM PDT 24 |
Jul 18 09:37:31 PM PDT 24 |
14772863108 ps |
| T1145 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.3253405760 |
|
|
Jul 18 08:43:13 PM PDT 24 |
Jul 18 09:00:59 PM PDT 24 |
12892623067 ps |
| T737 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.687118986 |
|
|
Jul 18 08:28:25 PM PDT 24 |
Jul 18 08:37:00 PM PDT 24 |
5228490510 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.754664145 |
|
|
Jul 18 08:19:04 PM PDT 24 |
Jul 18 08:38:21 PM PDT 24 |
7127899560 ps |
| T152 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2200297178 |
|
|
Jul 18 08:06:59 PM PDT 24 |
Jul 18 08:12:30 PM PDT 24 |
4386832922 ps |
| T366 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.2725955235 |
|
|
Jul 18 08:14:45 PM PDT 24 |
Jul 18 08:21:27 PM PDT 24 |
3993584994 ps |
| T1147 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.3689481261 |
|
|
Jul 18 08:44:02 PM PDT 24 |
Jul 18 09:09:14 PM PDT 24 |
8242135786 ps |
| T358 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.1885241586 |
|
|
Jul 18 08:50:18 PM PDT 24 |
Jul 18 09:01:09 PM PDT 24 |
5287224544 ps |
| T1148 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3892654452 |
|
|
Jul 18 08:39:29 PM PDT 24 |
Jul 18 08:48:53 PM PDT 24 |
4060274088 ps |
| T793 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.229807568 |
|
|
Jul 18 08:44:46 PM PDT 24 |
Jul 18 08:51:38 PM PDT 24 |
4150911200 ps |
| T294 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.4127890723 |
|
|
Jul 18 08:37:32 PM PDT 24 |
Jul 18 08:46:23 PM PDT 24 |
4213780547 ps |
| T146 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1708141059 |
|
|
Jul 18 08:26:26 PM PDT 24 |
Jul 18 08:41:12 PM PDT 24 |
5842154528 ps |
| T295 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.156898154 |
|
|
Jul 18 08:29:27 PM PDT 24 |
Jul 18 08:41:11 PM PDT 24 |
4929471870 ps |
| T1149 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.198902770 |
|
|
Jul 18 08:32:12 PM PDT 24 |
Jul 18 08:51:39 PM PDT 24 |
8394302992 ps |
| T416 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2003859603 |
|
|
Jul 18 08:41:18 PM PDT 24 |
Jul 18 08:52:25 PM PDT 24 |
9591685309 ps |
| T1150 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.3330154114 |
|
|
Jul 18 08:47:45 PM PDT 24 |
Jul 18 08:54:10 PM PDT 24 |
3934384800 ps |
| T1151 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3902717068 |
|
|
Jul 18 08:17:01 PM PDT 24 |
Jul 18 08:26:20 PM PDT 24 |
5133564176 ps |
| T1152 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.144488164 |
|
|
Jul 18 08:21:44 PM PDT 24 |
Jul 18 08:26:24 PM PDT 24 |
2404896100 ps |
| T1153 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.1899358639 |
|
|
Jul 18 08:15:40 PM PDT 24 |
Jul 18 08:44:02 PM PDT 24 |
7929188040 ps |
| T296 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1624761997 |
|
|
Jul 18 08:42:47 PM PDT 24 |
Jul 18 08:53:47 PM PDT 24 |
4517287290 ps |
| T548 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.1096586066 |
|
|
Jul 18 08:20:53 PM PDT 24 |
Jul 18 08:52:54 PM PDT 24 |
9547537083 ps |
| T209 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.2739377301 |
|
|
Jul 18 08:17:56 PM PDT 24 |
Jul 18 11:15:20 PM PDT 24 |
58902493088 ps |
| T1154 |
/workspace/coverage/default/2.rom_e2e_static_critical.941149182 |
|
|
Jul 18 08:44:52 PM PDT 24 |
Jul 18 09:52:38 PM PDT 24 |
16716439440 ps |
| T762 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.1688103486 |
|
|
Jul 18 08:28:39 PM PDT 24 |
Jul 18 08:35:02 PM PDT 24 |
4705355728 ps |
| T14 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.394286116 |
|
|
Jul 18 08:15:34 PM PDT 24 |
Jul 18 08:39:11 PM PDT 24 |
24468955890 ps |
| T1155 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.2044910838 |
|
|
Jul 18 08:18:39 PM PDT 24 |
Jul 18 08:24:40 PM PDT 24 |
4084132212 ps |
| T1156 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.4211743896 |
|
|
Jul 18 08:16:58 PM PDT 24 |
Jul 18 08:21:37 PM PDT 24 |
2869578208 ps |
| T190 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1330406485 |
|
|
Jul 18 08:24:06 PM PDT 24 |
Jul 18 08:32:54 PM PDT 24 |
4231988742 ps |
| T1157 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1911404542 |
|
|
Jul 18 08:44:13 PM PDT 24 |
Jul 18 08:54:53 PM PDT 24 |
3990434228 ps |
| T1158 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.1292555167 |
|
|
Jul 18 08:28:45 PM PDT 24 |
Jul 18 09:24:55 PM PDT 24 |
11930242808 ps |
| T107 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.4191072140 |
|
|
Jul 18 08:29:57 PM PDT 24 |
Jul 18 08:36:59 PM PDT 24 |
7395650020 ps |
| T1159 |
/workspace/coverage/default/0.chip_sw_flash_init.2844854782 |
|
|
Jul 18 08:12:43 PM PDT 24 |
Jul 18 08:40:37 PM PDT 24 |
18090163384 ps |
| T1160 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.2716447665 |
|
|
Jul 18 08:31:54 PM PDT 24 |
Jul 18 09:34:19 PM PDT 24 |
15848133093 ps |
| T546 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.708906735 |
|
|
Jul 18 08:27:09 PM PDT 24 |
Jul 18 08:38:54 PM PDT 24 |
5403541488 ps |
| T838 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.55084293 |
|
|
Jul 18 08:51:04 PM PDT 24 |
Jul 18 08:58:14 PM PDT 24 |
3614026396 ps |
| T396 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.2549965888 |
|
|
Jul 18 08:19:54 PM PDT 24 |
Jul 18 10:14:29 PM PDT 24 |
24270826984 ps |
| T1161 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.3686813639 |
|
|
Jul 18 08:27:20 PM PDT 24 |
Jul 18 09:23:58 PM PDT 24 |
27460246009 ps |
| T1162 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.2611992783 |
|
|
Jul 18 08:22:47 PM PDT 24 |
Jul 18 09:37:31 PM PDT 24 |
17206815453 ps |
| T1163 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2025115241 |
|
|
Jul 18 08:13:57 PM PDT 24 |
Jul 18 08:16:34 PM PDT 24 |
3166486595 ps |
| T373 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3373594301 |
|
|
Jul 18 08:37:47 PM PDT 24 |
Jul 18 08:48:16 PM PDT 24 |
6685362968 ps |
| T547 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.1585601043 |
|
|
Jul 18 08:15:35 PM PDT 24 |
Jul 18 08:27:33 PM PDT 24 |
5239745352 ps |
| T316 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3724726438 |
|
|
Jul 18 08:36:32 PM PDT 24 |
Jul 18 08:49:36 PM PDT 24 |
7644217470 ps |
| T814 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1066997812 |
|
|
Jul 18 08:42:59 PM PDT 24 |
Jul 18 08:51:47 PM PDT 24 |
4938444400 ps |
| T1164 |
/workspace/coverage/default/1.chip_sw_kmac_idle.3689536259 |
|
|
Jul 18 08:26:48 PM PDT 24 |
Jul 18 08:31:11 PM PDT 24 |
2977432602 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.4071813228 |
|
|
Jul 18 08:38:56 PM PDT 24 |
Jul 18 08:47:14 PM PDT 24 |
2686297096 ps |
| T307 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.511554522 |
|
|
Jul 18 08:28:55 PM PDT 24 |
Jul 18 08:33:31 PM PDT 24 |
3138018253 ps |
| T1166 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3097465005 |
|
|
Jul 18 08:13:22 PM PDT 24 |
Jul 18 09:12:48 PM PDT 24 |
35536815840 ps |
| T121 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.4019989864 |
|
|
Jul 18 08:18:30 PM PDT 24 |
Jul 18 09:44:21 PM PDT 24 |
30128902351 ps |
| T778 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.2339942714 |
|
|
Jul 18 08:43:48 PM PDT 24 |
Jul 18 08:53:39 PM PDT 24 |
5948678366 ps |
| T1167 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.3551680418 |
|
|
Jul 18 08:15:38 PM PDT 24 |
Jul 18 08:26:30 PM PDT 24 |
6351851363 ps |
| T1168 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.559923219 |
|
|
Jul 18 08:33:49 PM PDT 24 |
Jul 18 09:28:40 PM PDT 24 |
11603784360 ps |
| T1169 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.910185655 |
|
|
Jul 18 08:46:40 PM PDT 24 |
Jul 18 08:54:00 PM PDT 24 |
4501006992 ps |
| T826 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.713561337 |
|
|
Jul 18 08:49:17 PM PDT 24 |
Jul 18 08:57:12 PM PDT 24 |
4508637784 ps |
| T1170 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.456487628 |
|
|
Jul 18 08:42:52 PM PDT 24 |
Jul 18 09:40:17 PM PDT 24 |
15590325435 ps |
| T1171 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.434510690 |
|
|
Jul 18 08:25:15 PM PDT 24 |
Jul 18 08:51:28 PM PDT 24 |
7729759662 ps |
| T878 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.3315628290 |
|
|
Jul 18 08:43:34 PM PDT 24 |
Jul 18 08:50:26 PM PDT 24 |
3287523196 ps |
| T1172 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.924653647 |
|
|
Jul 18 08:36:58 PM PDT 24 |
Jul 18 08:56:34 PM PDT 24 |
7146277120 ps |
| T1173 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.1687778714 |
|
|
Jul 18 08:43:37 PM PDT 24 |
Jul 18 09:07:28 PM PDT 24 |
7938663368 ps |
| T784 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.1847324229 |
|
|
Jul 18 08:43:15 PM PDT 24 |
Jul 18 08:53:12 PM PDT 24 |
5053091376 ps |
| T799 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.154675605 |
|
|
Jul 18 08:34:48 PM PDT 24 |
Jul 18 08:42:31 PM PDT 24 |
4236098960 ps |
| T1174 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.185606632 |
|
|
Jul 18 08:44:23 PM PDT 24 |
Jul 18 10:07:55 PM PDT 24 |
23766167922 ps |
| T1175 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.1803211299 |
|
|
Jul 18 08:18:28 PM PDT 24 |
Jul 18 08:57:31 PM PDT 24 |
11997590666 ps |
| T1176 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.1819126498 |
|
|
Jul 18 08:42:53 PM PDT 24 |
Jul 18 08:53:11 PM PDT 24 |
5776253640 ps |
| T1177 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1870377071 |
|
|
Jul 18 08:34:13 PM PDT 24 |
Jul 18 09:54:25 PM PDT 24 |
15442003250 ps |
| T1178 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3457271248 |
|
|
Jul 18 08:13:58 PM PDT 24 |
Jul 18 08:59:41 PM PDT 24 |
27977819523 ps |
| T1179 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.680899601 |
|
|
Jul 18 08:29:49 PM PDT 24 |
Jul 18 08:31:34 PM PDT 24 |
2876607947 ps |
| T1180 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.3478624094 |
|
|
Jul 18 08:43:33 PM PDT 24 |
Jul 18 09:59:35 PM PDT 24 |
19972890552 ps |
| T1181 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.2262121180 |
|
|
Jul 18 08:13:37 PM PDT 24 |
Jul 18 08:40:18 PM PDT 24 |
5879034760 ps |
| T1182 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2716741588 |
|
|
Jul 18 08:23:04 PM PDT 24 |
Jul 18 08:33:48 PM PDT 24 |
6577053125 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.773751776 |
|
|
Jul 18 08:26:10 PM PDT 24 |
Jul 18 08:30:57 PM PDT 24 |
3335355984 ps |
| T833 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.3254335469 |
|
|
Jul 18 08:52:17 PM PDT 24 |
Jul 18 08:57:38 PM PDT 24 |
3253691470 ps |
| T1184 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.2923535098 |
|
|
Jul 18 08:32:32 PM PDT 24 |
Jul 18 09:01:44 PM PDT 24 |
8293814980 ps |
| T1185 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.2717619640 |
|
|
Jul 18 08:18:56 PM PDT 24 |
Jul 18 08:22:19 PM PDT 24 |
2842768600 ps |
| T872 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.3730647473 |
|
|
Jul 18 08:48:29 PM PDT 24 |
Jul 18 08:58:19 PM PDT 24 |
6038619698 ps |
| T1186 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.942835682 |
|
|
Jul 18 08:34:42 PM PDT 24 |
Jul 18 08:51:32 PM PDT 24 |
4999919384 ps |
| T852 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.1617481600 |
|
|
Jul 18 08:46:49 PM PDT 24 |
Jul 18 08:55:42 PM PDT 24 |
4692694596 ps |
| T1187 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.859629583 |
|
|
Jul 18 08:29:49 PM PDT 24 |
Jul 18 08:33:24 PM PDT 24 |
3190147360 ps |
| T859 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1944923510 |
|
|
Jul 18 08:46:19 PM PDT 24 |
Jul 18 08:52:55 PM PDT 24 |
3704065748 ps |
| T1188 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3342834000 |
|
|
Jul 18 08:13:01 PM PDT 24 |
Jul 18 08:20:41 PM PDT 24 |
5013077820 ps |
| T1189 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.2914221493 |
|
|
Jul 18 08:41:52 PM PDT 24 |
Jul 18 08:51:24 PM PDT 24 |
4393445240 ps |
| T1190 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.3330398826 |
|
|
Jul 18 08:13:48 PM PDT 24 |
Jul 18 08:25:29 PM PDT 24 |
8597212030 ps |
| T1191 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.31903960 |
|
|
Jul 18 08:31:07 PM PDT 24 |
Jul 18 09:05:17 PM PDT 24 |
13641601754 ps |
| T1192 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.2313169676 |
|
|
Jul 18 08:35:31 PM PDT 24 |
Jul 18 08:42:13 PM PDT 24 |
2971116076 ps |
| T1193 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1518582950 |
|
|
Jul 18 08:16:06 PM PDT 24 |
Jul 18 08:21:35 PM PDT 24 |
3050834629 ps |
| T1194 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.4151962526 |
|
|
Jul 18 08:20:38 PM PDT 24 |
Jul 18 08:50:19 PM PDT 24 |
18410497460 ps |
| T1195 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2250147312 |
|
|
Jul 18 08:30:55 PM PDT 24 |
Jul 18 08:40:08 PM PDT 24 |
3597624192 ps |
| T1196 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.3789800076 |
|
|
Jul 18 08:22:53 PM PDT 24 |
Jul 18 09:20:01 PM PDT 24 |
13757084444 ps |
| T883 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.1313866668 |
|
|
Jul 18 08:51:01 PM PDT 24 |
Jul 18 09:01:50 PM PDT 24 |
5573537816 ps |
| T871 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1935715883 |
|
|
Jul 18 08:43:35 PM PDT 24 |
Jul 18 08:50:48 PM PDT 24 |
4303945774 ps |
| T1197 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.3238748239 |
|
|
Jul 18 08:21:02 PM PDT 24 |
Jul 18 09:23:16 PM PDT 24 |
15219009352 ps |
| T877 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.205060848 |
|
|
Jul 18 08:48:22 PM PDT 24 |
Jul 18 08:55:59 PM PDT 24 |
3895201272 ps |
| T1198 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3846493603 |
|
|
Jul 18 08:39:47 PM PDT 24 |
Jul 18 08:47:56 PM PDT 24 |
6622559272 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.2147767091 |
|
|
Jul 18 08:21:20 PM PDT 24 |
Jul 18 08:32:44 PM PDT 24 |
5069717046 ps |
| T1199 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.449606437 |
|
|
Jul 18 08:34:28 PM PDT 24 |
Jul 18 09:01:28 PM PDT 24 |
8486027770 ps |
| T1200 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.2222548453 |
|
|
Jul 18 08:39:21 PM PDT 24 |
Jul 18 08:48:59 PM PDT 24 |
6519067110 ps |
| T1201 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.408932057 |
|
|
Jul 18 08:25:37 PM PDT 24 |
Jul 18 08:33:18 PM PDT 24 |
9331567052 ps |
| T828 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.36015680 |
|
|
Jul 18 08:49:10 PM PDT 24 |
Jul 18 08:59:11 PM PDT 24 |
5379468168 ps |
| T1202 |
/workspace/coverage/default/2.chip_sw_power_idle_load.1896658734 |
|
|
Jul 18 08:38:55 PM PDT 24 |
Jul 18 08:50:55 PM PDT 24 |
4827345654 ps |
| T218 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.528646843 |
|
|
Jul 18 08:29:49 PM PDT 24 |
Jul 18 08:34:15 PM PDT 24 |
3034740520 ps |
| T1203 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3519492753 |
|
|
Jul 18 08:17:06 PM PDT 24 |
Jul 18 08:30:30 PM PDT 24 |
4890820930 ps |
| T1204 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2092695540 |
|
|
Jul 18 08:14:01 PM PDT 24 |
Jul 18 08:26:45 PM PDT 24 |
4187485282 ps |
| T216 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.3804206049 |
|
|
Jul 18 08:33:00 PM PDT 24 |
Jul 18 09:03:07 PM PDT 24 |
22619010320 ps |
| T1205 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.1175222569 |
|
|
Jul 18 08:41:17 PM PDT 24 |
Jul 18 08:52:35 PM PDT 24 |
4179690312 ps |
| T1206 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.3406604524 |
|
|
Jul 18 08:41:57 PM PDT 24 |
Jul 18 08:51:32 PM PDT 24 |
5456668240 ps |
| T203 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3098607053 |
|
|
Jul 18 08:31:51 PM PDT 24 |
Jul 18 08:43:07 PM PDT 24 |
5374013701 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3164148107 |
|
|
Jul 18 08:36:10 PM PDT 24 |
Jul 18 08:42:54 PM PDT 24 |
6879588960 ps |
| T1207 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.203609264 |
|
|
Jul 18 08:29:15 PM PDT 24 |
Jul 18 08:33:50 PM PDT 24 |
2787776608 ps |
| T813 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.3195333782 |
|
|
Jul 18 08:47:38 PM PDT 24 |
Jul 18 08:55:13 PM PDT 24 |
4181583662 ps |
| T205 |
/workspace/coverage/default/2.chip_jtag_mem_access.4014892190 |
|
|
Jul 18 08:29:02 PM PDT 24 |
Jul 18 08:53:48 PM PDT 24 |
13550583820 ps |
| T417 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3260169977 |
|
|
Jul 18 08:39:09 PM PDT 24 |
Jul 18 08:47:41 PM PDT 24 |
4960785278 ps |
| T1208 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.4139038045 |
|
|
Jul 18 08:20:44 PM PDT 24 |
Jul 18 09:28:48 PM PDT 24 |
15019798420 ps |
| T191 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1971746956 |
|
|
Jul 18 08:34:40 PM PDT 24 |
Jul 18 08:41:12 PM PDT 24 |
4149039592 ps |
| T1209 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.2438565326 |
|
|
Jul 18 08:30:29 PM PDT 24 |
Jul 18 08:39:15 PM PDT 24 |
4097903350 ps |
| T1210 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.387763611 |
|
|
Jul 18 08:30:03 PM PDT 24 |
Jul 18 08:41:29 PM PDT 24 |
4616286962 ps |
| T1211 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.3065848244 |
|
|
Jul 18 08:22:54 PM PDT 24 |
Jul 18 08:26:44 PM PDT 24 |
2422832013 ps |
| T301 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.682488606 |
|
|
Jul 18 08:47:55 PM PDT 24 |
Jul 18 09:00:50 PM PDT 24 |
5054940208 ps |
| T809 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.3154160181 |
|
|
Jul 18 08:47:31 PM PDT 24 |
Jul 18 08:54:16 PM PDT 24 |
3292955040 ps |
| T1212 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.915985305 |
|
|
Jul 18 08:32:47 PM PDT 24 |
Jul 18 09:35:25 PM PDT 24 |
29683968615 ps |
| T1213 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.1566847423 |
|
|
Jul 18 08:26:12 PM PDT 24 |
Jul 18 08:40:44 PM PDT 24 |
8120781916 ps |
| T1214 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.3118424610 |
|
|
Jul 18 08:41:59 PM PDT 24 |
Jul 18 08:49:57 PM PDT 24 |
6330067280 ps |
| T879 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.1953789402 |
|
|
Jul 18 08:50:39 PM PDT 24 |
Jul 18 09:00:57 PM PDT 24 |
5120234050 ps |
| T1215 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.3026239988 |
|
|
Jul 18 08:26:08 PM PDT 24 |
Jul 18 09:23:06 PM PDT 24 |
14770958752 ps |
| T355 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.2156826800 |
|
|
Jul 18 08:19:45 PM PDT 24 |
Jul 18 08:33:29 PM PDT 24 |
4890187644 ps |
| T62 |
/workspace/coverage/default/0.chip_sw_alert_test.2369950629 |
|
|
Jul 18 08:16:36 PM PDT 24 |
Jul 18 08:23:19 PM PDT 24 |
2700439996 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2444298788 |
|
|
Jul 18 08:22:27 PM PDT 24 |
Jul 18 08:48:15 PM PDT 24 |
6944908958 ps |
| T99 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1003931521 |
|
|
Jul 18 08:51:56 PM PDT 24 |
Jul 18 08:58:41 PM PDT 24 |
3876752248 ps |
| T1217 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1355139278 |
|
|
Jul 18 08:31:59 PM PDT 24 |
Jul 18 08:51:36 PM PDT 24 |
11514367110 ps |
| T1218 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.2109509084 |
|
|
Jul 18 08:44:43 PM PDT 24 |
Jul 18 08:53:10 PM PDT 24 |
6930149105 ps |
| T217 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.3858016388 |
|
|
Jul 18 08:14:31 PM PDT 24 |
Jul 18 08:22:04 PM PDT 24 |
3981240592 ps |
| T817 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2952535957 |
|
|
Jul 18 08:48:27 PM PDT 24 |
Jul 18 08:58:44 PM PDT 24 |
4870582898 ps |
| T1219 |
/workspace/coverage/default/2.chip_sw_example_rom.1857374731 |
|
|
Jul 18 08:28:55 PM PDT 24 |
Jul 18 08:31:19 PM PDT 24 |
2540176072 ps |
| T846 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.418241738 |
|
|
Jul 18 08:48:29 PM PDT 24 |
Jul 18 08:58:07 PM PDT 24 |
5950826580 ps |
| T1220 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1365389153 |
|
|
Jul 18 08:22:09 PM PDT 24 |
Jul 18 08:26:52 PM PDT 24 |
2919680095 ps |
| T1221 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.10080304 |
|
|
Jul 18 08:21:14 PM PDT 24 |
Jul 18 08:37:26 PM PDT 24 |
6155006670 ps |
| T1222 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2664932119 |
|
|
Jul 18 08:13:58 PM PDT 24 |
Jul 18 08:21:48 PM PDT 24 |
3946906350 ps |
| T1223 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3611443879 |
|
|
Jul 18 08:14:16 PM PDT 24 |
Jul 18 08:19:37 PM PDT 24 |
5028663525 ps |
| T1224 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1959143069 |
|
|
Jul 18 08:31:13 PM PDT 24 |
Jul 18 08:51:22 PM PDT 24 |
9464230794 ps |
| T1225 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3837986974 |
|
|
Jul 18 08:45:44 PM PDT 24 |
Jul 18 08:51:26 PM PDT 24 |
3155369768 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.860191895 |
|
|
Jul 18 08:22:47 PM PDT 24 |
Jul 18 08:26:52 PM PDT 24 |
2351787060 ps |
| T1227 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1887144685 |
|
|
Jul 18 08:33:42 PM PDT 24 |
Jul 18 09:40:02 PM PDT 24 |
14890213372 ps |
| T1228 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1234304586 |
|
|
Jul 18 08:27:31 PM PDT 24 |
Jul 18 08:38:40 PM PDT 24 |
4509549664 ps |
| T805 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.2619037522 |
|
|
Jul 18 08:51:00 PM PDT 24 |
Jul 18 09:02:28 PM PDT 24 |
6669760200 ps |
| T738 |
/workspace/coverage/default/4.chip_tap_straps_dev.2189917376 |
|
|
Jul 18 08:42:30 PM PDT 24 |
Jul 18 09:07:39 PM PDT 24 |
14615692130 ps |
| T1229 |
/workspace/coverage/default/0.chip_sw_example_rom.3680684290 |
|
|
Jul 18 08:12:37 PM PDT 24 |
Jul 18 08:14:37 PM PDT 24 |
2467486660 ps |
| T1230 |
/workspace/coverage/default/1.chip_sw_example_concurrency.3092233083 |
|
|
Jul 18 08:19:49 PM PDT 24 |
Jul 18 08:25:37 PM PDT 24 |
3207113672 ps |
| T1231 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1629555875 |
|
|
Jul 18 08:35:55 PM PDT 24 |
Jul 18 08:45:53 PM PDT 24 |
4487690930 ps |
| T1232 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.2951664390 |
|
|
Jul 18 08:41:32 PM PDT 24 |
Jul 18 08:45:43 PM PDT 24 |
2505172120 ps |
| T1233 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3934171258 |
|
|
Jul 18 08:48:36 PM PDT 24 |
Jul 18 08:55:50 PM PDT 24 |
4234124052 ps |
| T839 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2314281166 |
|
|
Jul 18 08:47:04 PM PDT 24 |
Jul 18 08:55:17 PM PDT 24 |
5411229156 ps |
| T1234 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3952809533 |
|
|
Jul 18 08:44:33 PM PDT 24 |
Jul 18 08:53:37 PM PDT 24 |
3890252990 ps |