| T684 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.2221600353 |
|
|
Jul 19 06:42:52 PM PDT 24 |
Jul 19 06:52:08 PM PDT 24 |
5371622028 ps |
| T685 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.465456586 |
|
|
Jul 19 06:45:09 PM PDT 24 |
Jul 19 06:50:04 PM PDT 24 |
3129294200 ps |
| T342 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.1253251733 |
|
|
Jul 19 06:55:08 PM PDT 24 |
Jul 19 07:07:43 PM PDT 24 |
4849975368 ps |
| T397 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2340085214 |
|
|
Jul 19 06:41:47 PM PDT 24 |
Jul 19 06:52:16 PM PDT 24 |
3977327032 ps |
| T521 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.1895256925 |
|
|
Jul 19 07:14:28 PM PDT 24 |
Jul 19 07:20:24 PM PDT 24 |
3241138374 ps |
| T686 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2370668948 |
|
|
Jul 19 06:56:53 PM PDT 24 |
Jul 19 07:14:25 PM PDT 24 |
4661332286 ps |
| T687 |
/workspace/coverage/default/1.chip_sw_kmac_idle.1551894916 |
|
|
Jul 19 06:47:39 PM PDT 24 |
Jul 19 06:51:49 PM PDT 24 |
2971119536 ps |
| T507 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1874764156 |
|
|
Jul 19 07:10:44 PM PDT 24 |
Jul 19 07:17:36 PM PDT 24 |
4089793624 ps |
| T688 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1417411075 |
|
|
Jul 19 06:48:54 PM PDT 24 |
Jul 19 07:52:56 PM PDT 24 |
15610293296 ps |
| T387 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.340694816 |
|
|
Jul 19 06:50:34 PM PDT 24 |
Jul 19 07:02:12 PM PDT 24 |
4783606881 ps |
| T689 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.3352682687 |
|
|
Jul 19 06:42:41 PM PDT 24 |
Jul 19 06:47:55 PM PDT 24 |
3099103235 ps |
| T690 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2165357736 |
|
|
Jul 19 06:43:06 PM PDT 24 |
Jul 19 06:54:25 PM PDT 24 |
5955495566 ps |
| T691 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.3196508321 |
|
|
Jul 19 06:43:55 PM PDT 24 |
Jul 19 06:50:42 PM PDT 24 |
3168112216 ps |
| T692 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.345234173 |
|
|
Jul 19 06:42:17 PM PDT 24 |
Jul 19 06:54:55 PM PDT 24 |
5098821276 ps |
| T16 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1420140499 |
|
|
Jul 19 06:55:09 PM PDT 24 |
Jul 19 07:00:14 PM PDT 24 |
3617449960 ps |
| T496 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2394636195 |
|
|
Jul 19 07:06:54 PM PDT 24 |
Jul 19 07:13:24 PM PDT 24 |
3302434804 ps |
| T693 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.910673499 |
|
|
Jul 19 06:59:16 PM PDT 24 |
Jul 19 07:07:46 PM PDT 24 |
4069529504 ps |
| T694 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.2070632877 |
|
|
Jul 19 07:05:45 PM PDT 24 |
Jul 19 07:12:52 PM PDT 24 |
4142852236 ps |
| T469 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2338121666 |
|
|
Jul 19 07:07:21 PM PDT 24 |
Jul 19 07:17:01 PM PDT 24 |
4872076276 ps |
| T695 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.3722468858 |
|
|
Jul 19 06:46:19 PM PDT 24 |
Jul 19 07:01:27 PM PDT 24 |
5924245836 ps |
| T696 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.984494545 |
|
|
Jul 19 06:53:20 PM PDT 24 |
Jul 19 06:55:15 PM PDT 24 |
2226677872 ps |
| T697 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.2639569102 |
|
|
Jul 19 06:48:38 PM PDT 24 |
Jul 19 06:55:36 PM PDT 24 |
2906466564 ps |
| T698 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1989836086 |
|
|
Jul 19 06:55:42 PM PDT 24 |
Jul 19 07:06:00 PM PDT 24 |
5099421096 ps |
| T220 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.1855740306 |
|
|
Jul 19 06:48:39 PM PDT 24 |
Jul 19 07:00:09 PM PDT 24 |
6200344720 ps |
| T486 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.2365704985 |
|
|
Jul 19 07:07:12 PM PDT 24 |
Jul 19 07:18:24 PM PDT 24 |
5520979466 ps |
| T300 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.1501691385 |
|
|
Jul 19 06:55:26 PM PDT 24 |
Jul 19 07:06:19 PM PDT 24 |
5464322540 ps |
| T302 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.3930052939 |
|
|
Jul 19 06:40:55 PM PDT 24 |
Jul 19 06:55:12 PM PDT 24 |
6389277300 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.34921456 |
|
|
Jul 19 06:45:55 PM PDT 24 |
Jul 19 06:59:01 PM PDT 24 |
4937078064 ps |
| T304 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.1576576487 |
|
|
Jul 19 06:55:57 PM PDT 24 |
Jul 19 07:15:22 PM PDT 24 |
5494981552 ps |
| T305 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2396085709 |
|
|
Jul 19 07:11:35 PM PDT 24 |
Jul 19 07:20:51 PM PDT 24 |
5075248614 ps |
| T306 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.2623535340 |
|
|
Jul 19 07:01:20 PM PDT 24 |
Jul 19 07:11:15 PM PDT 24 |
4122034488 ps |
| T163 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.4003269126 |
|
|
Jul 19 06:54:40 PM PDT 24 |
Jul 19 07:00:04 PM PDT 24 |
3149636140 ps |
| T307 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.2585584667 |
|
|
Jul 19 06:46:14 PM PDT 24 |
Jul 19 06:50:32 PM PDT 24 |
2810799806 ps |
| T308 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.3601812787 |
|
|
Jul 19 07:08:31 PM PDT 24 |
Jul 19 07:19:29 PM PDT 24 |
4712604350 ps |
| T309 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.3966749478 |
|
|
Jul 19 06:43:28 PM PDT 24 |
Jul 19 07:18:29 PM PDT 24 |
7943736360 ps |
| T415 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.1426143957 |
|
|
Jul 19 07:05:07 PM PDT 24 |
Jul 19 07:11:30 PM PDT 24 |
3951588690 ps |
| T699 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2222230948 |
|
|
Jul 19 06:59:46 PM PDT 24 |
Jul 19 07:30:31 PM PDT 24 |
11406195914 ps |
| T700 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.2068025238 |
|
|
Jul 19 06:42:12 PM PDT 24 |
Jul 19 06:49:10 PM PDT 24 |
4296564930 ps |
| T701 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3926014203 |
|
|
Jul 19 07:02:57 PM PDT 24 |
Jul 19 07:09:04 PM PDT 24 |
5098412035 ps |
| T702 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.2839384682 |
|
|
Jul 19 06:45:36 PM PDT 24 |
Jul 19 07:44:25 PM PDT 24 |
10829361768 ps |
| T703 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.3196678242 |
|
|
Jul 19 07:02:02 PM PDT 24 |
Jul 19 07:13:23 PM PDT 24 |
4610525906 ps |
| T704 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.1425924842 |
|
|
Jul 19 07:01:54 PM PDT 24 |
Jul 19 07:13:11 PM PDT 24 |
12418938979 ps |
| T256 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.3683707702 |
|
|
Jul 19 06:47:06 PM PDT 24 |
Jul 19 06:51:20 PM PDT 24 |
2869842739 ps |
| T705 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.3494081963 |
|
|
Jul 19 06:51:46 PM PDT 24 |
Jul 19 06:56:04 PM PDT 24 |
2733240554 ps |
| T488 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.201732982 |
|
|
Jul 19 07:06:28 PM PDT 24 |
Jul 19 07:14:59 PM PDT 24 |
4893100168 ps |
| T706 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.971237353 |
|
|
Jul 19 07:01:43 PM PDT 24 |
Jul 19 07:07:37 PM PDT 24 |
2821676514 ps |
| T458 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2964164641 |
|
|
Jul 19 07:09:29 PM PDT 24 |
Jul 19 07:19:08 PM PDT 24 |
4307008058 ps |
| T24 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.517252666 |
|
|
Jul 19 06:40:00 PM PDT 24 |
Jul 19 06:44:07 PM PDT 24 |
2724440521 ps |
| T707 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.1935979009 |
|
|
Jul 19 06:38:56 PM PDT 24 |
Jul 19 06:44:24 PM PDT 24 |
3168292090 ps |
| T708 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3124864763 |
|
|
Jul 19 06:42:52 PM PDT 24 |
Jul 19 06:53:22 PM PDT 24 |
4725021240 ps |
| T709 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2379760428 |
|
|
Jul 19 06:43:58 PM PDT 24 |
Jul 19 06:48:26 PM PDT 24 |
2276604028 ps |
| T494 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.4034411239 |
|
|
Jul 19 07:10:23 PM PDT 24 |
Jul 19 07:17:04 PM PDT 24 |
4412708362 ps |
| T251 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.2758275366 |
|
|
Jul 19 06:53:45 PM PDT 24 |
Jul 19 07:05:14 PM PDT 24 |
5766746693 ps |
| T337 |
/workspace/coverage/default/2.chip_sw_flash_init.3321179754 |
|
|
Jul 19 06:53:33 PM PDT 24 |
Jul 19 07:30:39 PM PDT 24 |
19229000750 ps |
| T710 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2365292490 |
|
|
Jul 19 06:50:01 PM PDT 24 |
Jul 19 06:53:28 PM PDT 24 |
3215253660 ps |
| T523 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.975856442 |
|
|
Jul 19 07:12:13 PM PDT 24 |
Jul 19 07:17:52 PM PDT 24 |
4264284400 ps |
| T711 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1528634102 |
|
|
Jul 19 06:50:00 PM PDT 24 |
Jul 19 07:10:57 PM PDT 24 |
7848611638 ps |
| T712 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2713560614 |
|
|
Jul 19 06:44:35 PM PDT 24 |
Jul 19 06:57:17 PM PDT 24 |
6774825065 ps |
| T713 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.702139046 |
|
|
Jul 19 06:39:58 PM PDT 24 |
Jul 19 06:45:49 PM PDT 24 |
2531227420 ps |
| T714 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.409046494 |
|
|
Jul 19 06:44:29 PM PDT 24 |
Jul 19 07:21:48 PM PDT 24 |
10365202289 ps |
| T289 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.678816535 |
|
|
Jul 19 07:05:59 PM PDT 24 |
Jul 19 07:13:19 PM PDT 24 |
4287726990 ps |
| T715 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.1078913571 |
|
|
Jul 19 06:56:36 PM PDT 24 |
Jul 19 07:06:15 PM PDT 24 |
4604546608 ps |
| T290 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.2911373543 |
|
|
Jul 19 07:11:19 PM PDT 24 |
Jul 19 07:20:10 PM PDT 24 |
5058402952 ps |
| T499 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.1441725777 |
|
|
Jul 19 07:09:37 PM PDT 24 |
Jul 19 07:15:32 PM PDT 24 |
3957487390 ps |
| T716 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3262806032 |
|
|
Jul 19 06:46:32 PM PDT 24 |
Jul 19 07:42:10 PM PDT 24 |
11259137512 ps |
| T717 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3296030385 |
|
|
Jul 19 06:58:33 PM PDT 24 |
Jul 19 07:07:58 PM PDT 24 |
6748922392 ps |
| T455 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2293404381 |
|
|
Jul 19 07:06:34 PM PDT 24 |
Jul 19 07:21:26 PM PDT 24 |
4977128272 ps |
| T327 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1978669158 |
|
|
Jul 19 07:00:36 PM PDT 24 |
Jul 19 07:10:18 PM PDT 24 |
10448078188 ps |
| T332 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.1058659326 |
|
|
Jul 19 06:45:56 PM PDT 24 |
Jul 19 07:18:13 PM PDT 24 |
11102744940 ps |
| T718 |
/workspace/coverage/default/3.chip_tap_straps_rma.1422927248 |
|
|
Jul 19 07:01:24 PM PDT 24 |
Jul 19 07:11:42 PM PDT 24 |
5823613634 ps |
| T719 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.122310309 |
|
|
Jul 19 06:41:49 PM PDT 24 |
Jul 19 07:24:12 PM PDT 24 |
28387299088 ps |
| T480 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3542557095 |
|
|
Jul 19 07:05:15 PM PDT 24 |
Jul 19 07:12:29 PM PDT 24 |
4136606650 ps |
| T223 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.304653059 |
|
|
Jul 19 06:41:55 PM PDT 24 |
Jul 19 07:28:33 PM PDT 24 |
32954858515 ps |
| T495 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2072215758 |
|
|
Jul 19 07:06:34 PM PDT 24 |
Jul 19 07:14:17 PM PDT 24 |
3335326558 ps |
| T720 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.3748877925 |
|
|
Jul 19 06:53:15 PM PDT 24 |
Jul 19 07:04:56 PM PDT 24 |
3798424688 ps |
| T524 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3301175846 |
|
|
Jul 19 07:08:50 PM PDT 24 |
Jul 19 07:18:39 PM PDT 24 |
5809627190 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2661050837 |
|
|
Jul 19 06:56:44 PM PDT 24 |
Jul 19 07:08:09 PM PDT 24 |
5980189920 ps |
| T721 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1921051942 |
|
|
Jul 19 07:00:07 PM PDT 24 |
Jul 19 07:11:36 PM PDT 24 |
4991884032 ps |
| T530 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.2118179033 |
|
|
Jul 19 07:13:15 PM PDT 24 |
Jul 19 07:20:01 PM PDT 24 |
3497361210 ps |
| T722 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.870711649 |
|
|
Jul 19 06:49:14 PM PDT 24 |
Jul 19 06:52:59 PM PDT 24 |
2553323640 ps |
| T338 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.853687337 |
|
|
Jul 19 06:54:47 PM PDT 24 |
Jul 19 08:31:40 PM PDT 24 |
49976004717 ps |
| T333 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1207586544 |
|
|
Jul 19 06:57:21 PM PDT 24 |
Jul 19 07:19:17 PM PDT 24 |
6695940444 ps |
| T391 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.1299291009 |
|
|
Jul 19 06:40:29 PM PDT 24 |
Jul 19 06:45:47 PM PDT 24 |
3591071292 ps |
| T541 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3803540433 |
|
|
Jul 19 07:09:05 PM PDT 24 |
Jul 19 07:19:59 PM PDT 24 |
4589846280 ps |
| T538 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.248505246 |
|
|
Jul 19 07:06:29 PM PDT 24 |
Jul 19 07:16:52 PM PDT 24 |
5703258232 ps |
| T515 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.2625488100 |
|
|
Jul 19 07:06:15 PM PDT 24 |
Jul 19 07:19:58 PM PDT 24 |
5029374480 ps |
| T723 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1360674717 |
|
|
Jul 19 07:09:57 PM PDT 24 |
Jul 19 07:21:18 PM PDT 24 |
5265831404 ps |
| T724 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.2887812916 |
|
|
Jul 19 06:42:23 PM PDT 24 |
Jul 19 06:46:01 PM PDT 24 |
2709070264 ps |
| T725 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.242360458 |
|
|
Jul 19 06:41:29 PM PDT 24 |
Jul 19 06:51:09 PM PDT 24 |
3803657442 ps |
| T726 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.2569686388 |
|
|
Jul 19 07:04:27 PM PDT 24 |
Jul 19 08:42:14 PM PDT 24 |
20178680680 ps |
| T727 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.3002742520 |
|
|
Jul 19 06:42:01 PM PDT 24 |
Jul 19 06:48:08 PM PDT 24 |
3210326000 ps |
| T728 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.3037868694 |
|
|
Jul 19 06:51:41 PM PDT 24 |
Jul 19 06:56:16 PM PDT 24 |
3285877106 ps |
| T729 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2735518534 |
|
|
Jul 19 06:49:05 PM PDT 24 |
Jul 19 06:57:57 PM PDT 24 |
7028188272 ps |
| T730 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.3933646674 |
|
|
Jul 19 06:45:03 PM PDT 24 |
Jul 19 07:31:02 PM PDT 24 |
11093637760 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.680392353 |
|
|
Jul 19 06:52:01 PM PDT 24 |
Jul 19 07:02:44 PM PDT 24 |
5346681446 ps |
| T459 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.2486603406 |
|
|
Jul 19 07:09:30 PM PDT 24 |
Jul 19 07:20:42 PM PDT 24 |
5979558318 ps |
| T731 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.1447532776 |
|
|
Jul 19 07:06:01 PM PDT 24 |
Jul 19 08:12:15 PM PDT 24 |
14946900474 ps |
| T732 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.3050395509 |
|
|
Jul 19 06:50:07 PM PDT 24 |
Jul 19 08:14:48 PM PDT 24 |
14633307272 ps |
| T257 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.1823934784 |
|
|
Jul 19 06:42:59 PM PDT 24 |
Jul 19 06:56:04 PM PDT 24 |
4739945819 ps |
| T733 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.1547068100 |
|
|
Jul 19 06:57:16 PM PDT 24 |
Jul 19 08:09:41 PM PDT 24 |
14348620888 ps |
| T734 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.2447696343 |
|
|
Jul 19 06:42:42 PM PDT 24 |
Jul 19 06:56:12 PM PDT 24 |
5567078420 ps |
| T735 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3827692293 |
|
|
Jul 19 07:07:28 PM PDT 24 |
Jul 19 07:13:47 PM PDT 24 |
4120052920 ps |
| T736 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2674230504 |
|
|
Jul 19 06:43:24 PM PDT 24 |
Jul 19 07:04:21 PM PDT 24 |
7916755136 ps |
| T516 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.2582218792 |
|
|
Jul 19 07:07:34 PM PDT 24 |
Jul 19 07:14:33 PM PDT 24 |
3872191640 ps |
| T737 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.87086085 |
|
|
Jul 19 06:46:56 PM PDT 24 |
Jul 19 06:54:59 PM PDT 24 |
4831891960 ps |
| T738 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.3092820509 |
|
|
Jul 19 07:01:31 PM PDT 24 |
Jul 19 07:05:38 PM PDT 24 |
3202175839 ps |
| T739 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1753776762 |
|
|
Jul 19 07:03:35 PM PDT 24 |
Jul 19 08:13:32 PM PDT 24 |
14424913004 ps |
| T535 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.749058365 |
|
|
Jul 19 07:08:58 PM PDT 24 |
Jul 19 07:17:47 PM PDT 24 |
3673333424 ps |
| T484 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1413275335 |
|
|
Jul 19 07:09:22 PM PDT 24 |
Jul 19 07:19:42 PM PDT 24 |
6387913032 ps |
| T158 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.3147483604 |
|
|
Jul 19 06:44:10 PM PDT 24 |
Jul 19 06:56:22 PM PDT 24 |
4944139628 ps |
| T402 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.4216975908 |
|
|
Jul 19 06:56:33 PM PDT 24 |
Jul 19 07:12:05 PM PDT 24 |
4654510760 ps |
| T344 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.4049159143 |
|
|
Jul 19 07:11:27 PM PDT 24 |
Jul 19 07:21:04 PM PDT 24 |
5642164310 ps |
| T740 |
/workspace/coverage/default/0.rom_e2e_self_hash.4236160461 |
|
|
Jul 19 06:48:55 PM PDT 24 |
Jul 19 08:40:43 PM PDT 24 |
26438858968 ps |
| T335 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3704511509 |
|
|
Jul 19 06:57:31 PM PDT 24 |
Jul 19 08:09:25 PM PDT 24 |
12521337638 ps |
| T741 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.467783608 |
|
|
Jul 19 06:41:37 PM PDT 24 |
Jul 19 06:50:38 PM PDT 24 |
4913400266 ps |
| T508 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.3909132720 |
|
|
Jul 19 07:05:39 PM PDT 24 |
Jul 19 07:14:40 PM PDT 24 |
5088977844 ps |
| T396 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.4240280741 |
|
|
Jul 19 06:54:41 PM PDT 24 |
Jul 19 07:07:42 PM PDT 24 |
4211137892 ps |
| T313 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.918510136 |
|
|
Jul 19 07:00:58 PM PDT 24 |
Jul 19 07:12:30 PM PDT 24 |
4830766961 ps |
| T742 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.1287159255 |
|
|
Jul 19 06:45:11 PM PDT 24 |
Jul 19 06:57:56 PM PDT 24 |
4170643630 ps |
| T509 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3447555678 |
|
|
Jul 19 07:10:57 PM PDT 24 |
Jul 19 07:22:39 PM PDT 24 |
5838897936 ps |
| T510 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3582008737 |
|
|
Jul 19 07:07:22 PM PDT 24 |
Jul 19 07:20:23 PM PDT 24 |
4695705876 ps |
| T743 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2328049669 |
|
|
Jul 19 06:43:49 PM PDT 24 |
Jul 19 07:03:13 PM PDT 24 |
16832124069 ps |
| T744 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2448519968 |
|
|
Jul 19 06:42:56 PM PDT 24 |
Jul 19 06:54:50 PM PDT 24 |
4089800197 ps |
| T745 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.2046060242 |
|
|
Jul 19 07:11:27 PM PDT 24 |
Jul 19 07:18:00 PM PDT 24 |
4126283244 ps |
| T746 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.1337416783 |
|
|
Jul 19 06:46:26 PM PDT 24 |
Jul 19 06:55:42 PM PDT 24 |
4983953357 ps |
| T46 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.556928584 |
|
|
Jul 19 06:40:47 PM PDT 24 |
Jul 19 06:45:08 PM PDT 24 |
3109861894 ps |
| T747 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1912099164 |
|
|
Jul 19 06:46:49 PM PDT 24 |
Jul 19 06:59:53 PM PDT 24 |
4524945852 ps |
| T748 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2180657938 |
|
|
Jul 19 07:06:03 PM PDT 24 |
Jul 19 07:15:20 PM PDT 24 |
4510443190 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.2933013328 |
|
|
Jul 19 06:48:57 PM PDT 24 |
Jul 19 07:21:17 PM PDT 24 |
22744984266 ps |
| T336 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.478664316 |
|
|
Jul 19 06:44:20 PM PDT 24 |
Jul 19 07:39:43 PM PDT 24 |
16074124140 ps |
| T749 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.360407870 |
|
|
Jul 19 06:57:43 PM PDT 24 |
Jul 19 07:00:37 PM PDT 24 |
2749964472 ps |
| T750 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1103313948 |
|
|
Jul 19 07:07:01 PM PDT 24 |
Jul 19 07:31:29 PM PDT 24 |
7629130400 ps |
| T751 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.4102421087 |
|
|
Jul 19 07:10:38 PM PDT 24 |
Jul 19 07:18:35 PM PDT 24 |
5387876744 ps |
| T752 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1342847616 |
|
|
Jul 19 06:47:10 PM PDT 24 |
Jul 19 06:59:05 PM PDT 24 |
4080234728 ps |
| T753 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.3346136455 |
|
|
Jul 19 07:03:27 PM PDT 24 |
Jul 19 07:13:34 PM PDT 24 |
4033546784 ps |
| T754 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.1598690751 |
|
|
Jul 19 07:02:06 PM PDT 24 |
Jul 19 07:08:43 PM PDT 24 |
3045415960 ps |
| T465 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3661840376 |
|
|
Jul 19 06:39:43 PM PDT 24 |
Jul 19 10:30:04 PM PDT 24 |
255717343370 ps |
| T755 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.4190528969 |
|
|
Jul 19 06:45:42 PM PDT 24 |
Jul 19 07:18:02 PM PDT 24 |
7679224860 ps |
| T756 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.1671877835 |
|
|
Jul 19 06:45:13 PM PDT 24 |
Jul 19 07:08:33 PM PDT 24 |
8448241304 ps |
| T757 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.3345586182 |
|
|
Jul 19 06:56:29 PM PDT 24 |
Jul 19 08:00:08 PM PDT 24 |
22326835375 ps |
| T380 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.3585022554 |
|
|
Jul 19 06:44:04 PM PDT 24 |
Jul 19 07:08:14 PM PDT 24 |
5620397120 ps |
| T758 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.3888563907 |
|
|
Jul 19 06:57:34 PM PDT 24 |
Jul 19 07:07:56 PM PDT 24 |
5200179320 ps |
| T759 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.1841396107 |
|
|
Jul 19 06:48:30 PM PDT 24 |
Jul 19 07:46:59 PM PDT 24 |
11223415350 ps |
| T258 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2662069371 |
|
|
Jul 19 06:56:29 PM PDT 24 |
Jul 19 07:03:04 PM PDT 24 |
3727612970 ps |
| T760 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2792199303 |
|
|
Jul 19 06:55:06 PM PDT 24 |
Jul 19 10:53:24 PM PDT 24 |
78054940446 ps |
| T761 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3126818698 |
|
|
Jul 19 06:42:58 PM PDT 24 |
Jul 19 07:10:00 PM PDT 24 |
12200644077 ps |
| T762 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1028206398 |
|
|
Jul 19 06:39:32 PM PDT 24 |
Jul 19 06:47:14 PM PDT 24 |
3055798344 ps |
| T763 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.46690552 |
|
|
Jul 19 06:56:41 PM PDT 24 |
Jul 19 07:58:53 PM PDT 24 |
34707953370 ps |
| T764 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3093913181 |
|
|
Jul 19 07:09:53 PM PDT 24 |
Jul 19 07:22:33 PM PDT 24 |
6208453608 ps |
| T765 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1906500556 |
|
|
Jul 19 07:01:49 PM PDT 24 |
Jul 19 07:08:08 PM PDT 24 |
3181186600 ps |
| T766 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.3407182240 |
|
|
Jul 19 07:05:34 PM PDT 24 |
Jul 19 07:14:56 PM PDT 24 |
4338273720 ps |
| T767 |
/workspace/coverage/default/2.chip_tap_straps_dev.3666943144 |
|
|
Jul 19 06:58:25 PM PDT 24 |
Jul 19 07:02:29 PM PDT 24 |
3855012550 ps |
| T768 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.4274684215 |
|
|
Jul 19 06:43:30 PM PDT 24 |
Jul 19 07:53:12 PM PDT 24 |
15225174224 ps |
| T340 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.3744757526 |
|
|
Jul 19 06:57:27 PM PDT 24 |
Jul 19 08:38:38 PM PDT 24 |
50856711678 ps |
| T769 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1745533841 |
|
|
Jul 19 06:39:26 PM PDT 24 |
Jul 19 06:45:52 PM PDT 24 |
4571707910 ps |
| T410 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.4103695206 |
|
|
Jul 19 06:45:12 PM PDT 24 |
Jul 19 06:54:23 PM PDT 24 |
5550020276 ps |
| T770 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3385992668 |
|
|
Jul 19 06:47:03 PM PDT 24 |
Jul 19 06:52:02 PM PDT 24 |
3151855190 ps |
| T159 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3620639251 |
|
|
Jul 19 06:47:34 PM PDT 24 |
Jul 19 06:59:41 PM PDT 24 |
4318850868 ps |
| T771 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.878521765 |
|
|
Jul 19 06:45:13 PM PDT 24 |
Jul 19 07:06:22 PM PDT 24 |
5202343860 ps |
| T772 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.4115854680 |
|
|
Jul 19 06:46:26 PM PDT 24 |
Jul 19 06:52:36 PM PDT 24 |
4931454750 ps |
| T773 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.1818103699 |
|
|
Jul 19 06:50:19 PM PDT 24 |
Jul 19 08:11:07 PM PDT 24 |
23115470952 ps |
| T774 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3503993848 |
|
|
Jul 19 06:45:37 PM PDT 24 |
Jul 19 08:00:02 PM PDT 24 |
15811493413 ps |
| T501 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2861979553 |
|
|
Jul 19 07:13:14 PM PDT 24 |
Jul 19 07:25:56 PM PDT 24 |
6047460014 ps |
| T91 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3471170706 |
|
|
Jul 19 06:49:42 PM PDT 24 |
Jul 19 06:56:27 PM PDT 24 |
5303290840 ps |
| T775 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.3198021585 |
|
|
Jul 19 06:41:15 PM PDT 24 |
Jul 19 06:57:48 PM PDT 24 |
8206751547 ps |
| T776 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.3137962461 |
|
|
Jul 19 06:44:28 PM PDT 24 |
Jul 19 06:55:53 PM PDT 24 |
5156804998 ps |
| T777 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.4070426666 |
|
|
Jul 19 06:59:17 PM PDT 24 |
Jul 19 07:03:56 PM PDT 24 |
3215453464 ps |
| T778 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.779075508 |
|
|
Jul 19 06:42:48 PM PDT 24 |
Jul 19 08:31:08 PM PDT 24 |
48702294881 ps |
| T779 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.1365321056 |
|
|
Jul 19 06:57:19 PM PDT 24 |
Jul 19 07:13:46 PM PDT 24 |
5089113950 ps |
| T780 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.2419420246 |
|
|
Jul 19 06:57:19 PM PDT 24 |
Jul 19 07:07:34 PM PDT 24 |
5234212784 ps |
| T781 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.2768922723 |
|
|
Jul 19 07:03:36 PM PDT 24 |
Jul 19 07:19:00 PM PDT 24 |
10207167643 ps |
| T782 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.335668190 |
|
|
Jul 19 06:43:29 PM PDT 24 |
Jul 19 07:00:09 PM PDT 24 |
5691761153 ps |
| T783 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.1035796712 |
|
|
Jul 19 07:06:28 PM PDT 24 |
Jul 19 07:14:33 PM PDT 24 |
6600649219 ps |
| T784 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.4002216213 |
|
|
Jul 19 06:39:54 PM PDT 24 |
Jul 19 06:47:02 PM PDT 24 |
3509974360 ps |
| T785 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.4022769614 |
|
|
Jul 19 06:47:23 PM PDT 24 |
Jul 19 06:50:48 PM PDT 24 |
2909752784 ps |
| T786 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.1270309102 |
|
|
Jul 19 06:38:18 PM PDT 24 |
Jul 19 07:22:54 PM PDT 24 |
11842493024 ps |
| T787 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3450473666 |
|
|
Jul 19 06:43:00 PM PDT 24 |
Jul 19 06:49:41 PM PDT 24 |
3716267746 ps |
| T788 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1638917909 |
|
|
Jul 19 07:07:48 PM PDT 24 |
Jul 19 07:13:30 PM PDT 24 |
3274914284 ps |
| T278 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3819859945 |
|
|
Jul 19 07:10:03 PM PDT 24 |
Jul 19 07:17:01 PM PDT 24 |
3513271460 ps |
| T470 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.2295495555 |
|
|
Jul 19 07:08:10 PM PDT 24 |
Jul 19 07:17:11 PM PDT 24 |
5877628312 ps |
| T789 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.2300731070 |
|
|
Jul 19 06:40:45 PM PDT 24 |
Jul 19 06:44:35 PM PDT 24 |
2744331807 ps |
| T790 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.1347589753 |
|
|
Jul 19 06:57:10 PM PDT 24 |
Jul 19 08:09:22 PM PDT 24 |
14775096416 ps |
| T791 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1005980584 |
|
|
Jul 19 06:47:09 PM PDT 24 |
Jul 19 06:58:29 PM PDT 24 |
5095038728 ps |
| T291 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2140271542 |
|
|
Jul 19 07:05:20 PM PDT 24 |
Jul 19 07:14:32 PM PDT 24 |
6049949256 ps |
| T792 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.2332974930 |
|
|
Jul 19 06:56:56 PM PDT 24 |
Jul 19 07:02:51 PM PDT 24 |
2926531733 ps |
| T793 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.384746527 |
|
|
Jul 19 06:40:26 PM PDT 24 |
Jul 19 07:00:42 PM PDT 24 |
7705309880 ps |
| T526 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.577975387 |
|
|
Jul 19 07:06:32 PM PDT 24 |
Jul 19 07:15:01 PM PDT 24 |
4613300460 ps |
| T794 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.1379837333 |
|
|
Jul 19 07:01:22 PM PDT 24 |
Jul 19 07:13:12 PM PDT 24 |
3714990460 ps |
| T795 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2717565244 |
|
|
Jul 19 06:46:33 PM PDT 24 |
Jul 19 07:09:24 PM PDT 24 |
11185106543 ps |
| T796 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.3979926160 |
|
|
Jul 19 06:51:23 PM PDT 24 |
Jul 19 06:59:35 PM PDT 24 |
6919472640 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2037618150 |
|
|
Jul 19 06:41:52 PM PDT 24 |
Jul 19 06:48:31 PM PDT 24 |
8075231318 ps |
| T797 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2534713607 |
|
|
Jul 19 06:40:59 PM PDT 24 |
Jul 19 10:06:01 PM PDT 24 |
64104539133 ps |
| T798 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.2679160977 |
|
|
Jul 19 06:45:10 PM PDT 24 |
Jul 19 06:53:01 PM PDT 24 |
6567897764 ps |
| T799 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1256277315 |
|
|
Jul 19 06:54:47 PM PDT 24 |
Jul 19 07:02:30 PM PDT 24 |
4214427578 ps |
| T800 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.3494268547 |
|
|
Jul 19 06:43:20 PM PDT 24 |
Jul 19 08:19:43 PM PDT 24 |
49306175000 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1212224062 |
|
|
Jul 19 06:39:39 PM PDT 24 |
Jul 19 07:03:15 PM PDT 24 |
10336897480 ps |
| T801 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.3535553256 |
|
|
Jul 19 06:46:03 PM PDT 24 |
Jul 19 07:49:03 PM PDT 24 |
14304577426 ps |
| T292 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.2450581348 |
|
|
Jul 19 07:11:25 PM PDT 24 |
Jul 19 07:21:22 PM PDT 24 |
5329470580 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1050302421 |
|
|
Jul 19 06:59:34 PM PDT 24 |
Jul 19 07:04:06 PM PDT 24 |
3102327368 ps |
| T802 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.680474768 |
|
|
Jul 19 06:40:45 PM PDT 24 |
Jul 19 07:03:51 PM PDT 24 |
10665495440 ps |
| T145 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1603974090 |
|
|
Jul 19 06:49:12 PM PDT 24 |
Jul 19 07:19:25 PM PDT 24 |
22342621080 ps |
| T803 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.3978671099 |
|
|
Jul 19 06:38:31 PM PDT 24 |
Jul 19 07:03:38 PM PDT 24 |
7446671610 ps |
| T804 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.866957266 |
|
|
Jul 19 06:44:49 PM PDT 24 |
Jul 19 06:53:28 PM PDT 24 |
5227012720 ps |
| T522 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.2386604172 |
|
|
Jul 19 07:14:02 PM PDT 24 |
Jul 19 07:19:56 PM PDT 24 |
3169145580 ps |
| T805 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1510092930 |
|
|
Jul 19 07:06:42 PM PDT 24 |
Jul 19 07:51:17 PM PDT 24 |
12856240432 ps |
| T806 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2494387294 |
|
|
Jul 19 07:04:13 PM PDT 24 |
Jul 19 08:08:02 PM PDT 24 |
14936261718 ps |
| T527 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.1663919648 |
|
|
Jul 19 07:05:57 PM PDT 24 |
Jul 19 07:12:50 PM PDT 24 |
4289990868 ps |
| T115 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.488542953 |
|
|
Jul 19 06:47:06 PM PDT 24 |
Jul 19 06:57:18 PM PDT 24 |
4036365000 ps |
| T807 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.1406763562 |
|
|
Jul 19 06:42:29 PM PDT 24 |
Jul 19 06:48:40 PM PDT 24 |
3623619864 ps |
| T808 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.823798660 |
|
|
Jul 19 07:05:33 PM PDT 24 |
Jul 19 07:39:35 PM PDT 24 |
8610965340 ps |
| T809 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.661316922 |
|
|
Jul 19 06:51:54 PM PDT 24 |
Jul 19 06:58:48 PM PDT 24 |
5073566844 ps |
| T810 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4263810308 |
|
|
Jul 19 06:38:57 PM PDT 24 |
Jul 19 07:19:48 PM PDT 24 |
26307670880 ps |
| T811 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.3453193347 |
|
|
Jul 19 06:55:08 PM PDT 24 |
Jul 19 07:27:10 PM PDT 24 |
8432339586 ps |
| T812 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.1717240168 |
|
|
Jul 19 07:06:55 PM PDT 24 |
Jul 19 07:15:10 PM PDT 24 |
7545988374 ps |
| T813 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.926534766 |
|
|
Jul 19 06:42:57 PM PDT 24 |
Jul 19 08:17:18 PM PDT 24 |
47560419957 ps |
| T814 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.4077654769 |
|
|
Jul 19 06:38:38 PM PDT 24 |
Jul 19 07:12:18 PM PDT 24 |
19013809178 ps |
| T815 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.609349874 |
|
|
Jul 19 06:45:24 PM PDT 24 |
Jul 19 07:06:43 PM PDT 24 |
8131034145 ps |
| T816 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.1310399874 |
|
|
Jul 19 06:45:43 PM PDT 24 |
Jul 19 07:50:17 PM PDT 24 |
15106825545 ps |
| T817 |
/workspace/coverage/default/0.chip_sw_aes_entropy.160870424 |
|
|
Jul 19 06:39:03 PM PDT 24 |
Jul 19 06:43:12 PM PDT 24 |
3012536200 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.1275796379 |
|
|
Jul 19 06:42:26 PM PDT 24 |
Jul 19 06:49:34 PM PDT 24 |
2702854415 ps |
| T224 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1684801332 |
|
|
Jul 19 06:58:45 PM PDT 24 |
Jul 19 07:16:07 PM PDT 24 |
7915127606 ps |
| T366 |
/workspace/coverage/default/0.rom_raw_unlock.174527983 |
|
|
Jul 19 06:42:34 PM PDT 24 |
Jul 19 06:47:29 PM PDT 24 |
6670093401 ps |
| T345 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1312078519 |
|
|
Jul 19 07:03:13 PM PDT 24 |
Jul 19 07:09:15 PM PDT 24 |
3946067800 ps |
| T520 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.4275835883 |
|
|
Jul 19 07:09:24 PM PDT 24 |
Jul 19 07:16:14 PM PDT 24 |
4198857960 ps |
| T818 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.3930485729 |
|
|
Jul 19 06:58:04 PM PDT 24 |
Jul 19 07:06:15 PM PDT 24 |
5356389560 ps |
| T819 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.2362361876 |
|
|
Jul 19 06:41:26 PM PDT 24 |
Jul 19 06:45:58 PM PDT 24 |
3477508074 ps |
| T820 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.2852914888 |
|
|
Jul 19 06:37:40 PM PDT 24 |
Jul 19 06:56:45 PM PDT 24 |
7673145152 ps |
| T411 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3988290367 |
|
|
Jul 19 06:49:14 PM PDT 24 |
Jul 19 06:58:54 PM PDT 24 |
5245867304 ps |
| T225 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.4249232435 |
|
|
Jul 19 06:46:14 PM PDT 24 |
Jul 19 06:58:50 PM PDT 24 |
7629268148 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_gpio.1822100903 |
|
|
Jul 19 06:40:26 PM PDT 24 |
Jul 19 06:49:06 PM PDT 24 |
4750274536 ps |
| T821 |
/workspace/coverage/default/0.chip_sw_example_rom.40059686 |
|
|
Jul 19 06:37:59 PM PDT 24 |
Jul 19 06:40:22 PM PDT 24 |
2433787632 ps |
| T822 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.3634041505 |
|
|
Jul 19 06:44:36 PM PDT 24 |
Jul 19 06:56:44 PM PDT 24 |
4087304908 ps |
| T823 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.2572287016 |
|
|
Jul 19 06:55:44 PM PDT 24 |
Jul 19 07:18:37 PM PDT 24 |
8235124814 ps |
| T95 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2967072299 |
|
|
Jul 19 06:58:03 PM PDT 24 |
Jul 19 07:08:48 PM PDT 24 |
5000750328 ps |
| T824 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.2545631154 |
|
|
Jul 19 06:44:27 PM PDT 24 |
Jul 19 08:29:27 PM PDT 24 |
23680858218 ps |
| T416 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.3396679495 |
|
|
Jul 19 07:06:53 PM PDT 24 |
Jul 19 07:13:34 PM PDT 24 |
3209630120 ps |
| T17 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.559197298 |
|
|
Jul 19 06:42:08 PM PDT 24 |
Jul 19 06:51:20 PM PDT 24 |
5076038136 ps |
| T381 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.358021744 |
|
|
Jul 19 06:39:05 PM PDT 24 |
Jul 19 07:08:47 PM PDT 24 |
7755016936 ps |
| T825 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.181652141 |
|
|
Jul 19 07:09:40 PM PDT 24 |
Jul 19 07:20:03 PM PDT 24 |
5530115028 ps |
| T86 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.182012357 |
|
|
Jul 19 06:51:21 PM PDT 24 |
Jul 19 08:01:26 PM PDT 24 |
24100207007 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.1656531459 |
|
|
Jul 19 06:40:16 PM PDT 24 |
Jul 19 06:49:01 PM PDT 24 |
5857195164 ps |
| T826 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.502952637 |
|
|
Jul 19 06:56:40 PM PDT 24 |
Jul 19 07:09:50 PM PDT 24 |
7779270614 ps |
| T456 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1356999312 |
|
|
Jul 19 07:08:14 PM PDT 24 |
Jul 19 07:15:16 PM PDT 24 |
3590976630 ps |
| T827 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.2813513032 |
|
|
Jul 19 06:57:21 PM PDT 24 |
Jul 19 07:06:27 PM PDT 24 |
3745083092 ps |
| T197 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.3381331535 |
|
|
Jul 19 06:42:01 PM PDT 24 |
Jul 19 06:50:38 PM PDT 24 |
4338759680 ps |
| T828 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.554240847 |
|
|
Jul 19 06:55:24 PM PDT 24 |
Jul 19 07:56:01 PM PDT 24 |
16703154888 ps |
| T829 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.334591204 |
|
|
Jul 19 07:03:57 PM PDT 24 |
Jul 19 07:14:13 PM PDT 24 |
3665091512 ps |
| T830 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3157404993 |
|
|
Jul 19 06:41:34 PM PDT 24 |
Jul 19 10:19:48 PM PDT 24 |
63918678364 ps |
| T831 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.804612684 |
|
|
Jul 19 06:57:07 PM PDT 24 |
Jul 19 07:07:36 PM PDT 24 |
6277808808 ps |
| T832 |
/workspace/coverage/default/2.rom_e2e_static_critical.150378993 |
|
|
Jul 19 07:08:09 PM PDT 24 |
Jul 19 08:28:59 PM PDT 24 |
17408611402 ps |