| T1229 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.3330091801 |
|
|
Jul 20 07:59:03 PM PDT 24 |
Jul 20 09:05:47 PM PDT 24 |
15146480776 ps |
| T1230 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.569444451 |
|
|
Jul 20 08:18:02 PM PDT 24 |
Jul 20 08:27:48 PM PDT 24 |
3983035132 ps |
| T1231 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2826368949 |
|
|
Jul 20 08:00:26 PM PDT 24 |
Jul 20 08:21:02 PM PDT 24 |
6259499436 ps |
| T1232 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.117054419 |
|
|
Jul 20 07:51:50 PM PDT 24 |
Jul 20 07:54:46 PM PDT 24 |
2517728124 ps |
| T380 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2184204344 |
|
|
Jul 20 08:02:30 PM PDT 24 |
Jul 20 08:10:14 PM PDT 24 |
6791568824 ps |
| T1233 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.3082230206 |
|
|
Jul 20 08:09:17 PM PDT 24 |
Jul 20 08:14:43 PM PDT 24 |
2950385356 ps |
| T814 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1657303505 |
|
|
Jul 20 08:24:32 PM PDT 24 |
Jul 20 08:33:36 PM PDT 24 |
4269014916 ps |
| T835 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3492176079 |
|
|
Jul 20 08:23:23 PM PDT 24 |
Jul 20 08:30:40 PM PDT 24 |
3473454096 ps |
| T1234 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.1743403347 |
|
|
Jul 20 07:54:50 PM PDT 24 |
Jul 20 08:07:00 PM PDT 24 |
4957562572 ps |
| T1235 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.2274443212 |
|
|
Jul 20 08:03:59 PM PDT 24 |
Jul 20 08:12:47 PM PDT 24 |
4509970892 ps |
| T1236 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.4266520473 |
|
|
Jul 20 08:20:33 PM PDT 24 |
Jul 20 08:29:44 PM PDT 24 |
4861369836 ps |
| T1237 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.3519682427 |
|
|
Jul 20 07:59:47 PM PDT 24 |
Jul 20 08:17:33 PM PDT 24 |
6375897850 ps |
| T90 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.319656619 |
|
|
Jul 20 08:29:43 PM PDT 24 |
Jul 20 08:38:52 PM PDT 24 |
5831979440 ps |
| T1238 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3130364291 |
|
|
Jul 20 08:12:34 PM PDT 24 |
Jul 20 08:26:04 PM PDT 24 |
4550139980 ps |
| T1239 |
/workspace/coverage/default/0.chip_sw_example_concurrency.2666477593 |
|
|
Jul 20 07:49:42 PM PDT 24 |
Jul 20 07:54:51 PM PDT 24 |
3058052970 ps |
| T1240 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.1840836314 |
|
|
Jul 20 08:01:42 PM PDT 24 |
Jul 20 08:25:18 PM PDT 24 |
6741741805 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_edn_kat.3317317098 |
|
|
Jul 20 07:51:15 PM PDT 24 |
Jul 20 08:01:21 PM PDT 24 |
3078671876 ps |
| T1242 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.2610186766 |
|
|
Jul 20 08:07:10 PM PDT 24 |
Jul 20 08:18:02 PM PDT 24 |
3786002133 ps |
| T1243 |
/workspace/coverage/default/0.chip_sw_example_flash.298021906 |
|
|
Jul 20 07:49:27 PM PDT 24 |
Jul 20 07:53:06 PM PDT 24 |
2545014910 ps |
| T1244 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.3391570340 |
|
|
Jul 20 07:49:45 PM PDT 24 |
Jul 20 07:51:55 PM PDT 24 |
2882560134 ps |
| T787 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2248664509 |
|
|
Jul 20 08:22:34 PM PDT 24 |
Jul 20 08:29:33 PM PDT 24 |
4199198816 ps |
| T1245 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.212625461 |
|
|
Jul 20 08:11:04 PM PDT 24 |
Jul 20 08:36:49 PM PDT 24 |
7320367800 ps |
| T1246 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1508125886 |
|
|
Jul 20 08:10:50 PM PDT 24 |
Jul 20 08:15:10 PM PDT 24 |
2865982890 ps |
| T1247 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3620184701 |
|
|
Jul 20 08:12:35 PM PDT 24 |
Jul 20 08:16:32 PM PDT 24 |
2392140793 ps |
| T723 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.353083915 |
|
|
Jul 20 07:54:18 PM PDT 24 |
Jul 20 08:00:37 PM PDT 24 |
3417765108 ps |
| T822 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.948243350 |
|
|
Jul 20 07:49:20 PM PDT 24 |
Jul 20 08:00:57 PM PDT 24 |
5232387480 ps |
| T1248 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2547921788 |
|
|
Jul 20 08:22:35 PM PDT 24 |
Jul 20 08:34:43 PM PDT 24 |
5114731840 ps |
| T1249 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.3360650697 |
|
|
Jul 20 08:08:10 PM PDT 24 |
Jul 20 08:13:44 PM PDT 24 |
2844708680 ps |
| T371 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.4028844098 |
|
|
Jul 20 08:12:55 PM PDT 24 |
Jul 20 08:21:17 PM PDT 24 |
4232979940 ps |
| T1250 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.4185662688 |
|
|
Jul 20 08:08:00 PM PDT 24 |
Jul 20 08:37:35 PM PDT 24 |
20584854023 ps |
| T1251 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1642126289 |
|
|
Jul 20 07:50:46 PM PDT 24 |
Jul 20 07:59:52 PM PDT 24 |
5442016896 ps |
| T1252 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.3622364800 |
|
|
Jul 20 08:05:19 PM PDT 24 |
Jul 20 08:09:19 PM PDT 24 |
2653785394 ps |
| T1253 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.4016170873 |
|
|
Jul 20 07:53:22 PM PDT 24 |
Jul 20 08:32:06 PM PDT 24 |
10876671724 ps |
| T771 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.2109802140 |
|
|
Jul 20 08:19:07 PM PDT 24 |
Jul 20 08:32:23 PM PDT 24 |
5510605784 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.1733221097 |
|
|
Jul 20 07:48:51 PM PDT 24 |
Jul 20 07:52:09 PM PDT 24 |
3234563870 ps |
| T1254 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.49004673 |
|
|
Jul 20 08:20:34 PM PDT 24 |
Jul 20 08:59:48 PM PDT 24 |
13911920114 ps |
| T836 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.719776584 |
|
|
Jul 20 08:23:10 PM PDT 24 |
Jul 20 08:34:44 PM PDT 24 |
4903999000 ps |
| T774 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.3064304537 |
|
|
Jul 20 08:21:37 PM PDT 24 |
Jul 20 08:29:06 PM PDT 24 |
4383162648 ps |
| T47 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1043468004 |
|
|
Jul 20 07:57:42 PM PDT 24 |
Jul 20 08:06:23 PM PDT 24 |
6045362414 ps |
| T357 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.3154435704 |
|
|
Jul 20 07:48:29 PM PDT 24 |
Jul 20 07:51:41 PM PDT 24 |
2944661048 ps |
| T1255 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.3696160476 |
|
|
Jul 20 08:01:16 PM PDT 24 |
Jul 20 08:04:45 PM PDT 24 |
2393312200 ps |
| T1256 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1971993392 |
|
|
Jul 20 07:49:51 PM PDT 24 |
Jul 20 08:50:26 PM PDT 24 |
18589467015 ps |
| T305 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.1987194543 |
|
|
Jul 20 07:53:06 PM PDT 24 |
Jul 20 07:56:39 PM PDT 24 |
3025866840 ps |
| T336 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.674076484 |
|
|
Jul 20 07:49:45 PM PDT 24 |
Jul 20 08:17:43 PM PDT 24 |
11815743160 ps |
| T808 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3905206271 |
|
|
Jul 20 08:20:31 PM PDT 24 |
Jul 20 08:27:34 PM PDT 24 |
3636791224 ps |
| T136 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.619245509 |
|
|
Jul 20 08:16:08 PM PDT 24 |
Jul 20 08:32:43 PM PDT 24 |
8093877830 ps |
| T1257 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.4277085245 |
|
|
Jul 20 08:18:45 PM PDT 24 |
Jul 20 08:35:11 PM PDT 24 |
5595146812 ps |
| T1258 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.1422564711 |
|
|
Jul 20 08:05:52 PM PDT 24 |
Jul 20 11:11:20 PM PDT 24 |
64400581605 ps |
| T423 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1431231000 |
|
|
Jul 20 08:02:12 PM PDT 24 |
Jul 20 08:32:37 PM PDT 24 |
23607170828 ps |
| T1259 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.1090947900 |
|
|
Jul 20 08:15:28 PM PDT 24 |
Jul 20 08:20:04 PM PDT 24 |
2878856913 ps |
| T1260 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1592562513 |
|
|
Jul 20 08:15:21 PM PDT 24 |
Jul 20 08:24:47 PM PDT 24 |
5319268632 ps |
| T1261 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.2936824104 |
|
|
Jul 20 07:56:08 PM PDT 24 |
Jul 20 08:03:37 PM PDT 24 |
4338838020 ps |
| T91 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.2587599747 |
|
|
Jul 20 08:25:55 PM PDT 24 |
Jul 20 08:32:41 PM PDT 24 |
3668285636 ps |
| T364 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.2137890131 |
|
|
Jul 20 07:54:55 PM PDT 24 |
Jul 20 08:11:59 PM PDT 24 |
6160443796 ps |
| T1262 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1040054088 |
|
|
Jul 20 07:51:54 PM PDT 24 |
Jul 20 08:59:44 PM PDT 24 |
23479572104 ps |
| T1263 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.680809350 |
|
|
Jul 20 07:52:13 PM PDT 24 |
Jul 20 08:03:56 PM PDT 24 |
4825011468 ps |
| T1264 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.1330448312 |
|
|
Jul 20 08:00:37 PM PDT 24 |
Jul 20 09:07:17 PM PDT 24 |
19054286877 ps |
| T1265 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2722327713 |
|
|
Jul 20 07:55:54 PM PDT 24 |
Jul 20 08:01:58 PM PDT 24 |
5555372460 ps |
| T1266 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.915122992 |
|
|
Jul 20 08:23:17 PM PDT 24 |
Jul 20 08:29:44 PM PDT 24 |
3832857704 ps |
| T299 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.3000822928 |
|
|
Jul 20 08:20:42 PM PDT 24 |
Jul 20 08:31:00 PM PDT 24 |
5395266434 ps |
| T1267 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.4155150973 |
|
|
Jul 20 07:54:47 PM PDT 24 |
Jul 20 08:00:24 PM PDT 24 |
3515464639 ps |
| T1268 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.188315893 |
|
|
Jul 20 07:49:29 PM PDT 24 |
Jul 20 08:08:09 PM PDT 24 |
6427500508 ps |
| T1269 |
/workspace/coverage/default/2.chip_sw_example_flash.2043879690 |
|
|
Jul 20 08:05:13 PM PDT 24 |
Jul 20 08:09:19 PM PDT 24 |
2825757520 ps |
| T133 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.1945395906 |
|
|
Jul 20 08:19:11 PM PDT 24 |
Jul 20 08:31:27 PM PDT 24 |
7661607896 ps |
| T1270 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.2897754139 |
|
|
Jul 20 08:01:22 PM PDT 24 |
Jul 20 09:19:07 PM PDT 24 |
18737557224 ps |
| T1271 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.260184999 |
|
|
Jul 20 08:14:36 PM PDT 24 |
Jul 20 08:19:08 PM PDT 24 |
3208434870 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.1429160632 |
|
|
Jul 20 07:51:08 PM PDT 24 |
Jul 20 08:29:34 PM PDT 24 |
22042174938 ps |
| T1273 |
/workspace/coverage/default/1.rom_keymgr_functest.2100113834 |
|
|
Jul 20 08:05:48 PM PDT 24 |
Jul 20 08:19:17 PM PDT 24 |
4660648550 ps |
| T348 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.3975760158 |
|
|
Jul 20 08:16:49 PM PDT 24 |
Jul 20 08:24:20 PM PDT 24 |
4575669320 ps |
| T1274 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.639603635 |
|
|
Jul 20 08:10:00 PM PDT 24 |
Jul 20 08:13:18 PM PDT 24 |
3360004502 ps |
| T1275 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2490547514 |
|
|
Jul 20 07:53:23 PM PDT 24 |
Jul 20 07:58:06 PM PDT 24 |
3846617117 ps |
| T1276 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.2308378491 |
|
|
Jul 20 08:01:39 PM PDT 24 |
Jul 20 08:06:57 PM PDT 24 |
2924660740 ps |
| T795 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2769233475 |
|
|
Jul 20 08:22:56 PM PDT 24 |
Jul 20 08:31:22 PM PDT 24 |
4407069744 ps |
| T1277 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3694631701 |
|
|
Jul 20 07:52:49 PM PDT 24 |
Jul 20 08:05:42 PM PDT 24 |
4093794200 ps |
| T1278 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.1328107587 |
|
|
Jul 20 08:15:12 PM PDT 24 |
Jul 20 08:19:08 PM PDT 24 |
3214626002 ps |
| T1279 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.2441341334 |
|
|
Jul 20 08:16:45 PM PDT 24 |
Jul 20 08:23:25 PM PDT 24 |
3822675720 ps |
| T810 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3398623795 |
|
|
Jul 20 08:21:41 PM PDT 24 |
Jul 20 08:27:07 PM PDT 24 |
3946322360 ps |
| T1280 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.2439209280 |
|
|
Jul 20 08:04:34 PM PDT 24 |
Jul 20 08:16:15 PM PDT 24 |
4857408386 ps |
| T1281 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.3217217159 |
|
|
Jul 20 07:49:31 PM PDT 24 |
Jul 20 07:58:27 PM PDT 24 |
4776295670 ps |
| T372 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.487315523 |
|
|
Jul 20 07:52:58 PM PDT 24 |
Jul 20 08:06:12 PM PDT 24 |
5768765430 ps |
| T1282 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.704334388 |
|
|
Jul 20 08:14:29 PM PDT 24 |
Jul 20 09:51:44 PM PDT 24 |
28984466090 ps |
| T1283 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.1532498950 |
|
|
Jul 20 07:50:03 PM PDT 24 |
Jul 20 07:59:37 PM PDT 24 |
5797689797 ps |
| T1284 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.2534402119 |
|
|
Jul 20 08:01:38 PM PDT 24 |
Jul 20 08:10:27 PM PDT 24 |
4584404892 ps |
| T1285 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.349730411 |
|
|
Jul 20 07:49:39 PM PDT 24 |
Jul 20 08:25:18 PM PDT 24 |
24248317160 ps |
| T1286 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1155154499 |
|
|
Jul 20 08:04:35 PM PDT 24 |
Jul 20 08:29:23 PM PDT 24 |
7731931834 ps |
| T1287 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.3888225856 |
|
|
Jul 20 07:51:19 PM PDT 24 |
Jul 20 08:08:38 PM PDT 24 |
5300094288 ps |
| T1288 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.5521912 |
|
|
Jul 20 08:21:56 PM PDT 24 |
Jul 20 08:36:17 PM PDT 24 |
12927051400 ps |
| T804 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.3390096551 |
|
|
Jul 20 08:22:00 PM PDT 24 |
Jul 20 08:33:02 PM PDT 24 |
5336282732 ps |
| T753 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.1504854233 |
|
|
Jul 20 08:06:17 PM PDT 24 |
Jul 20 08:10:07 PM PDT 24 |
2748243472 ps |
| T1289 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.1572225614 |
|
|
Jul 20 08:08:03 PM PDT 24 |
Jul 20 08:38:39 PM PDT 24 |
24417574224 ps |
| T239 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1296696427 |
|
|
Jul 20 08:12:23 PM PDT 24 |
Jul 20 08:45:04 PM PDT 24 |
11233445924 ps |
| T1290 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1614219030 |
|
|
Jul 20 08:07:49 PM PDT 24 |
Jul 20 08:16:10 PM PDT 24 |
10092468230 ps |
| T789 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.2725672110 |
|
|
Jul 20 08:23:54 PM PDT 24 |
Jul 20 08:30:05 PM PDT 24 |
3816281528 ps |
| T1291 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.1189282362 |
|
|
Jul 20 08:28:59 PM PDT 24 |
Jul 20 08:38:34 PM PDT 24 |
4493854752 ps |
| T1292 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.812447448 |
|
|
Jul 20 07:59:05 PM PDT 24 |
Jul 20 08:51:47 PM PDT 24 |
13931252993 ps |
| T1293 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.573913101 |
|
|
Jul 20 08:22:20 PM PDT 24 |
Jul 20 09:10:52 PM PDT 24 |
14913215240 ps |
| T134 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2594062628 |
|
|
Jul 20 08:00:53 PM PDT 24 |
Jul 20 08:09:22 PM PDT 24 |
4986290948 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.1074861718 |
|
|
Jul 20 07:50:14 PM PDT 24 |
Jul 20 07:56:12 PM PDT 24 |
3296843618 ps |
| T1294 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.2569793220 |
|
|
Jul 20 07:54:51 PM PDT 24 |
Jul 20 07:59:15 PM PDT 24 |
3086674405 ps |
| T1295 |
/workspace/coverage/default/3.chip_tap_straps_rma.29836385 |
|
|
Jul 20 08:15:05 PM PDT 24 |
Jul 20 08:22:03 PM PDT 24 |
5541654863 ps |
| T1296 |
/workspace/coverage/default/1.chip_sw_aes_enc.988677673 |
|
|
Jul 20 07:59:32 PM PDT 24 |
Jul 20 08:04:46 PM PDT 24 |
2499966276 ps |
| T1297 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.2539408869 |
|
|
Jul 20 08:00:48 PM PDT 24 |
Jul 20 08:15:47 PM PDT 24 |
9701822632 ps |
| T772 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.561539210 |
|
|
Jul 20 08:21:58 PM PDT 24 |
Jul 20 08:33:46 PM PDT 24 |
5329426300 ps |
| T1298 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.740475858 |
|
|
Jul 20 08:10:48 PM PDT 24 |
Jul 20 08:43:46 PM PDT 24 |
11853195756 ps |
| T766 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.2879928341 |
|
|
Jul 20 08:18:09 PM PDT 24 |
Jul 20 08:23:32 PM PDT 24 |
3410950844 ps |
| T796 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1667787655 |
|
|
Jul 20 08:24:07 PM PDT 24 |
Jul 20 08:34:06 PM PDT 24 |
4439396000 ps |
| T272 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.437758323 |
|
|
Jul 20 08:10:26 PM PDT 24 |
Jul 20 08:39:49 PM PDT 24 |
13589086960 ps |
| T831 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2917349181 |
|
|
Jul 20 08:26:31 PM PDT 24 |
Jul 20 08:31:17 PM PDT 24 |
4228431780 ps |
| T1299 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.2690770056 |
|
|
Jul 20 08:10:53 PM PDT 24 |
Jul 20 08:20:37 PM PDT 24 |
4862001800 ps |
| T1300 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2783140599 |
|
|
Jul 20 08:23:39 PM PDT 24 |
Jul 20 08:34:15 PM PDT 24 |
4527969338 ps |
| T1301 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.190172844 |
|
|
Jul 20 07:57:42 PM PDT 24 |
Jul 20 08:17:44 PM PDT 24 |
7453870800 ps |
| T806 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2840175333 |
|
|
Jul 20 08:22:08 PM PDT 24 |
Jul 20 08:28:59 PM PDT 24 |
3977701944 ps |
| T1302 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.312864790 |
|
|
Jul 20 08:05:53 PM PDT 24 |
Jul 20 08:09:33 PM PDT 24 |
3036066080 ps |
| T1303 |
/workspace/coverage/default/2.chip_sw_edn_kat.2682644977 |
|
|
Jul 20 08:11:47 PM PDT 24 |
Jul 20 08:24:30 PM PDT 24 |
3007705230 ps |
| T1304 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.175916891 |
|
|
Jul 20 08:01:19 PM PDT 24 |
Jul 20 08:49:19 PM PDT 24 |
11241949944 ps |
| T1305 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.3878545598 |
|
|
Jul 20 08:02:41 PM PDT 24 |
Jul 20 08:07:45 PM PDT 24 |
3052895735 ps |
| T1306 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.479131605 |
|
|
Jul 20 07:50:23 PM PDT 24 |
Jul 20 08:02:43 PM PDT 24 |
8091792498 ps |
| T1307 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.2250002453 |
|
|
Jul 20 07:56:53 PM PDT 24 |
Jul 20 08:01:31 PM PDT 24 |
3064638447 ps |
| T823 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.1520270293 |
|
|
Jul 20 08:18:42 PM PDT 24 |
Jul 20 08:26:25 PM PDT 24 |
3938264424 ps |
| T1308 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1904743538 |
|
|
Jul 20 08:05:15 PM PDT 24 |
Jul 20 08:33:20 PM PDT 24 |
10758611776 ps |
| T1309 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.2945967463 |
|
|
Jul 20 07:58:48 PM PDT 24 |
Jul 20 08:17:53 PM PDT 24 |
5775023160 ps |
| T1310 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3552936360 |
|
|
Jul 20 08:19:45 PM PDT 24 |
Jul 20 08:44:45 PM PDT 24 |
8206638646 ps |
| T1311 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3215733566 |
|
|
Jul 20 08:00:16 PM PDT 24 |
Jul 20 09:02:11 PM PDT 24 |
14966721528 ps |
| T1312 |
/workspace/coverage/default/0.chip_tap_straps_rma.2833239226 |
|
|
Jul 20 07:51:32 PM PDT 24 |
Jul 20 08:06:41 PM PDT 24 |
8503705505 ps |
| T714 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.101212172 |
|
|
Jul 20 08:23:09 PM PDT 24 |
Jul 20 08:34:18 PM PDT 24 |
4965535090 ps |
| T1313 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2901210933 |
|
|
Jul 20 07:47:52 PM PDT 24 |
Jul 20 07:56:35 PM PDT 24 |
4505129250 ps |
| T848 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.257731164 |
|
|
Jul 20 08:24:00 PM PDT 24 |
Jul 20 08:36:41 PM PDT 24 |
5486035552 ps |
| T306 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.1072253611 |
|
|
Jul 20 08:14:41 PM PDT 24 |
Jul 20 08:18:54 PM PDT 24 |
3018709582 ps |
| T1314 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.6409815 |
|
|
Jul 20 07:59:08 PM PDT 24 |
Jul 20 08:03:16 PM PDT 24 |
3131640587 ps |
| T1315 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3729757398 |
|
|
Jul 20 08:11:50 PM PDT 24 |
Jul 20 08:19:30 PM PDT 24 |
6497825008 ps |
| T1316 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.205173768 |
|
|
Jul 20 08:12:28 PM PDT 24 |
Jul 20 08:22:19 PM PDT 24 |
6790354390 ps |
| T1317 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.420503469 |
|
|
Jul 20 08:08:04 PM PDT 24 |
Jul 20 08:27:32 PM PDT 24 |
6547763528 ps |
| T1318 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.1104409870 |
|
|
Jul 20 08:21:26 PM PDT 24 |
Jul 20 08:26:58 PM PDT 24 |
3852290840 ps |
| T1319 |
/workspace/coverage/default/1.chip_sw_edn_kat.3694003914 |
|
|
Jul 20 07:58:28 PM PDT 24 |
Jul 20 08:06:45 PM PDT 24 |
3452494488 ps |
| T1320 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1459482460 |
|
|
Jul 20 08:01:40 PM PDT 24 |
Jul 20 08:11:51 PM PDT 24 |
3894431884 ps |
| T1321 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.392794743 |
|
|
Jul 20 07:54:36 PM PDT 24 |
Jul 20 08:16:40 PM PDT 24 |
9146543554 ps |
| T1322 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.180218439 |
|
|
Jul 20 08:02:03 PM PDT 24 |
Jul 20 08:36:52 PM PDT 24 |
9928139452 ps |
| T1323 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.3716448906 |
|
|
Jul 20 08:19:58 PM PDT 24 |
Jul 20 09:22:14 PM PDT 24 |
15791434385 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.391065861 |
|
|
Jul 20 07:50:09 PM PDT 24 |
Jul 20 07:54:49 PM PDT 24 |
3501586260 ps |
| T263 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.1678618248 |
|
|
Jul 20 08:03:12 PM PDT 24 |
Jul 20 08:08:05 PM PDT 24 |
3142523758 ps |
| T1324 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.1800211725 |
|
|
Jul 20 08:07:36 PM PDT 24 |
Jul 21 12:04:17 AM PDT 24 |
77809339256 ps |
| T1325 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2958905950 |
|
|
Jul 20 07:53:01 PM PDT 24 |
Jul 20 07:57:52 PM PDT 24 |
3422945836 ps |
| T762 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.2454036173 |
|
|
Jul 20 08:25:21 PM PDT 24 |
Jul 20 08:31:54 PM PDT 24 |
3561113764 ps |
| T1326 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.2126763767 |
|
|
Jul 20 07:59:58 PM PDT 24 |
Jul 20 09:06:15 PM PDT 24 |
14128753107 ps |
| T361 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.724782210 |
|
|
Jul 20 07:58:18 PM PDT 24 |
Jul 20 08:11:01 PM PDT 24 |
4478726445 ps |
| T1327 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.130275679 |
|
|
Jul 20 07:59:34 PM PDT 24 |
Jul 20 08:06:23 PM PDT 24 |
3386830528 ps |
| T1328 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.1269287577 |
|
|
Jul 20 08:00:15 PM PDT 24 |
Jul 20 08:04:08 PM PDT 24 |
2516312644 ps |
| T1329 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2792835593 |
|
|
Jul 20 07:57:35 PM PDT 24 |
Jul 20 08:11:07 PM PDT 24 |
7441712130 ps |
| T424 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.2919669207 |
|
|
Jul 20 08:02:32 PM PDT 24 |
Jul 20 08:36:01 PM PDT 24 |
22414814732 ps |
| T801 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2488046342 |
|
|
Jul 20 08:24:40 PM PDT 24 |
Jul 20 08:33:07 PM PDT 24 |
4180285806 ps |
| T1330 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.3022749610 |
|
|
Jul 20 08:15:55 PM PDT 24 |
Jul 20 08:19:44 PM PDT 24 |
3278364949 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_gpio.2593509025 |
|
|
Jul 20 07:58:21 PM PDT 24 |
Jul 20 08:07:37 PM PDT 24 |
4294320074 ps |
| T1331 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3522228691 |
|
|
Jul 20 08:09:39 PM PDT 24 |
Jul 20 08:14:12 PM PDT 24 |
2525439288 ps |
| T1332 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2349518760 |
|
|
Jul 20 08:01:03 PM PDT 24 |
Jul 20 09:04:52 PM PDT 24 |
11423161454 ps |
| T1333 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.3449351202 |
|
|
Jul 20 07:57:24 PM PDT 24 |
Jul 20 08:04:39 PM PDT 24 |
3869438904 ps |
| T543 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2751364001 |
|
|
Jul 20 07:58:14 PM PDT 24 |
Jul 20 08:11:27 PM PDT 24 |
5408602600 ps |
| T1334 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2427869122 |
|
|
Jul 20 08:17:07 PM PDT 24 |
Jul 20 08:37:59 PM PDT 24 |
10604799860 ps |
| T544 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3053869035 |
|
|
Jul 20 08:04:29 PM PDT 24 |
Jul 20 08:14:57 PM PDT 24 |
4800190853 ps |
| T1335 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.2496652784 |
|
|
Jul 20 08:00:06 PM PDT 24 |
Jul 20 08:05:55 PM PDT 24 |
3039121368 ps |
| T1336 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.439343643 |
|
|
Jul 20 08:18:21 PM PDT 24 |
Jul 20 08:52:40 PM PDT 24 |
13346669406 ps |
| T767 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.2729227796 |
|
|
Jul 20 08:24:40 PM PDT 24 |
Jul 20 08:35:35 PM PDT 24 |
5647920000 ps |
| T805 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.3106724419 |
|
|
Jul 20 08:24:30 PM PDT 24 |
Jul 20 08:34:19 PM PDT 24 |
4571094892 ps |
| T1337 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.1768372113 |
|
|
Jul 20 08:18:06 PM PDT 24 |
Jul 20 09:30:51 PM PDT 24 |
21634515808 ps |
| T1338 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1300809144 |
|
|
Jul 20 07:58:43 PM PDT 24 |
Jul 20 09:08:37 PM PDT 24 |
14640798392 ps |
| T1339 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1285311200 |
|
|
Jul 20 08:20:19 PM PDT 24 |
Jul 20 09:01:21 PM PDT 24 |
13679565160 ps |
| T1340 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.3079593619 |
|
|
Jul 20 07:57:55 PM PDT 24 |
Jul 20 08:06:31 PM PDT 24 |
5428613994 ps |
| T404 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2602754457 |
|
|
Jul 20 08:07:55 PM PDT 24 |
Jul 20 08:25:17 PM PDT 24 |
5797311556 ps |
| T1341 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1463852694 |
|
|
Jul 20 08:22:05 PM PDT 24 |
Jul 20 08:29:00 PM PDT 24 |
4422085800 ps |
| T273 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2839651923 |
|
|
Jul 20 07:50:43 PM PDT 24 |
Jul 20 08:15:11 PM PDT 24 |
12445338440 ps |
| T307 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.1911847698 |
|
|
Jul 20 07:51:52 PM PDT 24 |
Jul 20 07:56:13 PM PDT 24 |
2937427868 ps |
| T1342 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.127401897 |
|
|
Jul 20 08:06:07 PM PDT 24 |
Jul 20 08:11:37 PM PDT 24 |
3335503896 ps |
| T240 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2216874437 |
|
|
Jul 20 07:59:43 PM PDT 24 |
Jul 20 08:42:20 PM PDT 24 |
12294062804 ps |
| T792 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.444825272 |
|
|
Jul 20 08:18:27 PM PDT 24 |
Jul 20 08:28:44 PM PDT 24 |
4734100840 ps |
| T1343 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1099465329 |
|
|
Jul 20 07:55:34 PM PDT 24 |
Jul 20 08:25:59 PM PDT 24 |
8086271816 ps |
| T833 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.3010698122 |
|
|
Jul 20 08:19:02 PM PDT 24 |
Jul 20 08:30:28 PM PDT 24 |
5379504484 ps |
| T773 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.1127374091 |
|
|
Jul 20 08:22:26 PM PDT 24 |
Jul 20 08:33:38 PM PDT 24 |
5794174832 ps |
| T347 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.4131641651 |
|
|
Jul 20 08:08:01 PM PDT 24 |
Jul 20 08:18:27 PM PDT 24 |
4368641444 ps |
| T1344 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3377873322 |
|
|
Jul 20 08:25:48 PM PDT 24 |
Jul 20 08:36:22 PM PDT 24 |
5563909584 ps |
| T548 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1712698067 |
|
|
Jul 20 07:51:24 PM PDT 24 |
Jul 20 08:00:19 PM PDT 24 |
5193453923 ps |
| T1345 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.3204854258 |
|
|
Jul 20 08:06:43 PM PDT 24 |
Jul 20 08:23:58 PM PDT 24 |
5736403428 ps |
| T745 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.4198365705 |
|
|
Jul 20 07:51:11 PM PDT 24 |
Jul 20 08:04:22 PM PDT 24 |
4721169000 ps |
| T1346 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.1621132125 |
|
|
Jul 20 07:55:51 PM PDT 24 |
Jul 20 08:07:34 PM PDT 24 |
5415482664 ps |
| T24 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.3249765418 |
|
|
Jul 20 08:06:06 PM PDT 24 |
Jul 20 08:11:55 PM PDT 24 |
3400011106 ps |
| T1347 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.1159065708 |
|
|
Jul 20 07:53:20 PM PDT 24 |
Jul 20 07:57:02 PM PDT 24 |
2558123893 ps |
| T1348 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.3223314410 |
|
|
Jul 20 08:08:54 PM PDT 24 |
Jul 20 08:11:18 PM PDT 24 |
3058504330 ps |
| T1349 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3929130307 |
|
|
Jul 20 08:16:49 PM PDT 24 |
Jul 20 08:25:42 PM PDT 24 |
4115040960 ps |
| T1350 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.3653305697 |
|
|
Jul 20 08:12:35 PM PDT 24 |
Jul 20 08:39:04 PM PDT 24 |
21067025951 ps |
| T1351 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.3469667903 |
|
|
Jul 20 08:09:59 PM PDT 24 |
Jul 20 08:15:18 PM PDT 24 |
3526397927 ps |
| T1352 |
/workspace/coverage/default/1.chip_sw_flash_init.2540644962 |
|
|
Jul 20 07:55:45 PM PDT 24 |
Jul 20 08:33:58 PM PDT 24 |
17726620720 ps |
| T1353 |
/workspace/coverage/default/2.chip_sival_flash_info_access.3181076455 |
|
|
Jul 20 08:06:14 PM PDT 24 |
Jul 20 08:12:43 PM PDT 24 |
3583024364 ps |
| T1354 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2483180709 |
|
|
Jul 20 08:20:19 PM PDT 24 |
Jul 20 08:47:24 PM PDT 24 |
8159086400 ps |
| T1355 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.1384737926 |
|
|
Jul 20 08:21:22 PM PDT 24 |
Jul 20 08:31:11 PM PDT 24 |
5782441754 ps |
| T815 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3899920332 |
|
|
Jul 20 08:23:57 PM PDT 24 |
Jul 20 08:29:52 PM PDT 24 |
4167048698 ps |
| T1356 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.4072982257 |
|
|
Jul 20 08:12:33 PM PDT 24 |
Jul 20 08:21:20 PM PDT 24 |
5659271100 ps |
| T1357 |
/workspace/coverage/default/2.chip_tap_straps_prod.3847294169 |
|
|
Jul 20 08:13:44 PM PDT 24 |
Jul 20 08:16:13 PM PDT 24 |
1985334506 ps |
| T213 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.2670435398 |
|
|
Jul 20 08:07:46 PM PDT 24 |
Jul 20 08:19:21 PM PDT 24 |
5351649624 ps |
| T1358 |
/workspace/coverage/default/0.chip_sw_hmac_enc.910132930 |
|
|
Jul 20 07:52:59 PM PDT 24 |
Jul 20 07:59:07 PM PDT 24 |
2949984864 ps |
| T1359 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.3830222375 |
|
|
Jul 20 07:51:12 PM PDT 24 |
Jul 20 07:57:05 PM PDT 24 |
3026890936 ps |
| T1360 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.3733409567 |
|
|
Jul 20 07:48:34 PM PDT 24 |
Jul 20 08:03:23 PM PDT 24 |
5986390180 ps |
| T790 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3476078258 |
|
|
Jul 20 08:16:24 PM PDT 24 |
Jul 20 08:24:09 PM PDT 24 |
4262545580 ps |
| T1361 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.490073979 |
|
|
Jul 20 08:01:23 PM PDT 24 |
Jul 20 08:05:20 PM PDT 24 |
3086069384 ps |
| T1362 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.897961315 |
|
|
Jul 20 08:04:17 PM PDT 24 |
Jul 20 08:12:29 PM PDT 24 |
3494688320 ps |
| T1363 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.2275154623 |
|
|
Jul 20 07:57:21 PM PDT 24 |
Jul 20 08:20:01 PM PDT 24 |
6144948421 ps |
| T837 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.1490952368 |
|
|
Jul 20 08:27:04 PM PDT 24 |
Jul 20 08:36:25 PM PDT 24 |
3967448134 ps |
| T1364 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.97748348 |
|
|
Jul 20 07:50:23 PM PDT 24 |
Jul 20 08:01:15 PM PDT 24 |
5350365560 ps |
| T300 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.1326916209 |
|
|
Jul 20 08:22:17 PM PDT 24 |
Jul 20 08:32:58 PM PDT 24 |
5513787792 ps |
| T168 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.2392227336 |
|
|
Jul 20 08:09:07 PM PDT 24 |
Jul 20 08:10:54 PM PDT 24 |
2197164397 ps |
| T1365 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2020342479 |
|
|
Jul 20 08:00:45 PM PDT 24 |
Jul 20 11:12:00 PM PDT 24 |
255479714002 ps |
| T849 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.1579531430 |
|
|
Jul 20 08:17:06 PM PDT 24 |
Jul 20 08:23:50 PM PDT 24 |
3836671056 ps |
| T1366 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.710874977 |
|
|
Jul 20 07:54:24 PM PDT 24 |
Jul 20 08:02:26 PM PDT 24 |
5506345460 ps |
| T1367 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.6246501 |
|
|
Jul 20 08:24:55 PM PDT 24 |
Jul 20 08:32:15 PM PDT 24 |
5135406860 ps |
| T1368 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1585993054 |
|
|
Jul 20 08:11:33 PM PDT 24 |
Jul 20 08:30:27 PM PDT 24 |
11053648138 ps |
| T1369 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.1139800411 |
|
|
Jul 20 08:05:18 PM PDT 24 |
Jul 20 08:08:31 PM PDT 24 |
2800073848 ps |
| T834 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.922951640 |
|
|
Jul 20 08:25:28 PM PDT 24 |
Jul 20 08:30:47 PM PDT 24 |
3282433290 ps |
| T11 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1835772670 |
|
|
Jul 20 07:55:05 PM PDT 24 |
Jul 20 08:16:48 PM PDT 24 |
13120234602 ps |
| T1370 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.1666598010 |
|
|
Jul 20 08:11:37 PM PDT 24 |
Jul 20 08:40:38 PM PDT 24 |
9669233002 ps |
| T811 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2122205763 |
|
|
Jul 20 08:19:57 PM PDT 24 |
Jul 20 08:30:03 PM PDT 24 |
5317100720 ps |
| T1371 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3852741512 |
|
|
Jul 20 07:50:47 PM PDT 24 |
Jul 20 08:10:11 PM PDT 24 |
7535547843 ps |
| T752 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.2708530423 |
|
|
Jul 20 07:55:02 PM PDT 24 |
Jul 20 07:58:43 PM PDT 24 |
2766385800 ps |
| T343 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2792066706 |
|
|
Jul 20 08:00:51 PM PDT 24 |
Jul 20 08:15:00 PM PDT 24 |
4594575176 ps |
| T1372 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.2854284955 |
|
|
Jul 20 07:58:26 PM PDT 24 |
Jul 20 09:47:04 PM PDT 24 |
23438770176 ps |
| T838 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3745656405 |
|
|
Jul 20 08:22:51 PM PDT 24 |
Jul 20 08:29:13 PM PDT 24 |
3547233816 ps |
| T1373 |
/workspace/coverage/default/1.chip_sw_aes_idle.2853952489 |
|
|
Jul 20 08:01:25 PM PDT 24 |
Jul 20 08:05:20 PM PDT 24 |
2676443996 ps |
| T1374 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3322610703 |
|
|
Jul 20 08:10:06 PM PDT 24 |
Jul 20 08:21:24 PM PDT 24 |
19315819004 ps |
| T1375 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2851525563 |
|
|
Jul 20 07:51:09 PM PDT 24 |
Jul 20 08:27:15 PM PDT 24 |
12694837365 ps |
| T1376 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.423952755 |
|
|
Jul 20 08:06:08 PM PDT 24 |
Jul 20 08:13:22 PM PDT 24 |
4631353882 ps |
| T1377 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3975034240 |
|
|
Jul 20 07:54:06 PM PDT 24 |
Jul 20 08:01:46 PM PDT 24 |
6926907492 ps |
| T425 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.3962336531 |
|
|
Jul 20 08:02:27 PM PDT 24 |
Jul 20 08:08:51 PM PDT 24 |
4042416250 ps |
| T1378 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.4023562492 |
|
|
Jul 20 08:11:17 PM PDT 24 |
Jul 20 08:23:46 PM PDT 24 |
6491925185 ps |
| T1379 |
/workspace/coverage/default/1.chip_sw_aes_entropy.3269240725 |
|
|
Jul 20 07:59:00 PM PDT 24 |
Jul 20 08:02:51 PM PDT 24 |
2144851456 ps |
| T1380 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.3950900378 |
|
|
Jul 20 08:26:11 PM PDT 24 |
Jul 20 08:32:36 PM PDT 24 |
3916205144 ps |
| T1381 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.932136873 |
|
|
Jul 20 08:18:29 PM PDT 24 |
Jul 20 08:40:41 PM PDT 24 |
8454062210 ps |
| T1382 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.877704071 |
|
|
Jul 20 08:10:39 PM PDT 24 |
Jul 20 08:30:02 PM PDT 24 |
11775927904 ps |
| T1383 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.3072958865 |
|
|
Jul 20 07:59:25 PM PDT 24 |
Jul 20 08:03:41 PM PDT 24 |
2668012825 ps |
| T1384 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.3882108614 |
|
|
Jul 20 08:24:53 PM PDT 24 |
Jul 20 08:33:48 PM PDT 24 |
4337749330 ps |
| T381 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3955078028 |
|
|
Jul 20 08:13:15 PM PDT 24 |
Jul 20 08:24:25 PM PDT 24 |
6179079774 ps |
| T1385 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3210359178 |
|
|
Jul 20 08:16:57 PM PDT 24 |
Jul 20 08:34:43 PM PDT 24 |
8391349219 ps |
| T1386 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.3021346348 |
|
|
Jul 20 08:26:29 PM PDT 24 |
Jul 20 08:32:21 PM PDT 24 |
3288124392 ps |
| T341 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.1168410001 |
|
|
Jul 20 07:52:39 PM PDT 24 |
Jul 20 08:15:58 PM PDT 24 |
5699768006 ps |
| T1387 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.1511605494 |
|
|
Jul 20 08:07:22 PM PDT 24 |
Jul 20 08:18:02 PM PDT 24 |
4387479360 ps |
| T1388 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3301333734 |
|
|
Jul 20 08:07:25 PM PDT 24 |
Jul 20 09:40:31 PM PDT 24 |
50313103082 ps |
| T1389 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.2639635598 |
|
|
Jul 20 07:50:41 PM PDT 24 |
Jul 20 08:13:37 PM PDT 24 |
7438294825 ps |
| T1390 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.306626568 |
|
|
Jul 20 07:56:02 PM PDT 24 |
Jul 20 08:03:58 PM PDT 24 |
7960530662 ps |
| T1391 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.3639560181 |
|
|
Jul 20 07:50:30 PM PDT 24 |
Jul 20 08:01:30 PM PDT 24 |
5662751936 ps |
| T724 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.179180358 |
|
|
Jul 20 08:09:59 PM PDT 24 |
Jul 20 08:14:57 PM PDT 24 |
3052710840 ps |
| T1392 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3720547836 |
|
|
Jul 20 08:08:12 PM PDT 24 |
Jul 20 08:10:24 PM PDT 24 |
2687096867 ps |
| T775 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.869446121 |
|
|
Jul 20 08:23:04 PM PDT 24 |
Jul 20 08:33:28 PM PDT 24 |
4048282296 ps |
| T1393 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.264918647 |
|
|
Jul 20 07:58:04 PM PDT 24 |
Jul 20 08:06:58 PM PDT 24 |
4060253242 ps |
| T828 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.54787741 |
|
|
Jul 20 08:23:33 PM PDT 24 |
Jul 20 08:34:23 PM PDT 24 |
4889847048 ps |
| T1394 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1392073947 |
|
|
Jul 20 08:01:23 PM PDT 24 |
Jul 20 08:33:00 PM PDT 24 |
25613010256 ps |