| T26 |
/workspace/coverage/default/1.chip_sw_gpio.913740958 |
|
|
Jul 25 08:04:07 PM PDT 24 |
Jul 25 08:12:20 PM PDT 24 |
4492603292 ps |
| T233 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3528135645 |
|
|
Jul 25 08:28:29 PM PDT 24 |
Jul 25 08:37:12 PM PDT 24 |
3471632624 ps |
| T116 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.833321577 |
|
|
Jul 25 08:11:42 PM PDT 24 |
Jul 25 09:03:21 PM PDT 24 |
19398889190 ps |
| T184 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2630440522 |
|
|
Jul 25 08:00:46 PM PDT 24 |
Jul 25 08:03:18 PM PDT 24 |
2469204249 ps |
| T175 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.2912234288 |
|
|
Jul 25 08:12:41 PM PDT 24 |
Jul 25 08:22:18 PM PDT 24 |
5352689184 ps |
| T924 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1622656816 |
|
|
Jul 25 08:05:15 PM PDT 24 |
Jul 25 08:13:14 PM PDT 24 |
4866147577 ps |
| T925 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.1543589759 |
|
|
Jul 25 08:28:23 PM PDT 24 |
Jul 25 08:38:38 PM PDT 24 |
3710138936 ps |
| T926 |
/workspace/coverage/default/1.rom_keymgr_functest.639139655 |
|
|
Jul 25 08:15:42 PM PDT 24 |
Jul 25 08:23:25 PM PDT 24 |
4889255176 ps |
| T927 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.832213933 |
|
|
Jul 25 07:59:43 PM PDT 24 |
Jul 25 08:16:25 PM PDT 24 |
5729592445 ps |
| T928 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3220126812 |
|
|
Jul 25 08:18:31 PM PDT 24 |
Jul 25 08:52:54 PM PDT 24 |
29740413725 ps |
| T929 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.1612444888 |
|
|
Jul 25 08:01:58 PM PDT 24 |
Jul 25 08:07:23 PM PDT 24 |
2868152218 ps |
| T930 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.1640221248 |
|
|
Jul 25 08:18:25 PM PDT 24 |
Jul 25 08:27:51 PM PDT 24 |
5324827456 ps |
| T931 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.4075467642 |
|
|
Jul 25 08:29:37 PM PDT 24 |
Jul 25 09:16:29 PM PDT 24 |
14167025000 ps |
| T932 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2811861608 |
|
|
Jul 25 08:01:21 PM PDT 24 |
Jul 25 08:19:01 PM PDT 24 |
7918409848 ps |
| T243 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.2243984879 |
|
|
Jul 25 08:18:46 PM PDT 24 |
Jul 25 09:43:28 PM PDT 24 |
48056118218 ps |
| T317 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.45879402 |
|
|
Jul 25 08:34:09 PM PDT 24 |
Jul 25 08:47:54 PM PDT 24 |
4985078128 ps |
| T89 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.2364524117 |
|
|
Jul 25 08:07:54 PM PDT 24 |
Jul 25 08:12:53 PM PDT 24 |
3232439956 ps |
| T64 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.2718956164 |
|
|
Jul 25 08:23:49 PM PDT 24 |
Jul 25 08:48:06 PM PDT 24 |
22288056824 ps |
| T273 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1772012094 |
|
|
Jul 25 08:01:24 PM PDT 24 |
Jul 25 08:04:46 PM PDT 24 |
3576220947 ps |
| T407 |
/workspace/coverage/default/1.chip_tap_straps_prod.1672884191 |
|
|
Jul 25 08:11:53 PM PDT 24 |
Jul 25 08:14:26 PM PDT 24 |
2691132559 ps |
| T408 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1065709290 |
|
|
Jul 25 08:26:11 PM PDT 24 |
Jul 25 08:32:30 PM PDT 24 |
2381771364 ps |
| T409 |
/workspace/coverage/default/4.chip_tap_straps_prod.1707394333 |
|
|
Jul 25 08:26:49 PM PDT 24 |
Jul 25 08:43:46 PM PDT 24 |
11553433697 ps |
| T410 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.302313938 |
|
|
Jul 25 08:28:16 PM PDT 24 |
Jul 25 08:34:46 PM PDT 24 |
4067174102 ps |
| T411 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.1321061894 |
|
|
Jul 25 08:04:06 PM PDT 24 |
Jul 25 08:51:40 PM PDT 24 |
31085848428 ps |
| T412 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.3359428468 |
|
|
Jul 25 08:21:55 PM PDT 24 |
Jul 25 08:29:06 PM PDT 24 |
3811467454 ps |
| T413 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.1615249026 |
|
|
Jul 25 08:07:57 PM PDT 24 |
Jul 25 08:14:30 PM PDT 24 |
3741128074 ps |
| T414 |
/workspace/coverage/default/2.chip_sw_example_flash.4132564599 |
|
|
Jul 25 08:16:31 PM PDT 24 |
Jul 25 08:21:11 PM PDT 24 |
2894603784 ps |
| T147 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.4023091823 |
|
|
Jul 25 08:11:38 PM PDT 24 |
Jul 25 08:19:43 PM PDT 24 |
6046679856 ps |
| T800 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1933620005 |
|
|
Jul 25 08:36:43 PM PDT 24 |
Jul 25 08:43:29 PM PDT 24 |
4393775600 ps |
| T134 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1340237332 |
|
|
Jul 25 08:03:13 PM PDT 24 |
Jul 25 08:10:36 PM PDT 24 |
5294113812 ps |
| T933 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.2671085424 |
|
|
Jul 25 08:25:13 PM PDT 24 |
Jul 25 08:33:22 PM PDT 24 |
4703193640 ps |
| T934 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.3220362433 |
|
|
Jul 25 08:24:22 PM PDT 24 |
Jul 25 08:29:19 PM PDT 24 |
3682379902 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.2692298305 |
|
|
Jul 25 08:25:07 PM PDT 24 |
Jul 25 08:37:49 PM PDT 24 |
4469180116 ps |
| T155 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4070443605 |
|
|
Jul 25 08:24:11 PM PDT 24 |
Jul 25 09:32:06 PM PDT 24 |
24709764937 ps |
| T736 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.1309420591 |
|
|
Jul 25 08:37:07 PM PDT 24 |
Jul 25 08:42:54 PM PDT 24 |
4296399928 ps |
| T733 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.2370952426 |
|
|
Jul 25 08:36:34 PM PDT 24 |
Jul 25 08:48:39 PM PDT 24 |
4707266092 ps |
| T936 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.1918585074 |
|
|
Jul 25 08:28:36 PM PDT 24 |
Jul 25 08:36:14 PM PDT 24 |
5110535310 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1301511834 |
|
|
Jul 25 08:04:17 PM PDT 24 |
Jul 25 08:09:57 PM PDT 24 |
3086353915 ps |
| T937 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.1892214459 |
|
|
Jul 25 08:06:09 PM PDT 24 |
Jul 25 09:13:12 PM PDT 24 |
13409230740 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.2077466399 |
|
|
Jul 25 08:05:49 PM PDT 24 |
Jul 25 08:15:08 PM PDT 24 |
5335817646 ps |
| T146 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.4255307055 |
|
|
Jul 25 08:25:03 PM PDT 24 |
Jul 25 09:32:16 PM PDT 24 |
27112151795 ps |
| T767 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.318137 |
|
|
Jul 25 08:34:34 PM PDT 24 |
Jul 25 08:42:03 PM PDT 24 |
5429258264 ps |
| T671 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.1262984220 |
|
|
Jul 25 08:11:05 PM PDT 24 |
Jul 25 08:15:23 PM PDT 24 |
2294664854 ps |
| T938 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1898522660 |
|
|
Jul 25 08:02:34 PM PDT 24 |
Jul 25 08:13:20 PM PDT 24 |
4358195520 ps |
| T939 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.3011216668 |
|
|
Jul 25 08:29:32 PM PDT 24 |
Jul 25 09:28:22 PM PDT 24 |
18079555376 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2487914130 |
|
|
Jul 25 08:00:41 PM PDT 24 |
Jul 25 08:11:38 PM PDT 24 |
6626073998 ps |
| T238 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1615437303 |
|
|
Jul 25 08:08:51 PM PDT 24 |
Jul 25 08:32:47 PM PDT 24 |
8091917978 ps |
| T940 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.3982675423 |
|
|
Jul 25 08:02:59 PM PDT 24 |
Jul 25 08:07:02 PM PDT 24 |
2446457472 ps |
| T785 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1652174255 |
|
|
Jul 25 08:34:25 PM PDT 24 |
Jul 25 08:41:58 PM PDT 24 |
3635826308 ps |
| T212 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.3659165086 |
|
|
Jul 25 08:04:43 PM PDT 24 |
Jul 26 12:05:09 AM PDT 24 |
78212814537 ps |
| T685 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.2129630794 |
|
|
Jul 25 08:30:44 PM PDT 24 |
Jul 25 08:37:57 PM PDT 24 |
4550867768 ps |
| T302 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.611203187 |
|
|
Jul 25 08:04:24 PM PDT 24 |
Jul 25 08:09:32 PM PDT 24 |
3148741224 ps |
| T353 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.564421613 |
|
|
Jul 25 08:07:48 PM PDT 24 |
Jul 25 08:13:36 PM PDT 24 |
3501636296 ps |
| T135 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.781532323 |
|
|
Jul 25 08:01:51 PM PDT 24 |
Jul 25 08:12:32 PM PDT 24 |
5525361730 ps |
| T284 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.4199320772 |
|
|
Jul 25 08:30:06 PM PDT 24 |
Jul 25 08:41:31 PM PDT 24 |
5954002796 ps |
| T941 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.1192200204 |
|
|
Jul 25 08:03:14 PM PDT 24 |
Jul 25 08:09:04 PM PDT 24 |
3735319192 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.4136163458 |
|
|
Jul 25 08:01:26 PM PDT 24 |
Jul 25 08:07:53 PM PDT 24 |
3349567208 ps |
| T942 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.2836913048 |
|
|
Jul 25 08:20:28 PM PDT 24 |
Jul 25 08:24:23 PM PDT 24 |
2735169112 ps |
| T141 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1113876680 |
|
|
Jul 25 08:13:07 PM PDT 24 |
Jul 25 08:23:55 PM PDT 24 |
7126700280 ps |
| T943 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2487510551 |
|
|
Jul 25 08:02:58 PM PDT 24 |
Jul 25 08:08:06 PM PDT 24 |
3362418452 ps |
| T944 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.2232804941 |
|
|
Jul 25 08:06:39 PM PDT 24 |
Jul 25 08:11:42 PM PDT 24 |
2888633910 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.2588936018 |
|
|
Jul 25 08:00:20 PM PDT 24 |
Jul 25 09:39:22 PM PDT 24 |
26558653508 ps |
| T188 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3464198587 |
|
|
Jul 25 08:20:28 PM PDT 24 |
Jul 25 08:31:40 PM PDT 24 |
7069678138 ps |
| T741 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.3303973346 |
|
|
Jul 25 08:30:32 PM PDT 24 |
Jul 25 08:36:11 PM PDT 24 |
3750747712 ps |
| T946 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.523154701 |
|
|
Jul 25 08:30:21 PM PDT 24 |
Jul 25 08:40:49 PM PDT 24 |
4796548136 ps |
| T215 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.3611860640 |
|
|
Jul 25 08:07:39 PM PDT 24 |
Jul 25 08:13:07 PM PDT 24 |
2906874558 ps |
| T947 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.2122292303 |
|
|
Jul 25 08:10:15 PM PDT 24 |
Jul 25 09:19:43 PM PDT 24 |
18987654089 ps |
| T247 |
/workspace/coverage/default/2.chip_sw_flash_init.3920598116 |
|
|
Jul 25 08:17:16 PM PDT 24 |
Jul 25 08:49:09 PM PDT 24 |
22144818070 ps |
| T323 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.3335173602 |
|
|
Jul 25 08:19:05 PM PDT 24 |
Jul 25 08:32:10 PM PDT 24 |
5596329036 ps |
| T948 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3266385370 |
|
|
Jul 25 08:20:55 PM PDT 24 |
Jul 25 08:27:55 PM PDT 24 |
4315527196 ps |
| T651 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.2822578151 |
|
|
Jul 25 08:00:49 PM PDT 24 |
Jul 25 08:04:03 PM PDT 24 |
3314396252 ps |
| T349 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.663747725 |
|
|
Jul 25 08:29:52 PM PDT 24 |
Jul 25 08:52:07 PM PDT 24 |
8359759326 ps |
| T216 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.1334669597 |
|
|
Jul 25 08:02:55 PM PDT 24 |
Jul 25 08:15:17 PM PDT 24 |
4945018711 ps |
| T949 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.364865068 |
|
|
Jul 25 08:01:10 PM PDT 24 |
Jul 25 08:22:43 PM PDT 24 |
5532989832 ps |
| T189 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.2450441479 |
|
|
Jul 25 08:04:01 PM PDT 24 |
Jul 25 08:14:58 PM PDT 24 |
6986045038 ps |
| T950 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2561099846 |
|
|
Jul 25 08:21:34 PM PDT 24 |
Jul 25 08:46:07 PM PDT 24 |
7859293348 ps |
| T745 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.3584919873 |
|
|
Jul 25 08:32:09 PM PDT 24 |
Jul 25 08:43:05 PM PDT 24 |
5080398422 ps |
| T728 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3823073845 |
|
|
Jul 25 08:30:13 PM PDT 24 |
Jul 25 08:36:30 PM PDT 24 |
3979519944 ps |
| T648 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.1306500999 |
|
|
Jul 25 08:04:15 PM PDT 24 |
Jul 25 08:15:49 PM PDT 24 |
5072462720 ps |
| T43 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.1792145818 |
|
|
Jul 25 08:07:14 PM PDT 24 |
Jul 25 08:14:33 PM PDT 24 |
3827972410 ps |
| T951 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3951499661 |
|
|
Jul 25 08:02:58 PM PDT 24 |
Jul 25 08:07:07 PM PDT 24 |
3257875698 ps |
| T952 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.125246836 |
|
|
Jul 25 08:17:55 PM PDT 24 |
Jul 25 08:21:52 PM PDT 24 |
2666140664 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1222649045 |
|
|
Jul 25 08:23:15 PM PDT 24 |
Jul 25 08:33:18 PM PDT 24 |
4451275590 ps |
| T244 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.2173588369 |
|
|
Jul 25 08:00:16 PM PDT 24 |
Jul 25 09:32:36 PM PDT 24 |
48782865037 ps |
| T807 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3235843817 |
|
|
Jul 25 08:33:54 PM PDT 24 |
Jul 25 08:48:39 PM PDT 24 |
5141826612 ps |
| T318 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2669129539 |
|
|
Jul 25 08:02:46 PM PDT 24 |
Jul 25 08:21:27 PM PDT 24 |
5764264600 ps |
| T954 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3027146143 |
|
|
Jul 25 08:23:43 PM PDT 24 |
Jul 25 08:33:43 PM PDT 24 |
4254865392 ps |
| T955 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.894597210 |
|
|
Jul 25 08:09:23 PM PDT 24 |
Jul 25 09:10:56 PM PDT 24 |
14775303670 ps |
| T176 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.3062154859 |
|
|
Jul 25 08:02:43 PM PDT 24 |
Jul 25 08:14:53 PM PDT 24 |
6127726680 ps |
| T27 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.3958234846 |
|
|
Jul 25 08:32:29 PM PDT 24 |
Jul 25 08:36:19 PM PDT 24 |
3272772083 ps |
| T956 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.1034595740 |
|
|
Jul 25 08:32:39 PM PDT 24 |
Jul 25 08:43:38 PM PDT 24 |
5430765156 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.257106847 |
|
|
Jul 25 08:05:13 PM PDT 24 |
Jul 25 08:15:09 PM PDT 24 |
4628171968 ps |
| T704 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.4211467037 |
|
|
Jul 25 08:19:47 PM PDT 24 |
Jul 25 08:33:03 PM PDT 24 |
4724713330 ps |
| T758 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.1858454029 |
|
|
Jul 25 08:36:28 PM PDT 24 |
Jul 25 08:46:32 PM PDT 24 |
4271215180 ps |
| T740 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.3963341193 |
|
|
Jul 25 08:31:51 PM PDT 24 |
Jul 25 08:40:13 PM PDT 24 |
3981526180 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2527163099 |
|
|
Jul 25 08:04:40 PM PDT 24 |
Jul 25 08:15:20 PM PDT 24 |
3973523656 ps |
| T957 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1058719140 |
|
|
Jul 25 08:23:20 PM PDT 24 |
Jul 25 08:35:21 PM PDT 24 |
4101448664 ps |
| T22 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.1983914944 |
|
|
Jul 25 08:18:46 PM PDT 24 |
Jul 25 09:11:30 PM PDT 24 |
20730621200 ps |
| T327 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.618680408 |
|
|
Jul 25 08:00:52 PM PDT 24 |
Jul 25 08:12:17 PM PDT 24 |
5496241864 ps |
| T958 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.1797482449 |
|
|
Jul 25 08:18:59 PM PDT 24 |
Jul 25 08:26:26 PM PDT 24 |
3951993372 ps |
| T959 |
/workspace/coverage/default/0.chip_sw_kmac_idle.577315845 |
|
|
Jul 25 08:00:25 PM PDT 24 |
Jul 25 08:04:07 PM PDT 24 |
2228945474 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.1033563199 |
|
|
Jul 25 08:01:25 PM PDT 24 |
Jul 25 08:11:41 PM PDT 24 |
4540095178 ps |
| T961 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1614090870 |
|
|
Jul 25 08:11:02 PM PDT 24 |
Jul 25 08:22:46 PM PDT 24 |
4512367556 ps |
| T962 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.305201137 |
|
|
Jul 25 08:30:43 PM PDT 24 |
Jul 25 08:41:03 PM PDT 24 |
6019366760 ps |
| T774 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.1215354224 |
|
|
Jul 25 08:33:26 PM PDT 24 |
Jul 25 08:41:08 PM PDT 24 |
3772617792 ps |
| T963 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.1838440386 |
|
|
Jul 25 08:19:15 PM PDT 24 |
Jul 25 09:21:43 PM PDT 24 |
16983639240 ps |
| T964 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1885175194 |
|
|
Jul 25 08:11:32 PM PDT 24 |
Jul 25 08:20:33 PM PDT 24 |
4099675022 ps |
| T965 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.3903724965 |
|
|
Jul 25 08:02:47 PM PDT 24 |
Jul 25 09:08:22 PM PDT 24 |
18646703775 ps |
| T966 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.3138563395 |
|
|
Jul 25 08:26:33 PM PDT 24 |
Jul 25 08:32:15 PM PDT 24 |
3047263650 ps |
| T967 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3108132312 |
|
|
Jul 25 08:08:02 PM PDT 24 |
Jul 25 09:07:18 PM PDT 24 |
39073012656 ps |
| T968 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.1137626331 |
|
|
Jul 25 08:05:14 PM PDT 24 |
Jul 25 08:13:33 PM PDT 24 |
3726241480 ps |
| T969 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.1865832749 |
|
|
Jul 25 08:29:08 PM PDT 24 |
Jul 25 08:41:37 PM PDT 24 |
4981403592 ps |
| T970 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1390276915 |
|
|
Jul 25 08:06:58 PM PDT 24 |
Jul 25 08:12:32 PM PDT 24 |
5114650629 ps |
| T263 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.892943113 |
|
|
Jul 25 08:04:32 PM PDT 24 |
Jul 25 08:42:29 PM PDT 24 |
11596363875 ps |
| T971 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3072635093 |
|
|
Jul 25 08:09:38 PM PDT 24 |
Jul 25 08:19:19 PM PDT 24 |
5547751606 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.852445295 |
|
|
Jul 25 08:03:29 PM PDT 24 |
Jul 25 08:24:25 PM PDT 24 |
4870788444 ps |
| T156 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.3777198793 |
|
|
Jul 25 08:06:28 PM PDT 24 |
Jul 25 10:58:53 PM PDT 24 |
58140769476 ps |
| T973 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.898611088 |
|
|
Jul 25 08:07:09 PM PDT 24 |
Jul 25 08:15:27 PM PDT 24 |
5547828344 ps |
| T974 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3856172063 |
|
|
Jul 25 08:01:06 PM PDT 24 |
Jul 25 08:28:50 PM PDT 24 |
11851459920 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2676396065 |
|
|
Jul 25 08:00:25 PM PDT 24 |
Jul 25 08:04:07 PM PDT 24 |
3204695152 ps |
| T737 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.704960350 |
|
|
Jul 25 08:33:39 PM PDT 24 |
Jul 25 08:43:14 PM PDT 24 |
4837961264 ps |
| T976 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.2620579447 |
|
|
Jul 25 08:23:30 PM PDT 24 |
Jul 25 08:57:42 PM PDT 24 |
29733662435 ps |
| T355 |
/workspace/coverage/default/0.chip_sival_flash_info_access.3099108181 |
|
|
Jul 25 07:59:17 PM PDT 24 |
Jul 25 08:04:20 PM PDT 24 |
2486027000 ps |
| T192 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.4153334509 |
|
|
Jul 25 08:09:06 PM PDT 24 |
Jul 25 08:15:19 PM PDT 24 |
4239551570 ps |
| T977 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2192022897 |
|
|
Jul 25 08:08:50 PM PDT 24 |
Jul 25 08:12:02 PM PDT 24 |
2029021836 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_example_rom.4131196529 |
|
|
Jul 25 08:16:44 PM PDT 24 |
Jul 25 08:18:36 PM PDT 24 |
1786631944 ps |
| T979 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.150561190 |
|
|
Jul 25 08:17:57 PM PDT 24 |
Jul 25 08:30:24 PM PDT 24 |
7426092956 ps |
| T792 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.3591016445 |
|
|
Jul 25 08:31:31 PM PDT 24 |
Jul 25 08:43:05 PM PDT 24 |
4758311880 ps |
| T285 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.418572025 |
|
|
Jul 25 08:28:07 PM PDT 24 |
Jul 25 08:38:37 PM PDT 24 |
4523838768 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_hmac_enc.3770602014 |
|
|
Jul 25 08:08:55 PM PDT 24 |
Jul 25 08:13:08 PM PDT 24 |
3357280422 ps |
| T246 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.561884555 |
|
|
Jul 25 08:08:31 PM PDT 24 |
Jul 25 09:42:39 PM PDT 24 |
50471885796 ps |
| T981 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.2871487579 |
|
|
Jul 25 08:00:17 PM PDT 24 |
Jul 25 08:08:14 PM PDT 24 |
4056575966 ps |
| T982 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.54325616 |
|
|
Jul 25 08:23:39 PM PDT 24 |
Jul 25 08:28:55 PM PDT 24 |
3395379108 ps |
| T983 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3668874427 |
|
|
Jul 25 08:12:12 PM PDT 24 |
Jul 25 08:17:34 PM PDT 24 |
2888941665 ps |
| T984 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.386133931 |
|
|
Jul 25 08:21:51 PM PDT 24 |
Jul 25 08:30:01 PM PDT 24 |
6503337862 ps |
| T985 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.1684696037 |
|
|
Jul 25 08:09:51 PM PDT 24 |
Jul 25 09:08:21 PM PDT 24 |
17546699560 ps |
| T23 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.2499547368 |
|
|
Jul 25 08:05:39 PM PDT 24 |
Jul 25 08:12:21 PM PDT 24 |
3500280696 ps |
| T770 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.3556596011 |
|
|
Jul 25 08:38:33 PM PDT 24 |
Jul 25 08:47:48 PM PDT 24 |
4931796908 ps |
| T341 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3805681117 |
|
|
Jul 25 08:29:11 PM PDT 24 |
Jul 25 08:48:57 PM PDT 24 |
8494633336 ps |
| T986 |
/workspace/coverage/default/2.chip_tap_straps_prod.2754845416 |
|
|
Jul 25 08:23:48 PM PDT 24 |
Jul 25 08:38:22 PM PDT 24 |
8141943585 ps |
| T387 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2720837928 |
|
|
Jul 25 08:23:37 PM PDT 24 |
Jul 25 08:35:14 PM PDT 24 |
8614169909 ps |
| T987 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1921103520 |
|
|
Jul 25 08:27:45 PM PDT 24 |
Jul 25 09:26:36 PM PDT 24 |
14398741442 ps |
| T84 |
/workspace/coverage/default/1.chip_jtag_mem_access.423773224 |
|
|
Jul 25 08:05:08 PM PDT 24 |
Jul 25 08:27:30 PM PDT 24 |
13547371520 ps |
| T988 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1505650706 |
|
|
Jul 25 08:05:53 PM PDT 24 |
Jul 25 08:40:17 PM PDT 24 |
8938100900 ps |
| T652 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2730698675 |
|
|
Jul 25 07:59:58 PM PDT 24 |
Jul 25 08:02:06 PM PDT 24 |
2867809439 ps |
| T989 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.2991817536 |
|
|
Jul 25 08:08:22 PM PDT 24 |
Jul 25 09:20:36 PM PDT 24 |
13713518119 ps |
| T990 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.1369004217 |
|
|
Jul 25 08:10:05 PM PDT 24 |
Jul 25 09:20:31 PM PDT 24 |
15732042500 ps |
| T991 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.2717508603 |
|
|
Jul 25 08:16:19 PM PDT 24 |
Jul 25 08:22:19 PM PDT 24 |
3165684274 ps |
| T992 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.4196631543 |
|
|
Jul 25 08:09:41 PM PDT 24 |
Jul 25 08:18:12 PM PDT 24 |
4922473536 ps |
| T443 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.634378225 |
|
|
Jul 25 08:16:47 PM PDT 24 |
Jul 25 08:20:13 PM PDT 24 |
2620489600 ps |
| T136 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.1662593031 |
|
|
Jul 25 08:14:43 PM PDT 24 |
Jul 25 08:25:09 PM PDT 24 |
6681246790 ps |
| T687 |
/workspace/coverage/default/0.chip_sw_power_idle_load.4271643789 |
|
|
Jul 25 08:04:22 PM PDT 24 |
Jul 25 08:15:24 PM PDT 24 |
4365199800 ps |
| T809 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3705111992 |
|
|
Jul 25 08:30:21 PM PDT 24 |
Jul 25 08:42:41 PM PDT 24 |
5458549172 ps |
| T993 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.322750367 |
|
|
Jul 25 08:06:52 PM PDT 24 |
Jul 25 08:10:46 PM PDT 24 |
3185157244 ps |
| T994 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.3298313433 |
|
|
Jul 25 08:09:06 PM PDT 24 |
Jul 25 08:13:04 PM PDT 24 |
3675663382 ps |
| T343 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.2156920258 |
|
|
Jul 25 08:03:56 PM PDT 24 |
Jul 25 08:08:24 PM PDT 24 |
2376784780 ps |
| T759 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1221137610 |
|
|
Jul 25 08:32:18 PM PDT 24 |
Jul 25 08:41:14 PM PDT 24 |
6144406258 ps |
| T768 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.81219010 |
|
|
Jul 25 08:33:56 PM PDT 24 |
Jul 25 08:40:57 PM PDT 24 |
3396466640 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.2282407281 |
|
|
Jul 25 08:25:03 PM PDT 24 |
Jul 25 08:33:01 PM PDT 24 |
3309532352 ps |
| T756 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2356573030 |
|
|
Jul 25 08:37:03 PM PDT 24 |
Jul 25 08:47:33 PM PDT 24 |
4894913662 ps |
| T359 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.433753910 |
|
|
Jul 25 08:34:25 PM PDT 24 |
Jul 25 08:41:55 PM PDT 24 |
3099790452 ps |
| T67 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.7070593 |
|
|
Jul 25 08:16:17 PM PDT 24 |
Jul 25 08:22:54 PM PDT 24 |
6023187936 ps |
| T996 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.682717910 |
|
|
Jul 25 08:06:30 PM PDT 24 |
Jul 25 08:10:13 PM PDT 24 |
2776800140 ps |
| T167 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1186247268 |
|
|
Jul 25 08:19:53 PM PDT 24 |
Jul 25 08:21:49 PM PDT 24 |
2553437090 ps |
| T997 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1163761383 |
|
|
Jul 25 08:31:25 PM PDT 24 |
Jul 25 08:54:53 PM PDT 24 |
8274115190 ps |
| T998 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.2112039141 |
|
|
Jul 25 08:04:56 PM PDT 24 |
Jul 25 08:11:52 PM PDT 24 |
6563165335 ps |
| T999 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.560464050 |
|
|
Jul 25 08:09:58 PM PDT 24 |
Jul 25 08:15:28 PM PDT 24 |
2835756670 ps |
| T1000 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.3082678597 |
|
|
Jul 25 08:09:24 PM PDT 24 |
Jul 25 09:10:39 PM PDT 24 |
15874770824 ps |
| T256 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1760101928 |
|
|
Jul 25 08:32:29 PM PDT 24 |
Jul 25 08:41:31 PM PDT 24 |
4045050856 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3387689793 |
|
|
Jul 25 08:18:24 PM PDT 24 |
Jul 25 11:33:47 PM PDT 24 |
63450412597 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.2963764652 |
|
|
Jul 25 08:17:34 PM PDT 24 |
Jul 25 08:20:50 PM PDT 24 |
2510391426 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.2718984780 |
|
|
Jul 25 08:05:13 PM PDT 24 |
Jul 25 08:10:19 PM PDT 24 |
3405076456 ps |
| T1003 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.1847136433 |
|
|
Jul 25 08:28:46 PM PDT 24 |
Jul 25 08:38:40 PM PDT 24 |
7202595686 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.1353796166 |
|
|
Jul 25 08:12:46 PM PDT 24 |
Jul 25 08:18:31 PM PDT 24 |
2795180823 ps |
| T380 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2623126929 |
|
|
Jul 25 08:03:16 PM PDT 24 |
Jul 25 08:10:15 PM PDT 24 |
3106583368 ps |
| T162 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.2846503870 |
|
|
Jul 25 08:02:04 PM PDT 24 |
Jul 25 08:07:38 PM PDT 24 |
3127734715 ps |
| T1004 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.908440498 |
|
|
Jul 25 08:04:54 PM PDT 24 |
Jul 25 08:08:44 PM PDT 24 |
2952503492 ps |
| T1005 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.1997868467 |
|
|
Jul 25 08:26:18 PM PDT 24 |
Jul 25 08:37:56 PM PDT 24 |
6307977280 ps |
| T65 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1164102782 |
|
|
Jul 25 08:12:35 PM PDT 24 |
Jul 25 08:19:23 PM PDT 24 |
7823520000 ps |
| T739 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.1452849462 |
|
|
Jul 25 08:07:39 PM PDT 24 |
Jul 25 08:36:22 PM PDT 24 |
13321123992 ps |
| T99 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.3815479669 |
|
|
Jul 25 08:17:22 PM PDT 24 |
Jul 25 08:25:31 PM PDT 24 |
4785195000 ps |
| T416 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.1529773591 |
|
|
Jul 25 07:59:11 PM PDT 24 |
Jul 25 08:08:42 PM PDT 24 |
7215991718 ps |
| T417 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.696270643 |
|
|
Jul 25 08:01:23 PM PDT 24 |
Jul 25 08:06:10 PM PDT 24 |
3471850368 ps |
| T137 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3462003958 |
|
|
Jul 25 08:28:06 PM PDT 24 |
Jul 25 08:37:36 PM PDT 24 |
5491491656 ps |
| T418 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.848751107 |
|
|
Jul 25 08:00:18 PM PDT 24 |
Jul 25 08:10:53 PM PDT 24 |
3998590148 ps |
| T419 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.3867318482 |
|
|
Jul 25 08:09:36 PM PDT 24 |
Jul 25 09:07:53 PM PDT 24 |
14780047584 ps |
| T420 |
/workspace/coverage/default/2.rom_keymgr_functest.1377356817 |
|
|
Jul 25 08:25:27 PM PDT 24 |
Jul 25 08:33:31 PM PDT 24 |
4435353408 ps |
| T253 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.1180649697 |
|
|
Jul 25 08:20:40 PM PDT 24 |
Jul 25 08:34:21 PM PDT 24 |
5151805386 ps |
| T54 |
/workspace/coverage/default/0.chip_sw_alert_test.4165115158 |
|
|
Jul 25 08:00:45 PM PDT 24 |
Jul 25 08:05:10 PM PDT 24 |
3202619900 ps |
| T421 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.378551246 |
|
|
Jul 25 08:03:44 PM PDT 24 |
Jul 25 08:08:38 PM PDT 24 |
2530959854 ps |
| T335 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.4134440473 |
|
|
Jul 25 08:12:06 PM PDT 24 |
Jul 25 08:20:24 PM PDT 24 |
4385341620 ps |
| T63 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.1580839805 |
|
|
Jul 25 07:59:58 PM PDT 24 |
Jul 25 08:04:07 PM PDT 24 |
3335517690 ps |
| T396 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.2351407146 |
|
|
Jul 25 08:07:08 PM PDT 24 |
Jul 25 09:10:39 PM PDT 24 |
15323373780 ps |
| T397 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2991155654 |
|
|
Jul 25 08:12:49 PM PDT 24 |
Jul 25 08:26:09 PM PDT 24 |
3818549352 ps |
| T398 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.4072573257 |
|
|
Jul 25 08:11:32 PM PDT 24 |
Jul 25 08:13:17 PM PDT 24 |
2681498651 ps |
| T399 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.1045960950 |
|
|
Jul 25 08:02:21 PM PDT 24 |
Jul 25 08:41:33 PM PDT 24 |
10076602219 ps |
| T400 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.2721655895 |
|
|
Jul 25 08:28:02 PM PDT 24 |
Jul 25 09:15:15 PM PDT 24 |
11397764631 ps |
| T401 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.3600914862 |
|
|
Jul 25 08:28:56 PM PDT 24 |
Jul 25 08:34:01 PM PDT 24 |
3223463612 ps |
| T402 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.2108487161 |
|
|
Jul 25 08:33:55 PM PDT 24 |
Jul 25 08:45:03 PM PDT 24 |
5704650400 ps |
| T286 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.399890871 |
|
|
Jul 25 08:24:12 PM PDT 24 |
Jul 25 08:34:44 PM PDT 24 |
5230884994 ps |
| T403 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.937304826 |
|
|
Jul 25 08:11:56 PM PDT 24 |
Jul 25 08:19:01 PM PDT 24 |
6095517440 ps |
| T55 |
/workspace/coverage/default/1.chip_sw_alert_test.1515840255 |
|
|
Jul 25 08:08:54 PM PDT 24 |
Jul 25 08:13:38 PM PDT 24 |
3213921544 ps |
| T249 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.1162086020 |
|
|
Jul 25 08:00:48 PM PDT 24 |
Jul 25 08:34:41 PM PDT 24 |
26107102129 ps |
| T388 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.2809710172 |
|
|
Jul 25 08:08:24 PM PDT 24 |
Jul 25 08:17:12 PM PDT 24 |
9729009050 ps |
| T796 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.3989440566 |
|
|
Jul 25 08:37:15 PM PDT 24 |
Jul 25 08:42:37 PM PDT 24 |
4356953820 ps |
| T287 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.885218201 |
|
|
Jul 25 08:06:51 PM PDT 24 |
Jul 25 08:14:54 PM PDT 24 |
3542454466 ps |
| T1006 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.3795850232 |
|
|
Jul 25 08:32:13 PM PDT 24 |
Jul 25 09:14:54 PM PDT 24 |
13171310750 ps |
| T1007 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.244700040 |
|
|
Jul 25 08:18:56 PM PDT 24 |
Jul 25 08:31:57 PM PDT 24 |
5177850600 ps |
| T288 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.2084029918 |
|
|
Jul 25 08:22:22 PM PDT 24 |
Jul 25 08:31:27 PM PDT 24 |
5005113828 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.741044351 |
|
|
Jul 25 08:02:54 PM PDT 24 |
Jul 25 08:17:57 PM PDT 24 |
6082257416 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.3823223900 |
|
|
Jul 25 08:19:44 PM PDT 24 |
Jul 25 08:27:46 PM PDT 24 |
2842223046 ps |
| T1008 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.2457745755 |
|
|
Jul 25 08:31:33 PM PDT 24 |
Jul 25 08:38:43 PM PDT 24 |
3754529350 ps |
| T1009 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.3158867440 |
|
|
Jul 25 08:08:03 PM PDT 24 |
Jul 25 08:24:19 PM PDT 24 |
5373700850 ps |
| T328 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.806062165 |
|
|
Jul 25 08:21:39 PM PDT 24 |
Jul 25 08:33:37 PM PDT 24 |
4992330158 ps |
| T1010 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.904606068 |
|
|
Jul 25 08:17:45 PM PDT 24 |
Jul 25 08:35:00 PM PDT 24 |
4976464960 ps |
| T653 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.4270113347 |
|
|
Jul 25 08:00:40 PM PDT 24 |
Jul 25 08:02:52 PM PDT 24 |
2308494943 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.2450113392 |
|
|
Jul 25 08:17:09 PM PDT 24 |
Jul 25 08:39:07 PM PDT 24 |
8322960120 ps |
| T1012 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3116457803 |
|
|
Jul 25 08:12:21 PM PDT 24 |
Jul 25 09:23:07 PM PDT 24 |
14670297752 ps |
| T1013 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3501112200 |
|
|
Jul 25 08:26:55 PM PDT 24 |
Jul 25 09:01:11 PM PDT 24 |
8984560170 ps |
| T313 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2649377206 |
|
|
Jul 25 08:29:59 PM PDT 24 |
Jul 25 08:39:45 PM PDT 24 |
5558042916 ps |
| T761 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1444357605 |
|
|
Jul 25 08:33:38 PM PDT 24 |
Jul 25 08:39:12 PM PDT 24 |
4491733880 ps |
| T1014 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1152667228 |
|
|
Jul 25 08:06:28 PM PDT 24 |
Jul 25 08:11:59 PM PDT 24 |
3319163580 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.4214091807 |
|
|
Jul 25 08:04:52 PM PDT 24 |
Jul 25 08:11:24 PM PDT 24 |
6484980680 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.3473752095 |
|
|
Jul 25 08:01:53 PM PDT 24 |
Jul 25 09:01:20 PM PDT 24 |
15975494136 ps |
| T1017 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1779277320 |
|
|
Jul 25 08:07:26 PM PDT 24 |
Jul 25 08:18:19 PM PDT 24 |
9572914864 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.3226541697 |
|
|
Jul 25 07:59:51 PM PDT 24 |
Jul 25 08:04:21 PM PDT 24 |
2506369112 ps |
| T1019 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.3598937184 |
|
|
Jul 25 08:03:17 PM PDT 24 |
Jul 25 08:14:30 PM PDT 24 |
5724837750 ps |
| T59 |
/workspace/coverage/default/0.chip_sw_spi_device_pinmux_sleep_retention.547833782 |
|
|
Jul 25 08:01:13 PM PDT 24 |
Jul 25 08:06:43 PM PDT 24 |
3447800508 ps |
| T771 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.2727958123 |
|
|
Jul 25 08:37:45 PM PDT 24 |
Jul 25 08:48:02 PM PDT 24 |
4586641160 ps |
| T145 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.691916315 |
|
|
Jul 25 08:23:10 PM PDT 24 |
Jul 25 08:39:15 PM PDT 24 |
5859323940 ps |
| T210 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2408560579 |
|
|
Jul 25 07:53:51 PM PDT 24 |
Jul 25 07:58:51 PM PDT 24 |
4622564742 ps |
| T1020 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.525905057 |
|
|
Jul 25 08:17:58 PM PDT 24 |
Jul 25 08:24:30 PM PDT 24 |
3484409618 ps |
| T325 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.4005567993 |
|
|
Jul 25 08:21:11 PM PDT 24 |
Jul 25 08:47:16 PM PDT 24 |
7454968520 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3559484211 |
|
|
Jul 25 07:58:38 PM PDT 24 |
Jul 25 08:14:29 PM PDT 24 |
6925260386 ps |
| T640 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.2991148837 |
|
|
Jul 25 08:07:57 PM PDT 24 |
Jul 25 08:17:58 PM PDT 24 |
2934209290 ps |
| T1022 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.1990222314 |
|
|
Jul 25 08:21:51 PM PDT 24 |
Jul 25 08:38:08 PM PDT 24 |
9403485540 ps |
| T15 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.1241296919 |
|
|
Jul 25 08:17:58 PM PDT 24 |
Jul 25 08:30:30 PM PDT 24 |
6019678435 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.3207028357 |
|
|
Jul 25 07:59:53 PM PDT 24 |
Jul 25 08:28:42 PM PDT 24 |
9129597872 ps |
| T1024 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.4092989107 |
|
|
Jul 25 08:08:24 PM PDT 24 |
Jul 25 08:47:28 PM PDT 24 |
9901300344 ps |
| T1025 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.3225444496 |
|
|
Jul 25 08:01:13 PM PDT 24 |
Jul 25 08:41:08 PM PDT 24 |
11172771540 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.2523935281 |
|
|
Jul 25 08:18:25 PM PDT 24 |
Jul 25 08:22:49 PM PDT 24 |
2189683050 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2911783062 |
|
|
Jul 25 08:03:56 PM PDT 24 |
Jul 25 08:16:09 PM PDT 24 |
4719613602 ps |
| T1027 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.287663978 |
|
|
Jul 25 08:28:45 PM PDT 24 |
Jul 25 08:51:07 PM PDT 24 |
8317837069 ps |
| T360 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.1358496089 |
|
|
Jul 25 08:31:26 PM PDT 24 |
Jul 25 08:42:00 PM PDT 24 |
6134466792 ps |
| T1028 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.142978205 |
|
|
Jul 25 08:20:15 PM PDT 24 |
Jul 25 09:18:35 PM PDT 24 |
15700601588 ps |
| T781 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.1184074380 |
|
|
Jul 25 08:16:32 PM PDT 24 |
Jul 25 08:28:15 PM PDT 24 |
5804848608 ps |
| T1029 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.4094546119 |
|
|
Jul 25 08:06:21 PM PDT 24 |
Jul 25 08:31:51 PM PDT 24 |
8297757588 ps |
| T72 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.3951770502 |
|
|
Jul 25 08:02:36 PM PDT 24 |
Jul 25 08:14:09 PM PDT 24 |
7022985508 ps |
| T1030 |
/workspace/coverage/default/0.chip_sw_example_concurrency.1996626351 |
|
|
Jul 25 07:59:40 PM PDT 24 |
Jul 25 08:03:37 PM PDT 24 |
3480337016 ps |
| T1031 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.459507027 |
|
|
Jul 25 07:59:00 PM PDT 24 |
Jul 25 09:25:07 PM PDT 24 |
44857854152 ps |