| T173 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3718660824 |
|
|
Aug 12 07:24:13 PM PDT 24 |
Aug 12 07:27:40 PM PDT 24 |
2376038998 ps |
| T1006 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.1583373695 |
|
|
Aug 12 07:37:27 PM PDT 24 |
Aug 12 08:58:23 PM PDT 24 |
21992872482 ps |
| T1007 |
/workspace/coverage/default/2.rom_e2e_self_hash.1200472933 |
|
|
Aug 12 07:34:09 PM PDT 24 |
Aug 12 09:08:57 PM PDT 24 |
26194065312 ps |
| T84 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.135037427 |
|
|
Aug 12 07:08:05 PM PDT 24 |
Aug 12 10:56:20 PM PDT 24 |
256395583708 ps |
| T369 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.1895440101 |
|
|
Aug 12 07:31:22 PM PDT 24 |
Aug 12 07:56:26 PM PDT 24 |
8034350976 ps |
| T372 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.2103716251 |
|
|
Aug 12 07:39:39 PM PDT 24 |
Aug 12 07:50:03 PM PDT 24 |
4296468086 ps |
| T1008 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.211947840 |
|
|
Aug 12 07:34:52 PM PDT 24 |
Aug 12 07:44:41 PM PDT 24 |
4535897356 ps |
| T346 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.961433000 |
|
|
Aug 12 07:23:19 PM PDT 24 |
Aug 12 07:35:38 PM PDT 24 |
4464880246 ps |
| T255 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.3644223153 |
|
|
Aug 12 07:24:48 PM PDT 24 |
Aug 12 07:30:18 PM PDT 24 |
3399180584 ps |
| T781 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.1871462860 |
|
|
Aug 12 07:11:14 PM PDT 24 |
Aug 12 07:30:34 PM PDT 24 |
9561816504 ps |
| T1009 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.1281429643 |
|
|
Aug 12 07:11:27 PM PDT 24 |
Aug 12 07:16:25 PM PDT 24 |
2693299190 ps |
| T461 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.2632324156 |
|
|
Aug 12 07:10:55 PM PDT 24 |
Aug 12 07:31:46 PM PDT 24 |
7523232175 ps |
| T809 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.1155177692 |
|
|
Aug 12 07:12:07 PM PDT 24 |
Aug 12 07:28:43 PM PDT 24 |
7999676956 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2688862344 |
|
|
Aug 12 07:28:38 PM PDT 24 |
Aug 12 07:37:00 PM PDT 24 |
3244702904 ps |
| T1011 |
/workspace/coverage/default/1.rom_keymgr_functest.670872820 |
|
|
Aug 12 07:23:57 PM PDT 24 |
Aug 12 07:34:45 PM PDT 24 |
5144701780 ps |
| T790 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.616120758 |
|
|
Aug 12 07:26:49 PM PDT 24 |
Aug 12 07:35:00 PM PDT 24 |
3776349666 ps |
| T282 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.348471287 |
|
|
Aug 12 07:13:54 PM PDT 24 |
Aug 12 08:08:46 PM PDT 24 |
14463281546 ps |
| T780 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.1753938398 |
|
|
Aug 12 07:39:59 PM PDT 24 |
Aug 12 07:46:01 PM PDT 24 |
3537028664 ps |
| T763 |
/workspace/coverage/default/2.chip_sw_power_idle_load.2127442769 |
|
|
Aug 12 07:30:42 PM PDT 24 |
Aug 12 07:41:40 PM PDT 24 |
4123035636 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.815564760 |
|
|
Aug 12 07:13:06 PM PDT 24 |
Aug 12 07:30:46 PM PDT 24 |
5510911690 ps |
| T1013 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.3388502403 |
|
|
Aug 12 07:37:51 PM PDT 24 |
Aug 12 07:44:19 PM PDT 24 |
4078822088 ps |
| T399 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.1716516270 |
|
|
Aug 12 07:16:48 PM PDT 24 |
Aug 12 09:07:27 PM PDT 24 |
24472466792 ps |
| T334 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.1160818747 |
|
|
Aug 12 07:17:13 PM PDT 24 |
Aug 12 07:32:42 PM PDT 24 |
5692075288 ps |
| T827 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1226000310 |
|
|
Aug 12 07:36:28 PM PDT 24 |
Aug 12 07:49:14 PM PDT 24 |
4952291512 ps |
| T1014 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.3435022575 |
|
|
Aug 12 07:10:46 PM PDT 24 |
Aug 12 07:18:14 PM PDT 24 |
5748049860 ps |
| T261 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.1809346643 |
|
|
Aug 12 07:09:19 PM PDT 24 |
Aug 12 07:42:04 PM PDT 24 |
11343046306 ps |
| T1015 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.3718475734 |
|
|
Aug 12 07:28:54 PM PDT 24 |
Aug 12 07:34:16 PM PDT 24 |
3016942280 ps |
| T20 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1371217808 |
|
|
Aug 12 07:07:28 PM PDT 24 |
Aug 12 07:41:21 PM PDT 24 |
7973885996 ps |
| T1016 |
/workspace/coverage/default/4.chip_tap_straps_prod.2434057310 |
|
|
Aug 12 07:32:07 PM PDT 24 |
Aug 12 07:48:51 PM PDT 24 |
9814176828 ps |
| T290 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1819147080 |
|
|
Aug 12 07:25:52 PM PDT 24 |
Aug 12 07:34:11 PM PDT 24 |
4153933480 ps |
| T67 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.2423142823 |
|
|
Aug 12 07:28:15 PM PDT 24 |
Aug 12 07:35:00 PM PDT 24 |
5129647990 ps |
| T381 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.2616269940 |
|
|
Aug 12 07:33:58 PM PDT 24 |
Aug 12 08:22:35 PM PDT 24 |
25206115554 ps |
| T85 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.1209774384 |
|
|
Aug 12 07:18:38 PM PDT 24 |
Aug 12 07:46:58 PM PDT 24 |
13117802746 ps |
| T800 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2593107897 |
|
|
Aug 12 07:33:51 PM PDT 24 |
Aug 12 07:46:30 PM PDT 24 |
4597211640 ps |
| T229 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.4087821681 |
|
|
Aug 12 07:16:12 PM PDT 24 |
Aug 12 07:36:13 PM PDT 24 |
8155877032 ps |
| T135 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.609567271 |
|
|
Aug 12 07:26:36 PM PDT 24 |
Aug 12 07:37:18 PM PDT 24 |
3218997552 ps |
| T220 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.940797427 |
|
|
Aug 12 07:28:50 PM PDT 24 |
Aug 12 07:51:46 PM PDT 24 |
6553779388 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_edn_kat.188313611 |
|
|
Aug 12 07:27:01 PM PDT 24 |
Aug 12 07:40:00 PM PDT 24 |
3035537146 ps |
| T291 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.3173574445 |
|
|
Aug 12 07:36:11 PM PDT 24 |
Aug 12 07:46:14 PM PDT 24 |
5912262974 ps |
| T799 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.3873583052 |
|
|
Aug 12 07:36:48 PM PDT 24 |
Aug 12 07:42:48 PM PDT 24 |
3763814360 ps |
| T1018 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1613244398 |
|
|
Aug 12 07:27:05 PM PDT 24 |
Aug 12 08:20:26 PM PDT 24 |
36987346729 ps |
| T387 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2968199804 |
|
|
Aug 12 07:34:40 PM PDT 24 |
Aug 12 07:40:30 PM PDT 24 |
3492731934 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1668734251 |
|
|
Aug 12 07:23:56 PM PDT 24 |
Aug 12 07:35:18 PM PDT 24 |
4488436514 ps |
| T823 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3558396586 |
|
|
Aug 12 07:38:24 PM PDT 24 |
Aug 12 07:44:58 PM PDT 24 |
4141082504 ps |
| T238 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.2872019118 |
|
|
Aug 12 07:24:49 PM PDT 24 |
Aug 12 08:58:51 PM PDT 24 |
46168747490 ps |
| T1020 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.3467965680 |
|
|
Aug 12 07:14:43 PM PDT 24 |
Aug 12 08:09:16 PM PDT 24 |
14842561738 ps |
| T1021 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.3230198313 |
|
|
Aug 12 07:17:28 PM PDT 24 |
Aug 12 07:34:59 PM PDT 24 |
12034711563 ps |
| T170 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.3943440520 |
|
|
Aug 12 07:26:26 PM PDT 24 |
Aug 12 07:33:10 PM PDT 24 |
3358244135 ps |
| T212 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.325185169 |
|
|
Aug 12 07:10:33 PM PDT 24 |
Aug 12 07:16:17 PM PDT 24 |
3203480572 ps |
| T859 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.448550249 |
|
|
Aug 12 07:41:12 PM PDT 24 |
Aug 12 07:48:22 PM PDT 24 |
3420132304 ps |
| T367 |
/workspace/coverage/default/0.chip_sival_flash_info_access.2181427149 |
|
|
Aug 12 07:08:04 PM PDT 24 |
Aug 12 07:13:14 PM PDT 24 |
2608614274 ps |
| T857 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.687527536 |
|
|
Aug 12 07:40:29 PM PDT 24 |
Aug 12 07:47:28 PM PDT 24 |
3365578398 ps |
| T316 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.149321458 |
|
|
Aug 12 07:11:28 PM PDT 24 |
Aug 12 07:26:02 PM PDT 24 |
4658522264 ps |
| T1022 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.125894093 |
|
|
Aug 12 07:15:11 PM PDT 24 |
Aug 12 07:27:51 PM PDT 24 |
4367520712 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.3757575794 |
|
|
Aug 12 07:07:48 PM PDT 24 |
Aug 12 07:18:50 PM PDT 24 |
5485280680 ps |
| T1024 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2660832490 |
|
|
Aug 12 07:27:49 PM PDT 24 |
Aug 12 08:24:09 PM PDT 24 |
14882185192 ps |
| T297 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.558950381 |
|
|
Aug 12 07:42:21 PM PDT 24 |
Aug 12 07:51:58 PM PDT 24 |
4406149032 ps |
| T213 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.335414872 |
|
|
Aug 12 07:25:55 PM PDT 24 |
Aug 12 07:55:19 PM PDT 24 |
22024051450 ps |
| T838 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.1253977176 |
|
|
Aug 12 07:42:09 PM PDT 24 |
Aug 12 07:49:58 PM PDT 24 |
5509755330 ps |
| T256 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.2492933051 |
|
|
Aug 12 07:10:41 PM PDT 24 |
Aug 12 07:14:24 PM PDT 24 |
2715012744 ps |
| T1025 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.737055274 |
|
|
Aug 12 07:16:40 PM PDT 24 |
Aug 12 07:22:42 PM PDT 24 |
4521503340 ps |
| T14 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.1045353298 |
|
|
Aug 12 07:24:41 PM PDT 24 |
Aug 12 07:36:08 PM PDT 24 |
6877377754 ps |
| T186 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.3401438128 |
|
|
Aug 12 07:09:42 PM PDT 24 |
Aug 12 07:12:23 PM PDT 24 |
3495544002 ps |
| T1026 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.2319281353 |
|
|
Aug 12 07:42:05 PM PDT 24 |
Aug 12 07:49:32 PM PDT 24 |
4880743396 ps |
| T768 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.3984867401 |
|
|
Aug 12 07:12:44 PM PDT 24 |
Aug 12 07:16:15 PM PDT 24 |
3271345454 ps |
| T174 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1255233022 |
|
|
Aug 12 07:12:22 PM PDT 24 |
Aug 12 07:13:49 PM PDT 24 |
1864195243 ps |
| T214 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1094327065 |
|
|
Aug 12 07:25:35 PM PDT 24 |
Aug 12 07:31:01 PM PDT 24 |
3661120066 ps |
| T1027 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.2861054469 |
|
|
Aug 12 07:36:34 PM PDT 24 |
Aug 12 08:30:49 PM PDT 24 |
14858141700 ps |
| T825 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2109348949 |
|
|
Aug 12 07:38:45 PM PDT 24 |
Aug 12 07:45:43 PM PDT 24 |
3632689770 ps |
| T807 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.3211318572 |
|
|
Aug 12 07:38:32 PM PDT 24 |
Aug 12 07:44:36 PM PDT 24 |
3433095358 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.288552494 |
|
|
Aug 12 07:14:55 PM PDT 24 |
Aug 12 07:19:16 PM PDT 24 |
2947431800 ps |
| T129 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2756436136 |
|
|
Aug 12 07:28:44 PM PDT 24 |
Aug 12 07:39:31 PM PDT 24 |
4483704990 ps |
| T402 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2180221030 |
|
|
Aug 12 07:15:40 PM PDT 24 |
Aug 12 10:52:48 PM PDT 24 |
255531530066 ps |
| T829 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.1842101890 |
|
|
Aug 12 07:35:49 PM PDT 24 |
Aug 12 07:45:32 PM PDT 24 |
6138893632 ps |
| T331 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.1100387318 |
|
|
Aug 12 07:10:53 PM PDT 24 |
Aug 12 07:33:27 PM PDT 24 |
6220479760 ps |
| T1029 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.1826152479 |
|
|
Aug 12 07:27:29 PM PDT 24 |
Aug 12 07:44:13 PM PDT 24 |
5674679898 ps |
| T1030 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.4174016308 |
|
|
Aug 12 07:36:08 PM PDT 24 |
Aug 12 07:41:54 PM PDT 24 |
3470731740 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.2579644572 |
|
|
Aug 12 07:21:20 PM PDT 24 |
Aug 12 07:26:53 PM PDT 24 |
3076640504 ps |
| T215 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.782284250 |
|
|
Aug 12 07:14:32 PM PDT 24 |
Aug 12 07:20:08 PM PDT 24 |
2588799333 ps |
| T378 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3975955660 |
|
|
Aug 12 07:08:28 PM PDT 24 |
Aug 12 07:12:47 PM PDT 24 |
3194279548 ps |
| T1032 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.2808000135 |
|
|
Aug 12 07:27:10 PM PDT 24 |
Aug 12 07:33:34 PM PDT 24 |
3197223660 ps |
| T358 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.305000919 |
|
|
Aug 12 07:33:40 PM PDT 24 |
Aug 12 08:00:17 PM PDT 24 |
8565551760 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1207665683 |
|
|
Aug 12 07:29:11 PM PDT 24 |
Aug 12 07:33:48 PM PDT 24 |
3352701560 ps |
| T1034 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.2746423595 |
|
|
Aug 12 07:36:20 PM PDT 24 |
Aug 12 08:41:14 PM PDT 24 |
14810367843 ps |
| T1035 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.2335161227 |
|
|
Aug 12 07:26:19 PM PDT 24 |
Aug 12 07:36:52 PM PDT 24 |
4153222248 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2292888672 |
|
|
Aug 12 07:15:56 PM PDT 24 |
Aug 12 07:40:40 PM PDT 24 |
10125039093 ps |
| T1037 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.1930066054 |
|
|
Aug 12 07:32:20 PM PDT 24 |
Aug 12 07:43:57 PM PDT 24 |
4061248320 ps |
| T1038 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.3586948847 |
|
|
Aug 12 07:28:07 PM PDT 24 |
Aug 12 07:34:49 PM PDT 24 |
4441481874 ps |
| T292 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.74403347 |
|
|
Aug 12 07:17:27 PM PDT 24 |
Aug 12 07:25:37 PM PDT 24 |
3858862060 ps |
| T397 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.170373699 |
|
|
Aug 12 07:14:13 PM PDT 24 |
Aug 12 07:18:12 PM PDT 24 |
2950539134 ps |
| T1039 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.987688396 |
|
|
Aug 12 07:16:23 PM PDT 24 |
Aug 12 08:28:52 PM PDT 24 |
14908929144 ps |
| T1040 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.2284783510 |
|
|
Aug 12 07:30:23 PM PDT 24 |
Aug 12 07:36:42 PM PDT 24 |
2341593960 ps |
| T892 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.790591048 |
|
|
Aug 12 07:39:16 PM PDT 24 |
Aug 12 07:46:33 PM PDT 24 |
3950124960 ps |
| T1041 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.3271785503 |
|
|
Aug 12 07:29:57 PM PDT 24 |
Aug 12 07:35:13 PM PDT 24 |
3626566692 ps |
| T1042 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.72157912 |
|
|
Aug 12 07:16:33 PM PDT 24 |
Aug 12 07:49:55 PM PDT 24 |
18876127670 ps |
| T862 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.989262839 |
|
|
Aug 12 07:34:44 PM PDT 24 |
Aug 12 07:45:26 PM PDT 24 |
4866162668 ps |
| T1043 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.3407835346 |
|
|
Aug 12 07:34:22 PM PDT 24 |
Aug 12 08:21:06 PM PDT 24 |
14497903600 ps |
| T141 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3365596868 |
|
|
Aug 12 07:27:46 PM PDT 24 |
Aug 12 07:37:07 PM PDT 24 |
5782618220 ps |
| T1044 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.412757439 |
|
|
Aug 12 07:16:14 PM PDT 24 |
Aug 12 07:35:52 PM PDT 24 |
6084727500 ps |
| T813 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.2911403708 |
|
|
Aug 12 07:39:59 PM PDT 24 |
Aug 12 07:49:01 PM PDT 24 |
3768262460 ps |
| T1045 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1505708357 |
|
|
Aug 12 07:27:39 PM PDT 24 |
Aug 12 08:30:56 PM PDT 24 |
15377318796 ps |
| T382 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.2060010160 |
|
|
Aug 12 07:26:00 PM PDT 24 |
Aug 12 08:27:27 PM PDT 24 |
25213504048 ps |
| T359 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.522422733 |
|
|
Aug 12 07:34:59 PM PDT 24 |
Aug 12 08:01:52 PM PDT 24 |
9453983554 ps |
| T1046 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.422590600 |
|
|
Aug 12 07:22:06 PM PDT 24 |
Aug 12 07:28:12 PM PDT 24 |
3624021016 ps |
| T1047 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.2288776500 |
|
|
Aug 12 07:33:30 PM PDT 24 |
Aug 12 07:40:58 PM PDT 24 |
6855405336 ps |
| T1048 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2538929957 |
|
|
Aug 12 07:12:37 PM PDT 24 |
Aug 12 07:26:48 PM PDT 24 |
7988880030 ps |
| T411 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.706752500 |
|
|
Aug 12 07:08:54 PM PDT 24 |
Aug 12 07:12:26 PM PDT 24 |
3050966122 ps |
| T883 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.4146005305 |
|
|
Aug 12 07:36:52 PM PDT 24 |
Aug 12 07:44:09 PM PDT 24 |
3929546300 ps |
| T1049 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.585668967 |
|
|
Aug 12 07:11:05 PM PDT 24 |
Aug 12 07:15:37 PM PDT 24 |
2760682176 ps |
| T322 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2551566899 |
|
|
Aug 12 07:10:11 PM PDT 24 |
Aug 12 07:17:35 PM PDT 24 |
3672952692 ps |
| T1050 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.2070994509 |
|
|
Aug 12 07:32:17 PM PDT 24 |
Aug 12 07:40:37 PM PDT 24 |
4873574080 ps |
| T783 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.663051687 |
|
|
Aug 12 07:08:37 PM PDT 24 |
Aug 12 07:16:45 PM PDT 24 |
5817064144 ps |
| T831 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.32525141 |
|
|
Aug 12 07:22:02 PM PDT 24 |
Aug 12 07:33:18 PM PDT 24 |
5702299160 ps |
| T1051 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.87406435 |
|
|
Aug 12 07:34:58 PM PDT 24 |
Aug 12 08:00:48 PM PDT 24 |
8682630928 ps |
| T860 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.3137992217 |
|
|
Aug 12 07:40:57 PM PDT 24 |
Aug 12 07:51:41 PM PDT 24 |
5624644664 ps |
| T841 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.3269095989 |
|
|
Aug 12 07:34:03 PM PDT 24 |
Aug 12 07:44:08 PM PDT 24 |
5496297488 ps |
| T754 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1766924692 |
|
|
Aug 12 07:24:48 PM PDT 24 |
Aug 12 07:26:43 PM PDT 24 |
2152806994 ps |
| T39 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1176161601 |
|
|
Aug 12 07:16:35 PM PDT 24 |
Aug 12 07:24:01 PM PDT 24 |
6025685138 ps |
| T755 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.3743514098 |
|
|
Aug 12 07:15:04 PM PDT 24 |
Aug 12 07:17:44 PM PDT 24 |
4110391905 ps |
| T852 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.2621372852 |
|
|
Aug 12 07:38:04 PM PDT 24 |
Aug 12 07:47:25 PM PDT 24 |
4407717320 ps |
| T1052 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.27827764 |
|
|
Aug 12 07:08:38 PM PDT 24 |
Aug 12 07:54:07 PM PDT 24 |
32425460860 ps |
| T142 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2436710733 |
|
|
Aug 12 07:12:02 PM PDT 24 |
Aug 12 07:20:29 PM PDT 24 |
5673261660 ps |
| T1053 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.4097893218 |
|
|
Aug 12 07:28:00 PM PDT 24 |
Aug 12 07:52:56 PM PDT 24 |
8552742838 ps |
| T550 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1336425194 |
|
|
Aug 12 07:27:30 PM PDT 24 |
Aug 12 07:56:38 PM PDT 24 |
9315210721 ps |
| T165 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3071571658 |
|
|
Aug 12 07:09:48 PM PDT 24 |
Aug 12 10:06:14 PM PDT 24 |
57879427466 ps |
| T1054 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2988891468 |
|
|
Aug 12 07:08:58 PM PDT 24 |
Aug 12 07:26:50 PM PDT 24 |
6108394736 ps |
| T1055 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.1788628252 |
|
|
Aug 12 07:15:13 PM PDT 24 |
Aug 12 08:47:23 PM PDT 24 |
23746658085 ps |
| T194 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.417541845 |
|
|
Aug 12 07:11:41 PM PDT 24 |
Aug 12 08:26:29 PM PDT 24 |
43303271693 ps |
| T865 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.515255893 |
|
|
Aug 12 07:36:42 PM PDT 24 |
Aug 12 07:46:22 PM PDT 24 |
4682462720 ps |
| T877 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.4096047670 |
|
|
Aug 12 07:39:23 PM PDT 24 |
Aug 12 07:47:19 PM PDT 24 |
5982570916 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_aes_idle.1224240693 |
|
|
Aug 12 07:26:20 PM PDT 24 |
Aug 12 07:31:58 PM PDT 24 |
2651770316 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.3246680018 |
|
|
Aug 12 07:29:00 PM PDT 24 |
Aug 12 07:48:03 PM PDT 24 |
8480845308 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2747532179 |
|
|
Aug 12 07:28:01 PM PDT 24 |
Aug 12 07:38:53 PM PDT 24 |
4514507480 ps |
| T1059 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.2479210743 |
|
|
Aug 12 07:35:15 PM PDT 24 |
Aug 12 07:51:00 PM PDT 24 |
12595348455 ps |
| T415 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.3352423043 |
|
|
Aug 12 07:09:16 PM PDT 24 |
Aug 12 07:13:02 PM PDT 24 |
3038866032 ps |
| T1060 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1626138149 |
|
|
Aug 12 07:15:21 PM PDT 24 |
Aug 12 07:18:44 PM PDT 24 |
3365480900 ps |
| T1061 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1302555621 |
|
|
Aug 12 07:35:55 PM PDT 24 |
Aug 12 07:45:29 PM PDT 24 |
4314868280 ps |
| T216 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.363480674 |
|
|
Aug 12 07:13:19 PM PDT 24 |
Aug 12 07:22:31 PM PDT 24 |
5196331557 ps |
| T1062 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.617582392 |
|
|
Aug 12 07:13:28 PM PDT 24 |
Aug 12 07:18:48 PM PDT 24 |
2800361742 ps |
| T816 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.86749870 |
|
|
Aug 12 07:37:48 PM PDT 24 |
Aug 12 07:43:28 PM PDT 24 |
3711532988 ps |
| T88 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.1668787169 |
|
|
Aug 12 07:37:32 PM PDT 24 |
Aug 12 07:48:25 PM PDT 24 |
4577503918 ps |
| T96 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.4037813400 |
|
|
Aug 12 07:10:51 PM PDT 24 |
Aug 12 07:40:10 PM PDT 24 |
9933692252 ps |
| T97 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.3273913774 |
|
|
Aug 12 07:09:43 PM PDT 24 |
Aug 12 07:20:03 PM PDT 24 |
4708224706 ps |
| T46 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3293640857 |
|
|
Aug 12 07:15:15 PM PDT 24 |
Aug 12 07:30:11 PM PDT 24 |
7006886071 ps |
| T98 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.2241487549 |
|
|
Aug 12 07:07:41 PM PDT 24 |
Aug 12 07:16:39 PM PDT 24 |
9167951052 ps |
| T99 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1778274820 |
|
|
Aug 12 07:28:28 PM PDT 24 |
Aug 12 07:42:12 PM PDT 24 |
4204107652 ps |
| T100 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.1851248821 |
|
|
Aug 12 07:25:08 PM PDT 24 |
Aug 12 07:34:30 PM PDT 24 |
4984784906 ps |
| T101 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.442927021 |
|
|
Aug 12 07:36:27 PM PDT 24 |
Aug 12 07:46:15 PM PDT 24 |
5508191202 ps |
| T102 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.1506525926 |
|
|
Aug 12 07:43:27 PM PDT 24 |
Aug 12 07:53:13 PM PDT 24 |
4538962232 ps |
| T89 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.972484850 |
|
|
Aug 12 07:41:56 PM PDT 24 |
Aug 12 07:51:38 PM PDT 24 |
4803947240 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_flash_init.2558496242 |
|
|
Aug 12 07:08:10 PM PDT 24 |
Aug 12 07:46:40 PM PDT 24 |
20536170528 ps |
| T795 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.1337480728 |
|
|
Aug 12 07:36:27 PM PDT 24 |
Aug 12 07:46:05 PM PDT 24 |
4810022412 ps |
| T252 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.3178046987 |
|
|
Aug 12 07:08:51 PM PDT 24 |
Aug 12 07:12:36 PM PDT 24 |
2521845572 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_aes_enc.2871129485 |
|
|
Aug 12 07:08:33 PM PDT 24 |
Aug 12 07:12:36 PM PDT 24 |
2623835532 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1195735513 |
|
|
Aug 12 07:13:31 PM PDT 24 |
Aug 12 07:22:55 PM PDT 24 |
7367965000 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2286616101 |
|
|
Aug 12 07:26:36 PM PDT 24 |
Aug 12 07:30:33 PM PDT 24 |
3005542582 ps |
| T9 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.3900741618 |
|
|
Aug 12 07:07:10 PM PDT 24 |
Aug 12 07:13:06 PM PDT 24 |
3183029974 ps |
| T858 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.3832388930 |
|
|
Aug 12 07:35:41 PM PDT 24 |
Aug 12 07:44:50 PM PDT 24 |
4245140312 ps |
| T1066 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.1275195233 |
|
|
Aug 12 07:16:46 PM PDT 24 |
Aug 12 07:53:02 PM PDT 24 |
10203376996 ps |
| T796 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.1005902276 |
|
|
Aug 12 07:35:01 PM PDT 24 |
Aug 12 07:40:43 PM PDT 24 |
3411514928 ps |
| T1067 |
/workspace/coverage/default/0.rom_keymgr_functest.2657330900 |
|
|
Aug 12 07:11:18 PM PDT 24 |
Aug 12 07:19:02 PM PDT 24 |
3729738630 ps |
| T1068 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.2996462182 |
|
|
Aug 12 07:15:03 PM PDT 24 |
Aug 12 08:26:54 PM PDT 24 |
14693734310 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.618866531 |
|
|
Aug 12 07:27:03 PM PDT 24 |
Aug 12 07:30:05 PM PDT 24 |
2771938960 ps |
| T351 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.1084264316 |
|
|
Aug 12 07:28:01 PM PDT 24 |
Aug 12 07:34:10 PM PDT 24 |
3435501994 ps |
| T40 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1144876688 |
|
|
Aug 12 07:26:08 PM PDT 24 |
Aug 12 07:32:45 PM PDT 24 |
6176172000 ps |
| T341 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.1398372804 |
|
|
Aug 12 07:29:31 PM PDT 24 |
Aug 12 07:55:04 PM PDT 24 |
6877289096 ps |
| T365 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.2710272433 |
|
|
Aug 12 07:18:23 PM PDT 24 |
Aug 12 07:22:53 PM PDT 24 |
2914617199 ps |
| T551 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3345504092 |
|
|
Aug 12 07:06:53 PM PDT 24 |
Aug 12 07:32:35 PM PDT 24 |
13204650495 ps |
| T195 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.260983231 |
|
|
Aug 12 07:07:44 PM PDT 24 |
Aug 12 08:36:29 PM PDT 24 |
42717496352 ps |
| T59 |
/workspace/coverage/default/2.chip_sw_alert_test.2391775131 |
|
|
Aug 12 07:26:16 PM PDT 24 |
Aug 12 07:31:54 PM PDT 24 |
3004637454 ps |
| T1070 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.2838794532 |
|
|
Aug 12 07:16:47 PM PDT 24 |
Aug 12 07:26:09 PM PDT 24 |
5470477928 ps |
| T1071 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2644172884 |
|
|
Aug 12 07:34:25 PM PDT 24 |
Aug 12 07:52:51 PM PDT 24 |
10701160022 ps |
| T886 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3956761437 |
|
|
Aug 12 07:39:07 PM PDT 24 |
Aug 12 07:51:19 PM PDT 24 |
5470746000 ps |
| T178 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.3768860484 |
|
|
Aug 12 07:09:05 PM PDT 24 |
Aug 12 07:22:06 PM PDT 24 |
5979538984 ps |
| T217 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2981641008 |
|
|
Aug 12 07:24:26 PM PDT 24 |
Aug 12 07:34:54 PM PDT 24 |
4438258723 ps |
| T121 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.3591641829 |
|
|
Aug 12 07:10:27 PM PDT 24 |
Aug 12 07:47:34 PM PDT 24 |
15481718245 ps |
| T1072 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3181177689 |
|
|
Aug 12 07:30:16 PM PDT 24 |
Aug 12 07:34:46 PM PDT 24 |
2517008210 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.876588768 |
|
|
Aug 12 07:08:02 PM PDT 24 |
Aug 12 07:15:42 PM PDT 24 |
7482988860 ps |
| T810 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.4196804087 |
|
|
Aug 12 07:34:12 PM PDT 24 |
Aug 12 07:40:18 PM PDT 24 |
4158645544 ps |
| T28 |
/workspace/coverage/default/2.chip_sw_gpio.248991510 |
|
|
Aug 12 07:24:15 PM PDT 24 |
Aug 12 07:32:47 PM PDT 24 |
4130666880 ps |
| T1074 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.864363287 |
|
|
Aug 12 07:18:25 PM PDT 24 |
Aug 12 07:23:58 PM PDT 24 |
3611167000 ps |
| T41 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3692007875 |
|
|
Aug 12 07:09:29 PM PDT 24 |
Aug 12 07:18:40 PM PDT 24 |
5646985800 ps |
| T854 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.2277940008 |
|
|
Aug 12 07:33:20 PM PDT 24 |
Aug 12 07:41:22 PM PDT 24 |
4229526672 ps |
| T891 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.1365585513 |
|
|
Aug 12 07:38:42 PM PDT 24 |
Aug 12 07:47:23 PM PDT 24 |
5774823872 ps |
| T855 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.2080295033 |
|
|
Aug 12 07:41:57 PM PDT 24 |
Aug 12 07:47:20 PM PDT 24 |
3597623110 ps |
| T1075 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1226347463 |
|
|
Aug 12 07:09:04 PM PDT 24 |
Aug 12 07:42:12 PM PDT 24 |
13573656765 ps |
| T1076 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.2122054096 |
|
|
Aug 12 07:35:42 PM PDT 24 |
Aug 12 07:50:28 PM PDT 24 |
10002318967 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.3216361274 |
|
|
Aug 12 07:07:08 PM PDT 24 |
Aug 12 07:17:49 PM PDT 24 |
3913731496 ps |
| T547 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.1403456902 |
|
|
Aug 12 07:09:11 PM PDT 24 |
Aug 12 07:21:58 PM PDT 24 |
4384952432 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2889610785 |
|
|
Aug 12 07:10:36 PM PDT 24 |
Aug 12 07:20:07 PM PDT 24 |
4153926188 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.215214986 |
|
|
Aug 12 07:09:06 PM PDT 24 |
Aug 12 07:25:57 PM PDT 24 |
12530241877 ps |
| T242 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.2040725670 |
|
|
Aug 12 07:12:21 PM PDT 24 |
Aug 12 08:44:39 PM PDT 24 |
49472063020 ps |
| T846 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.2290230740 |
|
|
Aug 12 07:37:33 PM PDT 24 |
Aug 12 07:44:05 PM PDT 24 |
3361491200 ps |
| T233 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1450668700 |
|
|
Aug 12 07:18:54 PM PDT 24 |
Aug 12 08:16:03 PM PDT 24 |
15414083200 ps |
| T789 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.678771487 |
|
|
Aug 12 07:16:46 PM PDT 24 |
Aug 12 07:21:50 PM PDT 24 |
2886375717 ps |
| T218 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.849719190 |
|
|
Aug 12 07:23:18 PM PDT 24 |
Aug 12 10:28:18 PM PDT 24 |
64489476226 ps |
| T354 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3950351541 |
|
|
Aug 12 07:29:24 PM PDT 24 |
Aug 12 07:40:53 PM PDT 24 |
5052915251 ps |
| T804 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.4015136667 |
|
|
Aug 12 07:41:07 PM PDT 24 |
Aug 12 07:47:11 PM PDT 24 |
3548167252 ps |
| T1080 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.413597601 |
|
|
Aug 12 07:07:32 PM PDT 24 |
Aug 12 07:30:47 PM PDT 24 |
7444330548 ps |
| T1081 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.4025689853 |
|
|
Aug 12 07:22:36 PM PDT 24 |
Aug 12 07:32:24 PM PDT 24 |
4952788460 ps |
| T1082 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2621181812 |
|
|
Aug 12 07:09:32 PM PDT 24 |
Aug 12 07:13:29 PM PDT 24 |
2754061298 ps |
| T1083 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1109551357 |
|
|
Aug 12 07:26:25 PM PDT 24 |
Aug 12 07:43:53 PM PDT 24 |
10644430254 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.2516389177 |
|
|
Aug 12 07:11:06 PM PDT 24 |
Aug 12 07:21:29 PM PDT 24 |
4072473684 ps |
| T1085 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.2504093593 |
|
|
Aug 12 07:20:47 PM PDT 24 |
Aug 12 07:42:47 PM PDT 24 |
6580795596 ps |
| T146 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.1694923820 |
|
|
Aug 12 07:26:59 PM PDT 24 |
Aug 12 07:43:55 PM PDT 24 |
7186471032 ps |
| T1086 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.473117019 |
|
|
Aug 12 07:36:34 PM PDT 24 |
Aug 12 07:48:09 PM PDT 24 |
8951454637 ps |
| T90 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.3017381427 |
|
|
Aug 12 07:41:28 PM PDT 24 |
Aug 12 07:51:10 PM PDT 24 |
5559044756 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.3750363286 |
|
|
Aug 12 07:22:22 PM PDT 24 |
Aug 12 07:26:54 PM PDT 24 |
3752176369 ps |
| T756 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.3444881793 |
|
|
Aug 12 07:08:45 PM PDT 24 |
Aug 12 07:12:30 PM PDT 24 |
3235400434 ps |
| T1088 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.1350740017 |
|
|
Aug 12 07:10:25 PM PDT 24 |
Aug 12 07:16:23 PM PDT 24 |
3230912918 ps |
| T1089 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.3994642959 |
|
|
Aug 12 07:16:39 PM PDT 24 |
Aug 12 07:26:13 PM PDT 24 |
5135940600 ps |
| T342 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.1510656853 |
|
|
Aug 12 07:16:31 PM PDT 24 |
Aug 12 07:37:08 PM PDT 24 |
6549480792 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.1913665709 |
|
|
Aug 12 07:28:07 PM PDT 24 |
Aug 12 07:48:50 PM PDT 24 |
5933466096 ps |
| T1091 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.720744865 |
|
|
Aug 12 07:25:35 PM PDT 24 |
Aug 12 08:21:58 PM PDT 24 |
18592689544 ps |
| T1092 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.3806931854 |
|
|
Aug 12 07:22:29 PM PDT 24 |
Aug 12 07:35:45 PM PDT 24 |
5449155484 ps |
| T1093 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.4210057962 |
|
|
Aug 12 07:27:05 PM PDT 24 |
Aug 12 07:32:57 PM PDT 24 |
3248340660 ps |
| T1094 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.2625554458 |
|
|
Aug 12 07:34:31 PM PDT 24 |
Aug 12 08:19:45 PM PDT 24 |
11373745946 ps |
| T10 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2396307412 |
|
|
Aug 12 07:09:10 PM PDT 24 |
Aug 12 07:12:01 PM PDT 24 |
3520166271 ps |
| T1095 |
/workspace/coverage/default/1.rom_e2e_smoke.61077799 |
|
|
Aug 12 07:25:56 PM PDT 24 |
Aug 12 08:19:49 PM PDT 24 |
15383121820 ps |
| T1096 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.3077300113 |
|
|
Aug 12 07:34:02 PM PDT 24 |
Aug 12 08:29:49 PM PDT 24 |
15059928574 ps |
| T21 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.2710187068 |
|
|
Aug 12 07:10:21 PM PDT 24 |
Aug 12 08:51:21 PM PDT 24 |
18898415464 ps |
| T814 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.435109366 |
|
|
Aug 12 07:41:42 PM PDT 24 |
Aug 12 07:52:03 PM PDT 24 |
5348868264 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.2921833596 |
|
|
Aug 12 07:08:47 PM PDT 24 |
Aug 12 07:25:10 PM PDT 24 |
8380687605 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.266585360 |
|
|
Aug 12 07:14:23 PM PDT 24 |
Aug 12 07:26:33 PM PDT 24 |
5778358490 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.1149321668 |
|
|
Aug 12 07:10:50 PM PDT 24 |
Aug 12 07:15:41 PM PDT 24 |
3265480599 ps |
| T68 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.854705117 |
|
|
Aug 12 07:31:17 PM PDT 24 |
Aug 12 07:35:10 PM PDT 24 |
3337223640 ps |
| T189 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1099213050 |
|
|
Aug 12 07:28:50 PM PDT 24 |
Aug 12 07:34:45 PM PDT 24 |
2795763120 ps |
| T307 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.3545184594 |
|
|
Aug 12 07:06:43 PM PDT 24 |
Aug 12 07:29:50 PM PDT 24 |
7927818424 ps |
| T308 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.93470778 |
|
|
Aug 12 07:12:39 PM PDT 24 |
Aug 12 07:17:50 PM PDT 24 |
3009606856 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.467486494 |
|
|
Aug 12 07:09:09 PM PDT 24 |
Aug 12 07:15:56 PM PDT 24 |
4082309432 ps |
| T309 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.1228501044 |
|
|
Aug 12 07:16:57 PM PDT 24 |
Aug 12 08:14:45 PM PDT 24 |
14784390344 ps |
| T310 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1524824876 |
|
|
Aug 12 07:35:20 PM PDT 24 |
Aug 12 07:42:16 PM PDT 24 |
4311351200 ps |
| T311 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2444831063 |
|
|
Aug 12 07:40:55 PM PDT 24 |
Aug 12 07:50:03 PM PDT 24 |
5511758720 ps |
| T312 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.2553546698 |
|
|
Aug 12 07:19:03 PM PDT 24 |
Aug 12 09:04:10 PM PDT 24 |
22738571934 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.1808958777 |
|
|
Aug 12 07:15:37 PM PDT 24 |
Aug 12 07:35:06 PM PDT 24 |
8085509640 ps |
| T65 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.4079398132 |
|
|
Aug 12 07:20:34 PM PDT 24 |
Aug 12 07:47:23 PM PDT 24 |
25052961422 ps |
| T1100 |
/workspace/coverage/default/0.rom_e2e_smoke.4119945085 |
|
|
Aug 12 07:15:15 PM PDT 24 |
Aug 12 08:11:24 PM PDT 24 |
15048220640 ps |
| T878 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.2657127944 |
|
|
Aug 12 07:32:32 PM PDT 24 |
Aug 12 07:37:49 PM PDT 24 |
3459676568 ps |
| T1101 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.1373690882 |
|
|
Aug 12 07:16:10 PM PDT 24 |
Aug 12 07:34:56 PM PDT 24 |
5218232088 ps |
| T749 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.2116726828 |
|
|
Aug 12 07:09:59 PM PDT 24 |
Aug 12 07:19:46 PM PDT 24 |
5442376998 ps |
| T1102 |
/workspace/coverage/default/2.rom_e2e_static_critical.2677770068 |
|
|
Aug 12 07:34:53 PM PDT 24 |
Aug 12 08:33:08 PM PDT 24 |
17008463608 ps |
| T283 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.4063856680 |
|
|
Aug 12 07:14:14 PM PDT 24 |
Aug 12 07:27:19 PM PDT 24 |
6411719688 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.774027492 |
|
|
Aug 12 07:16:19 PM PDT 24 |
Aug 12 08:20:00 PM PDT 24 |
16971551682 ps |
| T1104 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.3009770334 |
|
|
Aug 12 07:15:19 PM PDT 24 |
Aug 12 07:48:37 PM PDT 24 |
12667511929 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2773890071 |
|
|
Aug 12 07:14:05 PM PDT 24 |
Aug 12 07:18:17 PM PDT 24 |
3356443858 ps |
| T1106 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.4185042096 |
|
|
Aug 12 07:25:01 PM PDT 24 |
Aug 12 07:37:56 PM PDT 24 |
4669902492 ps |
| T379 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2860373019 |
|
|
Aug 12 07:15:25 PM PDT 24 |
Aug 12 07:21:29 PM PDT 24 |
3682624660 ps |
| T888 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.135166798 |
|
|
Aug 12 07:35:20 PM PDT 24 |
Aug 12 07:45:08 PM PDT 24 |
5522691080 ps |
| T793 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.2858990519 |
|
|
Aug 12 07:41:37 PM PDT 24 |
Aug 12 07:51:16 PM PDT 24 |
4810919480 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2852174530 |
|
|
Aug 12 07:24:15 PM PDT 24 |
Aug 12 07:44:38 PM PDT 24 |
5674105436 ps |