| T1225 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3758175077 |
|
|
Aug 13 07:30:05 PM PDT 24 |
Aug 13 07:48:14 PM PDT 24 |
5877607304 ps |
| T209 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.992697020 |
|
|
Aug 13 07:23:30 PM PDT 24 |
Aug 13 07:31:12 PM PDT 24 |
4462178130 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.1400449301 |
|
|
Aug 13 07:11:22 PM PDT 24 |
Aug 13 07:32:24 PM PDT 24 |
4831179050 ps |
| T1227 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.1435486028 |
|
|
Aug 13 07:08:27 PM PDT 24 |
Aug 13 08:27:37 PM PDT 24 |
18885537332 ps |
| T1228 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.2485230959 |
|
|
Aug 13 07:32:37 PM PDT 24 |
Aug 13 07:59:30 PM PDT 24 |
8751188984 ps |
| T1229 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.94912478 |
|
|
Aug 13 07:08:44 PM PDT 24 |
Aug 13 07:17:46 PM PDT 24 |
3871943464 ps |
| T1230 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.4045134425 |
|
|
Aug 13 07:17:59 PM PDT 24 |
Aug 13 08:31:19 PM PDT 24 |
15217328500 ps |
| T1231 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1405249709 |
|
|
Aug 13 07:10:22 PM PDT 24 |
Aug 13 07:27:52 PM PDT 24 |
5499608890 ps |
| T1232 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.3198889396 |
|
|
Aug 13 07:12:37 PM PDT 24 |
Aug 13 08:04:04 PM PDT 24 |
24388347746 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1434842022 |
|
|
Aug 13 07:12:03 PM PDT 24 |
Aug 13 07:53:36 PM PDT 24 |
27936622584 ps |
| T212 |
/workspace/coverage/default/2.chip_jtag_mem_access.867853574 |
|
|
Aug 13 07:22:22 PM PDT 24 |
Aug 13 07:48:31 PM PDT 24 |
13560600279 ps |
| T1234 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.151987931 |
|
|
Aug 13 07:25:18 PM PDT 24 |
Aug 13 07:45:03 PM PDT 24 |
5703888803 ps |
| T817 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.3807759857 |
|
|
Aug 13 07:39:00 PM PDT 24 |
Aug 13 07:50:53 PM PDT 24 |
5200368312 ps |
| T159 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3661476053 |
|
|
Aug 13 07:18:32 PM PDT 24 |
Aug 13 07:27:26 PM PDT 24 |
3918962938 ps |
| T1235 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.2899789272 |
|
|
Aug 13 07:13:53 PM PDT 24 |
Aug 13 07:20:04 PM PDT 24 |
3850810956 ps |
| T1236 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.3037293405 |
|
|
Aug 13 07:33:09 PM PDT 24 |
Aug 13 07:40:52 PM PDT 24 |
3149814720 ps |
| T1237 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.3084905782 |
|
|
Aug 13 07:14:51 PM PDT 24 |
Aug 13 07:20:49 PM PDT 24 |
3095902708 ps |
| T1238 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.481965285 |
|
|
Aug 13 07:17:13 PM PDT 24 |
Aug 13 07:26:42 PM PDT 24 |
18598127600 ps |
| T1239 |
/workspace/coverage/default/2.rom_e2e_static_critical.552602328 |
|
|
Aug 13 07:36:18 PM PDT 24 |
Aug 13 08:30:55 PM PDT 24 |
17034840856 ps |
| T1240 |
/workspace/coverage/default/1.rom_e2e_smoke.2531487901 |
|
|
Aug 13 07:25:12 PM PDT 24 |
Aug 13 08:28:53 PM PDT 24 |
15394810272 ps |
| T1241 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.649508521 |
|
|
Aug 13 07:33:48 PM PDT 24 |
Aug 13 07:59:56 PM PDT 24 |
8888961044 ps |
| T1242 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3241634558 |
|
|
Aug 13 07:15:56 PM PDT 24 |
Aug 13 07:19:55 PM PDT 24 |
2660034345 ps |
| T1243 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.2756508398 |
|
|
Aug 13 07:11:13 PM PDT 24 |
Aug 13 07:18:45 PM PDT 24 |
3641366784 ps |
| T843 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.2311901317 |
|
|
Aug 13 07:40:50 PM PDT 24 |
Aug 13 07:47:04 PM PDT 24 |
3777008476 ps |
| T1244 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.1041346815 |
|
|
Aug 13 07:10:29 PM PDT 24 |
Aug 13 07:42:58 PM PDT 24 |
25182566254 ps |
| T1245 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.3288537025 |
|
|
Aug 13 07:10:40 PM PDT 24 |
Aug 13 07:20:22 PM PDT 24 |
7095571164 ps |
| T812 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.3668039390 |
|
|
Aug 13 07:36:30 PM PDT 24 |
Aug 13 07:43:02 PM PDT 24 |
3385965376 ps |
| T850 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.2247350281 |
|
|
Aug 13 07:40:18 PM PDT 24 |
Aug 13 07:48:20 PM PDT 24 |
3697019032 ps |
| T1246 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1090442177 |
|
|
Aug 13 07:34:29 PM PDT 24 |
Aug 13 07:44:30 PM PDT 24 |
5875091320 ps |
| T1247 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3697504381 |
|
|
Aug 13 07:31:46 PM PDT 24 |
Aug 13 08:00:45 PM PDT 24 |
8655239267 ps |
| T1248 |
/workspace/coverage/default/2.rom_e2e_smoke.1007446187 |
|
|
Aug 13 07:35:08 PM PDT 24 |
Aug 13 08:42:48 PM PDT 24 |
14658173280 ps |
| T337 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.272261083 |
|
|
Aug 13 07:31:20 PM PDT 24 |
Aug 13 07:44:03 PM PDT 24 |
4857915776 ps |
| T1249 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.4028539539 |
|
|
Aug 13 07:19:10 PM PDT 24 |
Aug 13 07:27:51 PM PDT 24 |
7750832660 ps |
| T1250 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.748248158 |
|
|
Aug 13 07:33:48 PM PDT 24 |
Aug 13 07:44:57 PM PDT 24 |
4167922004 ps |
| T1251 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.3204237649 |
|
|
Aug 13 07:26:35 PM PDT 24 |
Aug 13 07:31:55 PM PDT 24 |
3237210522 ps |
| T1252 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.3128347691 |
|
|
Aug 13 07:20:08 PM PDT 24 |
Aug 13 09:07:58 PM PDT 24 |
23289396197 ps |
| T1253 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1767787349 |
|
|
Aug 13 07:12:05 PM PDT 24 |
Aug 13 07:45:45 PM PDT 24 |
7557643370 ps |
| T1254 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.2127063757 |
|
|
Aug 13 07:31:12 PM PDT 24 |
Aug 13 07:33:08 PM PDT 24 |
2960761351 ps |
| T1255 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.2583313503 |
|
|
Aug 13 07:41:04 PM PDT 24 |
Aug 13 07:51:37 PM PDT 24 |
4838782080 ps |
| T1256 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3587102203 |
|
|
Aug 13 07:33:15 PM PDT 24 |
Aug 13 07:39:04 PM PDT 24 |
5529613535 ps |
| T253 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.1004497580 |
|
|
Aug 13 07:37:05 PM PDT 24 |
Aug 13 07:47:49 PM PDT 24 |
5082735076 ps |
| T1257 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.959866094 |
|
|
Aug 13 07:21:08 PM PDT 24 |
Aug 13 08:19:43 PM PDT 24 |
24791795850 ps |
| T312 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.2549098289 |
|
|
Aug 13 07:29:10 PM PDT 24 |
Aug 13 07:43:39 PM PDT 24 |
8658960091 ps |
| T1258 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.67567194 |
|
|
Aug 13 07:20:41 PM PDT 24 |
Aug 13 07:29:48 PM PDT 24 |
4030502382 ps |
| T1259 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.2143932197 |
|
|
Aug 13 07:14:10 PM PDT 24 |
Aug 13 07:33:49 PM PDT 24 |
7218777904 ps |
| T1260 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.784126363 |
|
|
Aug 13 07:22:33 PM PDT 24 |
Aug 13 07:34:29 PM PDT 24 |
4572254650 ps |
| T1261 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.825937735 |
|
|
Aug 13 07:09:00 PM PDT 24 |
Aug 13 07:56:01 PM PDT 24 |
12893214873 ps |
| T320 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1163837184 |
|
|
Aug 13 07:19:14 PM PDT 24 |
Aug 13 07:26:40 PM PDT 24 |
3801605132 ps |
| T1262 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2905217834 |
|
|
Aug 13 07:41:17 PM PDT 24 |
Aug 13 07:50:46 PM PDT 24 |
5207210322 ps |
| T1263 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.1786950989 |
|
|
Aug 13 07:35:39 PM PDT 24 |
Aug 13 07:44:21 PM PDT 24 |
4645010232 ps |
| T1264 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.3768708413 |
|
|
Aug 13 07:39:39 PM PDT 24 |
Aug 13 07:45:34 PM PDT 24 |
3098906136 ps |
| T1265 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.407658474 |
|
|
Aug 13 07:26:20 PM PDT 24 |
Aug 13 07:32:07 PM PDT 24 |
3540208911 ps |
| T1266 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.631347338 |
|
|
Aug 13 07:10:51 PM PDT 24 |
Aug 13 07:17:10 PM PDT 24 |
3273801610 ps |
| T330 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3440120815 |
|
|
Aug 13 07:18:04 PM PDT 24 |
Aug 13 07:32:18 PM PDT 24 |
5404848964 ps |
| T1267 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.1481573127 |
|
|
Aug 13 07:34:00 PM PDT 24 |
Aug 13 08:12:07 PM PDT 24 |
12603682076 ps |
| T1268 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.1742213033 |
|
|
Aug 13 07:36:27 PM PDT 24 |
Aug 13 08:44:18 PM PDT 24 |
14832290276 ps |
| T719 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.2536155309 |
|
|
Aug 13 07:27:23 PM PDT 24 |
Aug 13 07:38:00 PM PDT 24 |
3386683508 ps |
| T1269 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.2078423180 |
|
|
Aug 13 07:18:57 PM PDT 24 |
Aug 13 08:31:28 PM PDT 24 |
15719528484 ps |
| T1270 |
/workspace/coverage/default/0.chip_sw_example_flash.3287768585 |
|
|
Aug 13 07:09:41 PM PDT 24 |
Aug 13 07:13:44 PM PDT 24 |
2880276436 ps |
| T1271 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.1113128504 |
|
|
Aug 13 07:40:45 PM PDT 24 |
Aug 13 07:52:45 PM PDT 24 |
5366453224 ps |
| T736 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.3400362633 |
|
|
Aug 13 07:11:31 PM PDT 24 |
Aug 13 07:19:39 PM PDT 24 |
5617672933 ps |
| T721 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2636707032 |
|
|
Aug 13 07:12:18 PM PDT 24 |
Aug 13 08:53:00 PM PDT 24 |
37788459140 ps |
| T1272 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.2733143015 |
|
|
Aug 13 07:18:30 PM PDT 24 |
Aug 13 07:32:43 PM PDT 24 |
5170118600 ps |
| T765 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.700011178 |
|
|
Aug 13 07:13:23 PM PDT 24 |
Aug 13 07:51:10 PM PDT 24 |
10803864154 ps |
| T1273 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.197691153 |
|
|
Aug 13 07:11:47 PM PDT 24 |
Aug 13 07:34:39 PM PDT 24 |
8827432238 ps |
| T1274 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.1500978226 |
|
|
Aug 13 07:12:11 PM PDT 24 |
Aug 13 07:17:24 PM PDT 24 |
3028268911 ps |
| T1275 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.277239843 |
|
|
Aug 13 07:10:44 PM PDT 24 |
Aug 13 07:52:47 PM PDT 24 |
9449639744 ps |
| T174 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.2868061506 |
|
|
Aug 13 07:09:12 PM PDT 24 |
Aug 13 07:16:28 PM PDT 24 |
5909646832 ps |
| T820 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2053248979 |
|
|
Aug 13 07:41:04 PM PDT 24 |
Aug 13 07:47:45 PM PDT 24 |
4729989208 ps |
| T1276 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1267266279 |
|
|
Aug 13 07:31:14 PM PDT 24 |
Aug 13 07:36:15 PM PDT 24 |
2859446184 ps |
| T1277 |
/workspace/coverage/default/0.chip_sw_flash_init.135681589 |
|
|
Aug 13 07:11:48 PM PDT 24 |
Aug 13 07:47:17 PM PDT 24 |
19533234900 ps |
| T441 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.2480350008 |
|
|
Aug 13 07:28:44 PM PDT 24 |
Aug 13 07:35:43 PM PDT 24 |
4315876656 ps |
| T1278 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.484221668 |
|
|
Aug 13 07:33:42 PM PDT 24 |
Aug 13 07:40:04 PM PDT 24 |
5874127324 ps |
| T837 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1113513471 |
|
|
Aug 13 07:36:49 PM PDT 24 |
Aug 13 07:43:39 PM PDT 24 |
4273629160 ps |
| T826 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3644420223 |
|
|
Aug 13 07:34:26 PM PDT 24 |
Aug 13 07:41:33 PM PDT 24 |
3156427424 ps |
| T1279 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.587664267 |
|
|
Aug 13 07:37:15 PM PDT 24 |
Aug 13 07:50:25 PM PDT 24 |
11465780369 ps |
| T1280 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.2200118632 |
|
|
Aug 13 07:09:52 PM PDT 24 |
Aug 13 08:09:10 PM PDT 24 |
18333817098 ps |
| T1281 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.655752770 |
|
|
Aug 13 07:36:01 PM PDT 24 |
Aug 13 07:45:50 PM PDT 24 |
5319920578 ps |
| T1282 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1540992323 |
|
|
Aug 13 07:25:09 PM PDT 24 |
Aug 13 07:34:41 PM PDT 24 |
8113356650 ps |
| T1283 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1806634761 |
|
|
Aug 13 07:35:06 PM PDT 24 |
Aug 13 07:54:56 PM PDT 24 |
7833261196 ps |
| T757 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.62994244 |
|
|
Aug 13 07:32:55 PM PDT 24 |
Aug 13 07:40:11 PM PDT 24 |
5087579656 ps |
| T1284 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1183343829 |
|
|
Aug 13 07:25:03 PM PDT 24 |
Aug 13 08:56:58 PM PDT 24 |
50794939543 ps |
| T1285 |
/workspace/coverage/default/1.chip_sw_example_concurrency.3356352425 |
|
|
Aug 13 07:15:36 PM PDT 24 |
Aug 13 07:20:06 PM PDT 24 |
3174099198 ps |
| T1286 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.774594358 |
|
|
Aug 13 07:33:38 PM PDT 24 |
Aug 13 07:41:48 PM PDT 24 |
6858285521 ps |
| T146 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.1700892569 |
|
|
Aug 13 07:31:20 PM PDT 24 |
Aug 13 08:35:42 PM PDT 24 |
28330466159 ps |
| T841 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2143128895 |
|
|
Aug 13 07:11:43 PM PDT 24 |
Aug 13 07:18:19 PM PDT 24 |
4060993836 ps |
| T1287 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.4286937796 |
|
|
Aug 13 07:31:30 PM PDT 24 |
Aug 13 07:39:51 PM PDT 24 |
6170894732 ps |
| T1288 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.870049003 |
|
|
Aug 13 07:10:24 PM PDT 24 |
Aug 13 07:13:27 PM PDT 24 |
2053902396 ps |
| T1289 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.1342102781 |
|
|
Aug 13 07:12:41 PM PDT 24 |
Aug 13 07:17:30 PM PDT 24 |
2772426936 ps |
| T1290 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.599333359 |
|
|
Aug 13 07:35:08 PM PDT 24 |
Aug 13 07:43:32 PM PDT 24 |
3459480146 ps |
| T1291 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3166446628 |
|
|
Aug 13 07:32:23 PM PDT 24 |
Aug 13 08:26:36 PM PDT 24 |
24907548232 ps |
| T1292 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.386822676 |
|
|
Aug 13 07:28:43 PM PDT 24 |
Aug 13 07:34:23 PM PDT 24 |
2997068982 ps |
| T1293 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.3463718575 |
|
|
Aug 13 07:21:39 PM PDT 24 |
Aug 13 07:26:00 PM PDT 24 |
2379552755 ps |
| T1294 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.1816356133 |
|
|
Aug 13 07:19:33 PM PDT 24 |
Aug 13 08:18:38 PM PDT 24 |
15224516912 ps |
| T35 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1091545667 |
|
|
Aug 13 07:08:37 PM PDT 24 |
Aug 13 07:18:40 PM PDT 24 |
5259059580 ps |
| T1295 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.3643223263 |
|
|
Aug 13 07:19:17 PM PDT 24 |
Aug 13 07:49:13 PM PDT 24 |
8175203010 ps |
| T848 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.3019012246 |
|
|
Aug 13 07:37:44 PM PDT 24 |
Aug 13 07:48:47 PM PDT 24 |
5352273032 ps |
| T1296 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3979714268 |
|
|
Aug 13 07:17:35 PM PDT 24 |
Aug 13 07:24:57 PM PDT 24 |
4288324250 ps |
| T321 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3411850491 |
|
|
Aug 13 07:29:30 PM PDT 24 |
Aug 13 07:36:58 PM PDT 24 |
3693060168 ps |
| T210 |
/workspace/coverage/default/1.chip_sw_power_virus.2083986111 |
|
|
Aug 13 07:27:28 PM PDT 24 |
Aug 13 07:47:52 PM PDT 24 |
5696046732 ps |
| T238 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.756585259 |
|
|
Aug 13 07:29:43 PM PDT 24 |
Aug 13 08:25:24 PM PDT 24 |
13424801204 ps |
| T1297 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.137458040 |
|
|
Aug 13 07:13:21 PM PDT 24 |
Aug 13 07:20:19 PM PDT 24 |
6830843850 ps |
| T1298 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.2459114332 |
|
|
Aug 13 07:10:05 PM PDT 24 |
Aug 13 07:27:55 PM PDT 24 |
8308054790 ps |
| T1299 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.3093434287 |
|
|
Aug 13 07:39:50 PM PDT 24 |
Aug 13 07:45:53 PM PDT 24 |
3744192352 ps |
| T1300 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.1624442395 |
|
|
Aug 13 07:28:18 PM PDT 24 |
Aug 13 07:32:02 PM PDT 24 |
3284764808 ps |
| T139 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2178907775 |
|
|
Aug 13 07:16:44 PM PDT 24 |
Aug 13 07:29:11 PM PDT 24 |
6945282456 ps |
| T766 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.2190769712 |
|
|
Aug 13 07:12:38 PM PDT 24 |
Aug 13 07:54:52 PM PDT 24 |
34077551820 ps |
| T1301 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.2258273960 |
|
|
Aug 13 07:08:40 PM PDT 24 |
Aug 13 07:11:29 PM PDT 24 |
2576324688 ps |
| T548 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2685045421 |
|
|
Aug 13 07:14:51 PM PDT 24 |
Aug 13 07:28:01 PM PDT 24 |
5689496700 ps |
| T1302 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.4183999946 |
|
|
Aug 13 07:34:00 PM PDT 24 |
Aug 13 07:40:48 PM PDT 24 |
4302896808 ps |
| T1303 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.1450212422 |
|
|
Aug 13 07:16:15 PM PDT 24 |
Aug 13 07:20:59 PM PDT 24 |
4048957216 ps |
| T1304 |
/workspace/coverage/default/1.chip_tap_straps_rma.4160263412 |
|
|
Aug 13 07:20:13 PM PDT 24 |
Aug 13 07:23:05 PM PDT 24 |
2341010575 ps |
| T1305 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.1411849594 |
|
|
Aug 13 07:17:29 PM PDT 24 |
Aug 13 07:21:04 PM PDT 24 |
2692598122 ps |
| T254 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.2163312399 |
|
|
Aug 13 07:33:44 PM PDT 24 |
Aug 13 07:41:03 PM PDT 24 |
3450420710 ps |
| T1306 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.3712693437 |
|
|
Aug 13 07:15:15 PM PDT 24 |
Aug 13 07:25:47 PM PDT 24 |
7010287408 ps |
| T138 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2294242035 |
|
|
Aug 13 07:28:54 PM PDT 24 |
Aug 13 07:41:03 PM PDT 24 |
5104498400 ps |
| T362 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.1182734063 |
|
|
Aug 13 07:12:56 PM PDT 24 |
Aug 13 07:18:10 PM PDT 24 |
3136100893 ps |
| T1307 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1282117249 |
|
|
Aug 13 07:25:43 PM PDT 24 |
Aug 13 08:28:14 PM PDT 24 |
15464973358 ps |
| T1308 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3781886778 |
|
|
Aug 13 07:11:56 PM PDT 24 |
Aug 13 07:23:34 PM PDT 24 |
4401045250 ps |
| T1309 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.3141468085 |
|
|
Aug 13 07:33:09 PM PDT 24 |
Aug 13 07:42:00 PM PDT 24 |
3799116818 ps |
| T1310 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1844259570 |
|
|
Aug 13 07:13:24 PM PDT 24 |
Aug 13 10:04:17 PM PDT 24 |
58667525400 ps |
| T1311 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.3118204151 |
|
|
Aug 13 07:15:59 PM PDT 24 |
Aug 13 07:19:33 PM PDT 24 |
2707374860 ps |
| T1312 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.4145702295 |
|
|
Aug 13 07:15:20 PM PDT 24 |
Aug 13 07:35:58 PM PDT 24 |
9191810680 ps |
| T1313 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3430718725 |
|
|
Aug 13 07:27:06 PM PDT 24 |
Aug 13 07:34:28 PM PDT 24 |
4982219896 ps |
| T737 |
/workspace/coverage/default/3.chip_tap_straps_dev.2156718462 |
|
|
Aug 13 07:32:48 PM PDT 24 |
Aug 13 07:53:48 PM PDT 24 |
12504808200 ps |
| T87 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.3180713936 |
|
|
Aug 13 07:39:59 PM PDT 24 |
Aug 13 07:45:42 PM PDT 24 |
4318219728 ps |
| T1314 |
/workspace/coverage/default/0.chip_sw_power_idle_load.2882609737 |
|
|
Aug 13 07:14:17 PM PDT 24 |
Aug 13 07:24:09 PM PDT 24 |
4192999562 ps |
| T1315 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.79686893 |
|
|
Aug 13 07:10:17 PM PDT 24 |
Aug 13 07:16:10 PM PDT 24 |
3465352160 ps |
| T1316 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.2031519903 |
|
|
Aug 13 07:10:33 PM PDT 24 |
Aug 13 07:15:44 PM PDT 24 |
6794106300 ps |
| T1317 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.202937335 |
|
|
Aug 13 07:12:34 PM PDT 24 |
Aug 13 07:16:51 PM PDT 24 |
2610762511 ps |
| T1318 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.3408701814 |
|
|
Aug 13 07:15:48 PM PDT 24 |
Aug 13 07:33:37 PM PDT 24 |
7787880216 ps |
| T1319 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.784144359 |
|
|
Aug 13 07:14:52 PM PDT 24 |
Aug 13 07:20:56 PM PDT 24 |
3451390148 ps |
| T1320 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.3295810141 |
|
|
Aug 13 07:39:08 PM PDT 24 |
Aug 13 07:49:35 PM PDT 24 |
6559255264 ps |
| T802 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.800829048 |
|
|
Aug 13 07:41:24 PM PDT 24 |
Aug 13 07:53:06 PM PDT 24 |
5447265260 ps |
| T1321 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.1722555993 |
|
|
Aug 13 07:15:30 PM PDT 24 |
Aug 13 07:49:30 PM PDT 24 |
13428283653 ps |
| T1322 |
/workspace/coverage/default/3.chip_tap_straps_rma.172548908 |
|
|
Aug 13 07:32:24 PM PDT 24 |
Aug 13 07:35:33 PM PDT 24 |
2423036014 ps |
| T213 |
/workspace/coverage/default/0.chip_jtag_csr_rw.138050510 |
|
|
Aug 13 07:02:45 PM PDT 24 |
Aug 13 07:25:52 PM PDT 24 |
11619074566 ps |
| T1323 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.3835593746 |
|
|
Aug 13 07:10:26 PM PDT 24 |
Aug 13 07:15:21 PM PDT 24 |
3072896512 ps |
| T1324 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.2838020770 |
|
|
Aug 13 07:21:09 PM PDT 24 |
Aug 13 08:32:10 PM PDT 24 |
15377592427 ps |
| T861 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.2169891757 |
|
|
Aug 13 07:34:47 PM PDT 24 |
Aug 13 07:45:40 PM PDT 24 |
4864800932 ps |
| T1325 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.560912238 |
|
|
Aug 13 07:19:30 PM PDT 24 |
Aug 13 08:35:34 PM PDT 24 |
15353815534 ps |
| T862 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.424171298 |
|
|
Aug 13 07:34:38 PM PDT 24 |
Aug 13 07:44:47 PM PDT 24 |
5169468792 ps |
| T1326 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.1765037672 |
|
|
Aug 13 07:33:11 PM PDT 24 |
Aug 13 07:38:56 PM PDT 24 |
3896671800 ps |
| T1327 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.2810582920 |
|
|
Aug 13 07:11:44 PM PDT 24 |
Aug 13 07:30:27 PM PDT 24 |
8147326132 ps |
| T1328 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.2322787626 |
|
|
Aug 13 07:42:34 PM PDT 24 |
Aug 13 07:50:29 PM PDT 24 |
4543512256 ps |
| T1329 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.1182303571 |
|
|
Aug 13 07:31:40 PM PDT 24 |
Aug 13 07:34:31 PM PDT 24 |
2731385499 ps |
| T1330 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.351627935 |
|
|
Aug 13 07:19:23 PM PDT 24 |
Aug 13 08:08:34 PM PDT 24 |
10802147148 ps |
| T1331 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3337767869 |
|
|
Aug 13 07:27:45 PM PDT 24 |
Aug 13 07:46:03 PM PDT 24 |
10294040936 ps |
| T39 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.3912252902 |
|
|
Aug 13 07:14:00 PM PDT 24 |
Aug 13 07:20:53 PM PDT 24 |
3341270886 ps |
| T1332 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.922972996 |
|
|
Aug 13 07:25:34 PM PDT 24 |
Aug 13 07:44:47 PM PDT 24 |
7411646292 ps |
| T1333 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.3705870175 |
|
|
Aug 13 07:33:52 PM PDT 24 |
Aug 13 07:45:23 PM PDT 24 |
5685720000 ps |
| T380 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.2121319102 |
|
|
Aug 13 07:42:21 PM PDT 24 |
Aug 13 07:53:29 PM PDT 24 |
4799329386 ps |
| T447 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.2631201260 |
|
|
Aug 13 07:37:48 PM PDT 24 |
Aug 13 07:45:08 PM PDT 24 |
4151943160 ps |
| T1334 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2598704844 |
|
|
Aug 13 07:09:38 PM PDT 24 |
Aug 13 07:21:45 PM PDT 24 |
5328480528 ps |
| T1335 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.1264482492 |
|
|
Aug 13 07:41:11 PM PDT 24 |
Aug 13 07:49:09 PM PDT 24 |
4627766390 ps |
| T851 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2648372548 |
|
|
Aug 13 07:18:31 PM PDT 24 |
Aug 13 07:25:16 PM PDT 24 |
3395110696 ps |
| T1336 |
/workspace/coverage/default/1.chip_sw_aes_idle.3586279157 |
|
|
Aug 13 07:18:05 PM PDT 24 |
Aug 13 07:22:09 PM PDT 24 |
2660698800 ps |
| T1337 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1612532859 |
|
|
Aug 13 07:15:56 PM PDT 24 |
Aug 13 08:08:38 PM PDT 24 |
32643613090 ps |
| T1338 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1608810588 |
|
|
Aug 13 07:18:18 PM PDT 24 |
Aug 13 07:42:42 PM PDT 24 |
12810256288 ps |
| T1339 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.4097154563 |
|
|
Aug 13 07:37:14 PM PDT 24 |
Aug 13 08:01:46 PM PDT 24 |
8535832470 ps |
| T160 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.259189008 |
|
|
Aug 13 07:13:23 PM PDT 24 |
Aug 13 07:25:06 PM PDT 24 |
3715434750 ps |
| T1340 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.1335590471 |
|
|
Aug 13 07:18:03 PM PDT 24 |
Aug 13 08:15:47 PM PDT 24 |
13967346446 ps |
| T1341 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.3333064533 |
|
|
Aug 13 07:27:24 PM PDT 24 |
Aug 13 08:22:40 PM PDT 24 |
14539378210 ps |
| T1342 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.4098570055 |
|
|
Aug 13 07:23:06 PM PDT 24 |
Aug 13 07:33:27 PM PDT 24 |
3712424740 ps |
| T48 |
/workspace/coverage/default/2.chip_sw_alert_test.731558502 |
|
|
Aug 13 07:27:21 PM PDT 24 |
Aug 13 07:32:29 PM PDT 24 |
2844916370 ps |
| T1343 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.4125469994 |
|
|
Aug 13 07:22:06 PM PDT 24 |
Aug 13 07:46:47 PM PDT 24 |
5368384260 ps |
| T782 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.485899380 |
|
|
Aug 13 07:14:37 PM PDT 24 |
Aug 13 07:23:45 PM PDT 24 |
4484834680 ps |
| T854 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.2390665522 |
|
|
Aug 13 07:37:04 PM PDT 24 |
Aug 13 07:42:55 PM PDT 24 |
3925102500 ps |
| T1344 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.3358183600 |
|
|
Aug 13 07:20:51 PM PDT 24 |
Aug 13 07:30:14 PM PDT 24 |
5662661200 ps |
| T1345 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1926760632 |
|
|
Aug 13 07:35:27 PM PDT 24 |
Aug 13 07:53:48 PM PDT 24 |
13661048815 ps |
| T1346 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.406872011 |
|
|
Aug 13 07:36:14 PM PDT 24 |
Aug 13 07:42:15 PM PDT 24 |
2877298792 ps |
| T88 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.4030399652 |
|
|
Aug 13 07:39:08 PM PDT 24 |
Aug 13 07:44:49 PM PDT 24 |
3919532564 ps |
| T1347 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3768554737 |
|
|
Aug 13 07:12:04 PM PDT 24 |
Aug 13 07:25:23 PM PDT 24 |
7462942520 ps |
| T1348 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3719006256 |
|
|
Aug 13 07:30:50 PM PDT 24 |
Aug 13 07:52:27 PM PDT 24 |
10004810336 ps |
| T347 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.2743527689 |
|
|
Aug 13 07:12:45 PM PDT 24 |
Aug 13 07:21:33 PM PDT 24 |
3760347440 ps |
| T1349 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.2258492468 |
|
|
Aug 13 07:29:45 PM PDT 24 |
Aug 13 07:43:19 PM PDT 24 |
6722512297 ps |
| T167 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.2704697268 |
|
|
Aug 13 07:12:39 PM PDT 24 |
Aug 13 07:14:43 PM PDT 24 |
2947608175 ps |
| T1350 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.2406994728 |
|
|
Aug 13 07:25:19 PM PDT 24 |
Aug 13 07:32:23 PM PDT 24 |
3395488920 ps |
| T761 |
/workspace/coverage/default/2.rom_raw_unlock.32951890 |
|
|
Aug 13 07:33:05 PM PDT 24 |
Aug 13 07:38:21 PM PDT 24 |
5739179146 ps |
| T1351 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2975351896 |
|
|
Aug 13 07:25:23 PM PDT 24 |
Aug 13 07:36:35 PM PDT 24 |
4170347404 ps |
| T840 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.953638028 |
|
|
Aug 13 07:38:03 PM PDT 24 |
Aug 13 07:46:12 PM PDT 24 |
5068714400 ps |
| T1352 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.1694203603 |
|
|
Aug 13 07:16:44 PM PDT 24 |
Aug 13 08:09:56 PM PDT 24 |
15340942071 ps |
| T746 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.263774752 |
|
|
Aug 13 07:15:20 PM PDT 24 |
Aug 13 07:19:52 PM PDT 24 |
3597064904 ps |
| T1353 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.423773283 |
|
|
Aug 13 07:25:08 PM PDT 24 |
Aug 13 07:30:58 PM PDT 24 |
2750828633 ps |
| T815 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2757027469 |
|
|
Aug 13 07:36:54 PM PDT 24 |
Aug 13 07:43:47 PM PDT 24 |
3240797148 ps |
| T1354 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.712670681 |
|
|
Aug 13 07:17:30 PM PDT 24 |
Aug 13 07:31:51 PM PDT 24 |
6822490536 ps |
| T1355 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.137019784 |
|
|
Aug 13 07:16:12 PM PDT 24 |
Aug 13 07:44:25 PM PDT 24 |
7008941540 ps |
| T849 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.1288401798 |
|
|
Aug 13 07:36:12 PM PDT 24 |
Aug 13 07:47:16 PM PDT 24 |
4747501474 ps |
| T1356 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.3480367144 |
|
|
Aug 13 07:13:02 PM PDT 24 |
Aug 13 07:23:59 PM PDT 24 |
5860966632 ps |
| T1357 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2404043491 |
|
|
Aug 13 07:13:37 PM PDT 24 |
Aug 13 07:18:48 PM PDT 24 |
2904997096 ps |
| T1358 |
/workspace/coverage/default/2.chip_sw_edn_kat.699075592 |
|
|
Aug 13 07:28:42 PM PDT 24 |
Aug 13 07:41:33 PM PDT 24 |
3062955312 ps |
| T1359 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.1746019871 |
|
|
Aug 13 07:20:32 PM PDT 24 |
Aug 13 08:32:47 PM PDT 24 |
15111437032 ps |
| T1360 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.2343161667 |
|
|
Aug 13 07:17:39 PM PDT 24 |
Aug 13 08:53:14 PM PDT 24 |
24625211144 ps |
| T1361 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.97405227 |
|
|
Aug 13 07:32:23 PM PDT 24 |
Aug 13 07:41:26 PM PDT 24 |
4597562076 ps |
| T1362 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3129460055 |
|
|
Aug 13 07:12:14 PM PDT 24 |
Aug 13 07:17:04 PM PDT 24 |
2919362304 ps |
| T1363 |
/workspace/coverage/default/1.chip_tap_straps_dev.160904547 |
|
|
Aug 13 07:22:45 PM PDT 24 |
Aug 13 07:31:37 PM PDT 24 |
6355552750 ps |
| T1364 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.1182956443 |
|
|
Aug 13 07:08:24 PM PDT 24 |
Aug 13 07:13:06 PM PDT 24 |
3456644570 ps |
| T845 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.942492487 |
|
|
Aug 13 07:37:15 PM PDT 24 |
Aug 13 07:49:01 PM PDT 24 |
5492461952 ps |
| T1365 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.472122166 |
|
|
Aug 13 07:40:12 PM PDT 24 |
Aug 13 07:50:41 PM PDT 24 |
5092572780 ps |
| T1366 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.2448701711 |
|
|
Aug 13 07:08:31 PM PDT 24 |
Aug 13 07:19:02 PM PDT 24 |
5711630408 ps |
| T54 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.4289690245 |
|
|
Aug 13 07:24:11 PM PDT 24 |
Aug 13 07:29:10 PM PDT 24 |
3555066970 ps |
| T404 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.397823570 |
|
|
Aug 13 07:11:33 PM PDT 24 |
Aug 13 07:14:27 PM PDT 24 |
2119010412 ps |
| T1367 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.4075435647 |
|
|
Aug 13 07:24:24 PM PDT 24 |
Aug 13 07:28:11 PM PDT 24 |
2637328000 ps |
| T250 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.4281900516 |
|
|
Aug 13 07:16:45 PM PDT 24 |
Aug 13 07:26:36 PM PDT 24 |
7052439920 ps |
| T1368 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1016666989 |
|
|
Aug 13 07:29:28 PM PDT 24 |
Aug 13 07:34:24 PM PDT 24 |
2892326600 ps |
| T1369 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.545804580 |
|
|
Aug 13 07:31:02 PM PDT 24 |
Aug 13 07:38:04 PM PDT 24 |
3232664684 ps |
| T1370 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.1217708358 |
|
|
Aug 13 07:42:00 PM PDT 24 |
Aug 13 07:52:20 PM PDT 24 |
5050543640 ps |
| T825 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.2675698944 |
|
|
Aug 13 07:38:34 PM PDT 24 |
Aug 13 07:49:21 PM PDT 24 |
5195513150 ps |
| T1371 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.1367809953 |
|
|
Aug 13 07:35:36 PM PDT 24 |
Aug 13 08:01:42 PM PDT 24 |
24726174068 ps |
| T1372 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3630582585 |
|
|
Aug 13 07:27:36 PM PDT 24 |
Aug 13 07:50:03 PM PDT 24 |
6561519621 ps |
| T1373 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.4250334016 |
|
|
Aug 13 07:21:17 PM PDT 24 |
Aug 13 07:28:16 PM PDT 24 |
2885375904 ps |
| T1374 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.1087479997 |
|
|
Aug 13 07:14:55 PM PDT 24 |
Aug 13 07:18:05 PM PDT 24 |
2159840110 ps |
| T807 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.2185329967 |
|
|
Aug 13 07:36:02 PM PDT 24 |
Aug 13 07:42:15 PM PDT 24 |
3268102870 ps |
| T302 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.3840158434 |
|
|
Aug 13 07:30:00 PM PDT 24 |
Aug 13 07:33:45 PM PDT 24 |
3191919588 ps |
| T720 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2032936015 |
|
|
Aug 13 07:11:15 PM PDT 24 |
Aug 13 07:21:59 PM PDT 24 |
3237550696 ps |
| T1375 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3515053933 |
|
|
Aug 13 07:14:30 PM PDT 24 |
Aug 13 07:43:08 PM PDT 24 |
8169629400 ps |
| T1376 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.1657329140 |
|
|
Aug 13 07:32:17 PM PDT 24 |
Aug 13 08:33:23 PM PDT 24 |
18073445352 ps |
| T1377 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.316219211 |
|
|
Aug 13 07:25:11 PM PDT 24 |
Aug 13 08:54:36 PM PDT 24 |
48314870384 ps |
| T55 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.987738256 |
|
|
Aug 13 07:25:25 PM PDT 24 |
Aug 13 07:32:16 PM PDT 24 |
5949986820 ps |
| T36 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2380738242 |
|
|
Aug 13 07:17:11 PM PDT 24 |
Aug 13 07:24:02 PM PDT 24 |
5704074956 ps |
| T1378 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.745498700 |
|
|
Aug 13 07:39:25 PM PDT 24 |
Aug 13 07:50:12 PM PDT 24 |
6024314568 ps |
| T842 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.1546028328 |
|
|
Aug 13 07:38:51 PM PDT 24 |
Aug 13 07:49:30 PM PDT 24 |
6296601804 ps |
| T1379 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.836806352 |
|
|
Aug 13 07:15:40 PM PDT 24 |
Aug 13 07:23:11 PM PDT 24 |
4164635635 ps |
| T827 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.247435101 |
|
|
Aug 13 07:37:20 PM PDT 24 |
Aug 13 07:50:24 PM PDT 24 |
5596288120 ps |
| T1380 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.3602140667 |
|
|
Aug 13 07:16:21 PM PDT 24 |
Aug 13 07:22:11 PM PDT 24 |
2799946040 ps |
| T1381 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.945300062 |
|
|
Aug 13 07:19:58 PM PDT 24 |
Aug 13 07:28:04 PM PDT 24 |
5211977680 ps |
| T1382 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.4243661237 |
|
|
Aug 13 07:36:05 PM PDT 24 |
Aug 13 07:45:10 PM PDT 24 |
4657547488 ps |
| T1383 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1694130432 |
|
|
Aug 13 07:38:11 PM PDT 24 |
Aug 13 07:44:47 PM PDT 24 |
4117233280 ps |
| T1384 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.977451904 |
|
|
Aug 13 07:29:57 PM PDT 24 |
Aug 13 07:33:35 PM PDT 24 |
2301231320 ps |
| T1385 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1204175776 |
|
|
Aug 13 07:17:32 PM PDT 24 |
Aug 13 07:23:45 PM PDT 24 |
4661438556 ps |
| T1386 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.3128271032 |
|
|
Aug 13 07:20:19 PM PDT 24 |
Aug 13 07:27:30 PM PDT 24 |
3892543128 ps |
| T1387 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1158930393 |
|
|
Aug 13 07:24:39 PM PDT 24 |
Aug 13 07:48:09 PM PDT 24 |
10530469669 ps |
| T1388 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.1361943747 |
|
|
Aug 13 07:29:12 PM PDT 24 |
Aug 13 07:48:42 PM PDT 24 |
6911513480 ps |
| T1389 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3183261264 |
|
|
Aug 13 07:13:40 PM PDT 24 |
Aug 13 07:20:58 PM PDT 24 |
4973593456 ps |
| T1390 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2290662538 |
|
|
Aug 13 07:10:03 PM PDT 24 |
Aug 13 07:15:28 PM PDT 24 |
3057172386 ps |
| T777 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.2068291129 |
|
|
Aug 13 07:38:59 PM PDT 24 |
Aug 13 07:50:17 PM PDT 24 |
4488209378 ps |
| T161 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1231938151 |
|
|
Aug 13 07:28:09 PM PDT 24 |
Aug 13 07:38:06 PM PDT 24 |
3613728040 ps |
| T832 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.452572421 |
|
|
Aug 13 07:41:49 PM PDT 24 |
Aug 13 07:47:17 PM PDT 24 |
3092502952 ps |
| T1391 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.3353421966 |
|
|
Aug 13 07:12:43 PM PDT 24 |
Aug 13 07:18:32 PM PDT 24 |
2433894966 ps |
| T1392 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2609754926 |
|
|
Aug 13 07:19:20 PM PDT 24 |
Aug 13 07:53:33 PM PDT 24 |
9431274120 ps |
| T169 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.2238360423 |
|
|
Aug 13 07:25:27 PM PDT 24 |
Aug 13 07:27:21 PM PDT 24 |
2569145556 ps |
| T1393 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.1956142946 |
|
|
Aug 13 07:09:31 PM PDT 24 |
Aug 13 10:24:18 PM PDT 24 |
59320722087 ps |
| T331 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.1606063759 |
|
|
Aug 13 07:17:51 PM PDT 24 |
Aug 13 07:35:18 PM PDT 24 |
6118304936 ps |
| T1394 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.1467749 |
|
|
Aug 13 07:34:49 PM PDT 24 |
Aug 13 08:51:58 PM PDT 24 |
17693307402 ps |
| T438 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.1798126911 |
|
|
Aug 13 07:10:31 PM PDT 24 |
Aug 13 07:34:28 PM PDT 24 |
21466810446 ps |
| T1395 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.3713802266 |
|
|
Aug 13 07:15:29 PM PDT 24 |
Aug 13 07:24:05 PM PDT 24 |
8411879544 ps |
| T1396 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.3329662608 |
|
|
Aug 13 07:21:22 PM PDT 24 |
Aug 13 09:06:38 PM PDT 24 |
24413603266 ps |
| T1397 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.4223579262 |
|
|
Aug 13 07:13:18 PM PDT 24 |
Aug 13 08:57:35 PM PDT 24 |
27266334120 ps |
| T335 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.1225443076 |
|
|
Aug 13 07:12:38 PM PDT 24 |
Aug 13 07:41:34 PM PDT 24 |
7296864478 ps |
| T1398 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.3513679825 |
|
|
Aug 13 07:28:02 PM PDT 24 |
Aug 13 07:34:35 PM PDT 24 |
3827660976 ps |