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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
85.60 88.40 77.09 90.05 89.40 83.77 84.87


Total test records in report: 1034
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T593 /workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.1520923073 Aug 14 05:49:31 PM PDT 24 Aug 14 05:55:36 PM PDT 24 5541602256 ps
T594 /workspace/coverage/default/0.chip_sw_aes_smoketest.2124417561 Aug 14 05:53:04 PM PDT 24 Aug 14 05:58:13 PM PDT 24 3376623098 ps
T471 /workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.4088419619 Aug 14 05:49:53 PM PDT 24 Aug 14 06:02:00 PM PDT 24 4834423550 ps
T595 /workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.3666472381 Aug 14 05:54:49 PM PDT 24 Aug 14 05:57:53 PM PDT 24 2567995134 ps
T596 /workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.1923374262 Aug 14 06:03:25 PM PDT 24 Aug 14 06:13:35 PM PDT 24 8164664780 ps
T597 /workspace/coverage/default/0.chip_sw_example_concurrency.309959878 Aug 14 05:46:38 PM PDT 24 Aug 14 05:50:02 PM PDT 24 2607013140 ps
T241 /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.1195804873 Aug 14 05:59:05 PM PDT 24 Aug 14 06:12:03 PM PDT 24 4688179800 ps
T156 /workspace/coverage/default/1.chip_sw_inject_scramble_seed.1434025047 Aug 14 05:52:01 PM PDT 24 Aug 14 08:50:11 PM PDT 24 62832370959 ps
T462 /workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3235198481 Aug 14 06:15:09 PM PDT 24 Aug 14 06:22:34 PM PDT 24 3103918598 ps
T482 /workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.3224808878 Aug 14 06:14:03 PM PDT 24 Aug 14 06:22:29 PM PDT 24 4374598036 ps
T598 /workspace/coverage/default/2.chip_tap_straps_testunlock0.609902902 Aug 14 06:05:11 PM PDT 24 Aug 14 06:09:26 PM PDT 24 2944422621 ps
T599 /workspace/coverage/default/22.chip_sw_all_escalation_resets.1971381781 Aug 14 06:10:39 PM PDT 24 Aug 14 06:23:04 PM PDT 24 4430311676 ps
T221 /workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.1270390544 Aug 14 05:52:31 PM PDT 24 Aug 14 05:56:11 PM PDT 24 3533024572 ps
T213 /workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1154042599 Aug 14 05:52:00 PM PDT 24 Aug 14 05:59:52 PM PDT 24 4715942576 ps
T140 /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1384933120 Aug 14 05:52:13 PM PDT 24 Aug 14 06:23:34 PM PDT 24 8281067545 ps
T185 /workspace/coverage/default/77.chip_sw_all_escalation_resets.1335500865 Aug 14 06:18:34 PM PDT 24 Aug 14 06:27:05 PM PDT 24 4439718198 ps
T174 /workspace/coverage/default/1.rom_raw_unlock.3980904325 Aug 14 05:54:22 PM PDT 24 Aug 14 05:58:33 PM PDT 24 5631097835 ps
T600 /workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.2627083137 Aug 14 05:51:37 PM PDT 24 Aug 14 05:57:10 PM PDT 24 4648493354 ps
T601 /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.3735121792 Aug 14 06:01:30 PM PDT 24 Aug 14 06:09:47 PM PDT 24 6101915500 ps
T602 /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.787463827 Aug 14 05:58:56 PM PDT 24 Aug 14 07:21:38 PM PDT 24 14756697564 ps
T200 /workspace/coverage/default/1.chip_sw_otbn_smoketest.3442109870 Aug 14 05:53:27 PM PDT 24 Aug 14 06:09:51 PM PDT 24 5484569470 ps
T603 /workspace/coverage/default/2.chip_sw_aes_entropy.2779743869 Aug 14 06:02:49 PM PDT 24 Aug 14 06:07:43 PM PDT 24 3153905674 ps
T498 /workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.269797760 Aug 14 06:12:04 PM PDT 24 Aug 14 06:19:30 PM PDT 24 3878929064 ps
T604 /workspace/coverage/default/5.chip_sw_lc_ctrl_transition.2123048283 Aug 14 06:09:42 PM PDT 24 Aug 14 06:16:58 PM PDT 24 6247234308 ps
T605 /workspace/coverage/default/1.rom_e2e_asm_init_prod.3340994521 Aug 14 05:56:52 PM PDT 24 Aug 14 07:00:55 PM PDT 24 15295026386 ps
T606 /workspace/coverage/default/19.chip_sw_uart_rand_baudrate.363061838 Aug 14 06:12:06 PM PDT 24 Aug 14 06:37:33 PM PDT 24 8363880936 ps
T201 /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.4099706287 Aug 14 06:05:02 PM PDT 24 Aug 14 06:57:45 PM PDT 24 17020597790 ps
T141 /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.44683396 Aug 14 05:52:33 PM PDT 24 Aug 14 06:48:20 PM PDT 24 24642960493 ps
T87 /workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.3856678252 Aug 14 06:07:33 PM PDT 24 Aug 14 06:17:13 PM PDT 24 6830571144 ps
T506 /workspace/coverage/default/27.chip_sw_all_escalation_resets.1871469707 Aug 14 06:14:18 PM PDT 24 Aug 14 06:26:03 PM PDT 24 4615826760 ps
T607 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.767247582 Aug 14 05:54:32 PM PDT 24 Aug 14 06:05:26 PM PDT 24 3329243192 ps
T496 /workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2291205819 Aug 14 06:14:11 PM PDT 24 Aug 14 06:21:14 PM PDT 24 3483660614 ps
T608 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.764089071 Aug 14 05:48:15 PM PDT 24 Aug 14 06:00:08 PM PDT 24 4962065020 ps
T343 /workspace/coverage/default/17.chip_sw_uart_rand_baudrate.41120200 Aug 14 06:11:21 PM PDT 24 Aug 14 06:18:49 PM PDT 24 3876088404 ps
T609 /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.2193364676 Aug 14 05:48:15 PM PDT 24 Aug 14 06:40:36 PM PDT 24 18516347258 ps
T262 /workspace/coverage/default/2.chip_sw_alert_handler_escalation.1173347076 Aug 14 06:03:46 PM PDT 24 Aug 14 06:14:59 PM PDT 24 5822403728 ps
T242 /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1307699472 Aug 14 05:56:25 PM PDT 24 Aug 14 06:12:42 PM PDT 24 5476307440 ps
T97 /workspace/coverage/default/0.chip_sw_usbdev_pullup.4118758147 Aug 14 05:51:19 PM PDT 24 Aug 14 05:55:49 PM PDT 24 3292773528 ps
T610 /workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.2967883229 Aug 14 06:08:51 PM PDT 24 Aug 14 07:36:46 PM PDT 24 21922515670 ps
T611 /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3319503274 Aug 14 06:03:26 PM PDT 24 Aug 14 06:30:10 PM PDT 24 7962861244 ps
T104 /workspace/coverage/default/90.chip_sw_all_escalation_resets.2955420472 Aug 14 06:16:25 PM PDT 24 Aug 14 06:26:15 PM PDT 24 4068592808 ps
T110 /workspace/coverage/default/2.chip_sw_edn_boot_mode.487613608 Aug 14 06:04:01 PM PDT 24 Aug 14 06:13:57 PM PDT 24 2983768508 ps
T85 /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.3426471728 Aug 14 05:54:12 PM PDT 24 Aug 14 06:17:19 PM PDT 24 23136451620 ps
T111 /workspace/coverage/default/2.chip_plic_all_irqs_20.259445654 Aug 14 06:03:58 PM PDT 24 Aug 14 06:16:35 PM PDT 24 4464996568 ps
T112 /workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.834011930 Aug 14 06:11:13 PM PDT 24 Aug 14 06:17:23 PM PDT 24 3707129850 ps
T113 /workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2025220958 Aug 14 05:58:47 PM PDT 24 Aug 14 06:01:14 PM PDT 24 3653713259 ps
T75 /workspace/coverage/default/1.chip_sw_alert_test.2683603476 Aug 14 05:56:04 PM PDT 24 Aug 14 06:00:55 PM PDT 24 3134416724 ps
T114 /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.3596606486 Aug 14 05:47:51 PM PDT 24 Aug 14 06:01:36 PM PDT 24 5012202128 ps
T115 /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1313290563 Aug 14 06:15:36 PM PDT 24 Aug 14 06:22:18 PM PDT 24 3437890268 ps
T116 /workspace/coverage/default/0.chip_sw_inject_scramble_seed.3837426540 Aug 14 05:50:26 PM PDT 24 Aug 14 09:06:07 PM PDT 24 65388233605 ps
T612 /workspace/coverage/default/3.chip_tap_straps_prod.3251704198 Aug 14 06:07:24 PM PDT 24 Aug 14 06:10:05 PM PDT 24 2947424672 ps
T613 /workspace/coverage/default/4.chip_tap_straps_prod.3032700754 Aug 14 06:07:57 PM PDT 24 Aug 14 06:10:28 PM PDT 24 3111278201 ps
T453 /workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1258880215 Aug 14 06:12:56 PM PDT 24 Aug 14 06:19:21 PM PDT 24 3219121588 ps
T78 /workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.3460257071 Aug 14 05:58:31 PM PDT 24 Aug 14 06:03:28 PM PDT 24 3510334606 ps
T479 /workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2032355277 Aug 14 06:10:29 PM PDT 24 Aug 14 06:17:50 PM PDT 24 3881010828 ps
T466 /workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3553041001 Aug 14 06:17:44 PM PDT 24 Aug 14 06:22:49 PM PDT 24 3651467848 ps
T614 /workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.416282870 Aug 14 06:07:11 PM PDT 24 Aug 14 06:25:49 PM PDT 24 5751866250 ps
T136 /workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.3412419296 Aug 14 06:07:56 PM PDT 24 Aug 14 07:17:59 PM PDT 24 27837798152 ps
T615 /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.2465339433 Aug 14 05:49:45 PM PDT 24 Aug 14 05:53:57 PM PDT 24 2934668722 ps
T616 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.1007881920 Aug 14 05:51:50 PM PDT 24 Aug 14 06:01:41 PM PDT 24 4493716405 ps
T617 /workspace/coverage/default/1.chip_sw_clkmgr_jitter.1147058293 Aug 14 05:52:26 PM PDT 24 Aug 14 05:56:31 PM PDT 24 2590705595 ps
T42 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.4190862959 Aug 14 05:50:40 PM PDT 24 Aug 14 06:17:11 PM PDT 24 21862063230 ps
T171 /workspace/coverage/default/67.chip_sw_all_escalation_resets.2452211226 Aug 14 06:16:04 PM PDT 24 Aug 14 06:24:42 PM PDT 24 5881228960 ps
T525 /workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3109594465 Aug 14 06:17:07 PM PDT 24 Aug 14 06:23:38 PM PDT 24 3673421234 ps
T618 /workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2760905552 Aug 14 06:10:34 PM PDT 24 Aug 14 06:20:48 PM PDT 24 7414095846 ps
T619 /workspace/coverage/default/1.chip_tap_straps_rma.3875453113 Aug 14 05:52:42 PM PDT 24 Aug 14 06:07:50 PM PDT 24 8561279259 ps
T467 /workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.4008265284 Aug 14 06:14:41 PM PDT 24 Aug 14 06:20:17 PM PDT 24 3090533486 ps
T537 /workspace/coverage/default/2.chip_sw_all_escalation_resets.3190121761 Aug 14 05:55:16 PM PDT 24 Aug 14 06:05:42 PM PDT 24 6605672658 ps
T620 /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2698450342 Aug 14 05:52:20 PM PDT 24 Aug 14 06:30:51 PM PDT 24 8773947560 ps
T621 /workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.3473373804 Aug 14 06:04:35 PM PDT 24 Aug 14 06:07:37 PM PDT 24 2942430684 ps
T622 /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4228799748 Aug 14 06:09:17 PM PDT 24 Aug 14 06:14:47 PM PDT 24 4585173988 ps
T294 /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1457584032 Aug 14 05:52:01 PM PDT 24 Aug 14 06:01:43 PM PDT 24 5091949376 ps
T623 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2170639085 Aug 14 05:51:36 PM PDT 24 Aug 14 05:58:37 PM PDT 24 5469697160 ps
T149 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.2031637400 Aug 14 05:48:08 PM PDT 24 Aug 14 05:58:54 PM PDT 24 5766632954 ps
T624 /workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2471784740 Aug 14 06:09:57 PM PDT 24 Aug 14 07:20:22 PM PDT 24 17569391550 ps
T625 /workspace/coverage/default/2.rom_e2e_asm_init_dev.616156740 Aug 14 06:10:47 PM PDT 24 Aug 14 07:02:15 PM PDT 24 16019407120 ps
T626 /workspace/coverage/default/2.chip_sival_flash_info_access.2766432882 Aug 14 05:56:01 PM PDT 24 Aug 14 06:01:15 PM PDT 24 3758113172 ps
T627 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3590520701 Aug 14 05:56:13 PM PDT 24 Aug 14 06:58:19 PM PDT 24 15570979056 ps
T480 /workspace/coverage/default/0.chip_sw_aes_masking_off.2388640683 Aug 14 05:49:35 PM PDT 24 Aug 14 05:56:36 PM PDT 24 3125663940 ps
T628 /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2398279031 Aug 14 05:51:03 PM PDT 24 Aug 14 06:14:35 PM PDT 24 8777764049 ps
T629 /workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.3500420857 Aug 14 05:50:28 PM PDT 24 Aug 14 06:11:47 PM PDT 24 5434560204 ps
T510 /workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1922525703 Aug 14 06:15:09 PM PDT 24 Aug 14 06:21:30 PM PDT 24 3852919808 ps
T630 /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.2507397770 Aug 14 06:09:07 PM PDT 24 Aug 14 06:21:19 PM PDT 24 3806875208 ps
T547 /workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.4215108881 Aug 14 06:13:31 PM PDT 24 Aug 14 06:18:45 PM PDT 24 3370301624 ps
T631 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2773390131 Aug 14 05:53:58 PM PDT 24 Aug 14 06:05:46 PM PDT 24 4360240420 ps
T362 /workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1624674684 Aug 14 05:58:32 PM PDT 24 Aug 14 06:07:43 PM PDT 24 3732292936 ps
T263 /workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.880573998 Aug 14 06:12:50 PM PDT 24 Aug 14 06:20:53 PM PDT 24 3366553234 ps
T295 /workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1306161135 Aug 14 06:05:10 PM PDT 24 Aug 14 06:17:18 PM PDT 24 4179703880 ps
T300 /workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.3542889032 Aug 14 05:49:17 PM PDT 24 Aug 14 06:15:50 PM PDT 24 8863659340 ps
T301 /workspace/coverage/default/2.chip_sw_kmac_mode_kmac.3089762908 Aug 14 06:04:15 PM PDT 24 Aug 14 06:09:39 PM PDT 24 2976354548 ps
T302 /workspace/coverage/default/1.chip_sw_csrng_kat_test.2254560831 Aug 14 05:55:56 PM PDT 24 Aug 14 06:00:00 PM PDT 24 2841663788 ps
T170 /workspace/coverage/default/1.chip_sw_kmac_app_rom.784473626 Aug 14 05:53:42 PM PDT 24 Aug 14 05:56:54 PM PDT 24 2280622560 ps
T303 /workspace/coverage/default/0.chip_sw_clkmgr_jitter.3198027418 Aug 14 05:52:48 PM PDT 24 Aug 14 05:56:13 PM PDT 24 2203056386 ps
T304 /workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.3753953976 Aug 14 05:54:31 PM PDT 24 Aug 14 06:12:17 PM PDT 24 10233610312 ps
T305 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.874808983 Aug 14 05:48:27 PM PDT 24 Aug 14 05:53:59 PM PDT 24 2785283844 ps
T306 /workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.4136851538 Aug 14 06:03:34 PM PDT 24 Aug 14 06:15:17 PM PDT 24 6592261040 ps
T281 /workspace/coverage/default/72.chip_sw_all_escalation_resets.56025891 Aug 14 06:15:33 PM PDT 24 Aug 14 06:23:51 PM PDT 24 5191757716 ps
T348 /workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.791857791 Aug 14 06:00:10 PM PDT 24 Aug 14 06:25:02 PM PDT 24 11550757897 ps
T137 /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.214470329 Aug 14 05:53:17 PM PDT 24 Aug 14 07:23:13 PM PDT 24 32976772206 ps
T632 /workspace/coverage/default/2.chip_sw_entropy_src_kat_test.3388655392 Aug 14 06:02:52 PM PDT 24 Aug 14 06:07:50 PM PDT 24 3020967600 ps
T633 /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2629364327 Aug 14 05:53:00 PM PDT 24 Aug 14 06:15:27 PM PDT 24 7495073066 ps
T535 /workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.10753886 Aug 14 06:15:52 PM PDT 24 Aug 14 06:22:36 PM PDT 24 3509385970 ps
T634 /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.4149538037 Aug 14 06:11:43 PM PDT 24 Aug 14 07:06:23 PM PDT 24 15166137210 ps
T635 /workspace/coverage/default/1.chip_sw_rstmgr_sw_req.3026768145 Aug 14 05:53:03 PM PDT 24 Aug 14 06:01:32 PM PDT 24 4948798072 ps
T636 /workspace/coverage/default/4.chip_tap_straps_testunlock0.1244846789 Aug 14 06:07:57 PM PDT 24 Aug 14 06:11:34 PM PDT 24 3597541808 ps
T186 /workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.796090901 Aug 14 06:05:31 PM PDT 24 Aug 14 06:14:57 PM PDT 24 4750252968 ps
T468 /workspace/coverage/default/12.chip_sw_all_escalation_resets.2798808499 Aug 14 06:11:38 PM PDT 24 Aug 14 06:25:08 PM PDT 24 5581115968 ps
T637 /workspace/coverage/default/1.rom_e2e_static_critical.751883290 Aug 14 06:00:00 PM PDT 24 Aug 14 07:17:00 PM PDT 24 17497901354 ps
T339 /workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.3027709872 Aug 14 05:52:36 PM PDT 24 Aug 14 06:24:44 PM PDT 24 20239486271 ps
T43 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.2723175052 Aug 14 05:51:43 PM PDT 24 Aug 14 06:48:01 PM PDT 24 21182450795 ps
T638 /workspace/coverage/default/2.rom_e2e_self_hash.948315323 Aug 14 06:13:36 PM PDT 24 Aug 14 07:45:02 PM PDT 24 26327198516 ps
T198 /workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1759384397 Aug 14 05:56:36 PM PDT 24 Aug 14 06:01:40 PM PDT 24 4215137608 ps
T408 /workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3169928032 Aug 14 05:51:15 PM PDT 24 Aug 14 05:57:34 PM PDT 24 2908078503 ps
T367 /workspace/coverage/default/2.chip_sw_flash_ctrl_ops.1200661014 Aug 14 05:58:40 PM PDT 24 Aug 14 06:10:07 PM PDT 24 4470327032 ps
T138 /workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.2902169486 Aug 14 05:56:59 PM PDT 24 Aug 14 06:39:04 PM PDT 24 15172438856 ps
T438 /workspace/coverage/default/1.chip_sw_flash_ctrl_access.2975864292 Aug 14 05:49:23 PM PDT 24 Aug 14 06:07:32 PM PDT 24 5612753392 ps
T439 /workspace/coverage/default/2.chip_sw_rstmgr_sw_req.2417324672 Aug 14 06:03:11 PM PDT 24 Aug 14 06:10:45 PM PDT 24 4701067832 ps
T440 /workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3204210868 Aug 14 06:11:27 PM PDT 24 Aug 14 06:19:21 PM PDT 24 3752213252 ps
T441 /workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3751662143 Aug 14 05:54:40 PM PDT 24 Aug 14 06:03:56 PM PDT 24 8671566446 ps
T442 /workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1351198433 Aug 14 06:12:26 PM PDT 24 Aug 14 06:18:19 PM PDT 24 3647174264 ps
T443 /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.293600150 Aug 14 05:51:52 PM PDT 24 Aug 14 06:02:22 PM PDT 24 4625763922 ps
T371 /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1609115870 Aug 14 05:49:33 PM PDT 24 Aug 14 06:00:16 PM PDT 24 3989796772 ps
T639 /workspace/coverage/default/12.chip_sw_uart_rand_baudrate.3311817046 Aug 14 06:10:50 PM PDT 24 Aug 14 06:32:56 PM PDT 24 7791273672 ps
T640 /workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.3611894296 Aug 14 06:00:03 PM PDT 24 Aug 14 06:18:46 PM PDT 24 5505345634 ps
T641 /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3077351118 Aug 14 05:52:06 PM PDT 24 Aug 14 06:10:02 PM PDT 24 6648339416 ps
T518 /workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.1016930030 Aug 14 06:15:27 PM PDT 24 Aug 14 06:22:47 PM PDT 24 4482152108 ps
T642 /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.580877906 Aug 14 05:59:07 PM PDT 24 Aug 14 07:01:42 PM PDT 24 14912447170 ps
T643 /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2164755795 Aug 14 05:52:32 PM PDT 24 Aug 14 05:57:42 PM PDT 24 3149198481 ps
T644 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1279413782 Aug 14 06:04:27 PM PDT 24 Aug 14 06:15:10 PM PDT 24 4681570364 ps
T494 /workspace/coverage/default/91.chip_sw_all_escalation_resets.2376324183 Aug 14 06:16:39 PM PDT 24 Aug 14 06:25:47 PM PDT 24 5114085928 ps
T645 /workspace/coverage/default/1.chip_sw_kmac_idle.1096623323 Aug 14 05:56:50 PM PDT 24 Aug 14 06:01:43 PM PDT 24 2533868072 ps
T86 /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.586526382 Aug 14 06:06:52 PM PDT 24 Aug 14 06:28:46 PM PDT 24 23703848390 ps
T646 /workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.3792600712 Aug 14 06:05:47 PM PDT 24 Aug 14 06:16:13 PM PDT 24 6440059378 ps
T222 /workspace/coverage/default/0.chip_sw_flash_rma_unlocked.3596693592 Aug 14 05:48:38 PM PDT 24 Aug 14 07:11:34 PM PDT 24 45107287162 ps
T334 /workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1967807946 Aug 14 05:52:03 PM PDT 24 Aug 14 06:55:13 PM PDT 24 14882868982 ps
T647 /workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1169959161 Aug 14 06:11:26 PM PDT 24 Aug 14 06:20:05 PM PDT 24 4079224408 ps
T435 /workspace/coverage/default/2.chip_tap_straps_dev.4197498827 Aug 14 06:04:34 PM PDT 24 Aug 14 06:23:31 PM PDT 24 12042032231 ps
T503 /workspace/coverage/default/92.chip_sw_all_escalation_resets.3742065466 Aug 14 06:17:52 PM PDT 24 Aug 14 06:26:27 PM PDT 24 4545266216 ps
T456 /workspace/coverage/default/93.chip_sw_all_escalation_resets.325797301 Aug 14 06:16:57 PM PDT 24 Aug 14 06:25:03 PM PDT 24 4383531242 ps
T289 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1530557408 Aug 14 05:57:51 PM PDT 24 Aug 14 07:14:26 PM PDT 24 18207671416 ps
T458 /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.1915516385 Aug 14 06:16:21 PM PDT 24 Aug 14 06:22:08 PM PDT 24 4075443552 ps
T446 /workspace/coverage/default/32.chip_sw_all_escalation_resets.4017906303 Aug 14 06:11:15 PM PDT 24 Aug 14 06:21:58 PM PDT 24 6068171000 ps
T148 /workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.2261426396 Aug 14 06:06:47 PM PDT 24 Aug 14 06:55:28 PM PDT 24 22553776838 ps
T355 /workspace/coverage/default/1.chip_sw_entropy_src_csrng.4153917169 Aug 14 05:54:12 PM PDT 24 Aug 14 06:23:01 PM PDT 24 7436898550 ps
T99 /workspace/coverage/default/1.chip_jtag_mem_access.3462386704 Aug 14 05:43:19 PM PDT 24 Aug 14 06:07:00 PM PDT 24 14345801120 ps
T648 /workspace/coverage/default/2.rom_keymgr_functest.3539318608 Aug 14 06:07:10 PM PDT 24 Aug 14 06:16:53 PM PDT 24 3501180234 ps
T649 /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1301504204 Aug 14 05:48:06 PM PDT 24 Aug 14 05:52:14 PM PDT 24 2935295280 ps
T650 /workspace/coverage/default/2.chip_sw_flash_crash_alert.707539618 Aug 14 06:07:56 PM PDT 24 Aug 14 06:16:56 PM PDT 24 5700328840 ps
T23 /workspace/coverage/default/0.chip_sw_alert_handler_entropy.483366861 Aug 14 05:51:39 PM PDT 24 Aug 14 05:57:40 PM PDT 24 3658378528 ps
T290 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.2863251951 Aug 14 05:54:31 PM PDT 24 Aug 14 06:53:34 PM PDT 24 14406219857 ps
T548 /workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.821094762 Aug 14 06:21:11 PM PDT 24 Aug 14 06:26:56 PM PDT 24 3532907072 ps
T651 /workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1466529155 Aug 14 06:01:05 PM PDT 24 Aug 14 06:10:31 PM PDT 24 5521773588 ps
T652 /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1724038891 Aug 14 05:47:55 PM PDT 24 Aug 14 06:01:28 PM PDT 24 4762501558 ps
T653 /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3389190390 Aug 14 06:07:42 PM PDT 24 Aug 14 06:12:31 PM PDT 24 2415687609 ps
T331 /workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.335545549 Aug 14 06:05:29 PM PDT 24 Aug 14 06:33:51 PM PDT 24 7473741420 ps
T55 /workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1688288219 Aug 14 06:01:33 PM PDT 24 Aug 14 06:09:23 PM PDT 24 6677039960 ps
T307 /workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.2028464839 Aug 14 06:06:56 PM PDT 24 Aug 14 06:12:15 PM PDT 24 2866460200 ps
T654 /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1358816591 Aug 14 06:01:21 PM PDT 24 Aug 14 06:09:36 PM PDT 24 6519635408 ps
T655 /workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.1982940549 Aug 14 05:55:38 PM PDT 24 Aug 14 06:01:23 PM PDT 24 3788038360 ps
T532 /workspace/coverage/default/47.chip_sw_all_escalation_resets.2441963508 Aug 14 06:13:47 PM PDT 24 Aug 14 06:23:23 PM PDT 24 5567590776 ps
T264 /workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1857172836 Aug 14 06:10:15 PM PDT 24 Aug 14 06:16:03 PM PDT 24 4016880786 ps
T375 /workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1510596232 Aug 14 05:58:08 PM PDT 24 Aug 14 06:04:25 PM PDT 24 3890594748 ps
T656 /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.2769607870 Aug 14 05:56:04 PM PDT 24 Aug 14 06:00:33 PM PDT 24 2869457970 ps
T657 /workspace/coverage/default/97.chip_sw_all_escalation_resets.2320383271 Aug 14 06:18:49 PM PDT 24 Aug 14 06:29:22 PM PDT 24 5672759540 ps
T205 /workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.1003312567 Aug 14 05:50:10 PM PDT 24 Aug 14 05:56:10 PM PDT 24 3634519844 ps
T80 /workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.3355381206 Aug 14 05:56:08 PM PDT 24 Aug 14 06:01:03 PM PDT 24 4368108712 ps
T341 /workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.2008079590 Aug 14 05:53:17 PM PDT 24 Aug 14 06:04:10 PM PDT 24 5157971512 ps
T658 /workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.1840569515 Aug 14 05:52:34 PM PDT 24 Aug 14 06:07:34 PM PDT 24 9602237485 ps
T659 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2158604178 Aug 14 05:49:24 PM PDT 24 Aug 14 06:00:10 PM PDT 24 3746641650 ps
T660 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.3851080574 Aug 14 05:54:51 PM PDT 24 Aug 14 06:57:15 PM PDT 24 15284295825 ps
T296 /workspace/coverage/default/1.chip_sw_otbn_mem_scramble.2743372566 Aug 14 05:55:36 PM PDT 24 Aug 14 06:05:50 PM PDT 24 3119035350 ps
T661 /workspace/coverage/default/1.rom_e2e_asm_init_rma.3132522652 Aug 14 05:57:15 PM PDT 24 Aug 14 06:55:09 PM PDT 24 15047125448 ps
T297 /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.443693350 Aug 14 06:05:07 PM PDT 24 Aug 14 06:16:48 PM PDT 24 8391007002 ps
T662 /workspace/coverage/default/0.chip_sw_kmac_app_rom.1217211982 Aug 14 05:53:09 PM PDT 24 Aug 14 05:57:39 PM PDT 24 2147344728 ps
T507 /workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.900706138 Aug 14 06:13:39 PM PDT 24 Aug 14 06:20:07 PM PDT 24 3869796474 ps
T512 /workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.2849770567 Aug 14 06:17:14 PM PDT 24 Aug 14 06:21:46 PM PDT 24 3742846000 ps
T459 /workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.4199319053 Aug 14 06:10:12 PM PDT 24 Aug 14 06:19:17 PM PDT 24 3977690200 ps
T317 /workspace/coverage/default/0.chip_sw_power_sleep_load.728071719 Aug 14 05:50:25 PM PDT 24 Aug 14 05:57:51 PM PDT 24 11256019640 ps
T268 /workspace/coverage/default/2.rom_e2e_shutdown_exception_c.4225766210 Aug 14 06:11:01 PM PDT 24 Aug 14 07:06:22 PM PDT 24 14265715285 ps
T56 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4140920706 Aug 14 05:49:41 PM PDT 24 Aug 14 05:58:03 PM PDT 24 5720566208 ps
T384 /workspace/coverage/default/51.chip_sw_all_escalation_resets.4140768112 Aug 14 06:13:17 PM PDT 24 Aug 14 06:23:56 PM PDT 24 4803179640 ps
T395 /workspace/coverage/default/1.chip_sw_aon_timer_irq.1931223770 Aug 14 05:55:36 PM PDT 24 Aug 14 06:01:12 PM PDT 24 3213084568 ps
T340 /workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.496216531 Aug 14 05:54:15 PM PDT 24 Aug 14 07:18:35 PM PDT 24 50167509420 ps
T396 /workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.929053786 Aug 14 06:05:06 PM PDT 24 Aug 14 06:12:32 PM PDT 24 3635159176 ps
T397 /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3587168177 Aug 14 06:13:33 PM PDT 24 Aug 14 07:13:50 PM PDT 24 15137461264 ps
T398 /workspace/coverage/default/0.chip_sw_coremark.3496996182 Aug 14 05:52:29 PM PDT 24 Aug 14 10:10:07 PM PDT 24 71543246400 ps
T399 /workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.2267841330 Aug 14 05:57:59 PM PDT 24 Aug 14 06:13:27 PM PDT 24 5972483992 ps
T385 /workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1066538361 Aug 14 06:16:08 PM PDT 24 Aug 14 06:23:34 PM PDT 24 3822546664 ps
T238 /workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.1787047119 Aug 14 05:46:57 PM PDT 24 Aug 14 05:51:53 PM PDT 24 2796450550 ps
T400 /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3594397779 Aug 14 05:51:04 PM PDT 24 Aug 14 06:20:28 PM PDT 24 15850398469 ps
T323 /workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.1106516516 Aug 14 05:51:02 PM PDT 24 Aug 14 06:04:56 PM PDT 24 4498563126 ps
T663 /workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.1644463193 Aug 14 05:49:26 PM PDT 24 Aug 14 06:06:41 PM PDT 24 10285592856 ps
T100 /workspace/coverage/default/0.chip_jtag_csr_rw.1514711722 Aug 14 05:39:49 PM PDT 24 Aug 14 05:56:16 PM PDT 24 10601485228 ps
T664 /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3096714175 Aug 14 05:54:20 PM PDT 24 Aug 14 06:04:31 PM PDT 24 4310651608 ps
T665 /workspace/coverage/default/2.chip_tap_straps_prod.1242323927 Aug 14 06:04:34 PM PDT 24 Aug 14 06:07:00 PM PDT 24 2064200774 ps
T243 /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.3809243311 Aug 14 05:49:42 PM PDT 24 Aug 14 06:03:19 PM PDT 24 4911007950 ps
T666 /workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.3528294953 Aug 14 05:52:35 PM PDT 24 Aug 14 05:56:17 PM PDT 24 2581890960 ps
T667 /workspace/coverage/default/0.chip_sw_hmac_smoketest.575558340 Aug 14 05:55:09 PM PDT 24 Aug 14 06:00:46 PM PDT 24 3259772220 ps
T668 /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1599668228 Aug 14 05:50:51 PM PDT 24 Aug 14 06:35:38 PM PDT 24 22291520785 ps
T669 /workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.621411540 Aug 14 06:04:13 PM PDT 24 Aug 14 07:29:03 PM PDT 24 23036749340 ps
T146 /workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.3398822976 Aug 14 06:08:30 PM PDT 24 Aug 14 06:26:15 PM PDT 24 6951373780 ps
T670 /workspace/coverage/default/8.chip_sw_lc_ctrl_transition.353253860 Aug 14 06:10:55 PM PDT 24 Aug 14 06:17:26 PM PDT 24 6110444412 ps
T671 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.2418528435 Aug 14 06:03:26 PM PDT 24 Aug 14 06:28:52 PM PDT 24 7647603192 ps
T672 /workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.723564718 Aug 14 05:51:20 PM PDT 24 Aug 14 05:59:15 PM PDT 24 4106934662 ps
T673 /workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2977217829 Aug 14 05:54:01 PM PDT 24 Aug 14 06:04:40 PM PDT 24 5995832590 ps
T674 /workspace/coverage/default/3.chip_tap_straps_dev.2265259003 Aug 14 06:08:31 PM PDT 24 Aug 14 06:27:10 PM PDT 24 11465461317 ps
T675 /workspace/coverage/default/0.chip_sw_edn_entropy_reqs.4067690060 Aug 14 05:51:03 PM PDT 24 Aug 14 06:17:58 PM PDT 24 7180272280 ps
T676 /workspace/coverage/default/1.chip_sw_hmac_enc_idle.616373301 Aug 14 05:54:52 PM PDT 24 Aug 14 05:58:38 PM PDT 24 2627137144 ps
T677 /workspace/coverage/default/16.chip_sw_uart_rand_baudrate.22756391 Aug 14 06:10:54 PM PDT 24 Aug 14 06:48:47 PM PDT 24 13219302088 ps
T678 /workspace/coverage/default/0.chip_sw_hmac_multistream.176420495 Aug 14 05:49:28 PM PDT 24 Aug 14 06:21:19 PM PDT 24 7502218756 ps
T679 /workspace/coverage/default/1.chip_sw_uart_smoketest.957193756 Aug 14 05:54:53 PM PDT 24 Aug 14 05:59:41 PM PDT 24 2582888920 ps
T680 /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.4050740371 Aug 14 05:56:16 PM PDT 24 Aug 14 06:09:07 PM PDT 24 7407651167 ps
T681 /workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1690499104 Aug 14 05:50:45 PM PDT 24 Aug 14 06:10:40 PM PDT 24 5306447856 ps
T682 /workspace/coverage/default/1.chip_sw_hmac_smoketest.351978601 Aug 14 05:55:16 PM PDT 24 Aug 14 06:01:48 PM PDT 24 2974923586 ps
T44 /workspace/coverage/default/0.chip_sw_usbdev_setuprx.1492386437 Aug 14 05:47:12 PM PDT 24 Aug 14 05:57:14 PM PDT 24 4436830220 ps
T504 /workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.616013443 Aug 14 06:17:04 PM PDT 24 Aug 14 06:24:05 PM PDT 24 3684628392 ps
T683 /workspace/coverage/default/0.chip_sw_kmac_idle.415368495 Aug 14 05:47:26 PM PDT 24 Aug 14 05:51:00 PM PDT 24 2468409026 ps
T267 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.1185412103 Aug 14 05:56:06 PM PDT 24 Aug 14 07:50:05 PM PDT 24 23925825538 ps
T33 /workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.1565968800 Aug 14 05:50:50 PM PDT 24 Aug 14 05:59:56 PM PDT 24 4452801790 ps
T684 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.3962293532 Aug 14 05:55:25 PM PDT 24 Aug 14 07:47:53 PM PDT 24 23172708306 ps
T685 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.1151564628 Aug 14 05:57:09 PM PDT 24 Aug 14 06:58:07 PM PDT 24 14065777004 ps
T549 /workspace/coverage/default/25.chip_sw_all_escalation_resets.2115038786 Aug 14 06:11:03 PM PDT 24 Aug 14 06:21:36 PM PDT 24 4781822104 ps
T686 /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1320238644 Aug 14 05:52:16 PM PDT 24 Aug 14 06:02:35 PM PDT 24 7114338520 ps
T687 /workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.176976909 Aug 14 06:04:43 PM PDT 24 Aug 14 06:12:40 PM PDT 24 3638244742 ps
T298 /workspace/coverage/default/1.chip_sw_data_integrity_escalation.1822174275 Aug 14 05:53:04 PM PDT 24 Aug 14 06:00:54 PM PDT 24 4821582388 ps
T46 /workspace/coverage/default/1.chip_sw_sleep_pin_retention.2612612553 Aug 14 05:52:10 PM PDT 24 Aug 14 05:59:05 PM PDT 24 4142341642 ps
T688 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2195777155 Aug 14 05:56:21 PM PDT 24 Aug 14 06:05:51 PM PDT 24 6789513448 ps
T314 /workspace/coverage/default/2.chip_sw_rstmgr_alert_info.335018995 Aug 14 06:00:05 PM PDT 24 Aug 14 06:28:17 PM PDT 24 11469735000 ps
T689 /workspace/coverage/default/6.chip_sw_lc_ctrl_transition.2334729274 Aug 14 06:08:50 PM PDT 24 Aug 14 06:17:47 PM PDT 24 7808113597 ps
T690 /workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.67758915 Aug 14 05:52:03 PM PDT 24 Aug 14 06:26:26 PM PDT 24 24124489525 ps
T691 /workspace/coverage/default/2.chip_sw_example_manufacturer.1910382191 Aug 14 05:57:28 PM PDT 24 Aug 14 06:01:17 PM PDT 24 2620296542 ps
T692 /workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.2416739929 Aug 14 06:00:35 PM PDT 24 Aug 14 06:20:44 PM PDT 24 8923941435 ps
T693 /workspace/coverage/default/11.chip_sw_uart_rand_baudrate.2815729780 Aug 14 06:09:57 PM PDT 24 Aug 14 06:20:44 PM PDT 24 4368550712 ps
T553 /workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.3697555326 Aug 14 06:15:02 PM PDT 24 Aug 14 06:21:21 PM PDT 24 3728905720 ps
T463 /workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.3713580390 Aug 14 06:10:58 PM PDT 24 Aug 14 06:17:01 PM PDT 24 3961168996 ps
T694 /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1017953218 Aug 14 05:53:26 PM PDT 24 Aug 14 05:58:28 PM PDT 24 2884085174 ps
T126 /workspace/coverage/default/0.chip_sw_sensor_ctrl_status.2489665975 Aug 14 05:52:40 PM PDT 24 Aug 14 05:58:26 PM PDT 24 2926595455 ps
T695 /workspace/coverage/default/4.chip_tap_straps_rma.3377952489 Aug 14 06:10:55 PM PDT 24 Aug 14 06:16:39 PM PDT 24 4163934477 ps
T696 /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.2555574119 Aug 14 05:54:50 PM PDT 24 Aug 14 05:59:32 PM PDT 24 3290843652 ps
T282 /workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.3492744099 Aug 14 06:00:35 PM PDT 24 Aug 14 06:13:28 PM PDT 24 6125240460 ps
T697 /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.576125925 Aug 14 05:47:01 PM PDT 24 Aug 14 05:51:46 PM PDT 24 3152650300 ps
T369 /workspace/coverage/default/4.chip_sw_uart_tx_rx.498344390 Aug 14 06:11:21 PM PDT 24 Aug 14 06:21:20 PM PDT 24 4283806672 ps
T698 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2320678011 Aug 14 05:51:07 PM PDT 24 Aug 14 06:02:18 PM PDT 24 4127896120 ps
T501 /workspace/coverage/default/24.chip_sw_all_escalation_resets.59405308 Aug 14 06:11:09 PM PDT 24 Aug 14 06:21:54 PM PDT 24 5787871522 ps
T519 /workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3216885078 Aug 14 06:14:52 PM PDT 24 Aug 14 06:21:39 PM PDT 24 4071039000 ps
T699 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.3695789043 Aug 14 05:58:02 PM PDT 24 Aug 14 07:10:44 PM PDT 24 15473045284 ps
T554 /workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.3878752818 Aug 14 06:14:48 PM PDT 24 Aug 14 06:21:19 PM PDT 24 3790910216 ps
T700 /workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.2131077994 Aug 14 06:02:18 PM PDT 24 Aug 14 06:11:39 PM PDT 24 5755936466 ps
T701 /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.4175503932 Aug 14 05:52:46 PM PDT 24 Aug 14 06:03:32 PM PDT 24 4754394592 ps
T702 /workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3327198636 Aug 14 05:54:49 PM PDT 24 Aug 14 06:14:32 PM PDT 24 6677385285 ps
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