Unified Coverage Report :: Module :: usbdev_aon_wake

Module : usbdev_aon_wake

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
96.98	100.00	93.18			94.74	100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/chip_earlgrey_asic-sim-vcs/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_aon_wake.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.top_earlgrey.u_pinmux_aon.u_usbdev_aon_wake	96.98	100.00	93.18			94.74	100.00

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.u_usbdev_aon_wake

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
96.98	100.00	93.18			94.74	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
98.43	100.00	95.59			98.11	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
86.62	98.93	75.21	98.84		68.12	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
filter_activity	100.00	100.00	100.00			100.00
filter_bus_reset	100.00	100.00	100.00			100.00
filter_sense	100.00	100.00	100.00			100.00
u_pullup_en_cdc	100.00	100.00				100.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : usbdev_aon_wake

	Line No.	Total	Covered	Percent
TOTAL		39	39	100.00
CONT_ASSIGN	54	1	1	100.00
CONT_ASSIGN	80	1	1	100.00
CONT_ASSIGN	81	1	1	100.00
CONT_ASSIGN	106	1	1	100.00
CONT_ASSIGN	108	1	1	100.00
CONT_ASSIGN	110	1	1	100.00
CONT_ASSIGN	113	1	1	100.00
CONT_ASSIGN	114	1	1	100.00
CONT_ASSIGN	115	1	1	100.00
CONT_ASSIGN	118	1	1	100.00
CONT_ASSIGN	120	1	1	100.00
ALWAYS	123	9	9	100.00
ALWAYS	137	6	6	100.00
ALWAYS	163	3	3	100.00
CONT_ASSIGN	170	1	1	100.00
CONT_ASSIGN	186	1	1	100.00
CONT_ASSIGN	188	1	1	100.00
ALWAYS	192	5	5	100.00
CONT_ASSIGN	201	1	1	100.00
CONT_ASSIGN	203	1	1	100.00

53                        // Use of the pullups takes care of pinflipping
54         1/1            assign not_idle_async = (usb_dp_i != usb_dppullup_en_o) |
           Tests:       T4 T30 T6 
55                                                (usb_dn_i != usb_dnpullup_en_o);
56                      
57                        // aon clock is ~200kHz so 4 cycle filter is about 20us
58                        // as well as noise debounce this gives the main IP time to detect resume if it didn't turn off
59                        prim_filter #(
60                          .AsyncOn(1), // Instantiate 2-stage synchronizer
61                          .Cycles(4)
62                        ) filter_activity (
63                          .clk_i    (clk_aon_i),
64                          .rst_ni   (rst_aon_ni),
65                          .enable_i (1'b1),
66                          .filter_i (not_idle_async),
67                          .filter_o (event_not_idle)
68                        );
69                      
70                        // Detect bus reset and VBUS removal events.
71                        // Hold the detectors in reset when this module is in the idle state, to
72                        // avoid sampling / hysteresis issues that carry over when the link is
73                        // active.
74                        logic se0_async, sense_lost_async;
75                        logic event_bus_reset, event_sense_lost;
76                        logic bus_not_idle_d, bus_not_idle_q;
77                        logic bus_reset_d, bus_reset_q;
78                        logic sense_lost_d, sense_lost_q;
79                      
80         1/1            assign se0_async = ~usb_dp_i & ~usb_dn_i;
           Tests:       T4 T30 T6 
81         1/1            assign sense_lost_async = ~usb_sense_i;
           Tests:       T4 T30 T7 
82                      
83                        prim_filter #(
84                          .AsyncOn(1),
85                          .Cycles(3)
86                        ) filter_bus_reset (
87                          .clk_i    (clk_aon_i),
88                          .rst_ni   (rst_aon_ni),
89                          .enable_i (1'b1),
90                          .filter_i (se0_async),
91                          .filter_o (event_bus_reset)
92                        );
93                      
94                        prim_filter #(
95                          .AsyncOn(1),
96                          .Cycles(3)
97                        ) filter_sense (
98                          .clk_i    (clk_aon_i),
99                          .rst_ni   (rst_aon_ni),
100                         .enable_i (1'b1),
101                         .filter_i (sense_lost_async),
102                         .filter_o (event_sense_lost)
103                       );
104                     
105                       // USB has become non-idle while monitoring.
106        1/1            assign bus_not_idle_d = (event_not_idle | bus_not_idle_q) & wake_detect_active_q;
           Tests:       T1 T2 T3 
107                       // USB has issued a Bus Reset condition while monitoring.
108        1/1            assign bus_reset_d = (event_bus_reset | bus_reset_q) & wake_detect_active_q;
           Tests:       T4 T30 T7 
109                       // USB SENSE signal has been lost (Disconnection) while monitoring.
110        1/1            assign sense_lost_d = (event_sense_lost | sense_lost_q) & wake_detect_active_q;
           Tests:       T1 T2 T3 
111                     
112                       // Detected events
113        1/1            assign bus_not_idle_aon_o = bus_not_idle_q;
           Tests:       T72 T73 T74 
114        1/1            assign bus_reset_aon_o = bus_reset_q;
           Tests:       T7 
115        1/1            assign sense_lost_aon_o = sense_lost_q;
           Tests:       T72 T73 T74 
116                     
117                       logic wake_req_d, wake_req_q;
118        1/1            assign wake_req_d = wake_detect_active_q &
           Tests:       T1 T2 T3 
119                                           (event_not_idle | event_bus_reset | event_sense_lost | wake_req_q);
120        1/1            assign wake_req_aon_o = wake_req_q;
           Tests:       T7 T72 T73 
121                     
122                       always_ff @(posedge clk_aon_i or negedge rst_aon_ni) begin : proc_reg_events
123        1/1              if (!rst_aon_ni) begin
           Tests:       T1 T2 T3 
124        1/1                bus_not_idle_q <= 1'b0;
           Tests:       T1 T2 T3 
125        1/1                bus_reset_q <= 1'b0;
           Tests:       T1 T2 T3 
126        1/1                sense_lost_q <= 1'b0;
           Tests:       T1 T2 T3 
127        1/1                wake_req_q <= 1'b0;
           Tests:       T1 T2 T3 
128                         end else begin
129        1/1                bus_not_idle_q <= bus_not_idle_d;
           Tests:       T1 T2 T3 
130        1/1                bus_reset_q <= bus_reset_d;
           Tests:       T1 T2 T3 
131        1/1                sense_lost_q <= sense_lost_d;
           Tests:       T1 T2 T3 
132        1/1                wake_req_q <= wake_req_d;
           Tests:       T1 T2 T3 
133                         end
134                       end
135                     
136                       always_comb begin : proc_awk_fsm
137        1/1              wake_detect_active_d = wake_detect_active_q;
           Tests:       T7 T72 T73 
138                     
139        1/1              unique case (wake_detect_active_q)
           Tests:       T7 T72 T73 
140                           // No aon suspend entry has been requested or detected
141                           1'b0: begin
142        1/1                  if (suspend_req_aon_i) begin
           Tests:       T7 T72 T73 
143        1/1                    wake_detect_active_d = 1'b1;
           Tests:       T7 T72 T73 
144                             end
                        MISSING_ELSE
145                           end
146                     
147                           // The USB IP has passed control to this module for handling the suspend
148                           // request. wake_ack_i must be asserted to bring control back to the USB
149                           // IP.
150                           1'b1: begin
151        1/1                  if (wake_ack_aon_i) begin
           Tests:       T7 T72 T73 
152        1/1                    wake_detect_active_d = 1'b0;
           Tests:       T7 T72 T73 
153                             end
                        MISSING_ELSE
154                           end
155                           default : wake_detect_active_d = 1'b0;
156                         endcase
157                       end
158                     
159                       `ASSERT_KNOWN(WakeDetectActiveAonKnown_A, wake_detect_active_aon_o,
160                         clk_aon_i, !rst_aon_ni)
161                     
162                       always_ff @(posedge clk_aon_i or negedge rst_aon_ni) begin : proc_reg_awk
163        1/1              if (!rst_aon_ni) begin
           Tests:       T1 T2 T3 
164        1/1                wake_detect_active_q <= 1'b0;
           Tests:       T1 T2 T3 
165                         end else begin
166        1/1                wake_detect_active_q <= wake_detect_active_d;
           Tests:       T1 T2 T3 
167                         end
168                       end
169                     
170        1/1            assign wake_detect_active_aon_o = wake_detect_active_q;
           Tests:       T7 T72 T73 
171                     
172                       // Control the pullup enable outputs from the AON module when it's active
173                       logic usbdev_dppullup_en_aon, usbdev_dnpullup_en_aon;
174                       logic aon_dppullup_en_d, aon_dppullup_en_q;
175                       logic aon_dnpullup_en_d, aon_dnpullup_en_q;
176                     
177                       prim_flop_2sync #(
178                         .Width(2)
179                       ) u_pullup_en_cdc (
180                         .clk_i(clk_aon_i),
181                         .rst_ni(rst_aon_ni),
182                         .d_i({usbdev_dppullup_en_i, usbdev_dnpullup_en_i}),
183                         .q_o({usbdev_dppullup_en_aon, usbdev_dnpullup_en_aon})
184                       );
185                     
186        1/1            assign aon_dppullup_en_d = wake_detect_active_q ? aon_dppullup_en_q
           Tests:       T4 T7 T16 
187                                                                       : usbdev_dppullup_en_aon;
188        1/1            assign aon_dnpullup_en_d = wake_detect_active_q ? aon_dnpullup_en_q
           Tests:       T4 T7 T72 
189                                                                       : usbdev_dnpullup_en_aon;
190                     
191                       always_ff @(posedge clk_aon_i or negedge rst_aon_ni) begin : proc_reg_pullup_en
192        1/1              if (!rst_aon_ni) begin
           Tests:       T1 T2 T3 
193        1/1                aon_dppullup_en_q <= 1'b0;
           Tests:       T1 T2 T3 
194        1/1                aon_dnpullup_en_q <= 1'b0;
           Tests:       T1 T2 T3 
195                         end else begin
196        1/1                aon_dppullup_en_q <= aon_dppullup_en_d;
           Tests:       T1 T2 T3 
197        1/1                aon_dnpullup_en_q <= aon_dnpullup_en_d;
           Tests:       T1 T2 T3 
198                         end
199                       end
200                     
201        1/1            assign usb_dppullup_en_o = wake_detect_active_q ? aon_dppullup_en_q
           Tests:       T4 T7 T16 
202                                                                       : usbdev_dppullup_en_i;
203        1/1            assign usb_dnpullup_en_o = wake_detect_active_q ? aon_dnpullup_en_q
           Tests:       T4 T7 T72 

---

Cond Coverage for Module : usbdev_aon_wake

	Total	Covered	Percent
Conditions	44	41	93.18
Logical	44	41	93.18
Non-Logical	0	0
Event	0	0

 LINE       54
 EXPRESSION ((usb_dp_i != usb_dppullup_en_o) | (usb_dn_i != usb_dnpullup_en_o))
             ---------------1---------------   ---------------2---------------

-1-	-2-	Status	Tests
0	0	Covered	T4,T30,T7
0	1	Covered	T6,T93,T20
1	0	Covered	T1,T2,T3

 LINE       54
 SUB-EXPRESSION (usb_dp_i != usb_dppullup_en_o)
                ---------------1---------------

-1-	Status	Tests
0	Covered	T4,T30,T6
1	Covered	T1,T2,T3

 LINE       54
 SUB-EXPRESSION (usb_dn_i != usb_dnpullup_en_o)
                ---------------1---------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T6,T16,T17

 LINE       80
 EXPRESSION (((~usb_dp_i)) & ((~usb_dn_i)))
             ------1------   ------2------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T4,T6,T7
1	1	Covered	T4,T30,T7

 LINE       106
 EXPRESSION ((event_not_idle | bus_not_idle_q) & wake_detect_active_q)
             ----------------1----------------   ----------2---------

-1-	-2-	Status	Tests
0	1	Covered	T7,T73,T410
1	0	Covered	T1,T2,T3
1	1	Covered	T72,T73,T74

 LINE       106
 SUB-EXPRESSION (event_not_idle | bus_not_idle_q)
                 -------1------   -------2------

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Covered	T72,T73,T74
1	0	Covered	T1,T2,T3

 LINE       108
 EXPRESSION ((event_bus_reset | bus_reset_q) & wake_detect_active_q)
             ---------------1---------------   ----------2---------

-1-	-2-	Status	Tests
0	1	Covered	T7,T72,T73
1	0	Covered	T4,T30,T7
1	1	Covered	T7

 LINE       108
 SUB-EXPRESSION (event_bus_reset | bus_reset_q)
                 -------1-------   -----2-----

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Not Covered
1	0	Covered	T4,T30,T7

 LINE       110
 EXPRESSION ((event_sense_lost | sense_lost_q) & wake_detect_active_q)
             ----------------1----------------   ----------2---------

-1-	-2-	Status	Tests
0	1	Covered	T7
1	0	Covered	T1,T2,T3
1	1	Covered	T72,T73,T74

 LINE       110
 SUB-EXPRESSION (event_sense_lost | sense_lost_q)
                 --------1-------   ------2-----

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Not Covered
1	0	Covered	T1,T2,T3

 LINE       118
 EXPRESSION (wake_detect_active_q & (event_not_idle | event_bus_reset | event_sense_lost | wake_req_q))
             ----------1---------   ---------------------------------2--------------------------------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T7
1	1	Covered	T7,T72,T73

 LINE       118
 SUB-EXPRESSION (event_not_idle | event_bus_reset | event_sense_lost | wake_req_q)
                 -------1------   -------2-------   --------3-------   -----4----

-1-	-2-	-3-	-4-	Status	Tests
0	0	0	0	Covered	T1,T2,T3
0	0	0	1	Not Covered
0	0	1	0	Covered	T1,T2,T3
0	1	0	0	Covered	T4,T30,T7
1	0	0	0	Covered	T17,T317,T411

 LINE       186
 EXPRESSION (wake_detect_active_q ? aon_dppullup_en_q : usbdev_dppullup_en_aon)
             ----------1---------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T7,T72,T73

 LINE       188
 EXPRESSION (wake_detect_active_q ? aon_dnpullup_en_q : usbdev_dnpullup_en_aon)
             ----------1---------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T7,T72,T73

 LINE       201
 EXPRESSION (wake_detect_active_q ? aon_dppullup_en_q : usbdev_dppullup_en_i)
             ----------1---------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T7,T72,T73

 LINE       203
 EXPRESSION (wake_detect_active_q ? aon_dnpullup_en_q : usbdev_dnpullup_en_i)
             ----------1---------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T7,T72,T73

---

Branch Coverage for Module : usbdev_aon_wake

	Line No.	Total	Covered	Percent
Branches		19	18	94.74
TERNARY	186	2	2	100.00
TERNARY	188	2	2	100.00
TERNARY	201	2	2	100.00
TERNARY	203	2	2	100.00
IF	123	2	2	100.00
CASE	139	5	4	80.00
IF	163	2	2	100.00
IF	192	2	2	100.00

186          assign aon_dppullup_en_d = wake_detect_active_q ? aon_dppullup_en_q
                                                             -1-  
                                                             ==>  
                                                             ==>  

Branches:

-1-	Status	Tests
1	Covered	T7,T72,T73
0	Covered	T1,T2,T3

188          assign aon_dnpullup_en_d = wake_detect_active_q ? aon_dnpullup_en_q
                                                             -1-  
                                                             ==>  
                                                             ==>  

Branches:

-1-	Status	Tests
1	Covered	T7,T72,T73
0	Covered	T1,T2,T3

201          assign usb_dppullup_en_o = wake_detect_active_q ? aon_dppullup_en_q
                                                             -1-  
                                                             ==>  
                                                             ==>  

Branches:

-1-	Status	Tests
1	Covered	T7,T72,T73
0	Covered	T1,T2,T3

203          assign usb_dnpullup_en_o = wake_detect_active_q ? aon_dnpullup_en_q
                                                             -1-  
                                                             ==>  
                                                             ==>  

Branches:

-1-	Status	Tests
1	Covered	T7,T72,T73
0	Covered	T1,T2,T3

123            if (!rst_aon_ni) begin
               -1-  
124              bus_not_idle_q <= 1'b0;
                 ==>
125              bus_reset_q <= 1'b0;
126              sense_lost_q <= 1'b0;
127              wake_req_q <= 1'b0;
128            end else begin
129              bus_not_idle_q <= bus_not_idle_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

139            unique case (wake_detect_active_q)
                      -1-  
140              // No aon suspend entry has been requested or detected
141              1'b0: begin
142                if (suspend_req_aon_i) begin
                   -2-  
143                  wake_detect_active_d = 1'b1;
                     ==>
144                end
                   MISSING_ELSE
                   ==>
145              end
146        
147              // The USB IP has passed control to this module for handling the suspend
148              // request. wake_ack_i must be asserted to bring control back to the USB
149              // IP.
150              1'b1: begin
151                if (wake_ack_aon_i) begin
                   -3-  
152                  wake_detect_active_d = 1'b0;
                     ==>
153                end
                   MISSING_ELSE
                   ==>
154              end
155              default : wake_detect_active_d = 1'b0;
                 ==>

Branches:

-1-	-2-	-3-	Status	Tests
1'b0	1	-	Covered	T7,T72,T73
1'b0	0	-	Covered	T7,T72,T73
1'b1	-	1	Covered	T7,T72,T73
1'b1	-	0	Covered	T7,T72,T73
default	-	-	Not Covered

163            if (!rst_aon_ni) begin
               -1-  
164              wake_detect_active_q <= 1'b0;
                 ==>
165            end else begin
166              wake_detect_active_q <= wake_detect_active_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

192            if (!rst_aon_ni) begin
               -1-  
193              aon_dppullup_en_q <= 1'b0;
                 ==>
194              aon_dnpullup_en_q <= 1'b0;
195            end else begin
196              aon_dppullup_en_q <= aon_dppullup_en_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

---

Assert Coverage for Module : usbdev_aon_wake

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	1	1	100.00	1	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	1	1	100.00	1	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
WakeDetectActiveAonKnown_A	1471672	1278560	0	0

WakeDetectActiveAonKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1471672	1278560	0	0
T1	321	147	0	0
T2	469	296	0	0
T3	500	328	0	0
T4	390	218	0	0
T5	559	388	0	0
T6	509	335	0	0
T30	389	215	0	0
T68	713	541	0	0
T104	382	210	0	0
T105	405	232	0	0