T620 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/44.alert_handler_sig_int_fail.1733186144 |
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Oct 15 07:41:05 AM UTC 24 |
Oct 15 07:41:38 AM UTC 24 |
471699734 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/40.alert_handler_stress_all_with_rand_reset.934847456 |
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|
Oct 15 07:31:36 AM UTC 24 |
Oct 15 07:41:55 AM UTC 24 |
5815882078 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/33.alert_handler_entropy.1819668519 |
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|
Oct 15 07:18:16 AM UTC 24 |
Oct 15 07:42:05 AM UTC 24 |
13162563624 ps |
T124 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/33.alert_handler_stress_all.120606253 |
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Oct 15 07:18:52 AM UTC 24 |
Oct 15 07:42:18 AM UTC 24 |
53872083468 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/43.alert_handler_ping_timeout.2034816580 |
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Oct 15 07:38:53 AM UTC 24 |
Oct 15 07:42:20 AM UTC 24 |
13336406418 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_smoke.2414492598 |
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Oct 15 07:42:07 AM UTC 24 |
Oct 15 07:42:22 AM UTC 24 |
173397269 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_random_classes.857181915 |
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Oct 15 07:42:21 AM UTC 24 |
Oct 15 07:42:38 AM UTC 24 |
575939669 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_random_alerts.2948151902 |
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Oct 15 07:42:20 AM UTC 24 |
Oct 15 07:43:17 AM UTC 24 |
2986212695 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_esc_intr_timeout.2511371868 |
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Oct 15 07:42:23 AM UTC 24 |
Oct 15 07:43:28 AM UTC 24 |
769157207 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_esc_alert_accum.2720938910 |
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Oct 15 07:42:39 AM UTC 24 |
Oct 15 07:44:04 AM UTC 24 |
6398345712 ps |
T282 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_sig_int_fail.399276591 |
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Oct 15 07:43:19 AM UTC 24 |
Oct 15 07:44:20 AM UTC 24 |
1915163600 ps |
T290 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/28.alert_handler_lpg_stub_clk.4118412262 |
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Oct 15 07:10:11 AM UTC 24 |
Oct 15 07:45:05 AM UTC 24 |
20718194465 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/23.alert_handler_stress_all.1597822832 |
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Oct 15 07:01:32 AM UTC 24 |
Oct 15 07:45:42 AM UTC 24 |
389717028132 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_ping_timeout.2981913175 |
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Oct 15 07:43:29 AM UTC 24 |
Oct 15 07:45:58 AM UTC 24 |
6698116039 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/43.alert_handler_stress_all_with_rand_reset.3430950924 |
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Oct 15 07:39:14 AM UTC 24 |
Oct 15 07:46:08 AM UTC 24 |
5598720573 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_esc_intr_timeout.558915235 |
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Oct 15 07:45:58 AM UTC 24 |
Oct 15 07:46:23 AM UTC 24 |
823189045 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_smoke.4182892650 |
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Oct 15 07:45:08 AM UTC 24 |
Oct 15 07:46:30 AM UTC 24 |
947177884 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_random_classes.3955270033 |
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Oct 15 07:45:45 AM UTC 24 |
Oct 15 07:46:32 AM UTC 24 |
1244428987 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/24.alert_handler_entropy.3072706340 |
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Oct 15 07:02:58 AM UTC 24 |
Oct 15 07:46:40 AM UTC 24 |
38734230860 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/32.alert_handler_stress_all.272808601 |
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Oct 15 07:16:49 AM UTC 24 |
Oct 15 07:46:44 AM UTC 24 |
16954416677 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_sig_int_fail.2510374247 |
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Oct 15 07:46:24 AM UTC 24 |
Oct 15 07:46:47 AM UTC 24 |
426264226 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_random_alerts.1950395684 |
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Oct 15 07:45:26 AM UTC 24 |
Oct 15 07:46:47 AM UTC 24 |
2038914389 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/36.alert_handler_lpg.4022920103 |
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Oct 15 07:25:10 AM UTC 24 |
Oct 15 07:47:05 AM UTC 24 |
55309752263 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_smoke.3860529406 |
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Oct 15 07:47:07 AM UTC 24 |
Oct 15 07:47:32 AM UTC 24 |
905350189 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_random_alerts.4009348521 |
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Oct 15 07:47:33 AM UTC 24 |
Oct 15 07:47:53 AM UTC 24 |
1285917239 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/44.alert_handler_ping_timeout.3261161089 |
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Oct 15 07:41:23 AM UTC 24 |
Oct 15 07:48:06 AM UTC 24 |
7706647896 ps |
T273 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/24.alert_handler_stress_all.1158662827 |
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Oct 15 07:03:44 AM UTC 24 |
Oct 15 07:48:10 AM UTC 24 |
249296617383 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_random_classes.603063092 |
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Oct 15 07:47:55 AM UTC 24 |
Oct 15 07:48:42 AM UTC 24 |
1640797106 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/35.alert_handler_lpg_stub_clk.1674923524 |
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Oct 15 07:23:38 AM UTC 24 |
Oct 15 07:48:48 AM UTC 24 |
22133606407 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/41.alert_handler_entropy.2371269111 |
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Oct 15 07:33:11 AM UTC 24 |
Oct 15 07:49:02 AM UTC 24 |
9012305712 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_esc_intr_timeout.529397945 |
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Oct 15 07:48:08 AM UTC 24 |
Oct 15 07:49:03 AM UTC 24 |
1005771484 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_esc_alert_accum.3935965277 |
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Oct 15 07:46:09 AM UTC 24 |
Oct 15 07:49:07 AM UTC 24 |
21460252046 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/24.alert_handler_lpg_stub_clk.3234815472 |
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Oct 15 07:03:31 AM UTC 24 |
Oct 15 07:49:07 AM UTC 24 |
239167376223 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_stress_all_with_rand_reset.1906078316 |
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Oct 15 07:46:48 AM UTC 24 |
Oct 15 07:49:34 AM UTC 24 |
2402095060 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_esc_alert_accum.1586136481 |
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Oct 15 07:48:12 AM UTC 24 |
Oct 15 07:49:35 AM UTC 24 |
1786929166 ps |
T355 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/40.alert_handler_lpg.1290655323 |
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Oct 15 07:31:20 AM UTC 24 |
Oct 15 07:49:52 AM UTC 24 |
40135258199 ps |
T295 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_sig_int_fail.478355491 |
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Oct 15 07:48:43 AM UTC 24 |
Oct 15 07:49:54 AM UTC 24 |
731529323 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/42.alert_handler_lpg.621923202 |
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Oct 15 07:35:58 AM UTC 24 |
Oct 15 07:49:56 AM UTC 24 |
12917586083 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_esc_intr_timeout.2867046454 |
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|
Oct 15 07:49:58 AM UTC 24 |
Oct 15 07:50:04 AM UTC 24 |
25372024 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_random_classes.1126848939 |
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|
Oct 15 07:49:55 AM UTC 24 |
Oct 15 07:50:24 AM UTC 24 |
365040302 ps |
T305 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_smoke.794844089 |
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|
Oct 15 07:49:35 AM UTC 24 |
Oct 15 07:50:27 AM UTC 24 |
761649673 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/31.alert_handler_lpg_stub_clk.4082578400 |
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|
Oct 15 07:15:10 AM UTC 24 |
Oct 15 07:51:03 AM UTC 24 |
80555834587 ps |
T125 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_sig_int_fail.3225490323 |
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Oct 15 07:50:24 AM UTC 24 |
Oct 15 07:51:10 AM UTC 24 |
1005956156 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_random_alerts.9844114 |
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Oct 15 07:49:54 AM UTC 24 |
Oct 15 07:51:17 AM UTC 24 |
963250622 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_esc_alert_accum.153750385 |
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|
Oct 15 07:50:05 AM UTC 24 |
Oct 15 07:51:19 AM UTC 24 |
555958619 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/38.alert_handler_lpg.2037313151 |
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|
Oct 15 07:28:04 AM UTC 24 |
Oct 15 07:51:29 AM UTC 24 |
14527131758 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/29.alert_handler_lpg_stub_clk.1727450358 |
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|
Oct 15 07:11:56 AM UTC 24 |
Oct 15 07:51:41 AM UTC 24 |
40468234138 ps |
T291 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/21.alert_handler_lpg.2377969665 |
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|
Oct 15 06:56:17 AM UTC 24 |
Oct 15 07:51:46 AM UTC 24 |
434116380551 ps |
T126 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/41.alert_handler_stress_all.2121607673 |
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|
Oct 15 07:33:56 AM UTC 24 |
Oct 15 07:51:47 AM UTC 24 |
19909838632 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/35.alert_handler_lpg.1651348469 |
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|
Oct 15 07:23:38 AM UTC 24 |
Oct 15 07:51:58 AM UTC 24 |
101761180871 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_esc_intr_timeout.2604875146 |
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|
Oct 15 07:51:59 AM UTC 24 |
Oct 15 07:52:05 AM UTC 24 |
23635758 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_random_classes.1931179277 |
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|
Oct 15 07:51:51 AM UTC 24 |
Oct 15 07:52:07 AM UTC 24 |
545704795 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_smoke.3271329412 |
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|
Oct 15 07:51:43 AM UTC 24 |
Oct 15 07:52:17 AM UTC 24 |
580033523 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_random_alerts.844755747 |
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|
Oct 15 07:51:49 AM UTC 24 |
Oct 15 07:52:25 AM UTC 24 |
725484672 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_esc_alert_accum.3388797193 |
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|
Oct 15 07:52:05 AM UTC 24 |
Oct 15 07:52:36 AM UTC 24 |
723459524 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/32.alert_handler_entropy.1963062372 |
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|
Oct 15 07:16:30 AM UTC 24 |
Oct 15 07:52:38 AM UTC 24 |
125712365671 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_sig_int_fail.896309577 |
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|
Oct 15 07:52:07 AM UTC 24 |
Oct 15 07:53:00 AM UTC 24 |
2458914586 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/26.alert_handler_lpg_stub_clk.3180397452 |
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Oct 15 07:07:07 AM UTC 24 |
Oct 15 07:53:05 AM UTC 24 |
205006592347 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/38.alert_handler_lpg_stub_clk.3510722851 |
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Oct 15 07:28:06 AM UTC 24 |
Oct 15 07:53:52 AM UTC 24 |
16946591794 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_ping_timeout.467734609 |
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|
Oct 15 07:51:06 AM UTC 24 |
Oct 15 07:54:02 AM UTC 24 |
3838345402 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/39.alert_handler_lpg_stub_clk.2595266863 |
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Oct 15 07:29:32 AM UTC 24 |
Oct 15 07:54:11 AM UTC 24 |
17150352126 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/32.alert_handler_lpg.1251940923 |
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|
Oct 15 07:16:42 AM UTC 24 |
Oct 15 07:54:25 AM UTC 24 |
84034084389 ps |
T338 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_ping_timeout.3298598195 |
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Oct 15 07:49:04 AM UTC 24 |
Oct 15 07:54:32 AM UTC 24 |
25458703278 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_ping_timeout.4221560265 |
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Oct 15 07:46:33 AM UTC 24 |
Oct 15 07:55:05 AM UTC 24 |
9608701572 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_stress_all_with_rand_reset.3918327711 |
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Oct 15 07:49:35 AM UTC 24 |
Oct 15 07:55:11 AM UTC 24 |
2166212385 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_stress_all_with_rand_reset.4130080122 |
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Oct 15 07:53:07 AM UTC 24 |
Oct 15 07:55:40 AM UTC 24 |
27710564881 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/25.alert_handler_lpg.1295588347 |
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Oct 15 07:05:37 AM UTC 24 |
Oct 15 07:55:50 AM UTC 24 |
72690370106 ps |
T364 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/39.alert_handler_lpg.1572707214 |
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Oct 15 07:29:21 AM UTC 24 |
Oct 15 07:56:36 AM UTC 24 |
23854936355 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/30.alert_handler_stress_all.759707829 |
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Oct 15 07:13:44 AM UTC 24 |
Oct 15 07:56:57 AM UTC 24 |
51014064639 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/43.alert_handler_lpg_stub_clk.846302703 |
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Oct 15 07:39:13 AM UTC 24 |
Oct 15 07:57:40 AM UTC 24 |
23466637582 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_ping_timeout.2737823122 |
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Oct 15 07:52:26 AM UTC 24 |
Oct 15 07:57:54 AM UTC 24 |
11621625961 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/43.alert_handler_entropy.702317774 |
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Oct 15 07:38:39 AM UTC 24 |
Oct 15 07:58:13 AM UTC 24 |
37305054265 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_stress_all.400181708 |
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Oct 15 07:44:21 AM UTC 24 |
Oct 15 07:59:02 AM UTC 24 |
10009860955 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/30.alert_handler_lpg_stub_clk.1934664393 |
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Oct 15 07:13:18 AM UTC 24 |
Oct 15 07:59:24 AM UTC 24 |
188237338193 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/39.alert_handler_entropy.786684311 |
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Oct 15 07:29:01 AM UTC 24 |
Oct 15 07:59:39 AM UTC 24 |
71152005353 ps |
T300 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_stress_all_with_rand_reset.4271641935 |
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Oct 15 07:51:32 AM UTC 24 |
Oct 15 08:00:17 AM UTC 24 |
4904364043 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/37.alert_handler_lpg.2899457723 |
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Oct 15 07:26:19 AM UTC 24 |
Oct 15 08:00:29 AM UTC 24 |
25145424704 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/38.alert_handler_stress_all.2759651100 |
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Oct 15 07:28:07 AM UTC 24 |
Oct 15 08:01:03 AM UTC 24 |
31658875793 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/36.alert_handler_entropy.550214980 |
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Oct 15 07:25:03 AM UTC 24 |
Oct 15 08:02:00 AM UTC 24 |
29440457874 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/44.alert_handler_stress_all.1536402940 |
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Oct 15 07:41:39 AM UTC 24 |
Oct 15 08:02:13 AM UTC 24 |
15335655200 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_entropy.305134269 |
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Oct 15 07:48:50 AM UTC 24 |
Oct 15 08:04:02 AM UTC 24 |
17531932251 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/42.alert_handler_entropy.3855624395 |
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Oct 15 07:35:52 AM UTC 24 |
Oct 15 08:04:12 AM UTC 24 |
94458339188 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/44.alert_handler_lpg.920619158 |
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Oct 15 07:41:25 AM UTC 24 |
Oct 15 08:04:23 AM UTC 24 |
76515065650 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/44.alert_handler_lpg_stub_clk.1320695507 |
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|
Oct 15 07:41:31 AM UTC 24 |
Oct 15 08:04:32 AM UTC 24 |
17870682691 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/34.alert_handler_lpg_stub_clk.2315114814 |
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|
Oct 15 07:20:47 AM UTC 24 |
Oct 15 08:04:54 AM UTC 24 |
164820034806 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/37.alert_handler_entropy.1435151450 |
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|
Oct 15 07:26:05 AM UTC 24 |
Oct 15 08:05:34 AM UTC 24 |
502237331785 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/41.alert_handler_lpg.1656751585 |
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|
Oct 15 07:33:23 AM UTC 24 |
Oct 15 08:05:38 AM UTC 24 |
59134233073 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/43.alert_handler_lpg.3013112484 |
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|
Oct 15 07:39:05 AM UTC 24 |
Oct 15 08:05:43 AM UTC 24 |
44500883148 ps |
T279 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/42.alert_handler_stress_all.1008722377 |
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|
Oct 15 07:36:37 AM UTC 24 |
Oct 15 08:06:11 AM UTC 24 |
638568788015 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/33.alert_handler_lpg_stub_clk.2085511923 |
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|
Oct 15 07:18:38 AM UTC 24 |
Oct 15 08:06:21 AM UTC 24 |
48259249628 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/36.alert_handler_lpg_stub_clk.683533204 |
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|
Oct 15 07:25:14 AM UTC 24 |
Oct 15 08:06:48 AM UTC 24 |
42595087462 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_lpg.1236383300 |
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|
Oct 15 07:51:10 AM UTC 24 |
Oct 15 08:07:47 AM UTC 24 |
21567181502 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_lpg_stub_clk.3528920970 |
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|
Oct 15 07:44:05 AM UTC 24 |
Oct 15 08:08:30 AM UTC 24 |
13299018751 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/38.alert_handler_entropy.3242914635 |
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|
Oct 15 07:27:59 AM UTC 24 |
Oct 15 08:08:59 AM UTC 24 |
189559577694 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/29.alert_handler_entropy.1756302595 |
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|
Oct 15 07:11:47 AM UTC 24 |
Oct 15 08:09:07 AM UTC 24 |
213859522087 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_entropy.942504789 |
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|
Oct 15 07:46:31 AM UTC 24 |
Oct 15 08:10:13 AM UTC 24 |
28734868014 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_lpg.548180941 |
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|
Oct 15 07:52:37 AM UTC 24 |
Oct 15 08:10:34 AM UTC 24 |
43437956843 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/42.alert_handler_lpg_stub_clk.1587437593 |
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|
Oct 15 07:36:16 AM UTC 24 |
Oct 15 08:11:21 AM UTC 24 |
119456736814 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/32.alert_handler_lpg_stub_clk.211700238 |
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|
Oct 15 07:16:47 AM UTC 24 |
Oct 15 08:11:22 AM UTC 24 |
57168477890 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_lpg.1476445493 |
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|
Oct 15 07:44:01 AM UTC 24 |
Oct 15 08:12:34 AM UTC 24 |
347667462616 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_lpg.1707803270 |
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|
Oct 15 07:49:04 AM UTC 24 |
Oct 15 08:12:51 AM UTC 24 |
25245052145 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/40.alert_handler_entropy.2620540320 |
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|
Oct 15 07:31:07 AM UTC 24 |
Oct 15 08:14:11 AM UTC 24 |
148934792370 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/37.alert_handler_lpg_stub_clk.3184931814 |
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|
Oct 15 07:26:19 AM UTC 24 |
Oct 15 08:15:11 AM UTC 24 |
52350855245 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/45.alert_handler_entropy.3326854395 |
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|
Oct 15 07:43:25 AM UTC 24 |
Oct 15 08:17:27 AM UTC 24 |
55734392841 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_lpg.588643311 |
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|
Oct 15 07:46:43 AM UTC 24 |
Oct 15 08:17:37 AM UTC 24 |
19447190770 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_lpg_stub_clk.3439444190 |
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|
Oct 15 07:52:40 AM UTC 24 |
Oct 15 08:18:25 AM UTC 24 |
28974187317 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_entropy.1403692947 |
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|
Oct 15 07:52:19 AM UTC 24 |
Oct 15 08:19:06 AM UTC 24 |
29269686050 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/49.alert_handler_stress_all.1722652220 |
|
|
Oct 15 07:53:00 AM UTC 24 |
Oct 15 08:20:46 AM UTC 24 |
91697993671 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/44.alert_handler_entropy.3697722963 |
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|
Oct 15 07:41:20 AM UTC 24 |
Oct 15 08:21:15 AM UTC 24 |
102822451732 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_stress_all.190931625 |
|
|
Oct 15 07:49:10 AM UTC 24 |
Oct 15 08:22:45 AM UTC 24 |
124782407032 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/41.alert_handler_lpg_stub_clk.808830460 |
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|
Oct 15 07:33:50 AM UTC 24 |
Oct 15 08:24:05 AM UTC 24 |
49492315863 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/40.alert_handler_lpg_stub_clk.2683222286 |
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|
Oct 15 07:31:23 AM UTC 24 |
Oct 15 08:26:44 AM UTC 24 |
54942750818 ps |
T270 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/39.alert_handler_stress_all.1602776810 |
|
|
Oct 15 07:29:36 AM UTC 24 |
Oct 15 08:26:50 AM UTC 24 |
100195915630 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_entropy.2762152976 |
|
|
Oct 15 07:50:27 AM UTC 24 |
Oct 15 08:27:19 AM UTC 24 |
42625195568 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_lpg_stub_clk.4119542629 |
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|
Oct 15 07:46:47 AM UTC 24 |
Oct 15 08:28:13 AM UTC 24 |
235096702988 ps |
T278 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/34.alert_handler_stress_all.1202448520 |
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|
Oct 15 07:21:15 AM UTC 24 |
Oct 15 08:29:49 AM UTC 24 |
150479505503 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_lpg_stub_clk.2277902754 |
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|
Oct 15 07:51:19 AM UTC 24 |
Oct 15 08:30:35 AM UTC 24 |
38545386284 ps |
T274 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/48.alert_handler_stress_all.3783955090 |
|
|
Oct 15 07:51:20 AM UTC 24 |
Oct 15 08:31:16 AM UTC 24 |
160968098947 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/46.alert_handler_stress_all.1198969125 |
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|
Oct 15 07:46:48 AM UTC 24 |
Oct 15 08:31:22 AM UTC 24 |
43942415512 ps |
T280 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/43.alert_handler_stress_all.1216085674 |
|
|
Oct 15 07:39:13 AM UTC 24 |
Oct 15 08:34:11 AM UTC 24 |
63408340834 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/47.alert_handler_lpg_stub_clk.1779995163 |
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|
Oct 15 07:49:10 AM UTC 24 |
Oct 15 08:37:29 AM UTC 24 |
37389635847 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/default/40.alert_handler_stress_all.1715141969 |
|
|
Oct 15 07:31:26 AM UTC 24 |
Oct 15 08:39:50 AM UTC 24 |
71043324727 ps |
T220 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_intr_test.3803876576 |
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|
Oct 15 08:06:46 AM UTC 24 |
Oct 15 08:06:49 AM UTC 24 |
9532518 ps |
T217 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_tl_intg_err.1100855341 |
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|
Oct 15 08:06:45 AM UTC 24 |
Oct 15 08:06:50 AM UTC 24 |
57289906 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_rw.566439093 |
|
|
Oct 15 08:06:48 AM UTC 24 |
Oct 15 08:06:54 AM UTC 24 |
90581341 ps |
T168 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_hw_reset.1884165298 |
|
|
Oct 15 08:06:47 AM UTC 24 |
Oct 15 08:06:54 AM UTC 24 |
28693679 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_tl_errors.416698056 |
|
|
Oct 15 08:06:44 AM UTC 24 |
Oct 15 08:07:02 AM UTC 24 |
883540086 ps |
T221 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_intr_test.3988542469 |
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|
Oct 15 08:07:00 AM UTC 24 |
Oct 15 08:07:03 AM UTC 24 |
8574145 ps |
T233 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_mem_rw_with_rand_reset.3809791851 |
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|
Oct 15 08:06:54 AM UTC 24 |
Oct 15 08:07:04 AM UTC 24 |
134766820 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_tl_errors.1093017658 |
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|
Oct 15 08:06:56 AM UTC 24 |
Oct 15 08:07:07 AM UTC 24 |
996406008 ps |
T169 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_rw.1775382261 |
|
|
Oct 15 08:07:03 AM UTC 24 |
Oct 15 08:07:09 AM UTC 24 |
124035981 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_hw_reset.493327324 |
|
|
Oct 15 08:07:00 AM UTC 24 |
Oct 15 08:07:16 AM UTC 24 |
224249866 ps |
T236 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_mem_rw_with_rand_reset.4073217060 |
|
|
Oct 15 08:07:08 AM UTC 24 |
Oct 15 08:07:20 AM UTC 24 |
377218925 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_same_csr_outstanding.2595480441 |
|
|
Oct 15 08:06:51 AM UTC 24 |
Oct 15 08:07:39 AM UTC 24 |
711092600 ps |
T262 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_tl_errors.1502943476 |
|
|
Oct 15 08:07:22 AM UTC 24 |
Oct 15 08:07:44 AM UTC 24 |
1019813237 ps |
T218 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_tl_intg_err.842205473 |
|
|
Oct 15 08:07:41 AM UTC 24 |
Oct 15 08:07:45 AM UTC 24 |
324104031 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_intr_test.2628723196 |
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|
Oct 15 08:07:45 AM UTC 24 |
Oct 15 08:07:48 AM UTC 24 |
10764270 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_hw_reset.2621476981 |
|
|
Oct 15 08:07:46 AM UTC 24 |
Oct 15 08:07:55 AM UTC 24 |
56161917 ps |
T173 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_same_csr_outstanding.1130909175 |
|
|
Oct 15 08:07:06 AM UTC 24 |
Oct 15 08:08:01 AM UTC 24 |
1213628094 ps |
T177 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_rw.2189572616 |
|
|
Oct 15 08:07:49 AM UTC 24 |
Oct 15 08:08:02 AM UTC 24 |
183290245 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_same_csr_outstanding.3807774938 |
|
|
Oct 15 08:08:02 AM UTC 24 |
Oct 15 08:08:15 AM UTC 24 |
368028669 ps |
T385 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_mem_rw_with_rand_reset.1028670695 |
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|
Oct 15 08:08:03 AM UTC 24 |
Oct 15 08:08:19 AM UTC 24 |
506872526 ps |
T219 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_tl_intg_err.3686519254 |
|
|
Oct 15 08:08:27 AM UTC 24 |
Oct 15 08:08:33 AM UTC 24 |
37963669 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_intr_test.1629672826 |
|
|
Oct 15 08:08:32 AM UTC 24 |
Oct 15 08:08:36 AM UTC 24 |
8736033 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_tl_errors.2806158345 |
|
|
Oct 15 08:08:25 AM UTC 24 |
Oct 15 08:08:38 AM UTC 24 |
211987461 ps |
T182 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_hw_reset.2279477222 |
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|
Oct 15 08:08:34 AM UTC 24 |
Oct 15 08:08:45 AM UTC 24 |
66035073 ps |
T284 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_tl_intg_err.2364032320 |
|
|
Oct 15 08:06:58 AM UTC 24 |
Oct 15 08:08:47 AM UTC 24 |
3144899689 ps |
T259 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_rw.3249562881 |
|
|
Oct 15 08:08:36 AM UTC 24 |
Oct 15 08:08:48 AM UTC 24 |
132410419 ps |
T386 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_mem_rw_with_rand_reset.1256365760 |
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|
Oct 15 08:08:49 AM UTC 24 |
Oct 15 08:08:58 AM UTC 24 |
103281257 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_aliasing.2611920055 |
|
|
Oct 15 08:06:50 AM UTC 24 |
Oct 15 08:09:01 AM UTC 24 |
1101612478 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_tl_errors.1904561868 |
|
|
Oct 15 08:09:02 AM UTC 24 |
Oct 15 08:09:17 AM UTC 24 |
280474416 ps |
T378 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_intr_test.1301479100 |
|
|
Oct 15 08:09:18 AM UTC 24 |
Oct 15 08:09:21 AM UTC 24 |
11786394 ps |
T175 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_same_csr_outstanding.2231606331 |
|
|
Oct 15 08:08:48 AM UTC 24 |
Oct 15 08:09:22 AM UTC 24 |
264289608 ps |
T223 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_tl_intg_err.1196127914 |
|
|
Oct 15 08:09:10 AM UTC 24 |
Oct 15 08:09:23 AM UTC 24 |
142455200 ps |
T176 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_hw_reset.3214468326 |
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|
Oct 15 08:09:22 AM UTC 24 |
Oct 15 08:09:32 AM UTC 24 |
115680591 ps |
T179 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_rw.2535596515 |
|
|
Oct 15 08:09:23 AM UTC 24 |
Oct 15 08:09:32 AM UTC 24 |
124795183 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_aliasing.1556913588 |
|
|
Oct 15 08:07:56 AM UTC 24 |
Oct 15 08:09:43 AM UTC 24 |
5472521997 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_mem_rw_with_rand_reset.41261335 |
|
|
Oct 15 08:09:45 AM UTC 24 |
Oct 15 08:09:54 AM UTC 24 |
65470799 ps |
T387 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_bit_bash.2827361872 |
|
|
Oct 15 08:07:49 AM UTC 24 |
Oct 15 08:09:55 AM UTC 24 |
848423843 ps |
T183 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_shadow_reg_errors.337227630 |
|
|
Oct 15 08:07:16 AM UTC 24 |
Oct 15 08:10:01 AM UTC 24 |
12091730258 ps |
T264 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_tl_errors.3786711901 |
|
|
Oct 15 08:10:02 AM UTC 24 |
Oct 15 08:10:16 AM UTC 24 |
202638836 ps |
T379 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_intr_test.2805485303 |
|
|
Oct 15 08:10:15 AM UTC 24 |
Oct 15 08:10:18 AM UTC 24 |
24129035 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_csr_rw.2438087972 |
|
|
Oct 15 08:10:16 AM UTC 24 |
Oct 15 08:10:25 AM UTC 24 |
50595191 ps |
T263 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_bit_bash.470018701 |
|
|
Oct 15 08:06:50 AM UTC 24 |
Oct 15 08:10:32 AM UTC 24 |
8922825947 ps |
T181 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_same_csr_outstanding.1937644893 |
|
|
Oct 15 08:09:34 AM UTC 24 |
Oct 15 08:10:34 AM UTC 24 |
2147376715 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_csr_mem_rw_with_rand_reset.94826387 |
|
|
Oct 15 08:10:25 AM UTC 24 |
Oct 15 08:10:34 AM UTC 24 |
265133629 ps |
T235 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_tl_intg_err.1830004025 |
|
|
Oct 15 08:10:36 AM UTC 24 |
Oct 15 08:10:40 AM UTC 24 |
34055845 ps |
T383 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_intr_test.2634542049 |
|
|
Oct 15 08:10:41 AM UTC 24 |
Oct 15 08:10:45 AM UTC 24 |
19606867 ps |
T230 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_tl_intg_err.321103887 |
|
|
Oct 15 08:10:15 AM UTC 24 |
Oct 15 08:10:57 AM UTC 24 |
618263111 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_csr_rw.2297115276 |
|
|
Oct 15 08:10:46 AM UTC 24 |
Oct 15 08:10:58 AM UTC 24 |
96790001 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_bit_bash.3307846405 |
|
|
Oct 15 08:07:04 AM UTC 24 |
Oct 15 08:11:08 AM UTC 24 |
2909768926 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_tl_errors.175406030 |
|
|
Oct 15 08:10:36 AM UTC 24 |
Oct 15 08:11:09 AM UTC 24 |
415780928 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_csr_mem_rw_with_rand_reset.3046432976 |
|
|
Oct 15 08:11:00 AM UTC 24 |
Oct 15 08:11:11 AM UTC 24 |
76868513 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_same_csr_outstanding.1004192000 |
|
|
Oct 15 08:10:19 AM UTC 24 |
Oct 15 08:11:20 AM UTC 24 |
3570541887 ps |
T226 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_tl_intg_err.2706616512 |
|
|
Oct 15 08:11:20 AM UTC 24 |
Oct 15 08:11:24 AM UTC 24 |
190659370 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_tl_errors.103587748 |
|
|
Oct 15 08:11:12 AM UTC 24 |
Oct 15 08:11:25 AM UTC 24 |
242821010 ps |
T380 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_intr_test.2985963791 |
|
|
Oct 15 08:11:23 AM UTC 24 |
Oct 15 08:11:25 AM UTC 24 |
6462905 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_same_csr_outstanding.1907798926 |
|
|
Oct 15 08:10:58 AM UTC 24 |
Oct 15 08:11:30 AM UTC 24 |
340732751 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_csr_rw.831041081 |
|
|
Oct 15 08:11:25 AM UTC 24 |
Oct 15 08:11:34 AM UTC 24 |
907792777 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_csr_mem_rw_with_rand_reset.3131263054 |
|
|
Oct 15 08:11:26 AM UTC 24 |
Oct 15 08:11:39 AM UTC 24 |
1329133583 ps |
T222 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_tl_intg_err.1620252272 |
|
|
Oct 15 08:11:41 AM UTC 24 |
Oct 15 08:11:48 AM UTC 24 |
234386708 ps |
T381 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_intr_test.3138884847 |
|
|
Oct 15 08:11:49 AM UTC 24 |
Oct 15 08:11:52 AM UTC 24 |
17897120 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_tl_errors.2575877717 |
|
|
Oct 15 08:11:35 AM UTC 24 |
Oct 15 08:11:58 AM UTC 24 |
791291410 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_same_csr_outstanding.1618142415 |
|
|
Oct 15 08:11:26 AM UTC 24 |
Oct 15 08:11:58 AM UTC 24 |
255495713 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_aliasing.3155111222 |
|
|
Oct 15 08:08:46 AM UTC 24 |
Oct 15 08:11:58 AM UTC 24 |
1390257238 ps |
T184 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_shadow_reg_errors.3054702554 |
|
|
Oct 15 08:06:43 AM UTC 24 |
Oct 15 08:12:00 AM UTC 24 |
7698095584 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_csr_rw.958120361 |
|
|
Oct 15 08:11:53 AM UTC 24 |
Oct 15 08:12:01 AM UTC 24 |
178507550 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_csr_mem_rw_with_rand_reset.2791684074 |
|
|
Oct 15 08:11:59 AM UTC 24 |
Oct 15 08:12:09 AM UTC 24 |
91287840 ps |
T186 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_shadow_reg_errors.2015562286 |
|
|
Oct 15 08:09:56 AM UTC 24 |
Oct 15 08:12:10 AM UTC 24 |
7823782947 ps |
T384 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_intr_test.1023194010 |
|
|
Oct 15 08:12:10 AM UTC 24 |
Oct 15 08:12:13 AM UTC 24 |
12327500 ps |
T285 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_tl_intg_err.757246286 |
|
|
Oct 15 08:12:09 AM UTC 24 |
Oct 15 08:12:14 AM UTC 24 |
87642220 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_tl_errors.1268173588 |
|
|
Oct 15 08:12:02 AM UTC 24 |
Oct 15 08:12:19 AM UTC 24 |
578551244 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_csr_rw.313670451 |
|
|
Oct 15 08:12:11 AM UTC 24 |
Oct 15 08:12:24 AM UTC 24 |
128701049 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_csr_mem_rw_with_rand_reset.1442912861 |
|
|
Oct 15 08:12:14 AM UTC 24 |
Oct 15 08:12:29 AM UTC 24 |
168064975 ps |
T185 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_shadow_reg_errors.154378830 |
|
|
Oct 15 08:10:36 AM UTC 24 |
Oct 15 08:12:32 AM UTC 24 |
3581283797 ps |
T187 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_shadow_reg_errors.1633862406 |
|
|
Oct 15 08:06:54 AM UTC 24 |
Oct 15 08:12:34 AM UTC 24 |
3990702343 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_same_csr_outstanding.2775353308 |
|
|
Oct 15 08:11:58 AM UTC 24 |
Oct 15 08:12:35 AM UTC 24 |
423763674 ps |
T382 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_intr_test.4133091871 |
|
|
Oct 15 08:12:36 AM UTC 24 |
Oct 15 08:12:39 AM UTC 24 |
28164046 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_csr_rw.485705454 |
|
|
Oct 15 08:12:36 AM UTC 24 |
Oct 15 08:12:42 AM UTC 24 |
33680303 ps |
T231 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_tl_intg_err.1341905966 |
|
|
Oct 15 08:12:33 AM UTC 24 |
Oct 15 08:12:45 AM UTC 24 |
131497348 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_csr_mem_rw_with_rand_reset.3705365784 |
|
|
Oct 15 08:12:40 AM UTC 24 |
Oct 15 08:12:49 AM UTC 24 |
123939056 ps |
T188 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_shadow_reg_errors.3890215732 |
|
|
Oct 15 08:11:10 AM UTC 24 |
Oct 15 08:12:50 AM UTC 24 |
1817979326 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_tl_errors.1233316985 |
|
|
Oct 15 08:12:29 AM UTC 24 |
Oct 15 08:12:51 AM UTC 24 |
849245871 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_intr_test.1665929610 |
|
|
Oct 15 08:12:53 AM UTC 24 |
Oct 15 08:12:56 AM UTC 24 |
13064230 ps |
T189 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_shadow_reg_errors.987207162 |
|
|
Oct 15 08:08:20 AM UTC 24 |
Oct 15 08:12:58 AM UTC 24 |
7998919561 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_aliasing.3571009373 |
|
|
Oct 15 08:07:05 AM UTC 24 |
Oct 15 08:12:59 AM UTC 24 |
3391428401 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_csr_rw.1208979852 |
|
|
Oct 15 08:12:53 AM UTC 24 |
Oct 15 08:13:06 AM UTC 24 |
636442302 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_same_csr_outstanding.1344901059 |
|
|
Oct 15 08:12:37 AM UTC 24 |
Oct 15 08:13:07 AM UTC 24 |
719930222 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_csr_mem_rw_with_rand_reset.3580697090 |
|
|
Oct 15 08:12:59 AM UTC 24 |
Oct 15 08:13:08 AM UTC 24 |
141144059 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_same_csr_outstanding.1869188555 |
|
|
Oct 15 08:12:14 AM UTC 24 |
Oct 15 08:13:10 AM UTC 24 |
919856536 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_tl_errors.1796008980 |
|
|
Oct 15 08:12:49 AM UTC 24 |
Oct 15 08:13:10 AM UTC 24 |
747924195 ps |
T194 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_shadow_reg_errors.669152675 |
|
|
Oct 15 08:09:02 AM UTC 24 |
Oct 15 08:13:12 AM UTC 24 |
2668670711 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_intr_test.1102272335 |
|
|
Oct 15 08:13:09 AM UTC 24 |
Oct 15 08:13:12 AM UTC 24 |
17073311 ps |
T229 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_tl_intg_err.3112406979 |
|
|
Oct 15 08:13:08 AM UTC 24 |
Oct 15 08:13:13 AM UTC 24 |
90141234 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_same_csr_outstanding.3311216036 |
|
|
Oct 15 08:12:57 AM UTC 24 |
Oct 15 08:13:16 AM UTC 24 |
182938981 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_tl_errors.924138071 |
|
|
Oct 15 08:13:07 AM UTC 24 |
Oct 15 08:13:16 AM UTC 24 |
129501533 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_csr_mem_rw_with_rand_reset.1221811193 |
|
|
Oct 15 08:13:13 AM UTC 24 |
Oct 15 08:13:21 AM UTC 24 |
29465982 ps |
T234 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_tl_intg_err.3084379530 |
|
|
Oct 15 08:13:17 AM UTC 24 |
Oct 15 08:13:21 AM UTC 24 |
237494872 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_csr_rw.4095774274 |
|
|
Oct 15 08:13:10 AM UTC 24 |
Oct 15 08:13:24 AM UTC 24 |
93757098 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_intr_test.2577094524 |
|
|
Oct 15 08:13:22 AM UTC 24 |
Oct 15 08:13:25 AM UTC 24 |
14041603 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_tl_errors.3495021097 |
|
|
Oct 15 08:13:17 AM UTC 24 |
Oct 15 08:13:26 AM UTC 24 |
109824692 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_csr_rw.3500424814 |
|
|
Oct 15 08:13:22 AM UTC 24 |
Oct 15 08:13:30 AM UTC 24 |
52996559 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_aliasing.953776615 |
|
|
Oct 15 08:09:32 AM UTC 24 |
Oct 15 08:13:34 AM UTC 24 |
4090651762 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_csr_mem_rw_with_rand_reset.2853666917 |
|
|
Oct 15 08:13:26 AM UTC 24 |
Oct 15 08:13:39 AM UTC 24 |
691542084 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_tl_intg_err.3251664632 |
|
|
Oct 15 08:13:40 AM UTC 24 |
Oct 15 08:13:47 AM UTC 24 |
225669244 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_intr_test.1274712212 |
|
|
Oct 15 08:13:48 AM UTC 24 |
Oct 15 08:13:51 AM UTC 24 |
6499112 ps |
T190 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_shadow_reg_errors.224344242 |
|
|
Oct 15 08:12:25 AM UTC 24 |
Oct 15 08:13:59 AM UTC 24 |
15003411879 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_csr_rw.3824200377 |
|
|
Oct 15 08:13:52 AM UTC 24 |
Oct 15 08:14:01 AM UTC 24 |
64102926 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_same_csr_outstanding.188237245 |
|
|
Oct 15 08:13:25 AM UTC 24 |
Oct 15 08:14:01 AM UTC 24 |
331419126 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_tl_errors.2393325229 |
|
|
Oct 15 08:13:35 AM UTC 24 |
Oct 15 08:14:09 AM UTC 24 |
1422390710 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_csr_mem_rw_with_rand_reset.3088258149 |
|
|
Oct 15 08:14:02 AM UTC 24 |
Oct 15 08:14:10 AM UTC 24 |
33279145 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_same_csr_outstanding.2397394085 |
|
|
Oct 15 08:13:10 AM UTC 24 |
Oct 15 08:14:13 AM UTC 24 |
978336917 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_intr_test.894174428 |
|
|
Oct 15 08:14:14 AM UTC 24 |
Oct 15 08:14:18 AM UTC 24 |
8856803 ps |
T228 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_tl_intg_err.3492130892 |
|
|
Oct 15 08:14:13 AM UTC 24 |
Oct 15 08:14:20 AM UTC 24 |
387344474 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_tl_errors.1324262449 |
|
|
Oct 15 08:14:13 AM UTC 24 |
Oct 15 08:14:23 AM UTC 24 |
304973117 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_csr_rw.20347596 |
|
|
Oct 15 08:14:19 AM UTC 24 |
Oct 15 08:14:27 AM UTC 24 |
95880863 ps |
T201 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_shadow_reg_errors_with_csr_rw.257899942 |
|
|
Oct 15 08:06:54 AM UTC 24 |
Oct 15 08:14:28 AM UTC 24 |
24430142969 ps |
T225 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_tl_intg_err.2896227722 |
|
|
Oct 15 08:12:50 AM UTC 24 |
Oct 15 08:14:28 AM UTC 24 |
916082054 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_csr_mem_rw_with_rand_reset.4224670847 |
|
|
Oct 15 08:14:25 AM UTC 24 |
Oct 15 08:14:35 AM UTC 24 |
570265821 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_bit_bash.3486987107 |
|
|
Oct 15 08:08:40 AM UTC 24 |
Oct 15 08:14:39 AM UTC 24 |
5820903392 ps |
T227 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_tl_intg_err.288113696 |
|
|
Oct 15 08:14:36 AM UTC 24 |
Oct 15 08:14:40 AM UTC 24 |
150599682 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_intr_test.1507705653 |
|
|
Oct 15 08:14:40 AM UTC 24 |
Oct 15 08:14:43 AM UTC 24 |
19951532 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_csr_rw.2571107787 |
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|
Oct 15 08:14:41 AM UTC 24 |
Oct 15 08:14:50 AM UTC 24 |
189448126 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_tl_errors.3621657391 |
|
|
Oct 15 08:14:30 AM UTC 24 |
Oct 15 08:14:53 AM UTC 24 |
785031193 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_csr_mem_rw_with_rand_reset.1973051900 |
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|
Oct 15 08:14:44 AM UTC 24 |
Oct 15 08:14:53 AM UTC 24 |
37243850 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_same_csr_outstanding.2472846698 |
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|
Oct 15 08:14:00 AM UTC 24 |
Oct 15 08:14:53 AM UTC 24 |
630124103 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_same_csr_outstanding.3263622101 |
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|
Oct 15 08:14:43 AM UTC 24 |
Oct 15 08:14:59 AM UTC 24 |
166524875 ps |
T232 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_tl_intg_err.2526295958 |
|
|
Oct 15 08:14:55 AM UTC 24 |
Oct 15 08:15:00 AM UTC 24 |
32473225 ps |
T193 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_shadow_reg_errors.1491081175 |
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|
Oct 15 08:13:14 AM UTC 24 |
Oct 15 08:15:02 AM UTC 24 |
3486253593 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_10_14/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_intr_test.2270882287 |
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Oct 15 08:15:00 AM UTC 24 |
Oct 15 08:15:03 AM UTC 24 |
6773256 ps |