Unified Coverage Report :: Module :: clkmgr_byp

Module : clkmgr_byp

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_clkmgr_0.1/rtl/clkmgr_byp.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_clkmgr_byp	100.00	100.00

---

Module Instance : tb.dut.u_clkmgr_byp

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00	100.00			100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.63	100.00	93.15	100.00		100.00	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_all_ack_sync	100.00	100.00	100.00			100.00	100.00
u_all_byp_req	100.00	100.00				100.00	100.00
u_en_sync	100.00	100.00				100.00	100.00
u_hi_speed_sel	100.00	100.00				100.00	100.00
u_io_ack_sync	100.00	100.00	100.00			100.00	100.00
u_io_byp_req	100.00	100.00				100.00	100.00
u_lc_byp_req	100.00	100.00				100.00	100.00
u_send	100.00	100.00				100.00
u_step_down_acks_sync	100.00	100.00				100.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : clkmgr_byp

	Line No.	Total	Covered	Percent
TOTAL		3	3	100.00
CONT_ASSIGN	85	1	1	100.00
CONT_ASSIGN	111	1	1	100.00
CONT_ASSIGN	114	1	1	100.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_clkmgr_0.1/rtl/clkmgr_byp.sv' or '../src/lowrisc_opentitan_top_earlgrey_clkmgr_0.1/rtl/clkmgr_byp.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
85	1	1
111	1	1
114	1	1