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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.27 95.73 93.97 98.31 92.52 98.27 96.89 98.21


Total test records in report: 1273
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T646 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.2554670420 Sep 04 09:37:12 AM UTC 24 Sep 04 09:37:36 AM UTC 24 25719900 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.74069573 Sep 04 09:35:03 AM UTC 24 Sep 04 09:37:36 AM UTC 24 25309200 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_disable.4038332155 Sep 04 09:36:57 AM UTC 24 Sep 04 09:37:43 AM UTC 24 38112000 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.2330842631 Sep 04 09:33:14 AM UTC 24 Sep 04 09:37:47 AM UTC 24 50241683800 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.608408206 Sep 04 09:37:25 AM UTC 24 Sep 04 09:37:49 AM UTC 24 35742000 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.3715713160 Sep 04 09:36:52 AM UTC 24 Sep 04 09:37:52 AM UTC 24 80766500 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.572734221 Sep 04 09:35:06 AM UTC 24 Sep 04 09:37:52 AM UTC 24 21261600 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rand_ops.1056655583 Sep 04 09:11:42 AM UTC 24 Sep 04 09:38:10 AM UTC 24 1253368200 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.2910428688 Sep 04 09:37:03 AM UTC 24 Sep 04 09:38:12 AM UTC 24 4506784300 ps
T85 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.279946128 Sep 04 09:35:14 AM UTC 24 Sep 04 09:38:22 AM UTC 24 143958400 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.3638961565 Sep 04 09:20:37 AM UTC 24 Sep 04 09:38:24 AM UTC 24 160176993500 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.1877626316 Sep 04 09:33:44 AM UTC 24 Sep 04 09:38:42 AM UTC 24 11849819900 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.799085483 Sep 04 09:35:17 AM UTC 24 Sep 04 09:38:45 AM UTC 24 7388895500 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.2200138514 Sep 04 09:23:54 AM UTC 24 Sep 04 09:38:47 AM UTC 24 1485193600 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.1397394589 Sep 04 09:38:22 AM UTC 24 Sep 04 09:38:48 AM UTC 24 88126400 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.3868735599 Sep 04 09:36:01 AM UTC 24 Sep 04 09:38:50 AM UTC 24 11601776000 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.348268397 Sep 04 09:37:37 AM UTC 24 Sep 04 09:38:59 AM UTC 24 4794209800 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.1514522806 Sep 04 09:35:16 AM UTC 24 Sep 04 09:39:01 AM UTC 24 16700761000 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.3484510832 Sep 04 09:35:52 AM UTC 24 Sep 04 09:39:01 AM UTC 24 698520400 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.2936001270 Sep 04 09:36:16 AM UTC 24 Sep 04 09:39:09 AM UTC 24 19735779600 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.1186504740 Sep 04 09:38:51 AM UTC 24 Sep 04 09:39:18 AM UTC 24 28799000 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.1956670161 Sep 04 09:35:06 AM UTC 24 Sep 04 09:39:20 AM UTC 24 701377900 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.1803678578 Sep 04 09:38:25 AM UTC 24 Sep 04 09:39:21 AM UTC 24 28479500 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.3942831891 Sep 04 09:39:00 AM UTC 24 Sep 04 09:39:25 AM UTC 24 37583100 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.1827370933 Sep 04 09:39:01 AM UTC 24 Sep 04 09:39:27 AM UTC 24 25591600 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.1936696917 Sep 04 09:38:48 AM UTC 24 Sep 04 09:39:33 AM UTC 24 78961600 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.775658105 Sep 04 09:38:43 AM UTC 24 Sep 04 09:39:33 AM UTC 24 31631700 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.3238315638 Sep 04 09:37:48 AM UTC 24 Sep 04 09:39:34 AM UTC 24 5901828400 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.2214346159 Sep 04 09:30:25 AM UTC 24 Sep 04 09:39:35 AM UTC 24 17554152600 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.2969843917 Sep 04 09:37:34 AM UTC 24 Sep 04 09:39:36 AM UTC 24 46900100 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.2389292169 Sep 04 09:39:10 AM UTC 24 Sep 04 09:39:41 AM UTC 24 119571200 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.3260717942 Sep 04 09:24:00 AM UTC 24 Sep 04 09:39:48 AM UTC 24 160194172100 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.943291276 Sep 04 09:38:49 AM UTC 24 Sep 04 09:39:49 AM UTC 24 471561300 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.4267615335 Sep 04 09:38:45 AM UTC 24 Sep 04 09:39:49 AM UTC 24 141538600 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.2235802265 Sep 04 09:37:26 AM UTC 24 Sep 04 09:40:00 AM UTC 24 55418600 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.395879986 Sep 04 09:37:37 AM UTC 24 Sep 04 09:40:07 AM UTC 24 80754400 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.1300997153 Sep 04 09:39:50 AM UTC 24 Sep 04 09:40:10 AM UTC 24 34813800 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_type.3165678485 Sep 04 08:58:47 AM UTC 24 Sep 04 09:40:11 AM UTC 24 1962981800 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.3063296529 Sep 04 09:37:53 AM UTC 24 Sep 04 09:40:17 AM UTC 24 612821000 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.3636388992 Sep 04 09:20:50 AM UTC 24 Sep 04 09:40:29 AM UTC 24 373937500 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.4249542140 Sep 04 09:40:08 AM UTC 24 Sep 04 09:40:37 AM UTC 24 29427600 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.996886773 Sep 04 08:54:07 AM UTC 24 Sep 04 09:40:39 AM UTC 24 325612283200 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.2762175344 Sep 04 09:39:34 AM UTC 24 Sep 04 09:40:40 AM UTC 24 10219475300 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.3844531475 Sep 04 09:20:34 AM UTC 24 Sep 04 09:40:43 AM UTC 24 9661964100 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.2924146927 Sep 04 09:32:30 AM UTC 24 Sep 04 09:40:44 AM UTC 24 2800387000 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.2653916619 Sep 04 09:40:12 AM UTC 24 Sep 04 09:40:45 AM UTC 24 22617100 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.4198094818 Sep 04 09:27:23 AM UTC 24 Sep 04 09:40:45 AM UTC 24 40122807000 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.2825725673 Sep 04 09:40:18 AM UTC 24 Sep 04 09:40:46 AM UTC 24 25696900 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.3574305542 Sep 04 09:40:01 AM UTC 24 Sep 04 09:40:51 AM UTC 24 39150100 ps
T327 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.239599299 Sep 04 09:38:11 AM UTC 24 Sep 04 09:40:52 AM UTC 24 727671600 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.1747252778 Sep 04 09:40:30 AM UTC 24 Sep 04 09:40:58 AM UTC 24 56654000 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.2566980927 Sep 04 09:40:39 AM UTC 24 Sep 04 09:40:58 AM UTC 24 480866700 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.844844610 Sep 04 09:40:02 AM UTC 24 Sep 04 09:41:00 AM UTC 24 77020800 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.4285201491 Sep 04 09:37:50 AM UTC 24 Sep 04 09:41:11 AM UTC 24 4676876300 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.3160902001 Sep 04 09:35:35 AM UTC 24 Sep 04 09:41:12 AM UTC 24 2836029600 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.2911543866 Sep 04 09:39:25 AM UTC 24 Sep 04 09:41:21 AM UTC 24 11935928600 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.3800158158 Sep 04 09:40:35 AM UTC 24 Sep 04 09:41:28 AM UTC 24 10035219500 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.1980137818 Sep 04 09:40:11 AM UTC 24 Sep 04 09:41:32 AM UTC 24 8541470100 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.82490527 Sep 04 09:39:02 AM UTC 24 Sep 04 09:41:42 AM UTC 24 10014388800 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.1162185134 Sep 04 09:41:13 AM UTC 24 Sep 04 09:41:44 AM UTC 24 44541800 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_prog_type.2379409940 Sep 04 08:50:45 AM UTC 24 Sep 04 09:41:48 AM UTC 24 785519900 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.997616004 Sep 04 09:40:52 AM UTC 24 Sep 04 09:42:00 AM UTC 24 4820059400 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.3820334997 Sep 04 09:41:28 AM UTC 24 Sep 04 09:42:07 AM UTC 24 59183500 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.3332038506 Sep 04 09:41:22 AM UTC 24 Sep 04 09:42:08 AM UTC 24 87692100 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.564068017 Sep 04 09:37:23 AM UTC 24 Sep 04 09:42:10 AM UTC 24 10012715100 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.2533402819 Sep 04 09:41:33 AM UTC 24 Sep 04 09:42:11 AM UTC 24 67638800 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.2540783612 Sep 04 08:50:53 AM UTC 24 Sep 04 09:42:17 AM UTC 24 5650106400 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.492828291 Sep 04 09:42:01 AM UTC 24 Sep 04 09:42:19 AM UTC 24 26105100 ps
T373 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.1580575990 Sep 04 09:41:43 AM UTC 24 Sep 04 09:42:23 AM UTC 24 14803800 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.440774935 Sep 04 09:41:49 AM UTC 24 Sep 04 09:42:23 AM UTC 24 47639400 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.1344574849 Sep 04 09:33:34 AM UTC 24 Sep 04 09:42:23 AM UTC 24 4898986700 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.1956651608 Sep 04 09:42:08 AM UTC 24 Sep 04 09:42:34 AM UTC 24 54760600 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.2421316455 Sep 04 09:42:10 AM UTC 24 Sep 04 09:42:36 AM UTC 24 115580900 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.3371357544 Sep 04 09:39:36 AM UTC 24 Sep 04 09:42:37 AM UTC 24 2354801900 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.3086797352 Sep 04 09:39:46 AM UTC 24 Sep 04 09:42:42 AM UTC 24 3072066400 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.1110236948 Sep 04 09:39:33 AM UTC 24 Sep 04 09:42:47 AM UTC 24 327871100 ps
T103 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.543809658 Sep 04 09:38:13 AM UTC 24 Sep 04 09:42:57 AM UTC 24 26630637500 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.2894743759 Sep 04 09:42:09 AM UTC 24 Sep 04 09:42:58 AM UTC 24 10059454300 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.1289516553 Sep 04 09:40:58 AM UTC 24 Sep 04 09:43:00 AM UTC 24 1446691600 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.4078893260 Sep 04 09:41:44 AM UTC 24 Sep 04 09:43:23 AM UTC 24 2246568900 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_mp.3358780340 Sep 04 08:49:39 AM UTC 24 Sep 04 09:43:25 AM UTC 24 10389503100 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.647961070 Sep 04 09:24:14 AM UTC 24 Sep 04 09:43:27 AM UTC 24 1030657900 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.2201638851 Sep 04 09:40:48 AM UTC 24 Sep 04 09:43:29 AM UTC 24 81723900 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.802368605 Sep 04 09:37:44 AM UTC 24 Sep 04 09:43:45 AM UTC 24 11190608500 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.3136702511 Sep 04 09:41:02 AM UTC 24 Sep 04 09:43:48 AM UTC 24 1314098000 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.1761456613 Sep 04 09:40:52 AM UTC 24 Sep 04 09:43:49 AM UTC 24 6262193600 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.2276878800 Sep 04 09:42:37 AM UTC 24 Sep 04 09:44:01 AM UTC 24 3853472400 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.3910875227 Sep 04 09:29:56 AM UTC 24 Sep 04 09:44:05 AM UTC 24 80142764100 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.938842520 Sep 04 09:42:24 AM UTC 24 Sep 04 09:44:07 AM UTC 24 1544879700 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.504733045 Sep 04 09:39:19 AM UTC 24 Sep 04 09:44:08 AM UTC 24 689116500 ps
T405 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.2166580134 Sep 04 09:43:30 AM UTC 24 Sep 04 09:44:09 AM UTC 24 17779200 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.2626186439 Sep 04 09:40:48 AM UTC 24 Sep 04 09:44:10 AM UTC 24 11116936900 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.2583724264 Sep 04 09:43:24 AM UTC 24 Sep 04 09:44:11 AM UTC 24 68083600 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.1671275906 Sep 04 09:43:50 AM UTC 24 Sep 04 09:44:15 AM UTC 24 32468900 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.1278422452 Sep 04 09:43:49 AM UTC 24 Sep 04 09:44:19 AM UTC 24 25594600 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.3169626757 Sep 04 09:43:26 AM UTC 24 Sep 04 09:44:23 AM UTC 24 45134700 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.3545472016 Sep 04 09:43:28 AM UTC 24 Sep 04 09:44:26 AM UTC 24 237498700 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.334231475 Sep 04 09:44:02 AM UTC 24 Sep 04 09:44:29 AM UTC 24 57933900 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.1365633457 Sep 04 09:44:08 AM UTC 24 Sep 04 09:44:33 AM UTC 24 28234200 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.2447639642 Sep 04 09:42:12 AM UTC 24 Sep 04 09:44:41 AM UTC 24 28857800 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.3219612438 Sep 04 09:42:42 AM UTC 24 Sep 04 09:44:51 AM UTC 24 509054500 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.777798755 Sep 04 09:42:25 AM UTC 24 Sep 04 09:45:03 AM UTC 24 129326600 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.1374448300 Sep 04 08:54:15 AM UTC 24 Sep 04 09:45:07 AM UTC 24 25090059100 ps
T408 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.1837853240 Sep 04 09:43:47 AM UTC 24 Sep 04 09:45:09 AM UTC 24 7156737900 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.1461949497 Sep 04 09:39:49 AM UTC 24 Sep 04 09:45:11 AM UTC 24 12491018600 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.2956826951 Sep 04 09:42:38 AM UTC 24 Sep 04 09:45:14 AM UTC 24 2034833600 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.1783062532 Sep 04 09:40:47 AM UTC 24 Sep 04 09:45:16 AM UTC 24 145273400 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.2624401248 Sep 04 09:40:48 AM UTC 24 Sep 04 09:45:36 AM UTC 24 41910713700 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.3850643449 Sep 04 09:44:06 AM UTC 24 Sep 04 09:45:39 AM UTC 24 10033841900 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.2750645024 Sep 04 09:42:57 AM UTC 24 Sep 04 09:45:42 AM UTC 24 1433153600 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.1069852110 Sep 04 09:45:17 AM UTC 24 Sep 04 09:45:53 AM UTC 24 62197200 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.1109238045 Sep 04 09:45:15 AM UTC 24 Sep 04 09:46:00 AM UTC 24 372353100 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.3941326727 Sep 04 09:48:01 AM UTC 24 Sep 04 09:48:29 AM UTC 24 55926100 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.774229595 Sep 04 09:37:53 AM UTC 24 Sep 04 09:46:05 AM UTC 24 14740706200 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.2492634991 Sep 04 09:45:10 AM UTC 24 Sep 04 09:46:08 AM UTC 24 29573200 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.955251928 Sep 04 09:44:27 AM UTC 24 Sep 04 09:46:08 AM UTC 24 2705170300 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.3533569058 Sep 04 09:45:40 AM UTC 24 Sep 04 09:46:11 AM UTC 24 46781500 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.2880348195 Sep 04 09:45:43 AM UTC 24 Sep 04 09:46:12 AM UTC 24 90278800 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.1991273405 Sep 04 09:45:53 AM UTC 24 Sep 04 09:46:14 AM UTC 24 25364300 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.476928091 Sep 04 09:44:34 AM UTC 24 Sep 04 09:46:17 AM UTC 24 1995919400 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.2685043494 Sep 04 09:39:43 AM UTC 24 Sep 04 09:46:17 AM UTC 24 13024549000 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.513947346 Sep 04 09:44:12 AM UTC 24 Sep 04 09:46:18 AM UTC 24 3110226000 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.2391019032 Sep 04 09:40:48 AM UTC 24 Sep 04 09:46:23 AM UTC 24 189008300 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.4025139561 Sep 04 09:44:09 AM UTC 24 Sep 04 09:46:25 AM UTC 24 355581800 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.255267188 Sep 04 09:46:05 AM UTC 24 Sep 04 09:46:34 AM UTC 24 69859900 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.578155807 Sep 04 09:42:35 AM UTC 24 Sep 04 09:46:39 AM UTC 24 21758249800 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.3878834938 Sep 04 09:03:19 AM UTC 24 Sep 04 09:46:40 AM UTC 24 1307174486400 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.1238883487 Sep 04 09:45:38 AM UTC 24 Sep 04 09:46:52 AM UTC 24 1712962500 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.500117498 Sep 04 09:43:00 AM UTC 24 Sep 04 09:46:56 AM UTC 24 2906389400 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.3965542339 Sep 04 09:46:05 AM UTC 24 Sep 04 09:47:07 AM UTC 24 76862800 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.1772786021 Sep 04 09:39:34 AM UTC 24 Sep 04 09:47:12 AM UTC 24 14352123200 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.1178048552 Sep 04 09:46:42 AM UTC 24 Sep 04 09:47:13 AM UTC 24 32402600 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.1855591366 Sep 04 09:44:30 AM UTC 24 Sep 04 09:47:21 AM UTC 24 2043359200 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.3963204689 Sep 04 09:44:51 AM UTC 24 Sep 04 09:47:31 AM UTC 24 625842100 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.824056845 Sep 04 09:46:01 AM UTC 24 Sep 04 09:47:36 AM UTC 24 10036489200 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.111873838 Sep 04 09:46:53 AM UTC 24 Sep 04 09:47:36 AM UTC 24 60611200 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.2855416351 Sep 04 09:47:13 AM UTC 24 Sep 04 09:47:49 AM UTC 24 13660600 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.2046157242 Sep 04 09:47:21 AM UTC 24 Sep 04 09:47:49 AM UTC 24 63955700 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.3889163030 Sep 04 09:46:56 AM UTC 24 Sep 04 09:47:53 AM UTC 24 44522100 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.3695729952 Sep 04 09:47:07 AM UTC 24 Sep 04 09:47:55 AM UTC 24 223525900 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.2603602296 Sep 04 09:47:36 AM UTC 24 Sep 04 09:47:59 AM UTC 24 15362200 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.3507362807 Sep 04 09:46:10 AM UTC 24 Sep 04 09:47:59 AM UTC 24 27703800 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.209673139 Sep 04 09:44:20 AM UTC 24 Sep 04 09:48:00 AM UTC 24 62385700 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.3953319589 Sep 04 09:47:32 AM UTC 24 Sep 04 09:48:01 AM UTC 24 15276500 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.944487345 Sep 04 09:46:18 AM UTC 24 Sep 04 09:48:06 AM UTC 24 1013189300 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.3507934141 Sep 04 09:45:04 AM UTC 24 Sep 04 09:48:07 AM UTC 24 58087105400 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.3013787141 Sep 04 09:47:50 AM UTC 24 Sep 04 09:48:14 AM UTC 24 122336700 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.3303319277 Sep 04 09:41:00 AM UTC 24 Sep 04 09:48:22 AM UTC 24 31023193900 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.804123865 Sep 04 09:45:08 AM UTC 24 Sep 04 09:48:35 AM UTC 24 18753665700 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.3596674665 Sep 04 09:47:14 AM UTC 24 Sep 04 09:48:45 AM UTC 24 33153966800 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.8130614 Sep 04 09:47:55 AM UTC 24 Sep 04 09:48:51 AM UTC 24 4857581700 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.4013451076 Sep 04 09:46:24 AM UTC 24 Sep 04 09:48:52 AM UTC 24 754994600 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.358369236 Sep 04 09:46:19 AM UTC 24 Sep 04 09:48:53 AM UTC 24 1814473500 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.3209310687 Sep 04 09:48:08 AM UTC 24 Sep 04 09:48:53 AM UTC 24 20440000 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.2812409421 Sep 04 09:48:30 AM UTC 24 Sep 04 09:48:55 AM UTC 24 242040000 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.24393873 Sep 04 09:48:24 AM UTC 24 Sep 04 09:48:56 AM UTC 24 23548500 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.1165973781 Sep 04 09:48:07 AM UTC 24 Sep 04 09:48:59 AM UTC 24 30422400 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.618614337 Sep 04 09:46:13 AM UTC 24 Sep 04 09:49:00 AM UTC 24 34128560700 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.1551082384 Sep 04 09:48:02 AM UTC 24 Sep 04 09:49:01 AM UTC 24 44056600 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.3522733865 Sep 04 09:44:24 AM UTC 24 Sep 04 09:49:09 AM UTC 24 14894486300 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.1804058329 Sep 04 09:42:20 AM UTC 24 Sep 04 09:49:14 AM UTC 24 57349600 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.3084848733 Sep 04 09:48:54 AM UTC 24 Sep 04 09:49:15 AM UTC 24 65178600 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.3635676614 Sep 04 09:46:41 AM UTC 24 Sep 04 09:49:18 AM UTC 24 11721458400 ps
T401 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.585258432 Sep 04 09:49:00 AM UTC 24 Sep 04 09:49:33 AM UTC 24 10525200 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.1825308216 Sep 04 09:48:56 AM UTC 24 Sep 04 09:49:33 AM UTC 24 85076300 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.4013784912 Sep 04 09:48:55 AM UTC 24 Sep 04 09:49:35 AM UTC 24 52451900 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.2301393766 Sep 04 09:49:03 AM UTC 24 Sep 04 09:49:35 AM UTC 24 23804400 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.4165661021 Sep 04 09:49:10 AM UTC 24 Sep 04 09:49:36 AM UTC 24 49685300 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.2399437787 Sep 04 08:58:26 AM UTC 24 Sep 04 09:49:52 AM UTC 24 268012934700 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.2860247777 Sep 04 09:42:48 AM UTC 24 Sep 04 09:49:56 AM UTC 24 7036977800 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.377657352 Sep 04 09:46:15 AM UTC 24 Sep 04 09:50:03 AM UTC 24 59271400 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.2883802536 Sep 04 09:46:35 AM UTC 24 Sep 04 09:50:03 AM UTC 24 1948992200 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.1305508404 Sep 04 09:39:22 AM UTC 24 Sep 04 09:50:04 AM UTC 24 332547500 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.4222384790 Sep 04 09:48:46 AM UTC 24 Sep 04 09:50:09 AM UTC 24 1299734900 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.2193638459 Sep 04 09:48:00 AM UTC 24 Sep 04 09:50:09 AM UTC 24 455542600 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.3111095505 Sep 04 09:48:16 AM UTC 24 Sep 04 09:50:12 AM UTC 24 1641650900 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.3822518277 Sep 04 09:49:01 AM UTC 24 Sep 04 09:50:13 AM UTC 24 1062830200 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.3664482607 Sep 04 09:42:59 AM UTC 24 Sep 04 09:50:14 AM UTC 24 12480172300 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.2699368554 Sep 04 09:49:36 AM UTC 24 Sep 04 09:50:15 AM UTC 24 166211100 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.1087923161 Sep 04 09:49:36 AM UTC 24 Sep 04 09:50:20 AM UTC 24 142640100 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.2835613154 Sep 04 09:49:57 AM UTC 24 Sep 04 09:50:25 AM UTC 24 100386000 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.3679686960 Sep 04 09:41:12 AM UTC 24 Sep 04 09:50:25 AM UTC 24 78032384600 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.498994904 Sep 04 09:49:40 AM UTC 24 Sep 04 09:50:27 AM UTC 24 10486500 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.1945204137 Sep 04 09:50:04 AM UTC 24 Sep 04 09:50:29 AM UTC 24 26150300 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.1825211236 Sep 04 09:03:36 AM UTC 24 Sep 04 09:50:33 AM UTC 24 123692256800 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.3393935238 Sep 04 09:37:37 AM UTC 24 Sep 04 09:50:39 AM UTC 24 80150349200 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.3510862791 Sep 04 09:49:16 AM UTC 24 Sep 04 09:50:43 AM UTC 24 8114421200 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.589893229 Sep 04 09:47:56 AM UTC 24 Sep 04 09:50:45 AM UTC 24 297577700 ps
T277 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.4058731967 Sep 04 09:47:37 AM UTC 24 Sep 04 09:50:48 AM UTC 24 10019636200 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.31054229 Sep 04 09:50:28 AM UTC 24 Sep 04 09:50:53 AM UTC 24 31118600 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.3743252399 Sep 04 09:50:26 AM UTC 24 Sep 04 09:50:56 AM UTC 24 41107500 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.4002555481 Sep 04 09:50:21 AM UTC 24 Sep 04 09:50:59 AM UTC 24 16411800 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.671005062 Sep 04 09:48:53 AM UTC 24 Sep 04 09:50:59 AM UTC 24 1714172600 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.737257347 Sep 04 09:48:36 AM UTC 24 Sep 04 09:51:10 AM UTC 24 46568600 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.2044580580 Sep 04 09:49:54 AM UTC 24 Sep 04 09:51:12 AM UTC 24 6662415300 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.422189520 Sep 04 09:50:16 AM UTC 24 Sep 04 09:51:14 AM UTC 24 36291200 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.394234534 Sep 04 09:50:15 AM UTC 24 Sep 04 09:51:17 AM UTC 24 87430300 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.1577775246 Sep 04 09:50:49 AM UTC 24 Sep 04 09:51:19 AM UTC 24 19437500 ps
T156 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.659791872 Sep 04 09:46:17 AM UTC 24 Sep 04 09:51:20 AM UTC 24 53809153500 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.2286842136 Sep 04 09:47:51 AM UTC 24 Sep 04 09:51:26 AM UTC 24 51876800 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.3383865830 Sep 04 09:51:14 AM UTC 24 Sep 04 09:51:32 AM UTC 24 57370200 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.557790860 Sep 04 09:51:10 AM UTC 24 Sep 04 09:51:32 AM UTC 24 23905500 ps
T195 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.3403037390 Sep 04 09:48:51 AM UTC 24 Sep 04 09:51:33 AM UTC 24 81210500 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.878702654 Sep 04 09:50:54 AM UTC 24 Sep 04 09:51:37 AM UTC 24 72645300 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.1143901935 Sep 04 09:51:00 AM UTC 24 Sep 04 09:51:39 AM UTC 24 34937100 ps
T422 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3698433053 Sep 04 09:50:56 AM UTC 24 Sep 04 09:51:46 AM UTC 24 62650900 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.436778651 Sep 04 09:35:12 AM UTC 24 Sep 04 09:51:49 AM UTC 24 40118468700 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.3668766429 Sep 04 09:32:43 AM UTC 24 Sep 04 09:51:51 AM UTC 24 180192050500 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.1169602677 Sep 04 09:50:26 AM UTC 24 Sep 04 09:51:54 AM UTC 24 4762246000 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.399386147 Sep 04 09:51:33 AM UTC 24 Sep 04 09:51:58 AM UTC 24 48742000 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.1763553209 Sep 04 09:48:54 AM UTC 24 Sep 04 09:52:03 AM UTC 24 43955048200 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.553768644 Sep 04 09:49:34 AM UTC 24 Sep 04 09:52:04 AM UTC 24 1359627400 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.4259757193 Sep 04 09:51:33 AM UTC 24 Sep 04 09:52:06 AM UTC 24 82017700 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.3624097900 Sep 04 09:51:47 AM UTC 24 Sep 04 09:52:08 AM UTC 24 16882500 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.3251408032 Sep 04 09:51:50 AM UTC 24 Sep 04 09:52:15 AM UTC 24 119571000 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.2340785777 Sep 04 09:51:34 AM UTC 24 Sep 04 09:52:15 AM UTC 24 29063000 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.4226288651 Sep 04 09:44:41 AM UTC 24 Sep 04 09:52:17 AM UTC 24 7767155200 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.1475742029 Sep 04 09:49:15 AM UTC 24 Sep 04 09:52:17 AM UTC 24 24918900 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.206621918 Sep 04 09:29:41 AM UTC 24 Sep 04 09:52:17 AM UTC 24 234057600 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.920333308 Sep 04 09:51:39 AM UTC 24 Sep 04 09:52:20 AM UTC 24 40969200 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.4007403459 Sep 04 09:49:20 AM UTC 24 Sep 04 09:52:22 AM UTC 24 39510900 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.1247833407 Sep 04 09:51:00 AM UTC 24 Sep 04 09:52:24 AM UTC 24 2170406800 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.409429449 Sep 04 09:50:05 AM UTC 24 Sep 04 09:52:26 AM UTC 24 4555909000 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.3784636164 Sep 04 09:44:11 AM UTC 24 Sep 04 09:52:27 AM UTC 24 4037162400 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.171432666 Sep 04 09:50:12 AM UTC 24 Sep 04 09:52:34 AM UTC 24 10623580900 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.2657988828 Sep 04 09:52:18 AM UTC 24 Sep 04 09:52:36 AM UTC 24 383930500 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw.1582103928 Sep 04 09:46:25 AM UTC 24 Sep 04 09:52:37 AM UTC 24 6358504400 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.3482724439 Sep 04 09:50:42 AM UTC 24 Sep 04 09:52:38 AM UTC 24 14754792400 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.3327817919 Sep 04 09:52:18 AM UTC 24 Sep 04 09:52:45 AM UTC 24 15104200 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.1573408232 Sep 04 09:50:13 AM UTC 24 Sep 04 09:52:46 AM UTC 24 1823044000 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.1378711023 Sep 04 09:52:16 AM UTC 24 Sep 04 09:52:50 AM UTC 24 105811600 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.3302524121 Sep 04 09:51:40 AM UTC 24 Sep 04 09:52:52 AM UTC 24 431208500 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.668556742 Sep 04 09:52:09 AM UTC 24 Sep 04 09:52:53 AM UTC 24 57399300 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.1842100323 Sep 04 09:50:30 AM UTC 24 Sep 04 09:52:53 AM UTC 24 25394400 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.3035372842 Sep 04 09:52:35 AM UTC 24 Sep 04 09:53:00 AM UTC 24 20337600 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.63508580 Sep 04 09:52:16 AM UTC 24 Sep 04 09:53:01 AM UTC 24 151163500 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.3038450618 Sep 04 09:39:28 AM UTC 24 Sep 04 09:53:03 AM UTC 24 40121860600 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.1647935970 Sep 04 09:52:39 AM UTC 24 Sep 04 09:53:10 AM UTC 24 49058900 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.3857996912 Sep 04 09:52:36 AM UTC 24 Sep 04 09:53:15 AM UTC 24 39551700 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.1737658481 Sep 04 09:49:36 AM UTC 24 Sep 04 09:53:16 AM UTC 24 2251066500 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.4285818426 Sep 04 09:52:47 AM UTC 24 Sep 04 09:53:16 AM UTC 24 42657900 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.268185828 Sep 04 09:52:38 AM UTC 24 Sep 04 09:53:16 AM UTC 24 73465400 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.845671320 Sep 04 09:52:52 AM UTC 24 Sep 04 09:53:22 AM UTC 24 56204000 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.3690906025 Sep 04 09:51:18 AM UTC 24 Sep 04 09:53:26 AM UTC 24 15780992000 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.3455461974 Sep 04 09:50:10 AM UTC 24 Sep 04 09:53:30 AM UTC 24 1700145600 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_prog_reset.491772658 Sep 04 09:53:04 AM UTC 24 Sep 04 09:53:30 AM UTC 24 38418700 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.1974804281 Sep 04 09:52:18 AM UTC 24 Sep 04 09:53:32 AM UTC 24 2235448700 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.2927687750 Sep 04 09:52:22 AM UTC 24 Sep 04 09:53:33 AM UTC 24 3665267600 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.32790052 Sep 04 09:48:00 AM UTC 24 Sep 04 09:53:33 AM UTC 24 58119074200 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.724457283 Sep 04 09:50:09 AM UTC 24 Sep 04 09:53:34 AM UTC 24 45543500 ps
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