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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.27 95.73 93.97 98.31 92.52 98.27 96.89 98.21


Total test records in report: 1273
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T857 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.2246098492 Sep 04 09:51:55 AM UTC 24 Sep 04 09:53:45 AM UTC 24 4204302300 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.2082386939 Sep 04 09:53:17 AM UTC 24 Sep 04 09:53:48 AM UTC 24 22285800 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.1488610449 Sep 04 09:53:17 AM UTC 24 Sep 04 09:53:50 AM UTC 24 22070400 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.978202096 Sep 04 09:53:24 AM UTC 24 Sep 04 09:53:54 AM UTC 24 105637100 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict.205703911 Sep 04 09:53:10 AM UTC 24 Sep 04 09:53:54 AM UTC 24 45987800 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.1965057400 Sep 04 09:53:16 AM UTC 24 Sep 04 09:53:55 AM UTC 24 89264200 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.1980429080 Sep 04 09:51:16 AM UTC 24 Sep 04 09:53:55 AM UTC 24 41962400 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.1125743934 Sep 04 09:50:46 AM UTC 24 Sep 04 09:53:58 AM UTC 24 22474563400 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.1664235889 Sep 04 09:53:34 AM UTC 24 Sep 04 09:53:59 AM UTC 24 21138000 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.2018029792 Sep 04 09:51:21 AM UTC 24 Sep 04 09:54:05 AM UTC 24 36720200 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_mp.1415143257 Sep 04 09:08:54 AM UTC 24 Sep 04 09:54:15 AM UTC 24 1997109900 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.3164970273 Sep 04 09:52:46 AM UTC 24 Sep 04 09:54:16 AM UTC 24 625612900 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.1702740083 Sep 04 09:53:55 AM UTC 24 Sep 04 09:54:21 AM UTC 24 16428800 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.2371914716 Sep 04 09:53:56 AM UTC 24 Sep 04 09:54:22 AM UTC 24 139178600 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.3764432660 Sep 04 09:53:49 AM UTC 24 Sep 04 09:54:22 AM UTC 24 19391000 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.3949342238 Sep 04 09:53:46 AM UTC 24 Sep 04 09:54:25 AM UTC 24 76084900 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.1418084457 Sep 04 09:53:17 AM UTC 24 Sep 04 09:54:25 AM UTC 24 2781588300 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict.1814062735 Sep 04 09:53:35 AM UTC 24 Sep 04 09:54:27 AM UTC 24 86525700 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.3216955210 Sep 04 09:52:07 AM UTC 24 Sep 04 09:54:33 AM UTC 24 1853103100 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.2785370404 Sep 04 09:50:42 AM UTC 24 Sep 04 09:54:34 AM UTC 24 123670800 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.1918321798 Sep 04 09:53:31 AM UTC 24 Sep 04 09:54:36 AM UTC 24 3872544700 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.2050147105 Sep 04 09:54:23 AM UTC 24 Sep 04 09:54:42 AM UTC 24 24171300 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.2776639439 Sep 04 09:53:27 AM UTC 24 Sep 04 09:54:44 AM UTC 24 116047000 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.1155999123 Sep 04 09:54:23 AM UTC 24 Sep 04 09:54:49 AM UTC 24 24464800 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.4287991805 Sep 04 09:54:08 AM UTC 24 Sep 04 09:54:50 AM UTC 24 82984100 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.515964137 Sep 04 09:50:05 AM UTC 24 Sep 04 09:54:51 AM UTC 24 36227300 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.2346605462 Sep 04 09:52:54 AM UTC 24 Sep 04 09:54:55 AM UTC 24 25772843200 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.2314550778 Sep 04 09:54:17 AM UTC 24 Sep 04 09:54:55 AM UTC 24 67295400 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.2412425130 Sep 04 09:40:48 AM UTC 24 Sep 04 09:54:56 AM UTC 24 80128886100 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.474293255 Sep 04 09:51:59 AM UTC 24 Sep 04 09:55:03 AM UTC 24 68833400 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.1726892315 Sep 04 09:54:17 AM UTC 24 Sep 04 09:55:04 AM UTC 24 69201000 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.1285902499 Sep 04 09:52:27 AM UTC 24 Sep 04 09:55:04 AM UTC 24 3333452200 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.3424318393 Sep 04 09:49:35 AM UTC 24 Sep 04 09:55:05 AM UTC 24 18763546200 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.627829551 Sep 04 09:51:51 AM UTC 24 Sep 04 09:55:06 AM UTC 24 305425800 ps
T196 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.999376000 Sep 04 09:52:25 AM UTC 24 Sep 04 09:55:10 AM UTC 24 438431700 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.4235956913 Sep 04 09:52:20 AM UTC 24 Sep 04 09:55:14 AM UTC 24 25984900 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.4047302057 Sep 04 09:54:52 AM UTC 24 Sep 04 09:55:15 AM UTC 24 21234600 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.753854218 Sep 04 09:54:51 AM UTC 24 Sep 04 09:55:15 AM UTC 24 26425500 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.3881932582 Sep 04 09:54:45 AM UTC 24 Sep 04 09:55:20 AM UTC 24 15961600 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.2044427567 Sep 04 09:54:37 AM UTC 24 Sep 04 09:55:21 AM UTC 24 102413500 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd.843180668 Sep 04 09:51:21 AM UTC 24 Sep 04 09:55:27 AM UTC 24 4792414200 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.697847028 Sep 04 08:58:58 AM UTC 24 Sep 04 09:55:31 AM UTC 24 29140931500 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.138652477 Sep 04 09:03:46 AM UTC 24 Sep 04 09:55:34 AM UTC 24 5382449900 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.408092747 Sep 04 09:53:01 AM UTC 24 Sep 04 09:55:35 AM UTC 24 2147037000 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.3670025957 Sep 04 09:52:53 AM UTC 24 Sep 04 09:55:37 AM UTC 24 29496900 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.373833740 Sep 04 09:55:07 AM UTC 24 Sep 04 09:55:37 AM UTC 24 36636500 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.377923330 Sep 04 09:54:43 AM UTC 24 Sep 04 09:55:37 AM UTC 24 190744100 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.1996402892 Sep 04 09:53:57 AM UTC 24 Sep 04 09:55:42 AM UTC 24 7069423300 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.1531092816 Sep 04 09:55:16 AM UTC 24 Sep 04 09:55:42 AM UTC 24 43086400 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.1763814025 Sep 04 09:52:04 AM UTC 24 Sep 04 09:55:43 AM UTC 24 3193086300 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.3034664837 Sep 04 09:55:15 AM UTC 24 Sep 04 09:55:43 AM UTC 24 23831600 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.631927213 Sep 04 09:53:52 AM UTC 24 Sep 04 09:55:45 AM UTC 24 5168891500 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.427322916 Sep 04 09:54:22 AM UTC 24 Sep 04 09:55:48 AM UTC 24 696497300 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.2926482089 Sep 04 09:55:05 AM UTC 24 Sep 04 09:55:48 AM UTC 24 256441600 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.140426381 Sep 04 09:52:55 AM UTC 24 Sep 04 09:55:48 AM UTC 24 163057300 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.2926310415 Sep 04 09:53:33 AM UTC 24 Sep 04 09:55:49 AM UTC 24 43373714700 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.1772618077 Sep 04 09:52:05 AM UTC 24 Sep 04 09:55:50 AM UTC 24 30957766700 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.4179237518 Sep 04 09:55:07 AM UTC 24 Sep 04 09:55:52 AM UTC 24 29119500 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.77148370 Sep 04 09:53:56 AM UTC 24 Sep 04 09:56:00 AM UTC 24 37732800 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.1862318882 Sep 04 09:55:43 AM UTC 24 Sep 04 09:56:01 AM UTC 24 93179000 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.3367966017 Sep 04 09:51:27 AM UTC 24 Sep 04 09:56:03 AM UTC 24 12319752800 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.3050274769 Sep 04 09:54:25 AM UTC 24 Sep 04 09:56:03 AM UTC 24 56469300 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.3892284216 Sep 04 09:55:38 AM UTC 24 Sep 04 09:56:04 AM UTC 24 67570400 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.963328523 Sep 04 09:54:50 AM UTC 24 Sep 04 09:56:07 AM UTC 24 1408960900 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.2518296786 Sep 04 09:55:38 AM UTC 24 Sep 04 09:56:10 AM UTC 24 14449200 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.298340149 Sep 04 09:55:21 AM UTC 24 Sep 04 09:56:12 AM UTC 24 1243536700 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.2179691751 Sep 04 09:55:50 AM UTC 24 Sep 04 09:56:19 AM UTC 24 13926200 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.2765115999 Sep 04 09:55:36 AM UTC 24 Sep 04 09:56:19 AM UTC 24 43645700 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.693678516 Sep 04 09:55:36 AM UTC 24 Sep 04 09:56:20 AM UTC 24 56498700 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.868334189 Sep 04 09:55:53 AM UTC 24 Sep 04 09:56:24 AM UTC 24 17376900 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.4172868586 Sep 04 09:50:44 AM UTC 24 Sep 04 09:56:25 AM UTC 24 8847689200 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_alert_test.1748012680 Sep 04 09:56:01 AM UTC 24 Sep 04 09:56:26 AM UTC 24 122642100 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.249153345 Sep 04 09:54:56 AM UTC 24 Sep 04 09:56:29 AM UTC 24 89818000 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.3515481405 Sep 04 09:55:48 AM UTC 24 Sep 04 09:56:31 AM UTC 24 44245200 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_type.1858992714 Sep 04 09:03:42 AM UTC 24 Sep 04 09:56:35 AM UTC 24 683811100 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.1682229730 Sep 04 09:53:31 AM UTC 24 Sep 04 09:56:37 AM UTC 24 39368600 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.1552987620 Sep 04 09:55:48 AM UTC 24 Sep 04 09:56:37 AM UTC 24 64732900 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.3000269678 Sep 04 09:55:11 AM UTC 24 Sep 04 09:56:39 AM UTC 24 1456067100 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.3694950958 Sep 04 09:56:21 AM UTC 24 Sep 04 09:56:41 AM UTC 24 15334800 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.107705724 Sep 04 09:54:00 AM UTC 24 Sep 04 09:56:42 AM UTC 24 1517499500 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.3380867741 Sep 04 09:56:20 AM UTC 24 Sep 04 09:56:47 AM UTC 24 20299200 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict.4101971614 Sep 04 09:56:11 AM UTC 24 Sep 04 09:56:49 AM UTC 24 44770000 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.388775717 Sep 04 09:56:24 AM UTC 24 Sep 04 09:56:50 AM UTC 24 46486200 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.3621029685 Sep 04 09:55:38 AM UTC 24 Sep 04 09:56:52 AM UTC 24 5709240400 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.1914007193 Sep 04 09:56:12 AM UTC 24 Sep 04 09:57:02 AM UTC 24 208775500 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.4226536102 Sep 04 09:56:40 AM UTC 24 Sep 04 09:57:10 AM UTC 24 13118700 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.670158387 Sep 04 09:56:43 AM UTC 24 Sep 04 09:57:10 AM UTC 24 30147100 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.3957921764 Sep 04 09:53:33 AM UTC 24 Sep 04 09:57:12 AM UTC 24 1615487300 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.1806015931 Sep 04 09:56:48 AM UTC 24 Sep 04 09:57:14 AM UTC 24 34313200 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.1837419301 Sep 04 09:55:51 AM UTC 24 Sep 04 09:57:16 AM UTC 24 1057267700 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.853353241 Sep 04 09:53:59 AM UTC 24 Sep 04 09:57:21 AM UTC 24 75575400 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.3756510645 Sep 04 09:56:20 AM UTC 24 Sep 04 09:57:21 AM UTC 24 1145462000 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_full_mem_access.3367985510 Sep 04 08:49:39 AM UTC 24 Sep 04 09:57:25 AM UTC 24 50873018000 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.1697592448 Sep 04 09:56:37 AM UTC 24 Sep 04 09:57:26 AM UTC 24 69960500 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.3182190961 Sep 04 09:44:16 AM UTC 24 Sep 04 09:57:30 AM UTC 24 80141118100 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.2463396213 Sep 04 09:54:26 AM UTC 24 Sep 04 09:57:31 AM UTC 24 8808193600 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.3662144886 Sep 04 09:56:39 AM UTC 24 Sep 04 09:57:34 AM UTC 24 72496700 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.2983330778 Sep 04 09:52:28 AM UTC 24 Sep 04 09:57:35 AM UTC 24 51275020100 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.1640839483 Sep 04 09:54:27 AM UTC 24 Sep 04 09:57:44 AM UTC 24 65875100 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.1506612354 Sep 04 09:55:27 AM UTC 24 Sep 04 09:57:46 AM UTC 24 687031200 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.120018460 Sep 04 09:57:22 AM UTC 24 Sep 04 09:57:46 AM UTC 24 94366200 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.3075611632 Sep 04 09:57:21 AM UTC 24 Sep 04 09:57:47 AM UTC 24 51939600 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.1912437389 Sep 04 09:57:11 AM UTC 24 Sep 04 09:57:47 AM UTC 24 29879600 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.1231941410 Sep 04 09:56:42 AM UTC 24 Sep 04 09:57:51 AM UTC 24 1148326900 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.1375110808 Sep 04 09:56:26 AM UTC 24 Sep 04 09:57:55 AM UTC 24 35514200 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.2976580931 Sep 04 09:57:16 AM UTC 24 Sep 04 09:57:55 AM UTC 24 10643100 ps
T187 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.1691139937 Sep 04 09:55:22 AM UTC 24 Sep 04 09:58:00 AM UTC 24 64719100 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.1675031389 Sep 04 09:40:48 AM UTC 24 Sep 04 09:58:02 AM UTC 24 176219400 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.1807465594 Sep 04 09:56:03 AM UTC 24 Sep 04 09:58:04 AM UTC 24 4881239600 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.443376307 Sep 04 09:57:14 AM UTC 24 Sep 04 09:58:05 AM UTC 24 40354600 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.1581157817 Sep 04 09:57:49 AM UTC 24 Sep 04 09:58:11 AM UTC 24 26839600 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.3098860711 Sep 04 09:55:44 AM UTC 24 Sep 04 09:58:14 AM UTC 24 10647400100 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.2093864970 Sep 04 09:57:47 AM UTC 24 Sep 04 09:58:16 AM UTC 24 16456100 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.2776858515 Sep 04 09:57:46 AM UTC 24 Sep 04 09:58:16 AM UTC 24 11065500 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.2134302025 Sep 04 09:57:17 AM UTC 24 Sep 04 09:58:19 AM UTC 24 2143156600 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict.2912698911 Sep 04 09:57:36 AM UTC 24 Sep 04 09:58:31 AM UTC 24 86812700 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.3811525509 Sep 04 09:53:02 AM UTC 24 Sep 04 09:58:34 AM UTC 24 48664920800 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.2198385731 Sep 04 09:58:17 AM UTC 24 Sep 04 09:58:34 AM UTC 24 50558400 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.2532159121 Sep 04 09:54:56 AM UTC 24 Sep 04 09:58:37 AM UTC 24 44772200 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict_all_en.3451311942 Sep 04 09:57:45 AM UTC 24 Sep 04 09:58:40 AM UTC 24 45033400 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.3544442797 Sep 04 09:58:17 AM UTC 24 Sep 04 09:58:41 AM UTC 24 21997600 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.928921795 Sep 04 09:56:02 AM UTC 24 Sep 04 09:58:41 AM UTC 24 148619600 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.626852032 Sep 04 09:58:05 AM UTC 24 Sep 04 09:58:44 AM UTC 24 74342200 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.1967392266 Sep 04 09:55:44 AM UTC 24 Sep 04 09:58:45 AM UTC 24 36979800 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.2129876425 Sep 04 09:55:16 AM UTC 24 Sep 04 09:58:46 AM UTC 24 183875600 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.2805576840 Sep 04 09:39:21 AM UTC 24 Sep 04 09:58:47 AM UTC 24 2681966400 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.2365407641 Sep 04 09:58:12 AM UTC 24 Sep 04 09:58:50 AM UTC 24 17392400 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.2821658023 Sep 04 09:54:34 AM UTC 24 Sep 04 09:58:51 AM UTC 24 6466533700 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.2761236840 Sep 04 09:55:46 AM UTC 24 Sep 04 09:58:52 AM UTC 24 2734130100 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.536598335 Sep 04 09:58:05 AM UTC 24 Sep 04 09:58:54 AM UTC 24 212739600 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.322203386 Sep 04 09:57:47 AM UTC 24 Sep 04 09:58:56 AM UTC 24 937030600 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.3303852867 Sep 04 09:56:08 AM UTC 24 Sep 04 09:58:58 AM UTC 24 24694010000 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.989142270 Sep 04 09:54:56 AM UTC 24 Sep 04 09:59:01 AM UTC 24 7853977900 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.3477255626 Sep 04 09:56:27 AM UTC 24 Sep 04 09:59:02 AM UTC 24 19225385500 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.373402299 Sep 04 09:55:03 AM UTC 24 Sep 04 09:59:04 AM UTC 24 1618535600 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.4264105568 Sep 04 09:58:42 AM UTC 24 Sep 04 09:59:04 AM UTC 24 145992300 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.2823424421 Sep 04 09:54:06 AM UTC 24 Sep 04 09:59:04 AM UTC 24 45915990100 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.3464181803 Sep 04 09:56:04 AM UTC 24 Sep 04 09:59:06 AM UTC 24 80528800 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.2566007437 Sep 04 09:58:42 AM UTC 24 Sep 04 09:59:06 AM UTC 24 135959300 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.2120241860 Sep 04 09:58:35 AM UTC 24 Sep 04 10:01:35 AM UTC 24 167605600 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.3189071287 Sep 04 09:58:35 AM UTC 24 Sep 04 09:59:07 AM UTC 24 133811900 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.4073651311 Sep 04 09:58:52 AM UTC 24 Sep 04 09:59:16 AM UTC 24 728840700 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.1629800306 Sep 04 09:58:50 AM UTC 24 Sep 04 09:59:17 AM UTC 24 17306800 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.3526432475 Sep 04 09:57:03 AM UTC 24 Sep 04 09:59:20 AM UTC 24 3665822900 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_mp.3958299208 Sep 04 09:12:16 AM UTC 24 Sep 04 09:59:20 AM UTC 24 4798709300 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.4182097578 Sep 04 09:59:02 AM UTC 24 Sep 04 09:59:23 AM UTC 24 144295900 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.1579796043 Sep 04 09:59:05 AM UTC 24 Sep 04 09:59:25 AM UTC 24 193368700 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.1910554173 Sep 04 09:56:04 AM UTC 24 Sep 04 09:59:27 AM UTC 24 1462364400 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.897038158 Sep 04 09:58:59 AM UTC 24 Sep 04 09:59:27 AM UTC 24 87705400 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.3767760276 Sep 04 09:58:16 AM UTC 24 Sep 04 09:59:28 AM UTC 24 1611566300 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.1167138229 Sep 04 09:58:46 AM UTC 24 Sep 04 09:59:28 AM UTC 24 29554400 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.2898396133 Sep 04 09:56:30 AM UTC 24 Sep 04 09:59:34 AM UTC 24 67372700 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.1658972012 Sep 04 09:55:43 AM UTC 24 Sep 04 09:59:37 AM UTC 24 2742738900 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.2287269137 Sep 04 09:59:07 AM UTC 24 Sep 04 09:59:37 AM UTC 24 17096000 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.2191458951 Sep 04 09:54:35 AM UTC 24 Sep 04 09:59:38 AM UTC 24 42755308400 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_smoke.2687638587 Sep 04 09:57:33 AM UTC 24 Sep 04 09:59:39 AM UTC 24 66368000 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_smoke.2801885257 Sep 04 09:58:19 AM UTC 24 Sep 04 09:59:45 AM UTC 24 116040600 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.3570611215 Sep 04 09:59:17 AM UTC 24 Sep 04 09:59:47 AM UTC 24 165038700 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.1852310230 Sep 04 09:59:16 AM UTC 24 Sep 04 09:59:48 AM UTC 24 43388900 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.4233069896 Sep 04 09:59:28 AM UTC 24 Sep 04 09:59:49 AM UTC 24 61679900 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.3242612219 Sep 04 09:58:45 AM UTC 24 Sep 04 09:59:51 AM UTC 24 1006092600 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.3042631829 Sep 04 09:59:26 AM UTC 24 Sep 04 09:59:52 AM UTC 24 17959900 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.2095056081 Sep 04 09:59:29 AM UTC 24 Sep 04 09:59:54 AM UTC 24 45393500 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.4192580619 Sep 04 09:59:05 AM UTC 24 Sep 04 09:59:57 AM UTC 24 3422824500 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.3859566183 Sep 04 09:55:04 AM UTC 24 Sep 04 09:59:59 AM UTC 24 23538352300 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.1651062821 Sep 04 09:59:40 AM UTC 24 Sep 04 10:00:02 AM UTC 24 18527200 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.2385572485 Sep 04 09:57:56 AM UTC 24 Sep 04 10:00:03 AM UTC 24 9443187000 ps
T188 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.3619743603 Sep 04 09:56:53 AM UTC 24 Sep 04 10:00:06 AM UTC 24 498294100 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.1732237711 Sep 04 09:58:37 AM UTC 24 Sep 04 10:00:07 AM UTC 24 693376000 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.2624653525 Sep 04 09:55:32 AM UTC 24 Sep 04 10:00:08 AM UTC 24 53351900200 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.699201642 Sep 04 09:56:32 AM UTC 24 Sep 04 10:00:09 AM UTC 24 8250247800 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.728117907 Sep 04 09:58:48 AM UTC 24 Sep 04 10:00:09 AM UTC 24 3226173900 ps
T1010 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.1807019385 Sep 04 09:57:35 AM UTC 24 Sep 04 10:00:13 AM UTC 24 709989300 ps
T1011 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.1722634231 Sep 04 09:59:46 AM UTC 24 Sep 04 10:00:14 AM UTC 24 45350000 ps
T1012 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.443524321 Sep 04 09:59:38 AM UTC 24 Sep 04 10:00:15 AM UTC 24 11831200 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.1171021364 Sep 04 09:59:01 AM UTC 24 Sep 04 10:00:19 AM UTC 24 1623059500 ps
T1013 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.3328931028 Sep 04 09:59:57 AM UTC 24 Sep 04 10:00:20 AM UTC 24 84330700 ps
T1014 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.2505435690 Sep 04 09:59:55 AM UTC 24 Sep 04 10:00:21 AM UTC 24 71650000 ps
T1015 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.2858158667 Sep 04 09:46:14 AM UTC 24 Sep 04 10:00:22 AM UTC 24 160180626400 ps
T1016 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.4170226285 Sep 04 09:59:52 AM UTC 24 Sep 04 10:00:24 AM UTC 24 127394400 ps
T1017 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.2315020859 Sep 04 09:56:51 AM UTC 24 Sep 04 10:00:27 AM UTC 24 31113923800 ps
T1018 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.662970385 Sep 04 10:00:10 AM UTC 24 Sep 04 10:00:32 AM UTC 24 178960100 ps
T1019 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.1177902423 Sep 04 09:57:11 AM UTC 24 Sep 04 10:00:32 AM UTC 24 33430219200 ps
T1020 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.1079690866 Sep 04 09:58:31 AM UTC 24 Sep 04 10:00:33 AM UTC 24 13914312200 ps
T1021 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.3072560792 Sep 04 10:00:09 AM UTC 24 Sep 04 10:00:36 AM UTC 24 29029200 ps
T1022 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.1909992605 Sep 04 09:37:29 AM UTC 24 Sep 04 10:00:40 AM UTC 24 1391146900 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.3477487625 Sep 04 09:59:39 AM UTC 24 Sep 04 10:00:41 AM UTC 24 2840403500 ps
T1023 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.1965901579 Sep 04 09:59:08 AM UTC 24 Sep 04 10:00:44 AM UTC 24 7683689700 ps
T1024 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.4094471314 Sep 04 09:57:56 AM UTC 24 Sep 04 10:00:45 AM UTC 24 361344400 ps
T1025 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.748573562 Sep 04 10:00:21 AM UTC 24 Sep 04 10:00:45 AM UTC 24 15441700 ps
T1026 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.113911669 Sep 04 09:57:35 AM UTC 24 Sep 04 10:00:46 AM UTC 24 72690900 ps
T1027 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.1013197606 Sep 04 10:00:07 AM UTC 24 Sep 04 10:00:49 AM UTC 24 11144800 ps
T1028 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd_slow_flash.3596187152 Sep 04 09:57:35 AM UTC 24 Sep 04 10:00:51 AM UTC 24 11737356700 ps
T1029 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_smoke.3642355825 Sep 04 09:56:50 AM UTC 24 Sep 04 10:00:51 AM UTC 24 798626500 ps
T1030 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.457731317 Sep 04 10:00:22 AM UTC 24 Sep 04 10:00:52 AM UTC 24 84158600 ps
T1031 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_smoke.997821687 Sep 04 09:58:53 AM UTC 24 Sep 04 10:00:52 AM UTC 24 73632700 ps
T1032 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.370851627 Sep 04 09:59:28 AM UTC 24 Sep 04 10:00:53 AM UTC 24 4217151300 ps
T1033 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.1547141445 Sep 04 09:59:53 AM UTC 24 Sep 04 10:00:54 AM UTC 24 4973079600 ps
T1034 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.2071329749 Sep 04 10:00:37 AM UTC 24 Sep 04 10:00:54 AM UTC 24 115125800 ps
T1035 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.2239065058 Sep 04 10:00:16 AM UTC 24 Sep 04 10:00:55 AM UTC 24 15300700 ps
T1036 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_hw_sec_otp.1925820001 Sep 04 10:00:07 AM UTC 24 Sep 04 10:01:02 AM UTC 24 1507552000 ps
T1037 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.1129419422 Sep 04 10:00:42 AM UTC 24 Sep 04 10:01:02 AM UTC 24 52225900 ps
T1038 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.2786195265 Sep 04 10:00:35 AM UTC 24 Sep 04 10:01:03 AM UTC 24 25385200 ps
T1039 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.702379474 Sep 04 09:59:21 AM UTC 24 Sep 04 10:01:04 AM UTC 24 8184140200 ps
T1040 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.1840416020 Sep 04 10:00:32 AM UTC 24 Sep 04 10:01:04 AM UTC 24 10206100 ps
T1041 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.230259213 Sep 04 10:00:46 AM UTC 24 Sep 04 10:01:05 AM UTC 24 28622100 ps
T1042 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.1475206124 Sep 04 09:57:52 AM UTC 24 Sep 04 10:01:11 AM UTC 24 145774500 ps
T1043 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.3373986373 Sep 04 10:00:46 AM UTC 24 Sep 04 10:01:12 AM UTC 24 29772600 ps
T1044 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.1126591086 Sep 04 10:00:53 AM UTC 24 Sep 04 10:01:15 AM UTC 24 13549000 ps
T1045 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.2604142458 Sep 04 10:00:55 AM UTC 24 Sep 04 10:01:17 AM UTC 24 45017900 ps
T1046 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.265732190 Sep 04 10:01:04 AM UTC 24 Sep 04 10:01:34 AM UTC 24 21511500 ps
T1047 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.2190500358 Sep 04 10:00:54 AM UTC 24 Sep 04 10:01:20 AM UTC 24 67695900 ps
T1048 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.3275935891 Sep 04 09:42:17 AM UTC 24 Sep 04 10:01:23 AM UTC 24 415325700 ps
T1049 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.2783162437 Sep 04 10:01:02 AM UTC 24 Sep 04 10:01:24 AM UTC 24 13668900 ps
T1050 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.3956487606 Sep 04 09:58:01 AM UTC 24 Sep 04 10:01:25 AM UTC 24 4316660500 ps
T1051 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.4072267205 Sep 04 10:00:52 AM UTC 24 Sep 04 10:01:25 AM UTC 24 26697300 ps
T1052 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_smoke.1952715998 Sep 04 09:58:43 AM UTC 24 Sep 04 10:01:25 AM UTC 24 41995400 ps
T1053 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.2941748538 Sep 04 10:01:06 AM UTC 24 Sep 04 10:01:30 AM UTC 24 22355500 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.1157211242 Sep 04 10:00:08 AM UTC 24 Sep 04 10:01:32 AM UTC 24 1650147600 ps
T1054 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_hw_sec_otp.3133715038 Sep 04 09:58:55 AM UTC 24 Sep 04 10:01:33 AM UTC 24 5749475500 ps
T1055 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.3394649594 Sep 04 10:01:12 AM UTC 24 Sep 04 10:01:36 AM UTC 24 25080100 ps
T1056 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.3185628937 Sep 04 10:01:16 AM UTC 24 Sep 04 10:01:37 AM UTC 24 18592800 ps
T1057 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_smoke.534095124 Sep 04 09:59:05 AM UTC 24 Sep 04 10:01:38 AM UTC 24 37724700 ps
T1058 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_hw_sec_otp.1351363273 Sep 04 09:59:35 AM UTC 24 Sep 04 10:01:38 AM UTC 24 3251748200 ps
T1059 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.4173423628 Sep 04 09:59:07 AM UTC 24 Sep 04 10:01:39 AM UTC 24 39445600 ps
T1060 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.207840916 Sep 04 10:00:20 AM UTC 24 Sep 04 10:01:39 AM UTC 24 5755200800 ps
T1061 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_otp_reset.2204138075 Sep 04 09:58:57 AM UTC 24 Sep 04 10:01:40 AM UTC 24 36126000 ps
T1062 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.3597344240 Sep 04 10:01:21 AM UTC 24 Sep 04 10:01:43 AM UTC 24 81721600 ps
T1063 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_smoke.2620602048 Sep 04 10:00:23 AM UTC 24 Sep 04 10:01:43 AM UTC 24 21733300 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.1983327662 Sep 04 09:58:46 AM UTC 24 Sep 04 10:01:44 AM UTC 24 73737400 ps
T1064 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.4232126680 Sep 04 09:59:49 AM UTC 24 Sep 04 10:01:47 AM UTC 24 17609193200 ps
T1065 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd_slow_flash.2232038729 Sep 04 09:56:35 AM UTC 24 Sep 04 10:01:48 AM UTC 24 23698131000 ps
T1066 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.380364642 Sep 04 10:01:25 AM UTC 24 Sep 04 10:01:49 AM UTC 24 47801000 ps
T1067 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.1558498396 Sep 04 10:01:26 AM UTC 24 Sep 04 10:01:52 AM UTC 24 130370600 ps
T1068 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.343378099 Sep 04 10:01:34 AM UTC 24 Sep 04 10:01:53 AM UTC 24 24828100 ps
T1069 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_smoke.326014818 Sep 04 09:59:48 AM UTC 24 Sep 04 10:01:53 AM UTC 24 86712600 ps
T1070 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.2756400960 Sep 04 10:01:37 AM UTC 24 Sep 04 10:01:54 AM UTC 24 25425800 ps
T1071 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_hw_sec_otp.2512731847 Sep 04 10:00:13 AM UTC 24 Sep 04 10:01:54 AM UTC 24 2305424200 ps
T1072 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.1154610562 Sep 04 10:00:34 AM UTC 24 Sep 04 10:01:55 AM UTC 24 1135781300 ps
T1073 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.1011213804 Sep 04 10:01:31 AM UTC 24 Sep 04 10:01:57 AM UTC 24 54643100 ps
T1074 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.3506404425 Sep 04 10:00:25 AM UTC 24 Sep 04 10:01:57 AM UTC 24 1262430900 ps
T1075 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.463007205 Sep 04 10:01:39 AM UTC 24 Sep 04 10:01:59 AM UTC 24 23152800 ps
T1076 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.1375160052 Sep 04 10:01:40 AM UTC 24 Sep 04 10:02:01 AM UTC 24 214669100 ps
T1077 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.2297126925 Sep 04 10:01:45 AM UTC 24 Sep 04 10:02:04 AM UTC 24 42770500 ps
T1078 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.3870794974 Sep 04 10:01:40 AM UTC 24 Sep 04 10:02:04 AM UTC 24 28904100 ps
T1079 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.3880028387 Sep 04 10:01:43 AM UTC 24 Sep 04 10:02:06 AM UTC 24 27257600 ps
T1080 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.3352322258 Sep 04 10:01:49 AM UTC 24 Sep 04 10:02:10 AM UTC 24 17630900 ps
T1081 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.2861182338 Sep 04 10:01:53 AM UTC 24 Sep 04 10:02:15 AM UTC 24 15480700 ps
T1082 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.1731716338 Sep 04 10:01:54 AM UTC 24 Sep 04 10:02:17 AM UTC 24 16232800 ps
T1083 /workspaces/repo/scratch/os_regression_2024_09_03/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.22464158 Sep 04 10:01:57 AM UTC 24 Sep 04 10:02:19 AM UTC 24 23316100 ps
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