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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.05 95.23 93.89 98.31 92.52 97.14 97.00 98.24


Total test records in report: 1267
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T497 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_serr.4231537912 Oct 12 12:25:18 PM UTC 24 Oct 12 12:29:07 PM UTC 24 1609166600 ps
T73 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_fetch_code.2757807975 Oct 12 12:28:36 PM UTC 24 Oct 12 12:29:19 PM UTC 24 264686100 ps
T174 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_sec_info_access.1784099570 Oct 12 12:27:35 PM UTC 24 Oct 12 12:29:20 PM UTC 24 2275868100 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_derr.2108347551 Oct 12 12:25:36 PM UTC 24 Oct 12 12:29:45 PM UTC 24 3979627800 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_phy_arb.922077552 Oct 12 12:28:27 PM UTC 24 Oct 12 12:30:15 PM UTC 24 102599700 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_invalid_op.55901815 Oct 12 12:28:50 PM UTC 24 Oct 12 12:30:19 PM UTC 24 1831874400 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_prog_rma_wipe_err.3322208563 Oct 12 12:28:17 PM UTC 24 Oct 12 12:30:32 PM UTC 24 10012760500 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_rd.2395593146 Oct 12 12:26:22 PM UTC 24 Oct 12 12:30:47 PM UTC 24 3252201200 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro.1979787657 Oct 12 12:29:04 PM UTC 24 Oct 12 12:31:01 PM UTC 24 430241700 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_wr_slow_flash.1457496139 Oct 12 12:26:40 PM UTC 24 Oct 12 12:31:07 PM UTC 24 84937992200 ps
T95 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_otp_reset.1268454075 Oct 12 12:28:31 PM UTC 24 Oct 12 12:31:22 PM UTC 24 134252700 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_sec_otp.1991581878 Oct 12 12:28:29 PM UTC 24 Oct 12 12:31:25 PM UTC 24 24420938900 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_prog_reset.930149275 Oct 12 12:31:02 PM UTC 24 Oct 12 12:31:26 PM UTC 24 20566400 ps
T411 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_mp_regions.1303077315 Oct 12 12:28:32 PM UTC 24 Oct 12 12:31:35 PM UTC 24 5092070500 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_erase_suspend.1496540555 Oct 12 12:23:17 PM UTC 24 Oct 12 12:31:36 PM UTC 24 4177517100 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict.1753792274 Oct 12 12:31:08 PM UTC 24 Oct 12 12:31:43 PM UTC 24 124577100 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_rd_slow_flash.2510072927 Oct 12 12:26:31 PM UTC 24 Oct 12 12:31:46 PM UTC 24 12556385000 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr.3403835331 Oct 12 12:30:32 PM UTC 24 Oct 12 12:31:58 PM UTC 24 14203854900 ps
T391 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_disable.431002089 Oct 12 12:31:27 PM UTC 24 Oct 12 12:32:03 PM UTC 24 17790600 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_serr.3028265022 Oct 12 12:29:20 PM UTC 24 Oct 12 12:32:05 PM UTC 24 2666557900 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_derr.912649960 Oct 12 12:29:46 PM UTC 24 Oct 12 12:32:06 PM UTC 24 2612119500 ps
T511 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_phy_arb.637658697 Oct 12 12:23:12 PM UTC 24 Oct 12 12:32:07 PM UTC 24 158980200 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_lcmgr_intg.2733334659 Oct 12 12:31:44 PM UTC 24 Oct 12 12:32:09 PM UTC 24 44892100 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_connect.484337108 Oct 12 12:31:37 PM UTC 24 Oct 12 12:32:10 PM UTC 24 16684500 ps
T346 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_read_seed_err.4253498616 Oct 12 12:31:46 PM UTC 24 Oct 12 12:32:12 PM UTC 24 46426800 ps
T412 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_re_evict.419002024 Oct 12 12:31:26 PM UTC 24 Oct 12 12:32:12 PM UTC 24 525956200 ps
T436 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict_all_en.2720126960 Oct 12 12:31:23 PM UTC 24 Oct 12 12:32:16 PM UTC 24 37114700 ps
T513 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_alert_test.1333354845 Oct 12 12:32:04 PM UTC 24 Oct 12 12:32:22 PM UTC 24 142554000 ps
T514 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_integrity.1679095096 Oct 12 12:21:10 PM UTC 24 Oct 12 12:32:23 PM UTC 24 4102152200 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_sec_info_access.1584308559 Oct 12 12:31:37 PM UTC 24 Oct 12 12:32:40 PM UTC 24 4421234100 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_fetch_code.2809162348 Oct 12 12:32:17 PM UTC 24 Oct 12 12:32:54 PM UTC 24 622762100 ps
T516 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_smoke.2020856670 Oct 12 12:28:24 PM UTC 24 Oct 12 12:33:00 PM UTC 24 1182818700 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_derr.2953221367 Oct 12 12:30:17 PM UTC 24 Oct 12 12:33:53 PM UTC 24 3918205800 ps
T343 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd.3350126510 Oct 12 12:30:20 PM UTC 24 Oct 12 12:33:54 PM UTC 24 9712168600 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_mp_regions.2869814636 Oct 12 12:23:42 PM UTC 24 Oct 12 12:33:57 PM UTC 24 30883217000 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_smoke.3851240043 Oct 12 12:32:05 PM UTC 24 Oct 12 12:34:05 PM UTC 24 19159400 ps
T519 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_serr.1245242418 Oct 12 12:29:21 PM UTC 24 Oct 12 12:34:11 PM UTC 24 5740077200 ps
T520 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_invalid_op.719040002 Oct 12 12:32:40 PM UTC 24 Oct 12 12:34:16 PM UTC 24 3114522100 ps
T521 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw.2777268031 Oct 12 12:25:03 PM UTC 24 Oct 12 12:34:21 PM UTC 24 6893619600 ps
T522 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rand_ops.3535179634 Oct 12 12:28:25 PM UTC 24 Oct 12 12:34:45 PM UTC 24 101646300 ps
T523 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_sec_otp.2671149100 Oct 12 12:32:10 PM UTC 24 Oct 12 12:35:01 PM UTC 24 15544290900 ps
T197 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_hw_rma_reset.1159010988 Oct 12 12:18:53 PM UTC 24 Oct 12 12:35:08 PM UTC 24 270243883800 ps
T524 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro.3838040778 Oct 12 12:33:01 PM UTC 24 Oct 12 12:35:26 PM UTC 24 2544861700 ps
T525 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_otp_reset.3014432964 Oct 12 12:32:13 PM UTC 24 Oct 12 12:35:26 PM UTC 24 78257300 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_prog_reset.3896411067 Oct 12 12:35:09 PM UTC 24 Oct 12 12:35:40 PM UTC 24 24774400 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rma_err.3539696047 Oct 12 12:18:15 PM UTC 24 Oct 12 12:35:40 PM UTC 24 160141641800 ps
T526 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_phy_arb.3096702066 Oct 12 12:32:09 PM UTC 24 Oct 12 12:35:57 PM UTC 24 169342800 ps
T527 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_serr.1632480170 Oct 12 12:33:55 PM UTC 24 Oct 12 12:36:00 PM UTC 24 2827797900 ps
T528 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr.315779102 Oct 12 12:34:22 PM UTC 24 Oct 12 12:36:02 PM UTC 24 2325832800 ps
T432 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict_all_en.2312029110 Oct 12 12:35:27 PM UTC 24 Oct 12 12:36:07 PM UTC 24 26671000 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_win.2383664841 Oct 12 12:13:15 PM UTC 24 Oct 12 12:36:10 PM UTC 24 3998075400 ps
T529 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict.3970640898 Oct 12 12:35:27 PM UTC 24 Oct 12 12:36:10 PM UTC 24 45021100 ps
T119 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_disable.2398306662 Oct 12 12:35:41 PM UTC 24 Oct 12 12:36:13 PM UTC 24 10407900 ps
T530 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_integrity.1180552624 Oct 12 12:26:16 PM UTC 24 Oct 12 12:36:16 PM UTC 24 6929842600 ps
T531 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rand_ops.229278310 Oct 12 12:18:35 PM UTC 24 Oct 12 12:36:21 PM UTC 24 6560015600 ps
T532 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_connect.2171089636 Oct 12 12:36:00 PM UTC 24 Oct 12 12:36:23 PM UTC 24 14433600 ps
T533 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_read_seed_err.4161974339 Oct 12 12:36:08 PM UTC 24 Oct 12 12:36:25 PM UTC 24 26672200 ps
T534 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_alert_test.1065203706 Oct 12 12:36:12 PM UTC 24 Oct 12 12:36:29 PM UTC 24 45125100 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_lcmgr_intg.1547326039 Oct 12 12:36:02 PM UTC 24 Oct 12 12:36:29 PM UTC 24 15312900 ps
T344 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd_slow_flash.2691149909 Oct 12 12:30:48 PM UTC 24 Oct 12 12:36:30 PM UTC 24 22322103800 ps
T535 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_re_evict.633660301 Oct 12 12:35:41 PM UTC 24 Oct 12 12:36:35 PM UTC 24 61642000 ps
T536 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_serr.1154426554 Oct 12 12:33:59 PM UTC 24 Oct 12 12:36:41 PM UTC 24 1119822000 ps
T537 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_wo.3264917741 Oct 12 12:32:55 PM UTC 24 Oct 12 12:36:45 PM UTC 24 2210221600 ps
T429 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw.3045239175 Oct 12 12:29:08 PM UTC 24 Oct 12 12:36:55 PM UTC 24 13760259500 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_prog_rma_wipe_err.2775889923 Oct 12 12:31:59 PM UTC 24 Oct 12 12:36:56 PM UTC 24 10012494100 ps
T538 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr_slow_flash.1459835139 Oct 12 12:31:00 PM UTC 24 Oct 12 12:37:00 PM UTC 24 80795950000 ps
T539 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_derr.2892368897 Oct 12 12:34:06 PM UTC 24 Oct 12 12:37:02 PM UTC 24 2299288000 ps
T63 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_fetch_code.2299002555 Oct 12 12:36:31 PM UTC 24 Oct 12 12:37:08 PM UTC 24 470809900 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_derr.2828064225 Oct 12 12:34:12 PM UTC 24 Oct 12 12:37:27 PM UTC 24 4288912300 ps
T540 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rand_ops.3280655186 Oct 12 12:32:07 PM UTC 24 Oct 12 12:37:35 PM UTC 24 88596100 ps
T541 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_sec_info_access.513999430 Oct 12 12:35:57 PM UTC 24 Oct 12 12:37:38 PM UTC 24 23401633700 ps
T542 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr_slow_flash.4210226069 Oct 12 12:35:03 PM UTC 24 Oct 12 12:37:42 PM UTC 24 36768066100 ps
T341 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd.2955666152 Oct 12 12:34:17 PM UTC 24 Oct 12 12:37:49 PM UTC 24 1757356900 ps
T543 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro.1526812843 Oct 12 12:36:57 PM UTC 24 Oct 12 12:39:23 PM UTC 24 490028300 ps
T544 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_stress_all.35861172 Oct 12 12:17:42 PM UTC 24 Oct 12 12:37:52 PM UTC 24 10800039300 ps
T310 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_sec_otp.3032385692 Oct 12 12:36:23 PM UTC 24 Oct 12 12:37:57 PM UTC 24 9560051000 ps
T545 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_invalid_op.3335634027 Oct 12 12:36:46 PM UTC 24 Oct 12 12:38:05 PM UTC 24 11532222400 ps
T546 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_smoke.3029237372 Oct 12 12:36:14 PM UTC 24 Oct 12 12:38:09 PM UTC 24 111974200 ps
T547 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_prog_reset.49878367 Oct 12 12:37:57 PM UTC 24 Oct 12 12:38:21 PM UTC 24 68207100 ps
T198 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_rma_reset.3030452875 Oct 12 12:23:22 PM UTC 24 Oct 12 12:38:37 PM UTC 24 180195738700 ps
T135 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_rma.2644483866 Oct 12 12:07:01 PM UTC 24 Oct 12 12:38:54 PM UTC 24 178926137600 ps
T424 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict_all_en.3908604094 Oct 12 12:38:10 PM UTC 24 Oct 12 12:38:59 PM UTC 24 80992900 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict.460291809 Oct 12 12:38:06 PM UTC 24 Oct 12 12:39:04 PM UTC 24 40764800 ps
T96 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_otp_reset.410855560 Oct 12 12:36:29 PM UTC 24 Oct 12 12:39:13 PM UTC 24 86531700 ps
T548 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_re_evict.86482743 Oct 12 12:38:22 PM UTC 24 Oct 12 12:39:14 PM UTC 24 263365300 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_disable.2678541292 Oct 12 12:38:38 PM UTC 24 Oct 12 12:39:17 PM UTC 24 27857100 ps
T549 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_connect.4098719170 Oct 12 12:38:59 PM UTC 24 Oct 12 12:39:25 PM UTC 24 47856200 ps
T550 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_lcmgr_intg.4135731245 Oct 12 12:39:05 PM UTC 24 Oct 12 12:39:31 PM UTC 24 73578300 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_prog_rma_wipe_err.688510499 Oct 12 12:36:11 PM UTC 24 Oct 12 12:39:35 PM UTC 24 10019973900 ps
T551 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_read_seed_err.3146147754 Oct 12 12:39:14 PM UTC 24 Oct 12 12:39:41 PM UTC 24 25780200 ps
T552 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr.1908792416 Oct 12 12:37:43 PM UTC 24 Oct 12 12:39:44 PM UTC 24 9305798500 ps
T553 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_alert_test.1807043382 Oct 12 12:39:19 PM UTC 24 Oct 12 12:39:45 PM UTC 24 350071700 ps
T554 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_wo.700739333 Oct 12 12:36:55 PM UTC 24 Oct 12 12:39:52 PM UTC 24 2049140900 ps
T555 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_serr.1207171181 Oct 12 12:37:03 PM UTC 24 Oct 12 12:39:56 PM UTC 24 1383146400 ps
T410 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_mp_regions.1468082869 Oct 12 12:36:31 PM UTC 24 Oct 12 12:39:59 PM UTC 24 23809837300 ps
T339 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd_slow_flash.1344132148 Oct 12 12:34:45 PM UTC 24 Oct 12 12:40:10 PM UTC 24 50684313600 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_mp_regions.1266427392 Oct 12 12:32:13 PM UTC 24 Oct 12 12:40:12 PM UTC 24 26358638300 ps
T401 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_sec_info_access.647017091 Oct 12 12:38:54 PM UTC 24 Oct 12 12:40:14 PM UTC 24 1304421200 ps
T556 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_fetch_code.3043655347 Oct 12 12:39:53 PM UTC 24 Oct 12 12:40:22 PM UTC 24 674859900 ps
T557 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_prog_rma_wipe_err.4072530980 Oct 12 12:39:15 PM UTC 24 Oct 12 12:40:28 PM UTC 24 10064244200 ps
T558 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_derr.2683270274 Oct 12 12:37:28 PM UTC 24 Oct 12 12:40:29 PM UTC 24 817272500 ps
T41 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd.202319475 Oct 12 12:37:39 PM UTC 24 Oct 12 12:40:32 PM UTC 24 4740137600 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_serr.1661884674 Oct 12 12:37:09 PM UTC 24 Oct 12 12:40:34 PM UTC 24 28728787700 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_derr.3078307685 Oct 12 12:37:36 PM UTC 24 Oct 12 12:40:48 PM UTC 24 1578502000 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_win.2084251402 Oct 12 12:19:30 PM UTC 24 Oct 12 12:40:51 PM UTC 24 8271392800 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_sec_otp.41833760 Oct 12 12:39:35 PM UTC 24 Oct 12 12:40:56 PM UTC 24 4112934300 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_smoke.2952310367 Oct 12 12:39:24 PM UTC 24 Oct 12 12:41:29 PM UTC 24 35638100 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_invalid_op.3876969896 Oct 12 12:40:10 PM UTC 24 Oct 12 12:41:29 PM UTC 24 3064374200 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro.1590415076 Oct 12 12:40:14 PM UTC 24 Oct 12 12:41:53 PM UTC 24 1010271500 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_prog_reset.3341783417 Oct 12 12:41:31 PM UTC 24 Oct 12 12:41:55 PM UTC 24 65397100 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr_slow_flash.1992790613 Oct 12 12:37:53 PM UTC 24 Oct 12 12:41:57 PM UTC 24 80868717500 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_rma_reset.1291623588 Oct 12 12:28:30 PM UTC 24 Oct 12 12:41:58 PM UTC 24 160165464400 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd_slow_flash.1761918975 Oct 12 12:37:49 PM UTC 24 Oct 12 12:42:29 PM UTC 24 43429475200 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict.3654308445 Oct 12 12:41:54 PM UTC 24 Oct 12 12:42:32 PM UTC 24 60278200 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr.1106959211 Oct 12 12:40:52 PM UTC 24 Oct 12 12:42:36 PM UTC 24 2135434100 ps
T392 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_disable.988460439 Oct 12 12:41:59 PM UTC 24 Oct 12 12:42:40 PM UTC 24 14435500 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_stress_all.2235828064 Oct 12 12:10:27 PM UTC 24 Oct 12 12:42:43 PM UTC 24 1788655600 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict_all_en.64309774 Oct 12 12:41:56 PM UTC 24 Oct 12 12:42:49 PM UTC 24 29255700 ps
T413 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_re_evict.2381005572 Oct 12 12:41:58 PM UTC 24 Oct 12 12:42:51 PM UTC 24 203658800 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_serr.4281829690 Oct 12 12:40:29 PM UTC 24 Oct 12 12:42:52 PM UTC 24 424324500 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_phy_arb.1932282443 Oct 12 12:36:22 PM UTC 24 Oct 12 12:42:55 PM UTC 24 46060200 ps
T375 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_connect.3680595075 Oct 12 12:42:33 PM UTC 24 Oct 12 12:42:58 PM UTC 24 17334100 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_lcmgr_intg.1986158262 Oct 12 12:42:36 PM UTC 24 Oct 12 12:43:01 PM UTC 24 25255000 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_read_seed_err.3009815674 Oct 12 12:42:41 PM UTC 24 Oct 12 12:43:08 PM UTC 24 15111600 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_alert_test.1140812464 Oct 12 12:42:50 PM UTC 24 Oct 12 12:43:10 PM UTC 24 89359700 ps
T42 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd.4012475577 Oct 12 12:40:49 PM UTC 24 Oct 12 12:43:18 PM UTC 24 1472156000 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw.640107272 Oct 12 12:33:54 PM UTC 24 Oct 12 12:43:27 PM UTC 24 5212232200 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_mp_regions.1981657881 Oct 12 12:39:45 PM UTC 24 Oct 12 12:43:27 PM UTC 24 24581367600 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_derr.274628188 Oct 12 12:40:33 PM UTC 24 Oct 12 12:43:38 PM UTC 24 3433277900 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_otp_reset.1097052242 Oct 12 12:39:45 PM UTC 24 Oct 12 12:43:45 PM UTC 24 136821100 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_fetch_code.1519913956 Oct 12 12:43:19 PM UTC 24 Oct 12 12:43:47 PM UTC 24 120397700 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_wo.1848577359 Oct 12 12:40:13 PM UTC 24 Oct 12 12:43:51 PM UTC 24 4436312400 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_sec_info_access.1834696440 Oct 12 12:42:30 PM UTC 24 Oct 12 12:43:57 PM UTC 24 3981510600 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_mp.568352592 Oct 12 11:52:24 AM UTC 24 Oct 12 12:44:03 PM UTC 24 9768412000 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr_slow_flash.2394064635 Oct 12 12:41:29 PM UTC 24 Oct 12 12:44:38 PM UTC 24 52817131300 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_derr.279280012 Oct 12 12:40:35 PM UTC 24 Oct 12 12:44:42 PM UTC 24 4806877900 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_invalid_op.779327640 Oct 12 12:43:39 PM UTC 24 Oct 12 12:44:44 PM UTC 24 4320288800 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_prog_rma_wipe_err.1153222237 Oct 12 12:42:45 PM UTC 24 Oct 12 12:45:07 PM UTC 24 10033553500 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_sec_otp.3858036438 Oct 12 12:42:59 PM UTC 24 Oct 12 12:45:14 PM UTC 24 4766935700 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_phy_arb.3577971780 Oct 12 12:39:32 PM UTC 24 Oct 12 12:45:26 PM UTC 24 105117800 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_win.2104842131 Oct 12 12:23:57 PM UTC 24 Oct 12 12:45:26 PM UTC 24 691442300 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_serr.1226951622 Oct 12 12:40:30 PM UTC 24 Oct 12 12:45:30 PM UTC 24 7830064400 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_prog_reset.317618674 Oct 12 12:45:27 PM UTC 24 Oct 12 12:45:51 PM UTC 24 67316300 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_wo.1805185677 Oct 12 12:43:46 PM UTC 24 Oct 12 12:46:05 PM UTC 24 3676664300 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_otp_reset.3466278206 Oct 12 12:43:09 PM UTC 24 Oct 12 12:46:08 PM UTC 24 92986000 ps
T110 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro.1077578352 Oct 12 12:43:48 PM UTC 24 Oct 12 12:46:16 PM UTC 24 1136417400 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict.2363183417 Oct 12 12:45:31 PM UTC 24 Oct 12 12:46:18 PM UTC 24 49808700 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_mp_regions.411696068 Oct 12 12:43:10 PM UTC 24 Oct 12 12:46:19 PM UTC 24 6571524700 ps
T179 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_rma_reset.3606175370 Oct 12 12:32:11 PM UTC 24 Oct 12 12:46:32 PM UTC 24 270194386800 ps
T596 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_derr.2722313693 Oct 12 12:44:39 PM UTC 24 Oct 12 12:46:35 PM UTC 24 512313700 ps
T597 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_serr.2875793267 Oct 12 12:43:58 PM UTC 24 Oct 12 12:46:35 PM UTC 24 812851400 ps
T598 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict_all_en.1711771508 Oct 12 12:45:52 PM UTC 24 Oct 12 12:46:39 PM UTC 24 168087800 ps
T102 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_connect.3846246099 Oct 12 12:46:18 PM UTC 24 Oct 12 12:46:43 PM UTC 24 21172900 ps
T599 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_lcmgr_intg.3312484443 Oct 12 12:46:20 PM UTC 24 Oct 12 12:46:47 PM UTC 24 47569300 ps
T600 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_re_evict.326995821 Oct 12 12:46:06 PM UTC 24 Oct 12 12:46:48 PM UTC 24 64733800 ps
T601 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr.1558203097 Oct 12 12:45:07 PM UTC 24 Oct 12 12:46:49 PM UTC 24 2670589600 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_disable.3135385749 Oct 12 12:46:08 PM UTC 24 Oct 12 12:46:51 PM UTC 24 11305300 ps
T602 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw.935451747 Oct 12 12:37:01 PM UTC 24 Oct 12 12:46:51 PM UTC 24 18219079900 ps
T340 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd_slow_flash.3179874067 Oct 12 12:40:57 PM UTC 24 Oct 12 12:46:52 PM UTC 24 19047997900 ps
T603 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_read_seed_err.225466147 Oct 12 12:46:33 PM UTC 24 Oct 12 12:46:53 PM UTC 24 47709300 ps
T604 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_alert_test.687233680 Oct 12 12:46:35 PM UTC 24 Oct 12 12:47:02 PM UTC 24 101649400 ps
T605 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_serr.2634226593 Oct 12 12:44:04 PM UTC 24 Oct 12 12:47:23 PM UTC 24 5208139800 ps
T136 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma.1537611033 Oct 12 12:12:18 PM UTC 24 Oct 12 12:47:32 PM UTC 24 230240434500 ps
T398 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_sec_info_access.2878620814 Oct 12 12:46:16 PM UTC 24 Oct 12 12:47:32 PM UTC 24 2067951000 ps
T606 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.2310556748 Oct 12 12:39:26 PM UTC 24 Oct 12 12:47:42 PM UTC 24 152989200 ps
T607 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd.3721656502 Oct 12 12:44:44 PM UTC 24 Oct 12 12:47:49 PM UTC 24 4100398500 ps
T608 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_smoke.2546336121 Oct 12 12:42:52 PM UTC 24 Oct 12 12:48:01 PM UTC 24 125481000 ps
T609 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw.2077488326 Oct 12 12:40:22 PM UTC 24 Oct 12 12:48:03 PM UTC 24 13660744100 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_prog_rma_wipe_err.3128731093 Oct 12 12:46:35 PM UTC 24 Oct 12 12:48:13 PM UTC 24 10022088400 ps
T610 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.3667542877 Oct 12 12:42:53 PM UTC 24 Oct 12 12:48:17 PM UTC 24 46401700 ps
T611 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_host_ctrl_arb.2298802577 Oct 12 11:50:28 AM UTC 24 Oct 12 12:48:22 PM UTC 24 277915452400 ps
T612 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_invalid_op.1876220229 Oct 12 12:46:53 PM UTC 24 Oct 12 12:48:26 PM UTC 24 1975559600 ps
T613 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_phy_arb.2946413474 Oct 12 12:42:56 PM UTC 24 Oct 12 12:48:39 PM UTC 24 2730616900 ps
T614 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict.6665510 Oct 12 12:47:50 PM UTC 24 Oct 12 12:48:45 PM UTC 24 31429000 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_connect.1245117839 Oct 12 12:48:22 PM UTC 24 Oct 12 12:48:50 PM UTC 24 27315500 ps
T615 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_derr.3841697114 Oct 12 12:44:43 PM UTC 24 Oct 12 12:48:52 PM UTC 24 2302741800 ps
T616 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_lcmgr_intg.3804601488 Oct 12 12:48:28 PM UTC 24 Oct 12 12:48:53 PM UTC 24 43316300 ps
T387 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_disable.4034248130 Oct 12 12:48:14 PM UTC 24 Oct 12 12:48:55 PM UTC 24 21471800 ps
T617 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_read_seed_err.799201336 Oct 12 12:48:40 PM UTC 24 Oct 12 12:48:57 PM UTC 24 15481000 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_sec_otp.1368660272 Oct 12 12:46:49 PM UTC 24 Oct 12 12:48:58 PM UTC 24 3011580300 ps
T618 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict_all_en.2329164732 Oct 12 12:48:02 PM UTC 24 Oct 12 12:48:59 PM UTC 24 50974700 ps
T619 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_rma_reset.3890831164 Oct 12 12:36:25 PM UTC 24 Oct 12 12:49:01 PM UTC 24 90144012600 ps
T620 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_re_evict.3139064509 Oct 12 12:48:04 PM UTC 24 Oct 12 12:49:06 PM UTC 24 87868100 ps
T621 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_ro.946103361 Oct 12 12:47:03 PM UTC 24 Oct 12 12:49:11 PM UTC 24 5832151900 ps
T622 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr_slow_flash.2147945418 Oct 12 12:45:27 PM UTC 24 Oct 12 12:49:15 PM UTC 24 18391239800 ps
T337 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd_slow_flash.670536152 Oct 12 12:45:15 PM UTC 24 Oct 12 12:49:17 PM UTC 24 11795245800 ps
T623 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_alert_test.3706316317 Oct 12 12:48:51 PM UTC 24 Oct 12 12:49:17 PM UTC 24 106863100 ps
T342 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd.2775374774 Oct 12 12:47:34 PM UTC 24 Oct 12 12:49:30 PM UTC 24 609779600 ps
T396 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_sec_info_access.1842429635 Oct 12 12:48:17 PM UTC 24 Oct 12 12:49:32 PM UTC 24 5110456700 ps
T624 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_wo.4277266410 Oct 12 12:46:54 PM UTC 24 Oct 12 12:49:39 PM UTC 24 7556561000 ps
T625 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_prog_win.2187140668 Oct 12 12:28:41 PM UTC 24 Oct 12 12:49:47 PM UTC 24 1352564900 ps
T626 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_prog_win.1785623796 Oct 12 12:32:22 PM UTC 24 Oct 12 12:49:55 PM UTC 24 575600500 ps
T627 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_invalid_op.3107326395 Oct 12 12:49:07 PM UTC 24 Oct 12 12:50:10 PM UTC 24 3424423900 ps
T189 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_otp_reset.644883254 Oct 12 12:46:52 PM UTC 24 Oct 12 12:50:17 PM UTC 24 149164100 ps
T425 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict.1352478906 Oct 12 12:49:39 PM UTC 24 Oct 12 12:50:18 PM UTC 24 41105800 ps
T628 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_prog_reset.1322930711 Oct 12 12:47:43 PM UTC 24 Oct 12 12:50:35 PM UTC 24 7231061000 ps
T414 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_re_evict.1189883889 Oct 12 12:49:57 PM UTC 24 Oct 12 12:50:40 PM UTC 24 72440300 ps
T629 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw.770495752 Oct 12 12:43:52 PM UTC 24 Oct 12 12:50:41 PM UTC 24 12640813300 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_full_mem_access.3334131144 Oct 12 11:51:10 AM UTC 24 Oct 12 12:50:42 PM UTC 24 55761123600 ps
T630 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_connect.669450843 Oct 12 12:50:19 PM UTC 24 Oct 12 12:50:45 PM UTC 24 29193800 ps
T631 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_lcmgr_intg.1898361029 Oct 12 12:50:33 PM UTC 24 Oct 12 12:50:52 PM UTC 24 48406700 ps
T124 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_disable.4192489307 Oct 12 12:50:11 PM UTC 24 Oct 12 12:50:53 PM UTC 24 12158200 ps
T632 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_read_seed_err.3844191723 Oct 12 12:50:36 PM UTC 24 Oct 12 12:51:02 PM UTC 24 20171300 ps
T633 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_smoke.3643222968 Oct 12 12:46:40 PM UTC 24 Oct 12 12:51:04 PM UTC 24 26150500 ps
T634 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_alert_test.2755594447 Oct 12 12:50:46 PM UTC 24 Oct 12 12:51:05 PM UTC 24 150160600 ps
T635 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_prog_rma_wipe_err.1014170137 Oct 12 12:48:46 PM UTC 24 Oct 12 12:51:10 PM UTC 24 10020057000 ps
T636 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_sec_otp.3274391593 Oct 12 12:48:57 PM UTC 24 Oct 12 12:51:27 PM UTC 24 6362702100 ps
T637 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_sec_info_access.50001889 Oct 12 12:50:18 PM UTC 24 Oct 12 12:51:34 PM UTC 24 1423634700 ps
T638 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_ro.3456304174 Oct 12 12:49:16 PM UTC 24 Oct 12 12:51:46 PM UTC 24 2290984300 ps
T639 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_smoke.1699844215 Oct 12 12:48:53 PM UTC 24 Oct 12 12:52:09 PM UTC 24 218124400 ps
T640 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_phy_arb.3310249673 Oct 12 12:46:48 PM UTC 24 Oct 12 12:52:13 PM UTC 24 365448100 ps
T320 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_otp_reset.1916452017 Oct 12 12:49:00 PM UTC 24 Oct 12 12:52:26 PM UTC 24 73515300 ps
T641 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.705915800 Oct 12 12:49:02 PM UTC 24 Oct 12 12:52:27 PM UTC 24 12623619000 ps
T642 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_prog_reset.838928424 Oct 12 12:52:14 PM UTC 24 Oct 12 12:52:36 PM UTC 24 36619700 ps
T643 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_invalid_op.178128889 Oct 12 12:51:11 PM UTC 24 Oct 12 12:52:37 PM UTC 24 3659188500 ps
T644 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd.4115714444 Oct 12 12:49:18 PM UTC 24 Oct 12 12:53:01 PM UTC 24 1678089100 ps
T645 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_disable.877523392 Oct 12 12:52:38 PM UTC 24 Oct 12 12:53:11 PM UTC 24 24307800 ps
T646 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict_all_en.1743364623 Oct 12 12:52:28 PM UTC 24 Oct 12 12:53:21 PM UTC 24 44810800 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_prog_rma_wipe_err.1816688858 Oct 12 12:50:41 PM UTC 24 Oct 12 12:53:24 PM UTC 24 10012577300 ps
T426 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict.823498973 Oct 12 12:52:26 PM UTC 24 Oct 12 12:53:26 PM UTC 24 80988400 ps
T43 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd_slow_flash.1252226082 Oct 12 12:47:34 PM UTC 24 Oct 12 12:53:30 PM UTC 24 105716247500 ps
T647 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_re_evict.767227466 Oct 12 12:52:36 PM UTC 24 Oct 12 12:53:30 PM UTC 24 76840900 ps
T648 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_sec_otp.3226313016 Oct 12 12:50:54 PM UTC 24 Oct 12 12:53:31 PM UTC 24 15113475500 ps
T649 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_smoke.1955199309 Oct 12 12:50:46 PM UTC 24 Oct 12 12:53:34 PM UTC 24 427263900 ps
T650 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_ro.714584832 Oct 12 12:51:28 PM UTC 24 Oct 12 12:53:36 PM UTC 24 470463100 ps
T651 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_connect.465415731 Oct 12 12:53:12 PM UTC 24 Oct 12 12:53:42 PM UTC 24 17765400 ps
T652 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_lcmgr_intg.3897540419 Oct 12 12:53:22 PM UTC 24 Oct 12 12:53:42 PM UTC 24 130255300 ps
T653 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_read_seed_err.243442643 Oct 12 12:53:25 PM UTC 24 Oct 12 12:53:54 PM UTC 24 118258700 ps
T654 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_alert_test.2042393461 Oct 12 12:53:31 PM UTC 24 Oct 12 12:53:57 PM UTC 24 153694900 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.4082374591 Oct 12 12:51:06 PM UTC 24 Oct 12 12:54:02 PM UTC 24 22130248700 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd_slow_flash.1623417837 Oct 12 12:49:31 PM UTC 24 Oct 12 12:54:05 PM UTC 24 91640989300 ps
T655 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_wo.3022057161 Oct 12 12:51:24 PM UTC 24 Oct 12 12:54:06 PM UTC 24 4569295300 ps
T190 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_otp_reset.4034271858 Oct 12 12:51:05 PM UTC 24 Oct 12 12:54:09 PM UTC 24 80705200 ps
T656 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.797955914 Oct 12 12:53:38 PM UTC 24 Oct 12 12:54:21 PM UTC 24 696710700 ps
T657 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_sec_info_access.3694545603 Oct 12 12:53:02 PM UTC 24 Oct 12 12:54:25 PM UTC 24 2094488500 ps
T658 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.3937895719 Oct 12 12:36:17 PM UTC 24 Oct 12 12:54:34 PM UTC 24 113277100 ps
T192 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_ctrl_arb.2638045148 Oct 12 12:12:29 PM UTC 24 Oct 12 12:54:40 PM UTC 24 352959674200 ps
T659 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw.668765382 Oct 12 12:47:23 PM UTC 24 Oct 12 12:55:20 PM UTC 24 4293927700 ps
T660 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict.3762007270 Oct 12 12:54:36 PM UTC 24 Oct 12 12:55:28 PM UTC 24 31966800 ps
T661 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict_all_en.4207636322 Oct 12 12:54:41 PM UTC 24 Oct 12 12:55:29 PM UTC 24 29310500 ps
T662 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd.1330915254 Oct 12 12:51:47 PM UTC 24 Oct 12 12:55:32 PM UTC 24 3936389000 ps
T663 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_invalid_op.3519989437 Oct 12 12:53:57 PM UTC 24 Oct 12 12:55:33 PM UTC 24 6109834700 ps
T664 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_prog_win.2820354207 Oct 12 12:36:36 PM UTC 24 Oct 12 12:55:39 PM UTC 24 344014600 ps
T665 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_disable.3997911576 Oct 12 12:55:29 PM UTC 24 Oct 12 12:55:53 PM UTC 24 11264400 ps
T666 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_lcmgr_intg.1438420478 Oct 12 12:55:34 PM UTC 24 Oct 12 12:56:00 PM UTC 24 30081600 ps
T667 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_connect.2179269965 Oct 12 12:55:33 PM UTC 24 Oct 12 12:56:01 PM UTC 24 40189300 ps
T668 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.603934911 Oct 12 12:55:39 PM UTC 24 Oct 12 12:56:04 PM UTC 24 26801400 ps
T669 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.2819423787 Oct 12 12:55:22 PM UTC 24 Oct 12 12:56:23 PM UTC 24 186447500 ps
T670 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.2491832704 Oct 12 12:56:01 PM UTC 24 Oct 12 12:56:23 PM UTC 24 126959500 ps
T671 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.1516527663 Oct 12 12:54:06 PM UTC 24 Oct 12 12:56:26 PM UTC 24 579751400 ps
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