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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.05 95.23 93.89 98.31 92.52 97.14 97.00 98.24


Total test records in report: 1267
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T416 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict.71123899 Oct 12 01:12:58 PM UTC 24 Oct 12 01:13:45 PM UTC 24 69782400 ps
T874 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.2859303867 Oct 12 01:11:40 PM UTC 24 Oct 12 01:13:47 PM UTC 24 1349894900 ps
T875 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.3135901817 Oct 12 01:13:18 PM UTC 24 Oct 12 01:13:49 PM UTC 24 269082500 ps
T876 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.785448572 Oct 12 01:13:08 PM UTC 24 Oct 12 01:13:50 PM UTC 24 41665400 ps
T877 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.2764992534 Oct 12 01:12:04 PM UTC 24 Oct 12 01:13:57 PM UTC 24 104451500 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.4273776959 Oct 12 01:13:42 PM UTC 24 Oct 12 01:13:58 PM UTC 24 42385700 ps
T878 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.1615176426 Oct 12 01:11:00 PM UTC 24 Oct 12 01:13:59 PM UTC 24 334341800 ps
T879 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.2662762453 Oct 12 01:11:57 PM UTC 24 Oct 12 01:14:00 PM UTC 24 12256098200 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.2326678768 Oct 12 01:10:34 PM UTC 24 Oct 12 01:14:12 PM UTC 24 4672339500 ps
T880 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.166993275 Oct 12 01:12:33 PM UTC 24 Oct 12 01:14:12 PM UTC 24 30772347000 ps
T336 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.534903959 Oct 12 01:09:25 PM UTC 24 Oct 12 01:14:13 PM UTC 24 3322152800 ps
T881 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.4280190110 Oct 12 01:13:48 PM UTC 24 Oct 12 01:14:14 PM UTC 24 51057600 ps
T882 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.1200798238 Oct 12 01:11:40 PM UTC 24 Oct 12 01:14:21 PM UTC 24 26341100 ps
T883 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.2190671205 Oct 12 01:13:51 PM UTC 24 Oct 12 01:14:22 PM UTC 24 54430200 ps
T884 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.1763120010 Oct 12 01:13:58 PM UTC 24 Oct 12 01:14:28 PM UTC 24 223033000 ps
T885 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd.2443784322 Oct 12 01:11:00 PM UTC 24 Oct 12 01:14:29 PM UTC 24 6105031300 ps
T886 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.1482327759 Oct 12 01:12:47 PM UTC 24 Oct 12 01:14:41 PM UTC 24 18027875300 ps
T435 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict.325470519 Oct 12 01:13:46 PM UTC 24 Oct 12 01:14:45 PM UTC 24 57341600 ps
T887 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.2569587588 Oct 12 01:13:16 PM UTC 24 Oct 12 01:14:46 PM UTC 24 2913667300 ps
T888 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.169499973 Oct 12 01:12:08 PM UTC 24 Oct 12 01:14:46 PM UTC 24 732658800 ps
T889 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.3204302422 Oct 12 01:13:47 PM UTC 24 Oct 12 01:14:48 PM UTC 24 283046100 ps
T348 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.929247431 Oct 12 01:08:44 PM UTC 24 Oct 12 01:14:51 PM UTC 24 53054843200 ps
T890 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.3358897308 Oct 12 01:09:45 PM UTC 24 Oct 12 01:14:52 PM UTC 24 87004400 ps
T891 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.3838058709 Oct 12 01:14:30 PM UTC 24 Oct 12 01:14:53 PM UTC 24 40619300 ps
T892 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.3369064508 Oct 12 01:14:30 PM UTC 24 Oct 12 01:14:53 PM UTC 24 94403100 ps
T893 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.1590569675 Oct 12 01:14:15 PM UTC 24 Oct 12 01:14:59 PM UTC 24 28219900 ps
T894 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.1143390115 Oct 12 01:14:22 PM UTC 24 Oct 12 01:14:59 PM UTC 24 19362100 ps
T895 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.3985213977 Oct 12 01:13:50 PM UTC 24 Oct 12 01:15:03 PM UTC 24 1982964100 ps
T896 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.3751182261 Oct 12 01:14:14 PM UTC 24 Oct 12 01:15:07 PM UTC 24 30521600 ps
T897 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.1657395206 Oct 12 12:24:15 PM UTC 24 Oct 12 01:15:08 PM UTC 24 20906771300 ps
T898 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.1599413738 Oct 12 01:12:07 PM UTC 24 Oct 12 01:15:09 PM UTC 24 143249700 ps
T899 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.2190870932 Oct 12 01:11:42 PM UTC 24 Oct 12 01:15:15 PM UTC 24 397750200 ps
T900 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.1847702882 Oct 12 01:13:19 PM UTC 24 Oct 12 01:15:17 PM UTC 24 8863201700 ps
T901 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.2574689538 Oct 12 01:12:27 PM UTC 24 Oct 12 01:15:24 PM UTC 24 9593620300 ps
T902 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.1459740693 Oct 12 01:15:00 PM UTC 24 Oct 12 01:15:24 PM UTC 24 35923800 ps
T191 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.3359034862 Oct 12 01:12:51 PM UTC 24 Oct 12 01:15:28 PM UTC 24 378401000 ps
T903 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.1254136373 Oct 12 01:14:53 PM UTC 24 Oct 12 01:15:29 PM UTC 24 81870200 ps
T904 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.2200559442 Oct 12 01:14:54 PM UTC 24 Oct 12 01:15:30 PM UTC 24 23624100 ps
T905 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.3457535201 Oct 12 01:15:00 PM UTC 24 Oct 12 01:15:31 PM UTC 24 13669300 ps
T906 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.3916945621 Oct 12 01:11:07 PM UTC 24 Oct 12 01:15:31 PM UTC 24 14798071400 ps
T907 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.865509165 Oct 12 01:14:53 PM UTC 24 Oct 12 01:15:36 PM UTC 24 107493400 ps
T908 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.856092774 Oct 12 01:12:45 PM UTC 24 Oct 12 01:15:37 PM UTC 24 131985900 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.3380462169 Oct 12 12:07:05 PM UTC 24 Oct 12 01:15:51 PM UTC 24 49892817700 ps
T909 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.114917695 Oct 12 01:13:33 PM UTC 24 Oct 12 01:15:53 PM UTC 24 4261387100 ps
T910 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.1130306656 Oct 12 01:14:23 PM UTC 24 Oct 12 01:15:54 PM UTC 24 1858999800 ps
T911 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.2272039702 Oct 12 01:15:31 PM UTC 24 Oct 12 01:15:55 PM UTC 24 110995500 ps
T912 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rand_ops.1539241639 Oct 12 01:06:00 PM UTC 24 Oct 12 01:16:01 PM UTC 24 81984800 ps
T913 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.543592604 Oct 12 01:10:46 PM UTC 24 Oct 12 01:16:02 PM UTC 24 24244732000 ps
T914 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.944485515 Oct 12 01:12:57 PM UTC 24 Oct 12 01:16:02 PM UTC 24 1397315000 ps
T915 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.1258938601 Oct 12 01:15:31 PM UTC 24 Oct 12 01:16:03 PM UTC 24 20601300 ps
T916 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.1391730397 Oct 12 01:13:22 PM UTC 24 Oct 12 01:16:06 PM UTC 24 112983900 ps
T917 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.2345706611 Oct 12 01:15:18 PM UTC 24 Oct 12 01:16:07 PM UTC 24 28897300 ps
T918 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.2045080263 Oct 12 01:15:25 PM UTC 24 Oct 12 01:16:10 PM UTC 24 48940600 ps
T919 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.1129305516 Oct 12 01:11:43 PM UTC 24 Oct 12 01:16:13 PM UTC 24 16361098500 ps
T920 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.4266746383 Oct 12 01:12:58 PM UTC 24 Oct 12 01:16:13 PM UTC 24 18887209000 ps
T921 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.2814745580 Oct 12 01:00:58 PM UTC 24 Oct 12 01:16:18 PM UTC 24 120163316100 ps
T922 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.1673227634 Oct 12 01:15:24 PM UTC 24 Oct 12 01:16:19 PM UTC 24 28560700 ps
T923 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.1342190621 Oct 12 01:14:13 PM UTC 24 Oct 12 01:16:25 PM UTC 24 2728468600 ps
T924 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.3290840915 Oct 12 01:16:03 PM UTC 24 Oct 12 01:16:28 PM UTC 24 17816600 ps
T369 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.2375580294 Oct 12 01:16:00 PM UTC 24 Oct 12 01:16:29 PM UTC 24 28079400 ps
T925 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.3479926095 Oct 12 01:16:03 PM UTC 24 Oct 12 01:16:33 PM UTC 24 184405300 ps
T926 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.3639716122 Oct 12 01:14:00 PM UTC 24 Oct 12 01:16:34 PM UTC 24 3837351700 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.181480705 Oct 12 01:06:18 PM UTC 24 Oct 12 01:16:40 PM UTC 24 8553997000 ps
T927 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.3342854382 Oct 12 01:16:00 PM UTC 24 Oct 12 01:16:52 PM UTC 24 40095800 ps
T390 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.2157258463 Oct 12 01:16:19 PM UTC 24 Oct 12 01:16:52 PM UTC 24 22760100 ps
T928 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.380871627 Oct 12 01:16:00 PM UTC 24 Oct 12 01:16:54 PM UTC 24 30429500 ps
T929 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_alert_test.965554174 Oct 12 01:16:30 PM UTC 24 Oct 12 01:16:55 PM UTC 24 300931000 ps
T930 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.2047199370 Oct 12 01:16:29 PM UTC 24 Oct 12 01:16:57 PM UTC 24 20166200 ps
T931 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.1157688832 Oct 12 01:15:03 PM UTC 24 Oct 12 01:16:58 PM UTC 24 29268400 ps
T932 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.2666951031 Oct 12 01:14:46 PM UTC 24 Oct 12 01:17:07 PM UTC 24 76357900 ps
T933 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.2985150215 Oct 12 01:15:28 PM UTC 24 Oct 12 01:17:08 PM UTC 24 2075552500 ps
T934 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.666097802 Oct 12 01:16:14 PM UTC 24 Oct 12 01:17:14 PM UTC 24 75528700 ps
T417 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.1766283811 Oct 12 01:16:19 PM UTC 24 Oct 12 01:17:19 PM UTC 24 29597800 ps
T935 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.5731664 Oct 12 01:13:18 PM UTC 24 Oct 12 01:17:23 PM UTC 24 103083700 ps
T936 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.1342430438 Oct 12 01:16:02 PM UTC 24 Oct 12 01:17:23 PM UTC 24 897404100 ps
T937 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.1856700913 Oct 12 01:16:04 PM UTC 24 Oct 12 01:17:24 PM UTC 24 18984700 ps
T938 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict.2950431397 Oct 12 01:16:53 PM UTC 24 Oct 12 01:17:27 PM UTC 24 225700800 ps
T939 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.3090465668 Oct 12 01:14:02 PM UTC 24 Oct 12 01:17:28 PM UTC 24 73484900 ps
T940 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.1160556528 Oct 12 01:17:08 PM UTC 24 Oct 12 01:17:28 PM UTC 24 133144300 ps
T941 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.3647999632 Oct 12 01:15:32 PM UTC 24 Oct 12 01:17:28 PM UTC 24 5078256600 ps
T942 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.3122498372 Oct 12 01:14:42 PM UTC 24 Oct 12 01:17:28 PM UTC 24 34876400 ps
T943 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.1597639148 Oct 12 01:02:47 PM UTC 24 Oct 12 01:17:29 PM UTC 24 83905000 ps
T944 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.437504448 Oct 12 01:16:56 PM UTC 24 Oct 12 01:17:29 PM UTC 24 10145200 ps
T945 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.2436929019 Oct 12 01:16:59 PM UTC 24 Oct 12 01:17:30 PM UTC 24 24367700 ps
T946 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.1205244173 Oct 12 01:16:33 PM UTC 24 Oct 12 01:17:31 PM UTC 24 4006563700 ps
T947 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.3504822051 Oct 12 01:16:07 PM UTC 24 Oct 12 01:17:41 PM UTC 24 4544293000 ps
T948 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.3613780713 Oct 12 01:14:47 PM UTC 24 Oct 12 01:17:43 PM UTC 24 3204728700 ps
T423 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.2705246556 Oct 12 01:16:55 PM UTC 24 Oct 12 01:17:46 PM UTC 24 47763800 ps
T949 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.1396064484 Oct 12 01:15:10 PM UTC 24 Oct 12 01:17:47 PM UTC 24 12543251400 ps
T950 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.3202498595 Oct 12 01:16:27 PM UTC 24 Oct 12 01:17:51 PM UTC 24 1408114200 ps
T951 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.2445458462 Oct 12 01:14:46 PM UTC 24 Oct 12 01:17:55 PM UTC 24 4904013700 ps
T952 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.4121600962 Oct 12 01:17:30 PM UTC 24 Oct 12 01:17:56 PM UTC 24 96259600 ps
T953 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.295421797 Oct 12 01:17:30 PM UTC 24 Oct 12 01:17:57 PM UTC 24 22917700 ps
T954 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.3968958288 Oct 12 01:15:09 PM UTC 24 Oct 12 01:18:02 PM UTC 24 37680700 ps
T955 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.1151436450 Oct 12 01:17:25 PM UTC 24 Oct 12 01:18:03 PM UTC 24 128920600 ps
T956 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.2270761268 Oct 12 01:17:29 PM UTC 24 Oct 12 01:18:03 PM UTC 24 13508800 ps
T957 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.1130830751 Oct 12 01:16:58 PM UTC 24 Oct 12 01:18:16 PM UTC 24 4998479500 ps
T958 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.2850123643 Oct 12 01:17:29 PM UTC 24 Oct 12 01:18:18 PM UTC 24 73895700 ps
T959 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.2226803554 Oct 12 01:17:58 PM UTC 24 Oct 12 01:18:20 PM UTC 24 104445800 ps
T333 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.3333208093 Oct 12 01:10:08 PM UTC 24 Oct 12 01:18:22 PM UTC 24 208185167800 ps
T960 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.1822757635 Oct 12 01:17:55 PM UTC 24 Oct 12 01:18:23 PM UTC 24 46341400 ps
T961 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.3941935081 Oct 12 01:15:16 PM UTC 24 Oct 12 01:18:26 PM UTC 24 34975740400 ps
T393 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.1250477280 Oct 12 01:17:48 PM UTC 24 Oct 12 01:18:30 PM UTC 24 16940400 ps
T962 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.1205737125 Oct 12 01:15:37 PM UTC 24 Oct 12 01:18:31 PM UTC 24 144800600 ps
T963 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.3643961626 Oct 12 01:17:47 PM UTC 24 Oct 12 01:18:31 PM UTC 24 34894600 ps
T964 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.2700418355 Oct 12 01:13:59 PM UTC 24 Oct 12 01:18:40 PM UTC 24 80739700 ps
T418 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.2595254812 Oct 12 01:17:44 PM UTC 24 Oct 12 01:18:40 PM UTC 24 34679400 ps
T965 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.757478882 Oct 12 01:04:29 PM UTC 24 Oct 12 01:18:42 PM UTC 24 40123584200 ps
T966 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.3886614726 Oct 12 01:16:08 PM UTC 24 Oct 12 01:18:44 PM UTC 24 43994900 ps
T967 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.555298777 Oct 12 01:18:27 PM UTC 24 Oct 12 01:18:44 PM UTC 24 41291000 ps
T968 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.1559905436 Oct 12 01:15:38 PM UTC 24 Oct 12 01:18:48 PM UTC 24 1490660200 ps
T969 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_rma_reset.2589365145 Oct 12 01:02:54 PM UTC 24 Oct 12 01:18:51 PM UTC 24 90141692000 ps
T970 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.3899588180 Oct 12 01:18:24 PM UTC 24 Oct 12 01:18:53 PM UTC 24 10939300 ps
T971 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rand_ops.1938166253 Oct 12 01:04:24 PM UTC 24 Oct 12 01:18:53 PM UTC 24 292295400 ps
T972 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.964397197 Oct 12 01:18:31 PM UTC 24 Oct 12 01:18:54 PM UTC 24 45839800 ps
T973 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_mp.280592511 Oct 12 12:32:23 PM UTC 24 Oct 12 01:18:55 PM UTC 24 26994541000 ps
T974 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.318393271 Oct 12 01:17:29 PM UTC 24 Oct 12 01:18:56 PM UTC 24 2287661800 ps
T322 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.1104227296 Oct 12 01:17:15 PM UTC 24 Oct 12 01:18:57 PM UTC 24 3202449500 ps
T975 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.704665409 Oct 12 01:15:32 PM UTC 24 Oct 12 01:19:02 PM UTC 24 120904900 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.3105101896 Oct 12 01:17:30 PM UTC 24 Oct 12 01:19:41 PM UTC 24 19354355000 ps
T976 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict_all_en.3826834634 Oct 12 01:18:21 PM UTC 24 Oct 12 01:19:04 PM UTC 24 250461000 ps
T977 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.2720284673 Oct 12 01:16:30 PM UTC 24 Oct 12 01:19:04 PM UTC 24 31074700 ps
T978 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.3506681858 Oct 12 01:14:13 PM UTC 24 Oct 12 01:19:10 PM UTC 24 26016041400 ps
T979 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.3850789988 Oct 12 01:16:35 PM UTC 24 Oct 12 01:19:11 PM UTC 24 78070900 ps
T980 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.3905591448 Oct 12 01:15:09 PM UTC 24 Oct 12 01:19:14 PM UTC 24 11504509500 ps
T981 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.335413830 Oct 12 01:18:54 PM UTC 24 Oct 12 01:19:17 PM UTC 24 56320000 ps
T982 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.3698415184 Oct 12 01:06:09 PM UTC 24 Oct 12 01:19:19 PM UTC 24 50127067300 ps
T983 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.3894797736 Oct 12 01:17:51 PM UTC 24 Oct 12 01:19:22 PM UTC 24 1175662300 ps
T984 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.3932473045 Oct 12 01:18:54 PM UTC 24 Oct 12 01:19:23 PM UTC 24 71792400 ps
T985 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.4175430325 Oct 12 01:19:04 PM UTC 24 Oct 12 01:19:23 PM UTC 24 42482900 ps
T986 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.1720785379 Oct 12 01:18:58 PM UTC 24 Oct 12 01:19:26 PM UTC 24 20165800 ps
T987 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.824353059 Oct 12 01:18:32 PM UTC 24 Oct 12 01:19:26 PM UTC 24 2796102500 ps
T988 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.2957189506 Oct 12 01:18:46 PM UTC 24 Oct 12 01:19:27 PM UTC 24 34555700 ps
T989 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.410589395 Oct 12 01:19:04 PM UTC 24 Oct 12 01:19:28 PM UTC 24 15747800 ps
T990 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.1705339303 Oct 12 01:17:09 PM UTC 24 Oct 12 01:19:28 PM UTC 24 119871800 ps
T991 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.846436260 Oct 12 01:18:45 PM UTC 24 Oct 12 01:19:29 PM UTC 24 66339200 ps
T334 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.1150008190 Oct 12 01:11:43 PM UTC 24 Oct 12 01:19:32 PM UTC 24 51479097500 ps
T992 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.892589412 Oct 12 01:18:50 PM UTC 24 Oct 12 01:19:33 PM UTC 24 13160200 ps
T993 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.3794889901 Oct 12 01:16:00 PM UTC 24 Oct 12 01:19:41 PM UTC 24 18823180300 ps
T994 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.3868850996 Oct 12 01:19:20 PM UTC 24 Oct 12 01:19:42 PM UTC 24 29895500 ps
T995 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.2814504943 Oct 12 01:19:15 PM UTC 24 Oct 12 01:19:47 PM UTC 24 26184600 ps
T996 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.1999570553 Oct 12 01:19:23 PM UTC 24 Oct 12 01:19:48 PM UTC 24 65849700 ps
T997 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd_slow_flash.1212628722 Oct 12 01:17:24 PM UTC 24 Oct 12 01:19:49 PM UTC 24 21946875200 ps
T998 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.1526820635 Oct 12 01:19:28 PM UTC 24 Oct 12 01:19:49 PM UTC 24 14401100 ps
T999 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.1618358919 Oct 12 01:19:27 PM UTC 24 Oct 12 01:19:53 PM UTC 24 12761700 ps
T1000 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.2835210927 Oct 12 01:19:29 PM UTC 24 Oct 12 01:19:53 PM UTC 24 100204500 ps
T109 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_type.1375977965 Oct 12 12:23:55 PM UTC 24 Oct 12 01:19:58 PM UTC 24 550326800 ps
T1001 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_smoke.3059947260 Oct 12 01:17:30 PM UTC 24 Oct 12 01:19:59 PM UTC 24 34863500 ps
T1002 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_hw_sec_otp.3380685526 Oct 12 01:18:03 PM UTC 24 Oct 12 01:20:00 PM UTC 24 3746645700 ps
T395 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.4175587176 Oct 12 01:18:24 PM UTC 24 Oct 12 01:20:01 PM UTC 24 1901685200 ps
T1003 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.3908288066 Oct 12 01:14:48 PM UTC 24 Oct 12 01:20:04 PM UTC 24 147635860200 ps
T1004 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.2296795098 Oct 12 01:18:52 PM UTC 24 Oct 12 01:20:07 PM UTC 24 1179200500 ps
T1005 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.3837787664 Oct 12 01:19:34 PM UTC 24 Oct 12 01:20:10 PM UTC 24 16009900 ps
T1006 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.1342744810 Oct 12 01:19:54 PM UTC 24 Oct 12 01:20:11 PM UTC 24 24486400 ps
T1007 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.3108718785 Oct 12 01:16:10 PM UTC 24 Oct 12 01:20:11 PM UTC 24 6656657400 ps
T1008 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.2723166705 Oct 12 01:19:42 PM UTC 24 Oct 12 01:20:11 PM UTC 24 78761400 ps
T1009 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_smoke.3357069017 Oct 12 01:19:05 PM UTC 24 Oct 12 01:20:12 PM UTC 24 18047400 ps
T1010 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.442309261 Oct 12 01:16:42 PM UTC 24 Oct 12 01:20:13 PM UTC 24 3124520800 ps
T1011 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.3321523296 Oct 12 01:19:42 PM UTC 24 Oct 12 01:20:14 PM UTC 24 30180600 ps
T1012 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.2702945000 Oct 12 01:13:39 PM UTC 24 Oct 12 01:20:16 PM UTC 24 88527455000 ps
T1013 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.1141090888 Oct 12 01:19:34 PM UTC 24 Oct 12 01:22:09 PM UTC 24 37492900 ps
T1014 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.3229017642 Oct 12 01:17:19 PM UTC 24 Oct 12 01:20:17 PM UTC 24 74795600 ps
T1015 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.3965041222 Oct 12 01:18:04 PM UTC 24 Oct 12 01:20:19 PM UTC 24 872377100 ps
T1016 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.2798526988 Oct 12 01:19:59 PM UTC 24 Oct 12 01:20:20 PM UTC 24 38887800 ps
T1017 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.2707613443 Oct 12 01:19:18 PM UTC 24 Oct 12 01:20:22 PM UTC 24 1249181100 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.3130050470 Oct 12 01:19:50 PM UTC 24 Oct 12 01:20:27 PM UTC 24 11219300 ps
T1018 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.3863425559 Oct 12 01:17:33 PM UTC 24 Oct 12 01:20:32 PM UTC 24 1665822500 ps
T1019 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.3460390834 Oct 12 01:20:05 PM UTC 24 Oct 12 01:20:33 PM UTC 24 26256100 ps
T1020 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.748608747 Oct 12 01:20:11 PM UTC 24 Oct 12 01:20:33 PM UTC 24 22272100 ps
T1021 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.3657515513 Oct 12 01:20:12 PM UTC 24 Oct 12 01:20:35 PM UTC 24 69364100 ps
T1022 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.135037559 Oct 12 01:17:31 PM UTC 24 Oct 12 01:20:39 PM UTC 24 167573100 ps
T1023 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.2078870066 Oct 12 01:19:02 PM UTC 24 Oct 12 01:20:41 PM UTC 24 2090818300 ps
T1024 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.258759007 Oct 12 01:18:32 PM UTC 24 Oct 12 01:20:42 PM UTC 24 150318900 ps
T1025 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.570168369 Oct 12 01:20:17 PM UTC 24 Oct 12 01:20:42 PM UTC 24 16979000 ps
T374 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.3957266539 Oct 12 01:20:13 PM UTC 24 Oct 12 01:20:44 PM UTC 24 27807600 ps
T1026 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.2045139545 Oct 12 01:20:19 PM UTC 24 Oct 12 01:20:45 PM UTC 24 50535400 ps
T1027 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.195590438 Oct 12 01:18:04 PM UTC 24 Oct 12 01:20:47 PM UTC 24 46628800 ps
T407 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.297827166 Oct 12 01:19:28 PM UTC 24 Oct 12 01:20:52 PM UTC 24 14299477400 ps
T1028 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.3946710485 Oct 12 01:19:42 PM UTC 24 Oct 12 01:20:53 PM UTC 24 419107400 ps
T1029 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.896133058 Oct 12 01:20:35 PM UTC 24 Oct 12 01:20:55 PM UTC 24 40232000 ps
T1030 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.1174613058 Oct 12 01:20:35 PM UTC 24 Oct 12 01:20:56 PM UTC 24 95047500 ps
T1031 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_smoke.2164015647 Oct 12 01:20:00 PM UTC 24 Oct 12 01:21:01 PM UTC 24 43028400 ps
T1032 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.1513472666 Oct 12 01:19:11 PM UTC 24 Oct 12 01:21:03 PM UTC 24 4202033000 ps
T1033 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd_slow_flash.1024238924 Oct 12 01:16:14 PM UTC 24 Oct 12 01:21:06 PM UTC 24 48719182700 ps
T1034 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.2300846853 Oct 12 01:19:30 PM UTC 24 Oct 12 01:21:06 PM UTC 24 5121902000 ps
T1035 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.376687269 Oct 12 01:19:54 PM UTC 24 Oct 12 01:21:08 PM UTC 24 399126900 ps
T1036 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.3731591710 Oct 12 01:17:24 PM UTC 24 Oct 12 01:21:10 PM UTC 24 6546403600 ps
T1037 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.3547546808 Oct 12 01:20:45 PM UTC 24 Oct 12 01:21:11 PM UTC 24 14740300 ps
T1038 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.1985177910 Oct 12 01:20:28 PM UTC 24 Oct 12 01:21:11 PM UTC 24 10898100 ps
T1039 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.2478579003 Oct 12 01:20:45 PM UTC 24 Oct 12 01:21:11 PM UTC 24 45879800 ps
T1040 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.2634908330 Oct 12 01:21:03 PM UTC 24 Oct 12 01:21:21 PM UTC 24 165285900 ps
T405 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.3812771978 Oct 12 01:20:16 PM UTC 24 Oct 12 01:21:22 PM UTC 24 2921331600 ps
T1041 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.2599566743 Oct 12 01:21:01 PM UTC 24 Oct 12 01:21:24 PM UTC 24 16121100 ps
T1042 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.3621698303 Oct 12 01:19:50 PM UTC 24 Oct 12 01:21:24 PM UTC 24 2727446200 ps
T1043 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.2762913036 Oct 12 01:20:56 PM UTC 24 Oct 12 01:21:26 PM UTC 24 15451400 ps
T1044 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.3916552765 Oct 12 01:20:43 PM UTC 24 Oct 12 01:21:26 PM UTC 24 36031200 ps
T1045 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.1175779598 Oct 12 01:21:07 PM UTC 24 Oct 12 01:21:30 PM UTC 24 17394600 ps
T1046 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.3190474040 Oct 12 01:21:11 PM UTC 24 Oct 12 01:21:34 PM UTC 24 17507900 ps
T1047 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.3437957979 Oct 12 01:20:08 PM UTC 24 Oct 12 01:21:38 PM UTC 24 1384319000 ps
T1048 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.1138964479 Oct 12 01:21:12 PM UTC 24 Oct 12 01:21:38 PM UTC 24 52841400 ps
T1049 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd_slow_flash.2697311218 Oct 12 01:18:43 PM UTC 24 Oct 12 01:21:39 PM UTC 24 5876557100 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_sec_cm.822583551 Oct 12 12:27:33 PM UTC 24 Oct 12 02:16:36 PM UTC 24 9654807800 ps
T141 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.3546290384 Oct 12 01:18:40 PM UTC 24 Oct 12 01:21:40 PM UTC 24 37542300 ps
T142 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.1424373876 Oct 12 01:21:24 PM UTC 24 Oct 12 01:21:46 PM UTC 24 23016200 ps
T143 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_smoke.2041563070 Oct 12 01:17:58 PM UTC 24 Oct 12 01:21:46 PM UTC 24 50306200 ps
T144 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.828288381 Oct 12 01:20:12 PM UTC 24 Oct 12 01:21:47 PM UTC 24 10898640200 ps
T145 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.1650281629 Oct 12 01:21:27 PM UTC 24 Oct 12 01:21:50 PM UTC 24 16809100 ps
T146 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.2478820795 Oct 12 01:21:22 PM UTC 24 Oct 12 01:21:51 PM UTC 24 13147000 ps
T147 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.2024138335 Oct 12 01:20:33 PM UTC 24 Oct 12 01:21:53 PM UTC 24 1741324600 ps
T148 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.1516591133 Oct 12 01:21:30 PM UTC 24 Oct 12 01:21:54 PM UTC 24 24884600 ps
T149 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.263737273 Oct 12 01:20:43 PM UTC 24 Oct 12 01:21:55 PM UTC 24 1630520300 ps
T1050 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.3704027711 Oct 12 01:18:57 PM UTC 24 Oct 12 01:21:57 PM UTC 24 148909700 ps
T1051 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.2540619387 Oct 12 01:20:57 PM UTC 24 Oct 12 01:21:58 PM UTC 24 1426592200 ps
T1052 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.1309600446 Oct 12 01:21:38 PM UTC 24 Oct 12 01:22:02 PM UTC 24 15324100 ps
T1053 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.4077119302 Oct 12 01:21:41 PM UTC 24 Oct 12 01:22:03 PM UTC 24 62064900 ps
T1054 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.3595314715 Oct 12 01:19:13 PM UTC 24 Oct 12 01:22:05 PM UTC 24 40391700 ps
T1055 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_smoke.2821062925 Oct 12 01:19:29 PM UTC 24 Oct 12 01:22:06 PM UTC 24 22515500 ps
T1056 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.1026168936 Oct 12 01:20:53 PM UTC 24 Oct 12 01:22:07 PM UTC 24 5118914800 ps
T1057 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.2837588735 Oct 12 01:21:47 PM UTC 24 Oct 12 01:22:08 PM UTC 24 39623300 ps
T1058 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.840139715 Oct 12 01:17:42 PM UTC 24 Oct 12 01:22:13 PM UTC 24 25103393500 ps
T1059 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.4002332762 Oct 12 01:21:48 PM UTC 24 Oct 12 01:22:14 PM UTC 24 21906100 ps
T1060 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.1884606451 Oct 12 01:21:52 PM UTC 24 Oct 12 01:22:17 PM UTC 24 14131300 ps
T1061 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.1359507079 Oct 12 01:16:52 PM UTC 24 Oct 12 01:22:19 PM UTC 24 13372277600 ps
T1062 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.2928198929 Oct 12 01:18:41 PM UTC 24 Oct 12 01:22:19 PM UTC 24 6850563500 ps
T1063 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.990898085 Oct 12 01:22:03 PM UTC 24 Oct 12 01:22:20 PM UTC 24 38382600 ps
T1064 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.1220221335 Oct 12 01:21:55 PM UTC 24 Oct 12 01:22:21 PM UTC 24 21558700 ps
T1065 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_otp_reset.2183523782 Oct 12 01:19:50 PM UTC 24 Oct 12 01:22:23 PM UTC 24 39868100 ps
T1066 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.2998594643 Oct 12 01:22:05 PM UTC 24 Oct 12 01:22:24 PM UTC 24 27608200 ps
T1067 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_hw_sec_otp.253329501 Oct 12 01:20:21 PM UTC 24 Oct 12 01:22:24 PM UTC 24 5417670300 ps
T1068 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.1265048957 Oct 12 01:21:59 PM UTC 24 Oct 12 01:22:25 PM UTC 24 24245600 ps
T1069 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_smoke.1844598496 Oct 12 01:20:37 PM UTC 24 Oct 12 01:22:27 PM UTC 24 66845000 ps
T1070 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.2872016373 Oct 12 01:22:07 PM UTC 24 Oct 12 01:22:28 PM UTC 24 13487500 ps
T176 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_otp_reset.3116301131 Oct 12 01:20:03 PM UTC 24 Oct 12 01:22:30 PM UTC 24 126316100 ps
T1071 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_smoke.3108232415 Oct 12 01:20:12 PM UTC 24 Oct 12 01:22:31 PM UTC 24 17224900 ps
T1072 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.2031591083 Oct 12 01:22:10 PM UTC 24 Oct 12 01:22:35 PM UTC 24 14324100 ps
T1073 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.2111673413 Oct 12 01:22:20 PM UTC 24 Oct 12 01:22:37 PM UTC 24 15636900 ps
T1074 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.3843216056 Oct 12 01:22:15 PM UTC 24 Oct 12 01:22:37 PM UTC 24 43420900 ps
T1075 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.2116829292 Oct 12 01:22:20 PM UTC 24 Oct 12 01:22:40 PM UTC 24 14983800 ps
T1076 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.2070994598 Oct 12 12:59:21 PM UTC 24 Oct 12 01:22:42 PM UTC 24 380323200600 ps
T1077 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_hw_sec_otp.3336595860 Oct 12 01:20:40 PM UTC 24 Oct 12 01:22:44 PM UTC 24 3359821400 ps
T1078 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.929200752 Oct 12 01:22:25 PM UTC 24 Oct 12 01:22:46 PM UTC 24 33073700 ps
T1079 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.3475440869 Oct 12 01:22:24 PM UTC 24 Oct 12 01:22:47 PM UTC 24 15389300 ps
T1080 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.1029223097 Oct 12 01:18:57 PM UTC 24 Oct 12 01:22:48 PM UTC 24 11807247000 ps
T1081 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd_slow_flash.3416289114 Oct 12 01:18:17 PM UTC 24 Oct 12 01:22:53 PM UTC 24 55871501700 ps
T1082 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.1378575092 Oct 12 01:22:28 PM UTC 24 Oct 12 01:22:56 PM UTC 24 61827500 ps
T1083 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.2623749461 Oct 12 01:22:36 PM UTC 24 Oct 12 01:22:59 PM UTC 24 13237200 ps
T1084 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.1942747873 Oct 12 01:22:31 PM UTC 24 Oct 12 01:23:01 PM UTC 24 23281000 ps
T1085 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/76.flash_ctrl_connect.1341438809 Oct 12 01:22:38 PM UTC 24 Oct 12 01:23:02 PM UTC 24 47398400 ps
T1086 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.814316751 Oct 12 01:22:43 PM UTC 24 Oct 12 01:23:08 PM UTC 24 14293700 ps
T1087 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/78.flash_ctrl_connect.1810934202 Oct 12 01:22:47 PM UTC 24 Oct 12 01:23:09 PM UTC 24 47044500 ps
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