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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.05 95.23 93.89 98.31 92.52 97.14 97.00 98.24


Total test records in report: 1267
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T672 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.2929861860 Oct 12 12:19:08 PM UTC 24 Oct 12 12:56:26 PM UTC 24 479079755100 ps
T399 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.3504097895 Oct 12 12:55:30 PM UTC 24 Oct 12 12:56:41 PM UTC 24 3321339100 ps
T673 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.3832906198 Oct 12 12:54:10 PM UTC 24 Oct 12 12:57:09 PM UTC 24 2490767300 ps
T674 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.4145460989 Oct 12 12:54:04 PM UTC 24 Oct 12 12:57:16 PM UTC 24 2511918100 ps
T388 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.391002721 Oct 12 12:53:43 PM UTC 24 Oct 12 12:57:27 PM UTC 24 40264400 ps
T675 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.2198760097 Oct 12 12:54:21 PM UTC 24 Oct 12 12:57:34 PM UTC 24 9315960200 ps
T676 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.2841359513 Oct 12 12:53:31 PM UTC 24 Oct 12 12:57:35 PM UTC 24 52506000 ps
T326 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.2693543365 Oct 12 12:56:24 PM UTC 24 Oct 12 12:57:36 PM UTC 24 3997154000 ps
T677 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.2785520753 Oct 12 12:54:26 PM UTC 24 Oct 12 12:58:06 PM UTC 24 2175976900 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.3785099442 Oct 12 12:13:28 PM UTC 24 Oct 12 12:58:20 PM UTC 24 13050945400 ps
T678 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.3332021138 Oct 12 12:52:10 PM UTC 24 Oct 12 12:58:22 PM UTC 24 40037132700 ps
T679 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.4093892537 Oct 12 12:49:18 PM UTC 24 Oct 12 12:58:25 PM UTC 24 21596660700 ps
T680 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.757355674 Oct 12 12:53:35 PM UTC 24 Oct 12 12:58:31 PM UTC 24 523466000 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_type.4058790102 Oct 12 12:13:11 PM UTC 24 Oct 12 12:58:39 PM UTC 24 3011308900 ps
T681 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.4091129755 Oct 12 12:56:02 PM UTC 24 Oct 12 12:58:49 PM UTC 24 672790600 ps
T682 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.749138154 Oct 12 12:48:53 PM UTC 24 Oct 12 12:58:56 PM UTC 24 84188400 ps
T683 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.2880305502 Oct 12 12:57:10 PM UTC 24 Oct 12 12:59:03 PM UTC 24 4105237500 ps
T684 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.2510978577 Oct 12 12:58:23 PM UTC 24 Oct 12 12:59:03 PM UTC 24 28996200 ps
T685 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.671260020 Oct 12 12:58:32 PM UTC 24 Oct 12 12:59:08 PM UTC 24 22362600 ps
T686 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.3069749434 Oct 12 12:58:21 PM UTC 24 Oct 12 12:59:13 PM UTC 24 65703600 ps
T687 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.3240919635 Oct 12 12:58:26 PM UTC 24 Oct 12 12:59:14 PM UTC 24 227864700 ps
T688 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.2947721304 Oct 12 12:43:28 PM UTC 24 Oct 12 12:59:14 PM UTC 24 646038600 ps
T689 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.801646429 Oct 12 12:58:50 PM UTC 24 Oct 12 12:59:15 PM UTC 24 51745200 ps
T84 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.2979881316 Oct 12 12:55:54 PM UTC 24 Oct 12 12:59:20 PM UTC 24 10016390100 ps
T690 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.73050439 Oct 12 12:53:26 PM UTC 24 Oct 12 12:59:21 PM UTC 24 10012502800 ps
T691 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.188893972 Oct 12 12:59:04 PM UTC 24 Oct 12 12:59:23 PM UTC 24 18363400 ps
T692 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.3644693238 Oct 12 12:48:56 PM UTC 24 Oct 12 12:59:24 PM UTC 24 298268900 ps
T693 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.569724936 Oct 12 12:57:28 PM UTC 24 Oct 12 12:59:25 PM UTC 24 1217542200 ps
T694 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.4063375449 Oct 12 12:58:57 PM UTC 24 Oct 12 12:59:28 PM UTC 24 15523100 ps
T695 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.3948203951 Oct 12 12:59:09 PM UTC 24 Oct 12 12:59:38 PM UTC 24 35990000 ps
T696 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.992691577 Oct 12 12:43:02 PM UTC 24 Oct 12 12:59:40 PM UTC 24 80134448500 ps
T400 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.2322546941 Oct 12 12:58:40 PM UTC 24 Oct 12 12:59:45 PM UTC 24 4342519100 ps
T697 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.303511146 Oct 12 12:46:44 PM UTC 24 Oct 12 12:59:57 PM UTC 24 332779800 ps
T180 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.3490430003 Oct 12 12:39:42 PM UTC 24 Oct 12 01:00:09 PM UTC 24 420326253500 ps
T698 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.3378687691 Oct 12 12:39:58 PM UTC 24 Oct 12 01:00:11 PM UTC 24 2413802700 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.585066131 Oct 12 12:56:27 PM UTC 24 Oct 12 01:00:11 PM UTC 24 40844800 ps
T699 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.1098168472 Oct 12 12:59:59 PM UTC 24 Oct 12 01:00:20 PM UTC 24 41619400 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.4011160185 Oct 12 12:57:36 PM UTC 24 Oct 12 01:00:21 PM UTC 24 1450157900 ps
T700 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.1860871106 Oct 12 12:57:17 PM UTC 24 Oct 12 01:00:28 PM UTC 24 8962334300 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.148598758 Oct 12 12:07:08 PM UTC 24 Oct 12 01:00:30 PM UTC 24 19294679200 ps
T701 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.3383533108 Oct 12 12:51:35 PM UTC 24 Oct 12 01:00:32 PM UTC 24 8411908200 ps
T702 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.3752762240 Oct 12 12:57:37 PM UTC 24 Oct 12 01:00:39 PM UTC 24 46464016100 ps
T703 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.3925113269 Oct 12 12:58:07 PM UTC 24 Oct 12 01:00:47 PM UTC 24 8370471900 ps
T704 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.4177733100 Oct 12 12:59:25 PM UTC 24 Oct 12 01:00:50 PM UTC 24 18257603200 ps
T430 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.1514085084 Oct 12 01:00:11 PM UTC 24 Oct 12 01:00:53 PM UTC 24 231712800 ps
T705 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.1653739671 Oct 12 01:00:29 PM UTC 24 Oct 12 01:00:54 PM UTC 24 16367800 ps
T706 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.107928228 Oct 12 01:00:31 PM UTC 24 Oct 12 01:00:55 PM UTC 24 15749300 ps
T120 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.109346100 Oct 12 01:00:20 PM UTC 24 Oct 12 01:00:57 PM UTC 24 12830100 ps
T707 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.2657843350 Oct 12 01:00:33 PM UTC 24 Oct 12 01:01:01 PM UTC 24 46426900 ps
T708 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.979076802 Oct 12 01:00:47 PM UTC 24 Oct 12 01:01:06 PM UTC 24 213669800 ps
T709 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.814179862 Oct 12 01:00:10 PM UTC 24 Oct 12 01:01:07 PM UTC 24 45566100 ps
T710 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.2061994842 Oct 12 12:59:28 PM UTC 24 Oct 12 01:01:11 PM UTC 24 497304400 ps
T711 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.3850083646 Oct 12 12:50:53 PM UTC 24 Oct 12 01:01:17 PM UTC 24 1486727300 ps
T712 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.234812738 Oct 12 01:00:12 PM UTC 24 Oct 12 01:01:17 PM UTC 24 74288600 ps
T713 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.1347518623 Oct 12 12:49:00 PM UTC 24 Oct 12 01:01:41 PM UTC 24 40121496600 ps
T714 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.3799367031 Oct 12 12:59:40 PM UTC 24 Oct 12 01:01:48 PM UTC 24 524820800 ps
T715 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.1067946846 Oct 12 12:59:05 PM UTC 24 Oct 12 01:01:53 PM UTC 24 10011629200 ps
T716 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.256758597 Oct 12 12:46:50 PM UTC 24 Oct 12 01:01:57 PM UTC 24 100158109800 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.1594193630 Oct 12 12:23:36 PM UTC 24 Oct 12 01:02:01 PM UTC 24 659575992900 ps
T717 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.1342253805 Oct 12 01:00:22 PM UTC 24 Oct 12 01:02:03 PM UTC 24 2081197700 ps
T718 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.1511542185 Oct 12 01:00:56 PM UTC 24 Oct 12 01:02:07 PM UTC 24 3131118800 ps
T719 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.3999153363 Oct 12 12:54:07 PM UTC 24 Oct 12 01:02:13 PM UTC 24 6205241300 ps
T720 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.2609375615 Oct 12 01:01:54 PM UTC 24 Oct 12 01:02:25 PM UTC 24 38121000 ps
T721 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.635061502 Oct 12 12:59:26 PM UTC 24 Oct 12 01:02:27 PM UTC 24 6239488700 ps
T722 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.2573822575 Oct 12 01:01:07 PM UTC 24 Oct 12 01:02:33 PM UTC 24 7581697300 ps
T723 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.2481557101 Oct 12 12:59:24 PM UTC 24 Oct 12 01:02:33 PM UTC 24 21281055300 ps
T724 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.1438314276 Oct 12 12:59:13 PM UTC 24 Oct 12 01:02:34 PM UTC 24 34213400 ps
T725 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.1759035828 Oct 12 01:01:58 PM UTC 24 Oct 12 01:02:35 PM UTC 24 70425800 ps
T726 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.365216707 Oct 12 12:56:05 PM UTC 24 Oct 12 01:02:46 PM UTC 24 57606100 ps
T727 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.3495156709 Oct 12 12:59:46 PM UTC 24 Oct 12 01:02:46 PM UTC 24 12017891800 ps
T370 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.3549899659 Oct 12 01:02:08 PM UTC 24 Oct 12 01:02:49 PM UTC 24 10027800 ps
T728 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.4123367419 Oct 12 12:59:22 PM UTC 24 Oct 12 01:02:53 PM UTC 24 141548400 ps
T729 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.903981321 Oct 12 01:02:34 PM UTC 24 Oct 12 01:02:55 PM UTC 24 55774600 ps
T730 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.2906988256 Oct 12 01:02:25 PM UTC 24 Oct 12 01:02:55 PM UTC 24 26872500 ps
T731 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.3526684235 Oct 12 12:59:15 PM UTC 24 Oct 12 01:02:55 PM UTC 24 10327216900 ps
T732 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.2983971585 Oct 12 01:02:28 PM UTC 24 Oct 12 01:02:57 PM UTC 24 15522300 ps
T733 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.1387994877 Oct 12 01:02:02 PM UTC 24 Oct 12 01:02:58 PM UTC 24 31555000 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.3132346467 Oct 12 12:53:54 PM UTC 24 Oct 12 01:02:59 PM UTC 24 16804527100 ps
T734 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.4010862400 Oct 12 01:01:18 PM UTC 24 Oct 12 01:02:59 PM UTC 24 436547400 ps
T735 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.3074444509 Oct 12 01:02:35 PM UTC 24 Oct 12 01:03:00 PM UTC 24 91901300 ps
T736 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.3694549414 Oct 12 01:02:05 PM UTC 24 Oct 12 01:03:03 PM UTC 24 133655500 ps
T406 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.3787224668 Oct 12 01:02:14 PM UTC 24 Oct 12 01:03:27 PM UTC 24 4517795300 ps
T271 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.276588318 Oct 12 01:02:35 PM UTC 24 Oct 12 01:03:29 PM UTC 24 10072403400 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_mp_regions.3658502693 Oct 12 12:46:52 PM UTC 24 Oct 12 01:03:30 PM UTC 24 12897803000 ps
T737 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.1695908163 Oct 12 12:19:33 PM UTC 24 Oct 12 01:03:47 PM UTC 24 5605801300 ps
T738 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.503938577 Oct 12 01:01:41 PM UTC 24 Oct 12 01:03:52 PM UTC 24 719256100 ps
T739 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.1018321722 Oct 12 12:51:03 PM UTC 24 Oct 12 01:03:56 PM UTC 24 40120363400 ps
T740 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.3905966300 Oct 12 01:00:40 PM UTC 24 Oct 12 01:03:59 PM UTC 24 10012055600 ps
T741 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.3117979709 Oct 12 01:01:12 PM UTC 24 Oct 12 01:04:07 PM UTC 24 8027639600 ps
T742 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.1908591608 Oct 12 01:03:29 PM UTC 24 Oct 12 01:04:11 PM UTC 24 28072000 ps
T743 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1064023135 Oct 12 01:03:48 PM UTC 24 Oct 12 01:04:12 PM UTC 24 12716900 ps
T744 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.2270267494 Oct 12 01:03:57 PM UTC 24 Oct 12 01:04:21 PM UTC 24 14572600 ps
T422 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.904557384 Oct 12 01:03:30 PM UTC 24 Oct 12 01:04:23 PM UTC 24 91431300 ps
T745 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.2413722686 Oct 12 01:04:00 PM UTC 24 Oct 12 01:04:24 PM UTC 24 15741400 ps
T213 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.2725344013 Oct 12 01:03:32 PM UTC 24 Oct 12 01:04:25 PM UTC 24 70746900 ps
T323 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.3456581618 Oct 12 01:02:56 PM UTC 24 Oct 12 01:04:28 PM UTC 24 1579058400 ps
T746 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.148319935 Oct 12 01:04:07 PM UTC 24 Oct 12 01:04:30 PM UTC 24 25451600 ps
T747 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.1957707334 Oct 12 01:04:12 PM UTC 24 Oct 12 01:04:39 PM UTC 24 58520300 ps
T211 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_ctrl_arb.3866310257 Oct 12 12:07:01 PM UTC 24 Oct 12 01:04:42 PM UTC 24 298331596300 ps
T748 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.2360835826 Oct 12 12:59:15 PM UTC 24 Oct 12 01:04:43 PM UTC 24 1048979800 ps
T749 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.1084836234 Oct 12 01:02:50 PM UTC 24 Oct 12 01:04:45 PM UTC 24 8738618500 ps
T750 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.2928882548 Oct 12 01:02:59 PM UTC 24 Oct 12 01:04:47 PM UTC 24 515436600 ps
T751 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.2863158562 Oct 12 01:01:01 PM UTC 24 Oct 12 01:04:52 PM UTC 24 76730700 ps
T162 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.1231050841 Oct 12 12:23:53 PM UTC 24 Oct 12 01:05:04 PM UTC 24 203560347200 ps
T752 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.1658784968 Oct 12 01:04:26 PM UTC 24 Oct 12 01:05:06 PM UTC 24 752243900 ps
T753 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.234621587 Oct 12 01:00:52 PM UTC 24 Oct 12 01:05:08 PM UTC 24 232461600 ps
T754 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.382326683 Oct 12 01:01:07 PM UTC 24 Oct 12 01:05:12 PM UTC 24 7764009700 ps
T755 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.4125209526 Oct 12 01:03:04 PM UTC 24 Oct 12 01:05:17 PM UTC 24 7496376800 ps
T188 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.27823077 Oct 12 01:02:55 PM UTC 24 Oct 12 01:05:18 PM UTC 24 136326700 ps
T756 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.2957089212 Oct 12 01:03:53 PM UTC 24 Oct 12 01:05:27 PM UTC 24 2111516500 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.1793974982 Oct 12 12:56:42 PM UTC 24 Oct 12 01:05:28 PM UTC 24 33108892600 ps
T757 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.2510981129 Oct 12 01:05:14 PM UTC 24 Oct 12 01:05:30 PM UTC 24 60872700 ps
T758 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.2802394908 Oct 12 01:02:36 PM UTC 24 Oct 12 01:05:39 PM UTC 24 50871500 ps
T759 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.3129117160 Oct 12 01:04:12 PM UTC 24 Oct 12 01:05:43 PM UTC 24 10029870700 ps
T760 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.1830601993 Oct 12 01:05:18 PM UTC 24 Oct 12 01:05:56 PM UTC 24 13433000 ps
T761 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.3487190685 Oct 12 01:05:29 PM UTC 24 Oct 12 01:05:57 PM UTC 24 22412500 ps
T762 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.1813877287 Oct 12 01:05:31 PM UTC 24 Oct 12 01:05:59 PM UTC 24 66086000 ps
T763 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.359677440 Oct 12 01:05:14 PM UTC 24 Oct 12 01:06:07 PM UTC 24 73318800 ps
T764 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.4217158486 Oct 12 01:05:39 PM UTC 24 Oct 12 01:06:07 PM UTC 24 26649800 ps
T765 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.1344645886 Oct 12 01:04:43 PM UTC 24 Oct 12 01:06:08 PM UTC 24 1565102600 ps
T419 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.396108848 Oct 12 01:05:14 PM UTC 24 Oct 12 01:06:14 PM UTC 24 28836600 ps
T766 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.1743985019 Oct 12 01:05:18 PM UTC 24 Oct 12 01:06:16 PM UTC 24 90187000 ps
T767 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.972300118 Oct 12 12:50:47 PM UTC 24 Oct 12 01:06:19 PM UTC 24 142780400 ps
T768 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.1980379902 Oct 12 01:05:57 PM UTC 24 Oct 12 01:06:23 PM UTC 24 55150900 ps
T769 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.4146416300 Oct 12 01:01:49 PM UTC 24 Oct 12 01:06:33 PM UTC 24 61792048000 ps
T770 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.1262722924 Oct 12 01:04:46 PM UTC 24 Oct 12 01:06:40 PM UTC 24 1876513400 ps
T771 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.3731411815 Oct 12 01:05:43 PM UTC 24 Oct 12 01:06:43 PM UTC 24 10054380200 ps
T772 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.4153274235 Oct 12 01:05:27 PM UTC 24 Oct 12 01:06:51 PM UTC 24 906767100 ps
T773 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.3137401313 Oct 12 12:56:24 PM UTC 24 Oct 12 01:07:06 PM UTC 24 3826255900 ps
T774 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.3933090610 Oct 12 01:04:22 PM UTC 24 Oct 12 01:07:09 PM UTC 24 862085500 ps
T775 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.273417460 Oct 12 01:03:01 PM UTC 24 Oct 12 01:07:09 PM UTC 24 22221108400 ps
T214 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.1713429269 Oct 12 12:12:37 PM UTC 24 Oct 12 01:07:12 PM UTC 24 378379470400 ps
T776 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.2324777780 Oct 12 01:04:30 PM UTC 24 Oct 12 01:07:13 PM UTC 24 76571300 ps
T777 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.1773452521 Oct 12 01:07:07 PM UTC 24 Oct 12 01:07:24 PM UTC 24 20363500 ps
T778 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.2009771390 Oct 12 12:59:38 PM UTC 24 Oct 12 01:07:27 PM UTC 24 6572373100 ps
T779 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.316708217 Oct 12 01:04:40 PM UTC 24 Oct 12 01:07:28 PM UTC 24 18293236800 ps
T780 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.2354647361 Oct 12 01:03:00 PM UTC 24 Oct 12 01:07:35 PM UTC 24 5986724700 ps
T781 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.739747608 Oct 12 01:07:28 PM UTC 24 Oct 12 01:07:48 PM UTC 24 15152200 ps
T782 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.1673215218 Oct 12 01:06:21 PM UTC 24 Oct 12 01:07:48 PM UTC 24 1546262000 ps
T783 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.425410591 Oct 12 01:04:44 PM UTC 24 Oct 12 01:07:51 PM UTC 24 39868447100 ps
T784 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.1109006714 Oct 12 01:07:10 PM UTC 24 Oct 12 01:07:53 PM UTC 24 110688200 ps
T785 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.2778230598 Oct 12 01:07:26 PM UTC 24 Oct 12 01:07:53 PM UTC 24 17385600 ps
T786 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.3441339290 Oct 12 01:07:29 PM UTC 24 Oct 12 01:07:55 PM UTC 24 50045400 ps
T787 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.4279198041 Oct 12 01:07:07 PM UTC 24 Oct 12 01:07:57 PM UTC 24 44536300 ps
T788 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.4209386202 Oct 12 01:04:52 PM UTC 24 Oct 12 01:07:58 PM UTC 24 1509814500 ps
T420 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.3480570004 Oct 12 01:07:09 PM UTC 24 Oct 12 01:07:58 PM UTC 24 42448700 ps
T789 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.1753993166 Oct 12 01:07:40 PM UTC 24 Oct 12 01:08:02 PM UTC 24 107138100 ps
T122 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.373193222 Oct 12 01:07:20 PM UTC 24 Oct 12 01:08:03 PM UTC 24 12938300 ps
T201 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.2794653407 Oct 12 01:08:00 PM UTC 24 Oct 12 01:08:28 PM UTC 24 29497000 ps
T790 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.2115136818 Oct 12 01:08:04 PM UTC 24 Oct 12 01:08:31 PM UTC 24 19454800 ps
T186 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.586545983 Oct 12 12:53:43 PM UTC 24 Oct 12 01:08:33 PM UTC 24 50126484500 ps
T791 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.3711257084 Oct 12 01:06:08 PM UTC 24 Oct 12 01:08:35 PM UTC 24 4994821000 ps
T792 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.2719992260 Oct 12 01:05:58 PM UTC 24 Oct 12 01:08:35 PM UTC 24 51068500 ps
T793 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.2413941287 Oct 12 01:06:34 PM UTC 24 Oct 12 01:08:43 PM UTC 24 6424147600 ps
T409 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.683501817 Oct 12 01:07:20 PM UTC 24 Oct 12 01:08:46 PM UTC 24 1584751900 ps
T794 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.1883101602 Oct 12 01:08:28 PM UTC 24 Oct 12 01:08:47 PM UTC 24 44630400 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.973819245 Oct 12 01:07:58 PM UTC 24 Oct 12 01:08:47 PM UTC 24 46827400 ps
T795 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.1631081947 Oct 12 01:07:36 PM UTC 24 Oct 12 01:08:50 PM UTC 24 10073056200 ps
T796 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.3327467221 Oct 12 01:07:59 PM UTC 24 Oct 12 01:08:52 PM UTC 24 48035500 ps
T797 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.1385844077 Oct 12 01:06:07 PM UTC 24 Oct 12 01:09:03 PM UTC 24 2803730900 ps
T798 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.3053469511 Oct 12 12:56:26 PM UTC 24 Oct 12 01:09:05 PM UTC 24 40123721100 ps
T799 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_stress_all.3969379758 Oct 12 12:27:42 PM UTC 24 Oct 12 01:09:07 PM UTC 24 251549600 ps
T800 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.2454608632 Oct 12 01:08:46 PM UTC 24 Oct 12 01:09:10 PM UTC 24 280230400 ps
T801 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.1199694395 Oct 12 01:05:14 PM UTC 24 Oct 12 01:09:19 PM UTC 24 12301777800 ps
T802 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.3411880818 Oct 12 01:08:48 PM UTC 24 Oct 12 01:09:24 PM UTC 24 28544900 ps
T803 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.2862483309 Oct 12 01:08:48 PM UTC 24 Oct 12 01:09:28 PM UTC 24 89918000 ps
T804 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.3455421628 Oct 12 01:09:04 PM UTC 24 Oct 12 01:09:28 PM UTC 24 55741900 ps
T805 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.1328546996 Oct 12 01:08:51 PM UTC 24 Oct 12 01:09:29 PM UTC 24 32162900 ps
T806 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.819249471 Oct 12 01:09:06 PM UTC 24 Oct 12 01:09:29 PM UTC 24 44257500 ps
T807 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.3350661771 Oct 12 01:02:56 PM UTC 24 Oct 12 01:09:35 PM UTC 24 5720543400 ps
T808 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.3410843486 Oct 12 01:01:19 PM UTC 24 Oct 12 01:09:38 PM UTC 24 7938963700 ps
T809 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.3474373714 Oct 12 12:53:32 PM UTC 24 Oct 12 01:09:40 PM UTC 24 664272200 ps
T810 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.4156653620 Oct 12 01:06:24 PM UTC 24 Oct 12 01:09:44 PM UTC 24 4736087500 ps
T811 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.2442928618 Oct 12 01:07:49 PM UTC 24 Oct 12 01:09:45 PM UTC 24 2055189500 ps
T812 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.650855744 Oct 12 01:08:32 PM UTC 24 Oct 12 01:09:45 PM UTC 24 275511600 ps
T404 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.187551814 Oct 12 01:08:03 PM UTC 24 Oct 12 01:09:53 PM UTC 24 2035701300 ps
T813 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.1919398433 Oct 12 01:09:40 PM UTC 24 Oct 12 01:10:07 PM UTC 24 265044400 ps
T814 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.2198802080 Oct 12 01:09:39 PM UTC 24 Oct 12 01:10:07 PM UTC 24 62174500 ps
T815 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.2540198978 Oct 12 01:06:16 PM UTC 24 Oct 12 01:10:09 PM UTC 24 57755600 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.3887934821 Oct 12 01:09:30 PM UTC 24 Oct 12 01:10:15 PM UTC 24 35383900 ps
T816 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.3982895506 Oct 12 01:09:29 PM UTC 24 Oct 12 01:10:21 PM UTC 24 41379000 ps
T402 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.146390428 Oct 12 01:08:53 PM UTC 24 Oct 12 01:10:26 PM UTC 24 4289677800 ps
T817 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.1731053048 Oct 12 01:10:08 PM UTC 24 Oct 12 01:10:31 PM UTC 24 67692200 ps
T818 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.2326928120 Oct 12 01:09:45 PM UTC 24 Oct 12 01:10:32 PM UTC 24 498775500 ps
T819 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.2721107008 Oct 12 01:08:36 PM UTC 24 Oct 12 01:10:33 PM UTC 24 1326344500 ps
T820 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.2563735123 Oct 12 01:06:43 PM UTC 24 Oct 12 01:10:40 PM UTC 24 1850977200 ps
T821 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.4131195025 Oct 12 01:02:47 PM UTC 24 Oct 12 01:10:44 PM UTC 24 2849609300 ps
T822 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.1004997438 Oct 12 01:10:26 PM UTC 24 Oct 12 01:10:46 PM UTC 24 24392000 ps
T397 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.1152382219 Oct 12 01:09:37 PM UTC 24 Oct 12 01:10:47 PM UTC 24 7014930300 ps
T823 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.3865242755 Oct 12 01:10:15 PM UTC 24 Oct 12 01:10:47 PM UTC 24 10883600 ps
T824 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.3969476377 Oct 12 01:07:52 PM UTC 24 Oct 12 01:10:49 PM UTC 24 152107100 ps
T825 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.435696781 Oct 12 01:08:36 PM UTC 24 Oct 12 01:10:50 PM UTC 24 43250300 ps
T826 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.2337564753 Oct 12 01:10:10 PM UTC 24 Oct 12 01:10:55 PM UTC 24 27949800 ps
T433 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3478908171 Oct 12 01:10:11 PM UTC 24 Oct 12 01:10:56 PM UTC 24 37013600 ps
T827 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.1888330513 Oct 12 01:07:53 PM UTC 24 Oct 12 01:10:58 PM UTC 24 1566118300 ps
T828 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.4024862860 Oct 12 01:09:07 PM UTC 24 Oct 12 01:10:58 PM UTC 24 29424500 ps
T829 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.2215571443 Oct 12 01:07:56 PM UTC 24 Oct 12 01:10:58 PM UTC 24 6656805300 ps
T830 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.3062500302 Oct 12 01:07:49 PM UTC 24 Oct 12 01:10:59 PM UTC 24 33648400 ps
T831 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.3478483560 Oct 12 01:10:32 PM UTC 24 Oct 12 01:10:59 PM UTC 24 49816800 ps
T832 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.267712909 Oct 12 01:06:52 PM UTC 24 Oct 12 01:11:06 PM UTC 24 23885339100 ps
T833 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.2618720649 Oct 12 01:10:47 PM UTC 24 Oct 12 01:11:08 PM UTC 24 19018100 ps
T834 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.2322125072 Oct 12 01:04:25 PM UTC 24 Oct 12 01:11:10 PM UTC 24 280362000 ps
T835 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.331273506 Oct 12 01:08:34 PM UTC 24 Oct 12 01:11:13 PM UTC 24 4138593300 ps
T836 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.4063242758 Oct 12 01:10:59 PM UTC 24 Oct 12 01:11:20 PM UTC 24 97170700 ps
T837 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.637834007 Oct 12 01:10:57 PM UTC 24 Oct 12 01:11:22 PM UTC 24 13721400 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.1050110329 Oct 12 01:10:51 PM UTC 24 Oct 12 01:11:27 PM UTC 24 14909200 ps
T838 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.723668402 Oct 12 01:09:11 PM UTC 24 Oct 12 01:11:36 PM UTC 24 71501661000 ps
T839 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3258817745 Oct 12 01:10:49 PM UTC 24 Oct 12 01:11:38 PM UTC 24 29091200 ps
T840 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.431590449 Oct 12 01:03:00 PM UTC 24 Oct 12 01:11:38 PM UTC 24 17999276900 ps
T841 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.926430852 Oct 12 01:10:22 PM UTC 24 Oct 12 01:11:41 PM UTC 24 9741763800 ps
T842 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.3802138782 Oct 12 01:07:54 PM UTC 24 Oct 12 01:11:42 PM UTC 24 71648352400 ps
T843 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.2611897018 Oct 12 01:10:48 PM UTC 24 Oct 12 01:11:42 PM UTC 24 72472000 ps
T434 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.4062319556 Oct 12 01:11:11 PM UTC 24 Oct 12 01:11:48 PM UTC 24 105617600 ps
T844 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.2672447671 Oct 12 01:09:29 PM UTC 24 Oct 12 01:11:51 PM UTC 24 23144771600 ps
T845 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.288868286 Oct 12 01:11:28 PM UTC 24 Oct 12 01:11:53 PM UTC 24 42431400 ps
T846 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.396743675 Oct 12 01:00:56 PM UTC 24 Oct 12 01:11:53 PM UTC 24 2816891000 ps
T185 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.3042934251 Oct 12 01:09:19 PM UTC 24 Oct 12 01:11:58 PM UTC 24 211853400 ps
T847 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.2963128162 Oct 12 01:11:14 PM UTC 24 Oct 12 01:11:59 PM UTC 24 68292600 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.968530188 Oct 12 01:11:20 PM UTC 24 Oct 12 01:12:03 PM UTC 24 27250100 ps
T848 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.1110945887 Oct 12 01:11:36 PM UTC 24 Oct 12 01:12:04 PM UTC 24 61685900 ps
T849 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.2597065564 Oct 12 01:11:49 PM UTC 24 Oct 12 01:12:06 PM UTC 24 300350700 ps
T850 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.516556792 Oct 12 01:10:59 PM UTC 24 Oct 12 01:12:07 PM UTC 24 8156110000 ps
T403 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.1686409688 Oct 12 01:10:57 PM UTC 24 Oct 12 01:12:27 PM UTC 24 432558200 ps
T851 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.1010430807 Oct 12 01:11:54 PM UTC 24 Oct 12 01:12:29 PM UTC 24 15213100 ps
T852 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.1210738459 Oct 12 01:11:53 PM UTC 24 Oct 12 01:12:29 PM UTC 24 31284800 ps
T853 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.1468505002 Oct 12 01:12:00 PM UTC 24 Oct 12 01:12:31 PM UTC 24 131728900 ps
T854 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.2416887728 Oct 12 01:12:01 PM UTC 24 Oct 12 01:12:31 PM UTC 24 218756000 ps
T408 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.2508591561 Oct 12 01:14:54 PM UTC 24 Oct 12 01:16:28 PM UTC 24 4736271800 ps
T389 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.1341059621 Oct 12 01:09:45 PM UTC 24 Oct 12 01:12:32 PM UTC 24 38620400 ps
T855 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.908468880 Oct 12 01:10:59 PM UTC 24 Oct 12 01:12:32 PM UTC 24 24409300 ps
T856 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.1553510238 Oct 12 12:59:14 PM UTC 24 Oct 12 01:12:36 PM UTC 24 227422300 ps
T394 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.3045649174 Oct 12 01:11:23 PM UTC 24 Oct 12 01:12:45 PM UTC 24 1594032800 ps
T857 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.3637915237 Oct 12 01:11:52 PM UTC 24 Oct 12 01:12:45 PM UTC 24 28035300 ps
T858 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.1826690971 Oct 12 01:10:41 PM UTC 24 Oct 12 01:12:50 PM UTC 24 259775600 ps
T859 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.4193141775 Oct 12 01:00:55 PM UTC 24 Oct 12 01:12:56 PM UTC 24 63655300 ps
T860 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.2782340256 Oct 12 01:12:36 PM UTC 24 Oct 12 01:12:57 PM UTC 24 35431900 ps
T861 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.2680194070 Oct 12 01:12:29 PM UTC 24 Oct 12 01:12:57 PM UTC 24 112301900 ps
T862 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.1534136676 Oct 12 01:12:33 PM UTC 24 Oct 12 01:12:57 PM UTC 24 14648600 ps
T863 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.1451226799 Oct 12 01:12:32 PM UTC 24 Oct 12 01:13:07 PM UTC 24 31467900 ps
T864 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.3467670874 Oct 12 01:12:31 PM UTC 24 Oct 12 01:13:11 PM UTC 24 34389700 ps
T865 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.1992308914 Oct 12 01:09:29 PM UTC 24 Oct 12 01:13:15 PM UTC 24 3822420700 ps
T372 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.2819891165 Oct 12 01:12:32 PM UTC 24 Oct 12 01:13:16 PM UTC 24 99911400 ps
T866 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.165420821 Oct 12 01:12:05 PM UTC 24 Oct 12 01:13:17 PM UTC 24 4364382000 ps
T867 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.3865827501 Oct 12 01:04:48 PM UTC 24 Oct 12 01:13:17 PM UTC 24 57698859100 ps
T868 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.110189277 Oct 12 01:10:45 PM UTC 24 Oct 12 01:13:18 PM UTC 24 720099800 ps
T869 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_prog_reset.2888789118 Oct 12 01:12:58 PM UTC 24 Oct 12 01:13:21 PM UTC 24 85860200 ps
T870 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.1574072650 Oct 12 01:10:34 PM UTC 24 Oct 12 01:13:33 PM UTC 24 103194000 ps
T871 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.3802170580 Oct 12 01:13:12 PM UTC 24 Oct 12 01:13:39 PM UTC 24 33639100 ps
T872 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.3524235929 Oct 12 01:13:17 PM UTC 24 Oct 12 01:13:41 PM UTC 24 52351300 ps
T873 /workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.3393253919 Oct 12 01:11:09 PM UTC 24 Oct 12 01:13:44 PM UTC 24 2120344300 ps
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