| T136 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.2422807755 |
|
|
Aug 25 06:46:00 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
2334145636 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.565880687 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
107314218 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.448998815 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
29853017 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.537415791 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
73191608 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.2848750488 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
62144340 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.578544848 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
54946643 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.2414295024 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
49601709 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.2076116274 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
40830611 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.1216025391 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
1536545559 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.4106565140 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
63753709 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.500894695 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
108862089 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.3493331200 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:07 AM UTC 24 |
64392213 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.171033550 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:08 AM UTC 24 |
119528935 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.503999733 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:08 AM UTC 24 |
263548664 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.3196167524 |
|
|
Aug 25 06:46:04 AM UTC 24 |
Aug 25 06:46:08 AM UTC 24 |
325044622 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.2026645573 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:08 AM UTC 24 |
335844174 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all.2596032891 |
|
|
Aug 25 06:46:00 AM UTC 24 |
Aug 25 06:46:08 AM UTC 24 |
3467682189 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all_with_rand_reset.651614145 |
|
|
Aug 25 06:45:50 AM UTC 24 |
Aug 25 06:46:08 AM UTC 24 |
3554761014 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.430403381 |
|
|
Aug 25 06:46:02 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
1947332283 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2922085849 |
|
|
Aug 25 06:46:02 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
923824217 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.2105217748 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
150553422 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3322914026 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
976549824 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.4906723 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
28888330 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.382459305 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
55803907 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.2620494750 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
31483458 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.2410460476 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
51957168 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.4255900152 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
47915251 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.2154848782 |
|
|
Aug 25 06:45:55 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
7191282996 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.518193163 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:09 AM UTC 24 |
101092474 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.3270440922 |
|
|
Aug 25 06:46:08 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
21109543 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.2817984997 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
52551652 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.621356546 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
109646822 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.2111323966 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
57052829 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.515589010 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
227832943 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.3786540873 |
|
|
Aug 25 06:46:08 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
46081461 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.2002519351 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
65203465 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.1853495141 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
109735578 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3290522733 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:10 AM UTC 24 |
1030339483 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1223451277 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:11 AM UTC 24 |
1486220534 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.4259859115 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:11 AM UTC 24 |
314210995 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.2660601696 |
|
|
Aug 25 06:46:09 AM UTC 24 |
Aug 25 06:46:11 AM UTC 24 |
567693426 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.794912587 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:11 AM UTC 24 |
31124888 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.1415533454 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
593437621 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.437520554 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:11 AM UTC 24 |
817294423 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.1801504433 |
|
|
Aug 25 06:46:09 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
143212291 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.1354828645 |
|
|
Aug 25 06:46:09 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
45222915 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.3640110070 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
111283545 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.3437218318 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
54739138 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.2724301639 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
88749489 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.70464844 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
140194028 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.1252643530 |
|
|
Aug 25 06:46:09 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
214527742 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.541034307 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
63035700 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.4064808175 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:12 AM UTC 24 |
56977211 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3036743043 |
|
|
Aug 25 06:46:09 AM UTC 24 |
Aug 25 06:46:13 AM UTC 24 |
1069795686 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.3559576200 |
|
|
Aug 25 06:46:27 AM UTC 24 |
Aug 25 06:46:50 AM UTC 24 |
52479638 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.796032867 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
38379049 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.1874545636 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
93078022 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.3326638396 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
53429439 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.4194887764 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
35637002 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.2396107305 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
281095218 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.4210662949 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
838022754 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.1117494531 |
|
|
Aug 25 06:46:45 AM UTC 24 |
Aug 25 06:46:50 AM UTC 24 |
56324243 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.2562334179 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
423062839 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1118039111 |
|
|
Aug 25 06:46:09 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
787897532 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.2123398209 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
59680443 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.3891303700 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
194749726 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.4228664292 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
87301699 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.1123090994 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
42623799 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.2927283461 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:14 AM UTC 24 |
31249943 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.1629754131 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
54172412 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.1892518738 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
110179946 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.3871482261 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
99882229 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.2002315665 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
339216805 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.424429645 |
|
|
Aug 25 06:46:13 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
481737264 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3398397738 |
|
|
Aug 25 06:46:05 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
2971661507 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2433982295 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
1127326312 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.545289568 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:15 AM UTC 24 |
298158524 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.467704966 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
444912104 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.641478669 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
2127740453 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.2923861087 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
197392031 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.1151071847 |
|
|
Aug 25 06:46:24 AM UTC 24 |
Aug 25 06:46:46 AM UTC 24 |
162391708 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.2826839170 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
34487233 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.4248098502 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
43767978 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.2904437147 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
68958259 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.1539743725 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
145086565 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.1674033901 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:16 AM UTC 24 |
157920371 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.3521690523 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
2504506260 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.1507288121 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
42347355 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.1216837715 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
284932188 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.3867310368 |
|
|
Aug 25 06:46:15 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
31506597 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.2843629568 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
133277044 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.22107018 |
|
|
Aug 25 06:46:15 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
54341859 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.4188143468 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
116596809 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.3067644272 |
|
|
Aug 25 06:46:10 AM UTC 24 |
Aug 25 06:46:17 AM UTC 24 |
3998437175 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.365881848 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:18 AM UTC 24 |
244562608 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2240345161 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:19 AM UTC 24 |
725351875 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.256265938 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:19 AM UTC 24 |
733395886 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all_with_rand_reset.1422984422 |
|
|
Aug 25 06:45:53 AM UTC 24 |
Aug 25 06:46:19 AM UTC 24 |
15132630382 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.3872371276 |
|
|
Aug 25 06:46:17 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
49565522 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.1854939527 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
30536511 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.2227940283 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
1853502063 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.3552882947 |
|
|
Aug 25 06:46:17 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
160165368 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.3838456982 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
76806710 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.3617272805 |
|
|
Aug 25 06:46:17 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
108470002 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.2673845461 |
|
|
Aug 25 06:46:17 AM UTC 24 |
Aug 25 06:46:20 AM UTC 24 |
272529529 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.1124161263 |
|
|
Aug 25 06:46:17 AM UTC 24 |
Aug 25 06:46:21 AM UTC 24 |
290561507 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.3593186492 |
|
|
Aug 25 06:46:14 AM UTC 24 |
Aug 25 06:46:23 AM UTC 24 |
7129748055 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.30510433 |
|
|
Aug 25 06:46:02 AM UTC 24 |
Aug 25 06:46:25 AM UTC 24 |
12584626650 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.652843758 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:25 AM UTC 24 |
37651329 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.2306635852 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:25 AM UTC 24 |
104972014 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.3593239519 |
|
|
Aug 25 06:45:58 AM UTC 24 |
Aug 25 06:46:27 AM UTC 24 |
10423920276 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4244123550 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:27 AM UTC 24 |
1598351482 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1379058097 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:27 AM UTC 24 |
918213043 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.1877192147 |
|
|
Aug 25 06:46:07 AM UTC 24 |
Aug 25 06:46:31 AM UTC 24 |
4160005624 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.756195583 |
|
|
Aug 25 06:46:12 AM UTC 24 |
Aug 25 06:46:33 AM UTC 24 |
11797911473 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.1252405623 |
|
|
Aug 25 06:46:26 AM UTC 24 |
Aug 25 06:46:35 AM UTC 24 |
85125376 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.4286285434 |
|
|
Aug 25 06:46:26 AM UTC 24 |
Aug 25 06:46:35 AM UTC 24 |
44678806 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.2834552223 |
|
|
Aug 25 06:46:26 AM UTC 24 |
Aug 25 06:46:38 AM UTC 24 |
2459763137 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.2409039675 |
|
|
Aug 25 06:46:27 AM UTC 24 |
Aug 25 06:46:40 AM UTC 24 |
79780367 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.109534962 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:40 AM UTC 24 |
385695719 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.2651104108 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:41 AM UTC 24 |
214866706 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.715940194 |
|
|
Aug 25 06:46:27 AM UTC 24 |
Aug 25 06:46:41 AM UTC 24 |
239076596 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.420158882 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:43 AM UTC 24 |
824995205 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.3888487762 |
|
|
Aug 25 06:46:43 AM UTC 24 |
Aug 25 06:46:45 AM UTC 24 |
75133947 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.1046118935 |
|
|
Aug 25 06:46:43 AM UTC 24 |
Aug 25 06:46:45 AM UTC 24 |
145793889 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.2687670174 |
|
|
Aug 25 06:46:16 AM UTC 24 |
Aug 25 06:46:45 AM UTC 24 |
21168073 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.3374463718 |
|
|
Aug 25 06:46:34 AM UTC 24 |
Aug 25 06:46:45 AM UTC 24 |
21405945 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.2150460320 |
|
|
Aug 25 06:46:22 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
33606082 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.3217233419 |
|
|
Aug 25 06:46:26 AM UTC 24 |
Aug 25 06:46:47 AM UTC 24 |
3740022684 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.2538829567 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:50 AM UTC 24 |
61724597 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.297695078 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
52661226 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.980403311 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
37289139 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.3131555979 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
88949669 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.2861713934 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
435988940 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.2332636279 |
|
|
Aug 25 06:46:22 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
338525868 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.1827093151 |
|
|
Aug 25 06:46:22 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
49721573 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.4168897007 |
|
|
Aug 25 06:46:48 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
67875670 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.2670498482 |
|
|
Aug 25 06:46:32 AM UTC 24 |
Aug 25 06:46:51 AM UTC 24 |
399487533 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3137674234 |
|
|
Aug 25 06:46:21 AM UTC 24 |
Aug 25 06:46:52 AM UTC 24 |
868499641 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.174272554 |
|
|
Aug 25 06:46:36 AM UTC 24 |
Aug 25 06:46:52 AM UTC 24 |
1236327036 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3224177112 |
|
|
Aug 25 06:46:36 AM UTC 24 |
Aug 25 06:46:52 AM UTC 24 |
2538629930 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.955957272 |
|
|
Aug 25 06:46:48 AM UTC 24 |
Aug 25 06:46:53 AM UTC 24 |
889782590 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.1422567913 |
|
|
Aug 25 06:46:45 AM UTC 24 |
Aug 25 06:46:55 AM UTC 24 |
1429150915 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.483479386 |
|
|
Aug 25 06:46:52 AM UTC 24 |
Aug 25 06:46:55 AM UTC 24 |
95635196 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.642869828 |
|
|
Aug 25 06:46:51 AM UTC 24 |
Aug 25 06:47:00 AM UTC 24 |
80392084 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.1687402270 |
|
|
Aug 25 06:46:51 AM UTC 24 |
Aug 25 06:47:00 AM UTC 24 |
37784761 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.4168828947 |
|
|
Aug 25 06:46:51 AM UTC 24 |
Aug 25 06:47:00 AM UTC 24 |
86657602 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.3337665813 |
|
|
Aug 25 06:46:51 AM UTC 24 |
Aug 25 06:47:00 AM UTC 24 |
111868960 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.4165229842 |
|
|
Aug 25 06:46:53 AM UTC 24 |
Aug 25 06:47:00 AM UTC 24 |
1236389818 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.911697742 |
|
|
Aug 25 06:46:36 AM UTC 24 |
Aug 25 06:47:01 AM UTC 24 |
52507196 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1344600565 |
|
|
Aug 25 06:46:56 AM UTC 24 |
Aug 25 06:47:03 AM UTC 24 |
794630608 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.3430594381 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:04 AM UTC 24 |
40619083 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.3303980371 |
|
|
Aug 25 06:46:53 AM UTC 24 |
Aug 25 06:47:05 AM UTC 24 |
35177582 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.2679339232 |
|
|
Aug 25 06:46:52 AM UTC 24 |
Aug 25 06:47:05 AM UTC 24 |
52427399 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.1848616242 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
149719347 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.938945931 |
|
|
Aug 25 06:46:52 AM UTC 24 |
Aug 25 06:47:05 AM UTC 24 |
31724592 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.3346857327 |
|
|
Aug 25 06:47:03 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
178196132 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.962649349 |
|
|
Aug 25 06:47:03 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
136550820 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.350267033 |
|
|
Aug 25 06:46:52 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
101570636 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.2426209625 |
|
|
Aug 25 06:46:53 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
60474878 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.3815952604 |
|
|
Aug 25 06:46:47 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
44213130 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.1708187108 |
|
|
Aug 25 06:47:04 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
78274849 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.2216810156 |
|
|
Aug 25 06:46:53 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
229362030 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.1772492268 |
|
|
Aug 25 06:47:03 AM UTC 24 |
Aug 25 06:47:06 AM UTC 24 |
214140877 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.248627354 |
|
|
Aug 25 06:47:04 AM UTC 24 |
Aug 25 06:47:08 AM UTC 24 |
795910204 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.192704859 |
|
|
Aug 25 06:46:53 AM UTC 24 |
Aug 25 06:47:08 AM UTC 24 |
838170775 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.2822258616 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:15 AM UTC 24 |
70803892 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.945527180 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:15 AM UTC 24 |
65533812 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.3637086297 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:15 AM UTC 24 |
100310533 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.3776336070 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:15 AM UTC 24 |
380615871 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.4076628919 |
|
|
Aug 25 06:46:47 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
32710268 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.577300043 |
|
|
Aug 25 06:46:41 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
99227302 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.443930340 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
265297685 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.105759203 |
|
|
Aug 25 06:46:41 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
62682567 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.2831791298 |
|
|
Aug 25 06:46:41 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
78683844 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.841202149 |
|
|
Aug 25 06:46:53 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
180443507 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.1624289999 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
89841122 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.3748522043 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
37382085 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.1691296380 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:16 AM UTC 24 |
200335673 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.1307672274 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:20 AM UTC 24 |
45684085 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.1955093345 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:20 AM UTC 24 |
36011134 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.2671297330 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:20 AM UTC 24 |
77154888 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.2535972880 |
|
|
Aug 25 06:46:39 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
158823411 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.569299773 |
|
|
Aug 25 06:47:19 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
50489663 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.1928711215 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
62211619 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.1933957265 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
75628858 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.2457495911 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:20 AM UTC 24 |
321776228 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.3212908583 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:20 AM UTC 24 |
146217444 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.428238652 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
313880232 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.43627681 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
97741141 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.3288580687 |
|
|
Aug 25 06:47:16 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
207135752 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.3125849599 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:22 AM UTC 24 |
2118014444 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.2511197094 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
35700506 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.1243736593 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:24 AM UTC 24 |
39407027 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.771017815 |
|
|
Aug 25 06:47:16 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
108552795 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.1928845760 |
|
|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
46555757 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.3918838876 |
|
|
Aug 25 06:47:16 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
54702874 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.4036711341 |
|
|
Aug 25 06:47:16 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
40095666 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.74535524 |
|
|
Aug 25 06:47:09 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
28362686 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.272832403 |
|
|
Aug 25 06:46:39 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
44785538 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.2475862100 |
|
|
Aug 25 06:47:09 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
151811030 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.1939925007 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:21 AM UTC 24 |
71334332 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3559140469 |
|
|
Aug 25 06:47:08 AM UTC 24 |
Aug 25 06:47:22 AM UTC 24 |
1219468749 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4263109365 |
|
|
Aug 25 06:47:08 AM UTC 24 |
Aug 25 06:47:23 AM UTC 24 |
819830591 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3657556744 |
|
|
Aug 25 06:46:56 AM UTC 24 |
Aug 25 06:47:23 AM UTC 24 |
785515055 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.1830697714 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:24 AM UTC 24 |
3721721003 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.973821901 |
|
|
Aug 25 06:47:00 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
47241847 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.1314961956 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
54171480 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.2963707957 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
48513767 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.1028485427 |
|
|
Aug 25 06:47:00 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
464266556 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.4231910820 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
49678063 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.49286084 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
34094691 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.412686547 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
115794432 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.4167421948 |
|
|
Aug 25 06:47:23 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
82889314 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.2715628581 |
|
|
Aug 25 06:47:21 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
36997715 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.2061142107 |
|
|
Aug 25 06:47:23 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
66152711 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.379815208 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
50792905 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.3108568055 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:25 AM UTC 24 |
43495878 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.3561709576 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
119216123 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.280064704 |
|
|
Aug 25 06:47:23 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
29567140 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.1565517576 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
37413015 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.264707586 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
171489516 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.2316483193 |
|
|
Aug 25 06:47:21 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
72077491 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.3379560534 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
310987445 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.3795185783 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
136948724 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.243911101 |
|
|
Aug 25 06:47:23 AM UTC 24 |
Aug 25 06:47:26 AM UTC 24 |
282970708 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2781657601 |
|
|
Aug 25 06:47:23 AM UTC 24 |
Aug 25 06:47:27 AM UTC 24 |
942129376 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.346222543 |
|
|
Aug 25 06:47:23 AM UTC 24 |
Aug 25 06:47:27 AM UTC 24 |
814179989 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3681768427 |
|
|
Aug 25 06:47:20 AM UTC 24 |
Aug 25 06:47:28 AM UTC 24 |
855969251 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.10164610 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:28 AM UTC 24 |
2537711885 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.2566552062 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:29 AM UTC 24 |
1084076348 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.1220848611 |
|
|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:30 AM UTC 24 |
68757707 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.1947090058 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
53144685 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.2260190749 |
|
|
Aug 25 06:47:28 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
86768063 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.2773341510 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
95288042 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.2090911351 |
|
|
Aug 25 06:47:28 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
44289551 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.865689000 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
378164711 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.2397436778 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
47133020 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.4277791947 |
|
|
Aug 25 06:47:29 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
128776522 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.1329169126 |
|
|
Aug 25 06:47:28 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
82050577 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.2787904124 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
71329709 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.3539760689 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
50729639 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.1486827551 |
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|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
212591403 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.1367194424 |
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|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:31 AM UTC 24 |
100818086 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.1464388827 |
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|
Aug 25 06:47:29 AM UTC 24 |
Aug 25 06:47:32 AM UTC 24 |
35024919 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.136678134 |
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|
Aug 25 06:47:28 AM UTC 24 |
Aug 25 06:47:32 AM UTC 24 |
247672415 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.1574548834 |
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|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:32 AM UTC 24 |
62252863 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.488110050 |
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|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:32 AM UTC 24 |
76827622 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.1257980630 |
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|
Aug 25 06:47:01 AM UTC 24 |
Aug 25 06:47:32 AM UTC 24 |
3675383101 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.17791176 |
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Aug 25 06:47:28 AM UTC 24 |
Aug 25 06:47:33 AM UTC 24 |
686120763 ps |