T103 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.209699196 |
|
|
Aug 25 06:47:06 AM UTC 24 |
Aug 25 06:47:33 AM UTC 24 |
6338823396 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.84182322 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:34 AM UTC 24 |
27748134 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.573897170 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
262994112 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.606237690 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
48223828 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.1549108453 |
|
|
Aug 25 06:47:27 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
1564405733 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.3296786791 |
|
|
Aug 25 06:47:27 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
559614247 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.78271699 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
53906992 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.2276385601 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
173163558 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.924235547 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:35 AM UTC 24 |
162001074 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.255942191 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
1156886549 ps |
T176 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.439856607 |
|
|
Aug 25 06:47:27 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
54152175 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.3367602401 |
|
|
Aug 25 06:47:27 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
37625548 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.3163735153 |
|
|
Aug 25 06:47:27 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
43317115 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.565503573 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
40847551 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.3441300940 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
51154942 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.2307084597 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
49693234 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.1127116272 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
1550816052 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.4087114882 |
|
|
Aug 25 06:47:27 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
123738491 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.1145271177 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
176590795 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.3212024932 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
381351746 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2364712477 |
|
|
Aug 25 06:47:30 AM UTC 24 |
Aug 25 06:47:36 AM UTC 24 |
1109641895 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3113329158 |
|
|
Aug 25 06:47:20 AM UTC 24 |
Aug 25 06:47:37 AM UTC 24 |
1149784172 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.676532131 |
|
|
Aug 25 06:46:19 AM UTC 24 |
Aug 25 06:47:39 AM UTC 24 |
4661849724 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1983869945 |
|
|
Aug 25 06:47:31 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
135040386 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.2693635428 |
|
|
Aug 25 06:47:32 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
75470112 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.3486763901 |
|
|
Aug 25 06:47:25 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
796610248 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.449841759 |
|
|
Aug 25 06:47:25 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
37537764 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.3387149206 |
|
|
Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
113850230 ps |
T104 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.3506848709 |
|
|
Aug 25 06:47:28 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
2326291405 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.1423018399 |
|
|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
38535652 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.248504875 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
2513885481 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.2417170106 |
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Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
77745827 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.2810893088 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
58594768 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.2328854968 |
|
|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
82863998 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.452534532 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
67511719 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.2256750926 |
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|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
63213079 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.2809421905 |
|
|
Aug 25 06:47:32 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
31675087 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.947670243 |
|
|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
401009553 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.3103594565 |
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|
Aug 25 06:47:31 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
29577181 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.1816161687 |
|
|
Aug 25 06:47:38 AM UTC 24 |
Aug 25 06:47:40 AM UTC 24 |
60682492 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2165069158 |
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|
Aug 25 06:47:31 AM UTC 24 |
Aug 25 06:47:41 AM UTC 24 |
1157773659 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.362651461 |
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|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:41 AM UTC 24 |
263392734 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.572080135 |
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|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:41 AM UTC 24 |
1219324071 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.1922183430 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:44 AM UTC 24 |
174985441 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.205572565 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:45 AM UTC 24 |
193743329 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.93489849 |
|
|
Aug 25 06:47:42 AM UTC 24 |
Aug 25 06:47:45 AM UTC 24 |
41589775 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.2382037658 |
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|
Aug 25 06:47:42 AM UTC 24 |
Aug 25 06:47:45 AM UTC 24 |
64089682 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.3291096460 |
|
|
Aug 25 06:47:42 AM UTC 24 |
Aug 25 06:47:45 AM UTC 24 |
188067458 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.2467479338 |
|
|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
53596452 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.74635079 |
|
|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
29535911 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1077534269 |
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|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
915500404 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.2348507008 |
|
|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
147484838 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.1116244586 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
54340526 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.3765808562 |
|
|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
52893775 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.768409882 |
|
|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
25603032 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.1956105881 |
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|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
129344451 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.4245987884 |
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|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
170720016 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.1088954380 |
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|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
237789781 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.2057748329 |
|
|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
245197765 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.2661332229 |
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|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
257400611 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.3935904382 |
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|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
121030663 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.2234432905 |
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|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:46 AM UTC 24 |
190151025 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2311180861 |
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|
Aug 25 06:47:37 AM UTC 24 |
Aug 25 06:47:47 AM UTC 24 |
1058417053 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1493869744 |
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|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:48 AM UTC 24 |
929582422 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1863092007 |
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|
Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:48 AM UTC 24 |
1330652821 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3782779949 |
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|
Aug 25 06:47:33 AM UTC 24 |
Aug 25 06:47:48 AM UTC 24 |
1358692520 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.2237072605 |
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Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:48 AM UTC 24 |
811060174 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.1281187880 |
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|
Aug 25 06:47:17 AM UTC 24 |
Aug 25 06:47:48 AM UTC 24 |
566129192 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.2283627679 |
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Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:49 AM UTC 24 |
2384826163 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.3623264724 |
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|
Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:50 AM UTC 24 |
280881896 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.3319192817 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:50 AM UTC 24 |
77172563 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.4270066722 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
81346940 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.1458388584 |
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|
Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
378151662 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.185152353 |
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Aug 25 06:47:35 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
39961133 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.1979854612 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
53651107 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.96564772 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
84818219 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.3092238640 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
83118501 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.3298779268 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
161724428 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.2897960403 |
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Aug 25 06:47:32 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
43173033 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.827094707 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
47643995 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.320341986 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
210961468 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.2174907491 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
81603571 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.714233942 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
392908906 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.1892764387 |
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Aug 25 06:47:32 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
381454512 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.2049700164 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
43751444 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.2746461905 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
65533055 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.1722065319 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
120984465 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.4054929325 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:51 AM UTC 24 |
55402946 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.3709105555 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
40883871 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.3262987307 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
86535056 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.3093935171 |
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Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
44989503 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.97344320 |
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Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
51954380 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.1667268907 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
61526214 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.3346980212 |
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Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
163089888 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.1731084278 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
256225284 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.1830246167 |
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Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
57534860 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.923023394 |
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Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
27414816 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.3249974266 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
142206047 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.3350139314 |
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Aug 25 06:47:29 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
63592090 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.3385939475 |
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Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
28477702 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.3201362547 |
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Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
32259449 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.2825497492 |
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Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
62697191 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.3181250281 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
287414070 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2569523951 |
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Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
314514636 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.373350238 |
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Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
100178809 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.381017619 |
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Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
325015343 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.22413605 |
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Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
91706962 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.722774266 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:52 AM UTC 24 |
1309242884 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.24205910 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
793048844 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.1620180274 |
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Aug 25 06:47:50 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
61534753 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.93646445 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
67145840 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.3226810741 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
37505702 ps |
T142 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.2781339211 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
512699894 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.1481176381 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
373026234 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.1747631572 |
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Aug 25 06:47:40 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
104821464 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.2618551432 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
70030228 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.3540961846 |
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Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
44981644 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.718215317 |
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Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
94027900 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3355892776 |
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Aug 25 06:47:41 AM UTC 24 |
Aug 25 06:47:53 AM UTC 24 |
177313138 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.1742927777 |
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Aug 25 06:47:34 AM UTC 24 |
Aug 25 06:47:54 AM UTC 24 |
73801961 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3664390391 |
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Aug 25 06:47:05 AM UTC 24 |
Aug 25 06:47:54 AM UTC 24 |
36818227 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.4251157076 |
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Aug 25 06:47:05 AM UTC 24 |
Aug 25 06:47:54 AM UTC 24 |
108181684 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3933682563 |
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Aug 25 06:47:51 AM UTC 24 |
Aug 25 06:47:54 AM UTC 24 |
2693463293 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3887133204 |
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Aug 25 06:47:51 AM UTC 24 |
Aug 25 06:47:54 AM UTC 24 |
994919413 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.1541354613 |
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Aug 25 06:47:36 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
1026382306 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.703129199 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
57481240 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.281619304 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
61121304 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.1761621210 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
49085821 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.567240381 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
58786588 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.242134638 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
160013310 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.2763735988 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
141331165 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.425191303 |
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Aug 25 06:47:34 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
1156929468 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.3867279513 |
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Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
268398070 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.1181459521 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
188634636 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.3272783113 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
435329432 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4136663469 |
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Aug 25 06:47:47 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
837656966 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.1538181761 |
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Aug 25 06:47:52 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
28071712 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.2607238007 |
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Aug 25 06:47:52 AM UTC 24 |
Aug 25 06:47:55 AM UTC 24 |
180225268 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.1216451242 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
43238264 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.3856435435 |
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Aug 25 06:47:52 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
23346316 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.201056084 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
179750396 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.1637103149 |
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Aug 25 06:47:52 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
70342951 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.2831521464 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
41813218 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.965345521 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
28835222 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.577554848 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
77132012 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.4079063905 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
422235149 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.2403183367 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
267264969 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.2686411292 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
75055277 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.145315233 |
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Aug 25 06:47:05 AM UTC 24 |
Aug 25 06:47:56 AM UTC 24 |
768133641 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.3059764443 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
200828874 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.3940953627 |
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Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
1675130845 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.386570969 |
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Aug 25 06:47:49 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
3233776502 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.1560038824 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
207324417 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.1013563093 |
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Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
82277645 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.159094355 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
81677735 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.139387967 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
31683256 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.137626985 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
125268408 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.755199825 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:47:57 AM UTC 24 |
93211325 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.1321081391 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:58 AM UTC 24 |
1401126547 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4285526320 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:58 AM UTC 24 |
873564591 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.405661605 |
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Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:47:58 AM UTC 24 |
855510476 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.4012670136 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
246729302 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.182110820 |
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Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
1625345693 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.1458167260 |
|
|
Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
78137594 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.2519370528 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
60865468 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.3448218506 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
50879672 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3849461809 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
52770419 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.197549373 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
288093299 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.2649967077 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
108648965 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.945107454 |
|
|
Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
46106388 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.2263780070 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
45979176 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.1905491861 |
|
|
Aug 25 06:47:59 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
76604713 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.4269725731 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:00 AM UTC 24 |
73901128 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.1728537824 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
32427569 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.2738000096 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
144303131 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.3882471143 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
290313644 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.556048638 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
114156355 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.2938230470 |
|
|
Aug 25 06:47:22 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
11549818323 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1351759430 |
|
|
Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
303885902 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.3365802365 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
65457904 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.654372286 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
1083898115 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.2377553335 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:01 AM UTC 24 |
317994432 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.3225658087 |
|
|
Aug 25 06:47:59 AM UTC 24 |
Aug 25 06:48:02 AM UTC 24 |
866900362 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.865076523 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:02 AM UTC 24 |
1315550545 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.42650022 |
|
|
Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:02 AM UTC 24 |
1313215311 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1064456709 |
|
|
Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:03 AM UTC 24 |
835296345 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.3805256580 |
|
|
Aug 25 06:47:53 AM UTC 24 |
Aug 25 06:48:03 AM UTC 24 |
4610206595 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.1821673707 |
|
|
Aug 25 06:47:46 AM UTC 24 |
Aug 25 06:48:04 AM UTC 24 |
4980163852 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.1039098137 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
105133273 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.1493243758 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
156679089 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.965014226 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
31864530 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.430199739 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
116967089 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.298346932 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
60008113 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.2874357551 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
30298179 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.1287006892 |
|
|
Aug 25 06:48:02 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
32317180 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.657644118 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:05 AM UTC 24 |
180251565 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.3477112157 |
|
|
Aug 25 06:47:26 AM UTC 24 |
Aug 25 06:48:06 AM UTC 24 |
8316793836 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.2479295586 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:06 AM UTC 24 |
64360885 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.26071877 |
|
|
Aug 25 06:48:02 AM UTC 24 |
Aug 25 06:48:06 AM UTC 24 |
209310117 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.2202170471 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:06 AM UTC 24 |
67256219 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.4271417351 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:06 AM UTC 24 |
155595059 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3179285619 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:06 AM UTC 24 |
1858623304 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.55770534 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:08 AM UTC 24 |
888999119 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.3360488352 |
|
|
Aug 25 06:48:01 AM UTC 24 |
Aug 25 06:48:10 AM UTC 24 |
41284668 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.3329812035 |
|
|
Aug 25 06:48:06 AM UTC 24 |
Aug 25 06:48:10 AM UTC 24 |
36953163 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.24044151 |
|
|
Aug 25 06:48:05 AM UTC 24 |
Aug 25 06:48:10 AM UTC 24 |
87314998 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.2106788031 |
|
|
Aug 25 06:48:05 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
88106236 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.3675112336 |
|
|
Aug 25 06:48:05 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
155152984 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.2220716644 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
107664369 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.4216869931 |
|
|
Aug 25 06:48:05 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
596969156 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.3276691906 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
61406924 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.2811304403 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
78708461 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.3486325700 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
81341571 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.3236932377 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:11 AM UTC 24 |
92978747 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.3123154594 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
54710483 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.3189507914 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
103428415 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.1997943109 |
|
|
Aug 25 06:48:08 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
249885126 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.1384132193 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
29519896 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.3598489324 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:14 AM UTC 24 |
2414294706 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.1829153047 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
41967525 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.3066570574 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
281393026 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.2545846564 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
70016559 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.3749655369 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
356567647 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.2922069707 |
|
|
Aug 25 06:48:00 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
32359578 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.2905630302 |
|
|
Aug 25 06:47:58 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
272657652 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.726435026 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
62835720 ps |
T64 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.2627409463 |
|
|
Aug 25 06:47:55 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
3962010653 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.2633124100 |
|
|
Aug 25 06:48:00 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
74185437 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.945035063 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
50617146 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.2134854091 |
|
|
Aug 25 06:47:56 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
246142883 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.3690358109 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
50539653 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.3265573606 |
|
|
Aug 25 06:48:00 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
370573809 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.3184052865 |
|
|
Aug 25 06:48:10 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
37400194 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.3129050079 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
144789095 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.1408908754 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
160987066 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.189412682 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
289111549 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.3911987178 |
|
|
Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:12 AM UTC 24 |
247527426 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.3715062876 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
25002411 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.2734485764 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
52449045 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.2735219837 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
32513053 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.1396017446 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
19724114 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.3553659889 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
242417557 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.2385480056 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
364250931 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.742389699 |
|
|
Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
267126910 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1684471646 |
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Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:13 AM UTC 24 |
966595069 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.3700505180 |
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Aug 25 06:47:59 AM UTC 24 |
Aug 25 06:48:14 AM UTC 24 |
15129018658 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.525879014 |
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Aug 25 06:48:07 AM UTC 24 |
Aug 25 06:48:15 AM UTC 24 |
831816214 ps |
T802 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.1715032342 |
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Aug 25 06:48:22 AM UTC 24 |
Aug 25 06:48:25 AM UTC 24 |
48093385 ps |
T803 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.1819024699 |
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Aug 25 06:48:22 AM UTC 24 |
Aug 25 06:48:25 AM UTC 24 |
112354645 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_08_24/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.812882476 |
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Aug 25 06:48:03 AM UTC 24 |
Aug 25 06:48:15 AM UTC 24 |
891221352 ps |