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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.62 96.00 96.37 100.00 98.85


Total test records in report: 1076
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T322 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.3871689571 Aug 29 10:53:44 AM UTC 24 Aug 29 10:53:46 AM UTC 24 165240476 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2313432920 Aug 29 10:53:42 AM UTC 24 Aug 29 10:53:47 AM UTC 24 992953860 ps
T324 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.4170776765 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:47 AM UTC 24 29081383 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.545779764 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:47 AM UTC 24 84658425 ps
T326 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.1755798138 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:47 AM UTC 24 39024628 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.4071021027 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:47 AM UTC 24 180301146 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.679806832 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:47 AM UTC 24 55626683 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.117214926 Aug 29 10:53:46 AM UTC 24 Aug 29 10:53:48 AM UTC 24 76555083 ps
T330 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.3581963167 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:48 AM UTC 24 134721013 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.4096530334 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:48 AM UTC 24 179297547 ps
T122 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.839070167 Aug 29 10:53:36 AM UTC 24 Aug 29 10:53:48 AM UTC 24 2898796660 ps
T332 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.283463870 Aug 29 10:53:44 AM UTC 24 Aug 29 10:53:49 AM UTC 24 2212667945 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.1182507849 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:49 AM UTC 24 49443770 ps
T334 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.2032177806 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:49 AM UTC 24 44844951 ps
T335 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.4044428886 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:49 AM UTC 24 147354247 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.1395940750 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:49 AM UTC 24 87976840 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.1661293001 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:49 AM UTC 24 243245966 ps
T338 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.2903953918 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:50 AM UTC 24 306205965 ps
T339 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2798041409 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:50 AM UTC 24 943598808 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3442785644 Aug 29 10:53:45 AM UTC 24 Aug 29 10:53:50 AM UTC 24 1300467865 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.1392908237 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:51 AM UTC 24 32745640 ps
T342 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.1335072460 Aug 29 10:53:48 AM UTC 24 Aug 29 10:53:51 AM UTC 24 39915343 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.1570950662 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:51 AM UTC 24 141800166 ps
T344 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.105352642 Aug 29 10:53:48 AM UTC 24 Aug 29 10:53:51 AM UTC 24 269531424 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.3941861204 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:51 AM UTC 24 35026692 ps
T346 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.607123365 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:51 AM UTC 24 32468210 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.2080736565 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:51 AM UTC 24 72787749 ps
T348 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.4168660899 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:51 AM UTC 24 113176674 ps
T349 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.2428539747 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:52 AM UTC 24 43264337 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.58053343 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:52 AM UTC 24 50371153 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.2989520327 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:52 AM UTC 24 40313172 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1641287719 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:52 AM UTC 24 1196934194 ps
T352 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.440276995 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:53 AM UTC 24 136606426 ps
T353 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.3229301091 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:53 AM UTC 24 101540986 ps
T354 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.2343411750 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:53 AM UTC 24 55161956 ps
T355 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.471318861 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:53 AM UTC 24 54869914 ps
T356 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.4291866725 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:53 AM UTC 24 99343734 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.397052423 Aug 29 10:53:51 AM UTC 24 Aug 29 10:53:53 AM UTC 24 47858366 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2226943549 Aug 29 10:53:49 AM UTC 24 Aug 29 10:53:54 AM UTC 24 871513720 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.3144485412 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 28938873 ps
T360 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.2619600733 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 105434573 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.2855382002 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 41036981 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.1327295131 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 24692065 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.3586640109 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 110716101 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.3502891925 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 42957975 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.1020694383 Aug 29 10:53:44 AM UTC 24 Aug 29 10:53:54 AM UTC 24 6335953172 ps
T365 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.2071207783 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:54 AM UTC 24 111059034 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.2220309612 Aug 29 10:53:47 AM UTC 24 Aug 29 10:53:55 AM UTC 24 2656704932 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.871529305 Aug 29 10:53:54 AM UTC 24 Aug 29 10:53:56 AM UTC 24 165426201 ps
T367 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.2670621206 Aug 29 10:53:53 AM UTC 24 Aug 29 10:53:55 AM UTC 24 123903606 ps
T368 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.632681821 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:55 AM UTC 24 1430929459 ps
T369 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.3829425667 Aug 29 10:53:53 AM UTC 24 Aug 29 10:53:55 AM UTC 24 70588332 ps
T370 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.3452806394 Aug 29 10:53:53 AM UTC 24 Aug 29 10:53:55 AM UTC 24 30979161 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.3569673143 Aug 29 10:53:54 AM UTC 24 Aug 29 10:53:56 AM UTC 24 21215142 ps
T371 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.831549219 Aug 29 10:53:54 AM UTC 24 Aug 29 10:53:56 AM UTC 24 272799654 ps
T372 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.2414191733 Aug 29 10:53:54 AM UTC 24 Aug 29 10:53:56 AM UTC 24 210941752 ps
T373 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.793908390 Aug 29 10:53:53 AM UTC 24 Aug 29 10:53:57 AM UTC 24 798190347 ps
T374 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3171844357 Aug 29 10:53:52 AM UTC 24 Aug 29 10:53:57 AM UTC 24 939516698 ps
T375 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.3665103901 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:57 AM UTC 24 28304739 ps
T376 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.916433068 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:57 AM UTC 24 34815030 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.3504498106 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:57 AM UTC 24 44321742 ps
T378 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.3290111459 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:58 AM UTC 24 69434944 ps
T379 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.652875059 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:58 AM UTC 24 55390678 ps
T380 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.1053355006 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:58 AM UTC 24 114348762 ps
T381 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.1644539877 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:58 AM UTC 24 253212632 ps
T382 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4220488727 Aug 29 10:53:55 AM UTC 24 Aug 29 10:53:59 AM UTC 24 1048411373 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.2597093560 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:59 AM UTC 24 1997464540 ps
T383 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.3760457160 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 38676647 ps
T384 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.242402820 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 44321278 ps
T385 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.99680415 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 36172947 ps
T386 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.1819982052 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 77289114 ps
T387 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.1617291412 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 33191960 ps
T76 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.3429335214 Aug 29 10:53:39 AM UTC 24 Aug 29 10:53:59 AM UTC 24 7111482765 ps
T388 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.497745269 Aug 29 10:53:53 AM UTC 24 Aug 29 10:53:59 AM UTC 24 2349106032 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.1360274078 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 60930683 ps
T390 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.1207406413 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 218979734 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.152905277 Aug 29 10:53:50 AM UTC 24 Aug 29 10:53:59 AM UTC 24 7316102281 ps
T391 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.2327790325 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 520634187 ps
T392 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.2627114798 Aug 29 10:53:57 AM UTC 24 Aug 29 10:53:59 AM UTC 24 112074663 ps
T393 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1544828065 Aug 29 10:53:55 AM UTC 24 Aug 29 10:54:00 AM UTC 24 1267214272 ps
T394 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.4087347511 Aug 29 10:53:58 AM UTC 24 Aug 29 10:54:00 AM UTC 24 39003861 ps
T395 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.1511626109 Aug 29 10:53:59 AM UTC 24 Aug 29 10:54:00 AM UTC 24 48706636 ps
T396 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.2929798437 Aug 29 10:53:58 AM UTC 24 Aug 29 10:54:00 AM UTC 24 66000975 ps
T397 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.1697692739 Aug 29 10:53:59 AM UTC 24 Aug 29 10:54:01 AM UTC 24 37526610 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.136503998 Aug 29 10:53:59 AM UTC 24 Aug 29 10:54:01 AM UTC 24 68356387 ps
T398 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.2822604161 Aug 29 10:53:59 AM UTC 24 Aug 29 10:54:01 AM UTC 24 149919463 ps
T399 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.74743078 Aug 29 10:53:59 AM UTC 24 Aug 29 10:54:01 AM UTC 24 958423370 ps
T400 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.20760445 Aug 29 10:53:58 AM UTC 24 Aug 29 10:54:01 AM UTC 24 157784818 ps
T401 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1557605504 Aug 29 10:53:58 AM UTC 24 Aug 29 10:54:02 AM UTC 24 1036243685 ps
T402 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.771082845 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:02 AM UTC 24 39859625 ps
T403 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.3995237231 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:02 AM UTC 24 203754439 ps
T404 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.3601801137 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:02 AM UTC 24 37568100 ps
T405 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3812717523 Aug 29 10:53:58 AM UTC 24 Aug 29 10:54:02 AM UTC 24 1189847747 ps
T406 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.1966094275 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:02 AM UTC 24 96554143 ps
T407 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.2044171895 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:02 AM UTC 24 43289203 ps
T408 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.570092119 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:02 AM UTC 24 78352009 ps
T409 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.2755506551 Aug 29 10:54:01 AM UTC 24 Aug 29 10:54:02 AM UTC 24 21239362 ps
T410 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.1380829152 Aug 29 10:54:01 AM UTC 24 Aug 29 10:54:03 AM UTC 24 29709636 ps
T411 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.629444634 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:03 AM UTC 24 244324276 ps
T412 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.2840103250 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:03 AM UTC 24 370520173 ps
T413 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.590442096 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:03 AM UTC 24 64520035 ps
T414 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.3628193587 Aug 29 10:54:01 AM UTC 24 Aug 29 10:54:03 AM UTC 24 141244906 ps
T415 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.38002224 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 108329187 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.717085413 Aug 29 10:53:47 AM UTC 24 Aug 29 10:54:04 AM UTC 24 9473228429 ps
T416 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.1990367038 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 71794646 ps
T417 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.3814877800 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 62014278 ps
T418 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.3260997386 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 78677232 ps
T419 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.4250183342 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 113701437 ps
T420 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.1539011228 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 32518327 ps
T421 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.3796706381 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:04 AM UTC 24 107279306 ps
T422 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.3188169666 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:05 AM UTC 24 422036638 ps
T423 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1173182919 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:05 AM UTC 24 727287897 ps
T424 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3981520048 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:05 AM UTC 24 808090487 ps
T425 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.3304784476 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:05 AM UTC 24 101057152 ps
T426 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1323279389 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 40253285 ps
T427 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.2513289333 Aug 29 10:54:03 AM UTC 24 Aug 29 10:54:06 AM UTC 24 145497131 ps
T428 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.3009349393 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 69511352 ps
T429 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.2411507106 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 93022383 ps
T430 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.3184209656 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 40788839 ps
T431 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3981617197 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 71707474 ps
T432 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.502403559 Aug 29 10:54:03 AM UTC 24 Aug 29 10:54:06 AM UTC 24 272761220 ps
T433 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.3582133596 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 46193235 ps
T434 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.2471955729 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 61360712 ps
T435 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.3705569825 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 108314988 ps
T436 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.320411606 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 425697158 ps
T437 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.1066567792 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:06 AM UTC 24 91170008 ps
T438 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.551523871 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:07 AM UTC 24 1861859693 ps
T439 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4036443394 Aug 29 10:54:04 AM UTC 24 Aug 29 10:54:07 AM UTC 24 880548325 ps
T440 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.3218198686 Aug 29 10:54:05 AM UTC 24 Aug 29 10:54:07 AM UTC 24 31534537 ps
T441 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.3913383642 Aug 29 10:54:05 AM UTC 24 Aug 29 10:54:08 AM UTC 24 122282848 ps
T442 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.3891659236 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:08 AM UTC 24 37745314 ps
T443 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.3522948544 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:08 AM UTC 24 104326900 ps
T444 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.1365716534 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:08 AM UTC 24 292661221 ps
T445 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.1033137817 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:08 AM UTC 24 51924507 ps
T446 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.2077200360 Aug 29 10:54:00 AM UTC 24 Aug 29 10:54:08 AM UTC 24 2041935896 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.3386427756 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:08 AM UTC 24 43918180 ps
T448 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.895605534 Aug 29 10:54:05 AM UTC 24 Aug 29 10:54:08 AM UTC 24 1001395361 ps
T449 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.1580526499 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:08 AM UTC 24 257539109 ps
T450 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.3278805017 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 64866783 ps
T451 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.3207726884 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 50755482 ps
T452 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.3289999155 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:17 AM UTC 24 1172074958 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.3452800059 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 57509660 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.998893986 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:09 AM UTC 24 1255480139 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.2416160351 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 375485122 ps
T159 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.2203618206 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 57821436 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.1174434497 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 29647408 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.1400602278 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 68410208 ps
T458 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.1909905115 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 165728759 ps
T459 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.3445813816 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 143901646 ps
T460 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.2076897579 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:09 AM UTC 24 216272375 ps
T461 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1082995156 Aug 29 10:54:06 AM UTC 24 Aug 29 10:54:10 AM UTC 24 941703540 ps
T462 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.1946893756 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:10 AM UTC 24 103772915 ps
T77 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.609429874 Aug 29 10:53:57 AM UTC 24 Aug 29 10:54:10 AM UTC 24 4244909454 ps
T463 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.2581952419 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:10 AM UTC 24 220645081 ps
T464 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.2981527854 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 34319712 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.3453445010 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 37494143 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.218330568 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 95788198 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.822629850 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 345172379 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.1603220700 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 49985235 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.2892274938 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 145914396 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.3222096290 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 170776988 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.1826835512 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 205421828 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.2613910187 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 80154224 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.1545204079 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:11 AM UTC 24 163522614 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.2604819944 Aug 29 10:54:05 AM UTC 24 Aug 29 10:54:11 AM UTC 24 1614682593 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1950460173 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:12 AM UTC 24 1339822964 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.3480488805 Aug 29 10:54:02 AM UTC 24 Aug 29 10:54:12 AM UTC 24 6016476832 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.1676199549 Aug 29 10:54:10 AM UTC 24 Aug 29 10:54:13 AM UTC 24 41492071 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.3573570939 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 40501712 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.3952052281 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 31668027 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.1463584377 Aug 29 10:54:10 AM UTC 24 Aug 29 10:54:13 AM UTC 24 90662645 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.2908980310 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 59295048 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.1045837522 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 91028186 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.83599284 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 138963713 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.922546875 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 226222998 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.1039212743 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 118674291 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.1505295284 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:13 AM UTC 24 3952649235 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1391316157 Aug 29 10:54:09 AM UTC 24 Aug 29 10:54:13 AM UTC 24 835611710 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.3999642342 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 376371502 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.1079020092 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 159354131 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.2572185127 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:13 AM UTC 24 110479783 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.3319242376 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 60575547 ps
T491 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.316492024 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:14 AM UTC 24 912408435 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.3516879636 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 33544492 ps
T493 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.3583327534 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 79915408 ps
T494 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.625047054 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 43250322 ps
T495 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.569104006 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 25884883 ps
T496 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.2683955115 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 143810478 ps
T497 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.4115237375 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:14 AM UTC 24 174451353 ps
T498 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.2746638736 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:15 AM UTC 24 52501158 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.1291329542 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:15 AM UTC 24 344729898 ps
T500 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1205231255 Aug 29 10:54:11 AM UTC 24 Aug 29 10:54:15 AM UTC 24 816003935 ps
T501 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.940859491 Aug 29 10:54:14 AM UTC 24 Aug 29 10:54:16 AM UTC 24 24828714 ps
T502 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.3560534748 Aug 29 10:54:14 AM UTC 24 Aug 29 10:54:16 AM UTC 24 39070734 ps
T503 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.2472552221 Aug 29 10:54:14 AM UTC 24 Aug 29 10:54:16 AM UTC 24 95279149 ps
T504 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.1273181944 Aug 29 10:54:14 AM UTC 24 Aug 29 10:54:16 AM UTC 24 23416050 ps
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T510 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.859618242 Aug 29 10:54:14 AM UTC 24 Aug 29 10:54:16 AM UTC 24 185789880 ps
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T514 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2475768543 Aug 29 10:54:12 AM UTC 24 Aug 29 10:54:16 AM UTC 24 1111372873 ps
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T518 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.3907443294 Aug 29 10:54:16 AM UTC 24 Aug 29 10:54:18 AM UTC 24 171554325 ps
T519 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.2880939631 Aug 29 10:54:15 AM UTC 24 Aug 29 10:54:18 AM UTC 24 430523953 ps
T520 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.2149543288 Aug 29 10:54:16 AM UTC 24 Aug 29 10:54:18 AM UTC 24 169614010 ps
T521 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2255472767 Aug 29 10:54:15 AM UTC 24 Aug 29 10:54:19 AM UTC 24 1175811547 ps
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T523 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3800027648 Aug 29 10:54:15 AM UTC 24 Aug 29 10:54:19 AM UTC 24 1050486679 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1810362960 Aug 29 10:54:07 AM UTC 24 Aug 29 10:54:20 AM UTC 24 8780955578 ps
T524 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.146964220 Aug 29 10:54:16 AM UTC 24 Aug 29 10:54:20 AM UTC 24 54210918 ps
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T527 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.1337167074 Aug 29 10:54:16 AM UTC 24 Aug 29 10:54:21 AM UTC 24 101973082 ps
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T529 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.415781684 Aug 29 10:54:16 AM UTC 24 Aug 29 10:54:21 AM UTC 24 121044825 ps
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T536 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.2077521600 Aug 29 10:54:27 AM UTC 24 Aug 29 10:54:42 AM UTC 24 114367732 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.1206168370 Aug 29 10:54:19 AM UTC 24 Aug 29 10:54:42 AM UTC 24 41604454 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.2357826968 Aug 29 10:54:19 AM UTC 24 Aug 29 10:54:42 AM UTC 24 46772575 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.1244751238 Aug 29 10:54:19 AM UTC 24 Aug 29 10:54:42 AM UTC 24 33666186 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.1224212487 Aug 29 10:54:19 AM UTC 24 Aug 29 10:54:42 AM UTC 24 105236588 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.943425633 Aug 29 10:54:19 AM UTC 24 Aug 29 10:54:43 AM UTC 24 585956845 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.2130901798 Aug 29 10:54:19 AM UTC 24 Aug 29 10:54:45 AM UTC 24 1783932393 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.2537823840 Aug 29 10:54:18 AM UTC 24 Aug 29 10:54:45 AM UTC 24 81241255 ps
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T545 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.1595459001 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:46 AM UTC 24 33625175 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.2676125232 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:46 AM UTC 24 456272261 ps
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T548 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.3919686568 Aug 29 10:54:44 AM UTC 24 Aug 29 10:54:46 AM UTC 24 36169152 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.3404974530 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:46 AM UTC 24 402483618 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.2376477404 Aug 29 10:54:21 AM UTC 24 Aug 29 10:54:46 AM UTC 24 92755834 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.123128304 Aug 29 10:54:41 AM UTC 24 Aug 29 10:54:46 AM UTC 24 277495637 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.2819113264 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:46 AM UTC 24 566787680 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.1617814345 Aug 29 10:54:18 AM UTC 24 Aug 29 10:54:46 AM UTC 24 29306162 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.3475234921 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:46 AM UTC 24 295114770 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.3937857132 Aug 29 10:54:22 AM UTC 24 Aug 29 10:54:46 AM UTC 24 55914600 ps
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