| T799 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.3975554378 |
|
|
Aug 29 10:55:43 AM UTC 24 |
Aug 29 10:55:52 AM UTC 24 |
46044158 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.3903669629 |
|
|
Aug 29 10:55:43 AM UTC 24 |
Aug 29 10:55:52 AM UTC 24 |
102519053 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.4128231848 |
|
|
Aug 29 10:55:21 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
45992503 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.284275389 |
|
|
Aug 29 10:55:21 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
65396828 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.1776696050 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
59510714 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.2475060032 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
50072765 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.2853345922 |
|
|
Aug 29 10:55:21 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
86519178 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.3203354994 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
33327953 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.3944825908 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
32497300 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.3301421420 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
53396008 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.664113614 |
|
|
Aug 29 10:55:51 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
179371651 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.1775185339 |
|
|
Aug 29 10:55:51 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
107480496 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.3586244830 |
|
|
Aug 29 10:55:51 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
71488891 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.2334392655 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
301564381 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.1791220144 |
|
|
Aug 29 10:55:52 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
69794123 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.2980325621 |
|
|
Aug 29 10:55:52 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
145819513 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.1380916130 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:53 AM UTC 24 |
250981907 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.3956858014 |
|
|
Aug 29 10:55:52 AM UTC 24 |
Aug 29 10:55:54 AM UTC 24 |
192223661 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.1483283270 |
|
|
Aug 29 10:55:42 AM UTC 24 |
Aug 29 10:55:54 AM UTC 24 |
113385032 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3340919562 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:54 AM UTC 24 |
1175071569 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2873907717 |
|
|
Aug 29 10:55:48 AM UTC 24 |
Aug 29 10:55:55 AM UTC 24 |
798740969 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.2147209246 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:55 AM UTC 24 |
102559473 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.911143131 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:55 AM UTC 24 |
123582921 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.2135871477 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:05 AM UTC 24 |
38326452 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.1884500430 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
93497508 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.1700766495 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
29419991 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_smoke.3346406933 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
25507348 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.3230202834 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
114517189 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.776444546 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
76025006 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.2925309051 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
95717308 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.3711175009 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
82935075 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.39562485 |
|
|
Aug 29 10:55:33 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
5647720036 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.4073399318 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
31039802 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.141008711 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
209294883 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.1473135456 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
33093704 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.2051911480 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:05 AM UTC 24 |
61011295 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.2379677778 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
148041653 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.1077601537 |
|
|
Aug 29 10:54:46 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
107275937 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_global_esc.334090672 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
49982046 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.2005990790 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
202879161 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.3768750855 |
|
|
Aug 29 10:55:51 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
4337750304 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.2937283286 |
|
|
Aug 29 10:55:55 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
71371327 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.2076065012 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
343295698 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.980997195 |
|
|
Aug 29 10:55:55 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
73662084 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.3184196269 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
117469483 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.1769363386 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
190125628 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.2565632244 |
|
|
Aug 29 10:55:24 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
2231394653 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.2609207821 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
111918545 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.745094210 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
325172207 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.3565303388 |
|
|
Aug 29 10:55:37 AM UTC 24 |
Aug 29 10:55:56 AM UTC 24 |
4800200460 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.470288605 |
|
|
Aug 29 10:55:42 AM UTC 24 |
Aug 29 10:55:57 AM UTC 24 |
981088890 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.539071841 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:57 AM UTC 24 |
93813209 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1522875797 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:57 AM UTC 24 |
1385606451 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4191109354 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:57 AM UTC 24 |
1018174295 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3609615729 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:57 AM UTC 24 |
1029571488 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3851163617 |
|
|
Aug 29 10:55:53 AM UTC 24 |
Aug 29 10:55:57 AM UTC 24 |
1081540734 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.3302372405 |
|
|
Aug 29 10:55:23 AM UTC 24 |
Aug 29 10:55:58 AM UTC 24 |
11804015066 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.2120877888 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:55:59 AM UTC 24 |
930173646 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.1034068287 |
|
|
Aug 29 10:55:51 AM UTC 24 |
Aug 29 10:55:59 AM UTC 24 |
2762319252 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_glitch.459887870 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:01 AM UTC 24 |
29539509 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_escalation_timeout.3689946699 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:01 AM UTC 24 |
120781796 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.637611880 |
|
|
Aug 29 10:55:47 AM UTC 24 |
Aug 29 10:56:01 AM UTC 24 |
3144671510 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.2511192638 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
28924616 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_global_esc.447751871 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
171628008 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3095017838 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
53827563 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.31169253 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
163152527 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.413163074 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
46243743 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.123746698 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:05 AM UTC 24 |
166760811 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_disable_rom_integrity_check.1951780901 |
|
|
Aug 29 10:56:00 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
71474750 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.328128566 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
23966766 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.295825375 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
40988110 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.1009930797 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
277399855 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.3723759174 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
47887956 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.2828797350 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:02 AM UTC 24 |
268958931 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.1767834282 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:03 AM UTC 24 |
436280281 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all_with_rand_reset.3742546730 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:56:03 AM UTC 24 |
4409674034 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3563109911 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:03 AM UTC 24 |
3551146752 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2275016634 |
|
|
Aug 29 10:55:59 AM UTC 24 |
Aug 29 10:56:04 AM UTC 24 |
837076917 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4005933302 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:05 AM UTC 24 |
858597268 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup.1253537000 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
111528436 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.257687698 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
181354303 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset.2940859622 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
93879254 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_aborted_low_power.3561205481 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
90973364 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup_reset.3930910756 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
298274497 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.2268132185 |
|
|
Aug 29 10:56:01 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
286470235 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.2661774743 |
|
|
Aug 29 10:56:01 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
124302037 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.949358233 |
|
|
Aug 29 10:56:04 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
47097313 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.2523940359 |
|
|
Aug 29 10:56:04 AM UTC 24 |
Aug 29 10:56:06 AM UTC 24 |
207074702 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.197777760 |
|
|
Aug 29 10:56:04 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
146470155 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.2673461519 |
|
|
Aug 29 10:56:05 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
58878855 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.1796493497 |
|
|
Aug 29 10:56:04 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
368655828 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.1063671691 |
|
|
Aug 29 10:56:04 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
396533174 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.3439835453 |
|
|
Aug 29 10:55:54 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
150595517 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.2140408069 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
278139056 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.2226805557 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
52771697 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.1760030546 |
|
|
Aug 29 10:56:05 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
63266082 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.2634057442 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
64359049 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.993704614 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
29711735 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.3326436607 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
127171096 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.569085451 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
66090270 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.2879878881 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
1828934672 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.4097951413 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:07 AM UTC 24 |
74452629 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.3955135848 |
|
|
Aug 29 10:55:42 AM UTC 24 |
Aug 29 10:56:08 AM UTC 24 |
7221437940 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1968027455 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:08 AM UTC 24 |
779300331 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3331107751 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:08 AM UTC 24 |
1054806924 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3017855605 |
|
|
Aug 29 10:55:32 AM UTC 24 |
Aug 29 10:56:09 AM UTC 24 |
818246187 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.1369197899 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
33790564 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.2195606754 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
63158151 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.505885942 |
|
|
Aug 29 10:55:56 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
46067080 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.4154283489 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
62434602 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.2802189569 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
317229999 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.944526123 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
28443310 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.733145490 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
135744455 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.1922630372 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
41136648 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.3915717496 |
|
|
Aug 29 10:55:56 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
105406726 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.970805465 |
|
|
Aug 29 10:56:09 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
48523078 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.975711615 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
290077935 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.3518155038 |
|
|
Aug 29 10:56:09 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
59994103 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.95932325 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
33373503 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.749183646 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
87746074 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.2134083767 |
|
|
Aug 29 10:56:09 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
93529571 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.139280453 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
407927894 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.3937462253 |
|
|
Aug 29 10:56:09 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
205722136 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.3529945169 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
26747316 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.2194109196 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
638666038 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all_with_rand_reset.2683420696 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
3198343946 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.181354919 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:11 AM UTC 24 |
67803734 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.3673217373 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:12 AM UTC 24 |
1032556163 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.2171510807 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:12 AM UTC 24 |
313289417 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.4111610960 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:12 AM UTC 24 |
281094788 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3680939772 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:12 AM UTC 24 |
1006044065 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.1857036807 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
194792659 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.2919902556 |
|
|
Aug 29 10:55:56 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
1987988353 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.2097954606 |
|
|
Aug 29 10:55:58 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
402384447 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.700065624 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
1368274568 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.3218069569 |
|
|
Aug 29 10:56:10 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
103021598 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.3324269964 |
|
|
Aug 29 10:55:57 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
153066479 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1095387464 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
912425801 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.384731208 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:13 AM UTC 24 |
812305743 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.961475252 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:15 AM UTC 24 |
31408525 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.492350686 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
65076286 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.1189764550 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
48158377 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.1592493224 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
107169470 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.1845234568 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
203261851 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.988626292 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
37813629 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.1790472103 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
110714893 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.937666823 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
47048381 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.2944571217 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
23404956 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.2181223952 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
107991389 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.259972375 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
56850950 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.1805807077 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
43947179 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.700371481 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
94598527 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.2942546234 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
75237984 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.3178192746 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
156810463 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all_with_rand_reset.3506509687 |
|
|
Aug 29 10:56:06 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
4589455141 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.3058267023 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:18 AM UTC 24 |
702846494 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.2173381848 |
|
|
Aug 29 10:56:03 AM UTC 24 |
Aug 29 10:56:21 AM UTC 24 |
7842153801 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.3083008730 |
|
|
Aug 29 10:55:56 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
4633771713 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.2849419490 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:28 AM UTC 24 |
24454027473 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.2468739614 |
|
|
Aug 29 10:56:08 AM UTC 24 |
Aug 29 10:56:29 AM UTC 24 |
4120669334 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.1204931512 |
|
|
Aug 29 10:54:46 AM UTC 24 |
Aug 29 10:56:58 AM UTC 24 |
70799984 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_intr_test.410853894 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
16317395 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_rw.1232099369 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:16 AM UTC 24 |
53647674 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.3041337159 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
34493325 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.4085019280 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
184650025 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.16122188 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
326444538 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.2704568047 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
61332585 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.3451664362 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
50477595 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.3901380885 |
|
|
Aug 29 10:56:15 AM UTC 24 |
Aug 29 10:56:17 AM UTC 24 |
194129784 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_errors.2971393944 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:18 AM UTC 24 |
155742983 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.3074987794 |
|
|
Aug 29 10:56:13 AM UTC 24 |
Aug 29 10:56:18 AM UTC 24 |
157885618 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.4022777018 |
|
|
Aug 29 10:56:14 AM UTC 24 |
Aug 29 10:56:19 AM UTC 24 |
1100198875 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.848542800 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
20577596 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.426343994 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
59925818 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.999699305 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
39008239 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_intr_test.2228707340 |
|
|
Aug 29 10:56:47 AM UTC 24 |
Aug 29 10:56:55 AM UTC 24 |
52992744 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.1597270355 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
367739868 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.1270630834 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
52879343 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.1284745849 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
26079027 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.2478349686 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
32416926 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.3207343847 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
45914545 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.3015707166 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
46379433 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.1501721065 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
23740692 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.4167675858 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
115793305 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.996061954 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
31640552 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.1178783653 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
81043483 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.2611828241 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
38627032 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.712661206 |
|
|
Aug 29 10:56:18 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
26602038 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.952052644 |
|
|
Aug 29 10:56:18 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
35610784 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.3116794820 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
61325260 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.110724128 |
|
|
Aug 29 10:56:18 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
20397974 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.3216006440 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
114929694 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.3536783747 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:22 AM UTC 24 |
40991144 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.29549025 |
|
|
Aug 29 10:56:18 AM UTC 24 |
Aug 29 10:56:23 AM UTC 24 |
32630822 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.2581035883 |
|
|
Aug 29 10:56:19 AM UTC 24 |
Aug 29 10:56:23 AM UTC 24 |
47302573 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.1817688088 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:23 AM UTC 24 |
137791158 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.3578282425 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:23 AM UTC 24 |
247121883 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.1373088623 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:23 AM UTC 24 |
395706711 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.2336814641 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:24 AM UTC 24 |
567671841 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.4098106219 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:24 AM UTC 24 |
150013862 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.3505106427 |
|
|
Aug 29 10:56:18 AM UTC 24 |
Aug 29 10:56:24 AM UTC 24 |
312923167 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.414119404 |
|
|
Aug 29 10:56:17 AM UTC 24 |
Aug 29 10:56:24 AM UTC 24 |
785910697 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.906004150 |
|
|
Aug 29 10:56:20 AM UTC 24 |
Aug 29 10:56:24 AM UTC 24 |
4361336523 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_intr_test.2553809562 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:46 AM UTC 24 |
57984476 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.3741154049 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:46 AM UTC 24 |
52564364 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_rw.1385831420 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:46 AM UTC 24 |
20798361 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.2556282208 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:46 AM UTC 24 |
41533835 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_intr_test.3799257380 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:46 AM UTC 24 |
20117100 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.457680700 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
26771005 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_rw.933623071 |
|
|
Aug 29 10:56:25 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
63689359 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.996656213 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
37977838 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.1896244810 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
108125881 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.3155681190 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
155094872 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_errors.2388653684 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
66773898 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_tl_intg_err.3627592455 |
|
|
Aug 29 10:56:37 AM UTC 24 |
Aug 29 10:56:47 AM UTC 24 |
195581175 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_errors.4122129710 |
|
|
Aug 29 10:56:24 AM UTC 24 |
Aug 29 10:56:48 AM UTC 24 |
143135845 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_intr_test.3552391286 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:51 AM UTC 24 |
48278759 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_intr_test.2717566920 |
|
|
Aug 29 10:56:49 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
19503044 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_rw.2724776103 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
19957241 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.1130535190 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
42657351 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.2065314891 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
21793458 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.573133312 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
37623852 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_intr_test.254601680 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
51031498 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.2107378624 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
25154876 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.1440600352 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
38411334 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.192757493 |
|
|
Aug 29 10:56:49 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
272381878 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_errors.3491320213 |
|
|
Aug 29 10:56:49 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
115177690 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.3846479185 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:52 AM UTC 24 |
1865920139 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_errors.567787362 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:53 AM UTC 24 |
75416374 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_errors.3019631732 |
|
|
Aug 29 10:56:23 AM UTC 24 |
Aug 29 10:56:53 AM UTC 24 |
101003736 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_intr_test.3945562216 |
|
|
Aug 29 10:56:48 AM UTC 24 |
Aug 29 10:56:55 AM UTC 24 |
25192802 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.1123841746 |
|
|
Aug 29 10:56:47 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
53663504 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_rw.1243211764 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
107998860 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_rw.1532052684 |
|
|
Aug 29 10:56:48 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
19781818 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.3520645943 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
26758760 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_intr_test.3941985730 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
62506013 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_rw.3165609393 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
42713003 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_intr_test.70206154 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
136642866 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.2913066326 |
|
|
Aug 29 10:56:54 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
241192957 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_rw.4186660264 |
|
|
Aug 29 10:56:52 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
53727784 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.1833644167 |
|
|
Aug 29 10:56:48 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
359817581 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.1647707203 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
40830920 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.1694283444 |
|
|
Aug 29 10:56:25 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
18808906 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.2851990943 |
|
|
Aug 29 10:56:48 AM UTC 24 |
Aug 29 10:56:56 AM UTC 24 |
21915815 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.1154398283 |
|
|
Aug 29 10:56:48 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
62958735 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.3011981562 |
|
|
Aug 29 10:56:25 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
57582186 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_intg_err.2758327798 |
|
|
Aug 29 10:56:25 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
227871663 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_mem_rw_with_rand_reset.2388180642 |
|
|
Aug 29 10:56:52 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
40856203 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.330942861 |
|
|
Aug 29 10:56:53 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
1696665317 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_errors.583820954 |
|
|
Aug 29 10:56:25 AM UTC 24 |
Aug 29 10:56:57 AM UTC 24 |
30361022 ps |