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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.62 96.00 96.37 100.00 98.85


Total test records in report: 1076
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T556 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.1567894706 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:46 AM UTC 24 749385048 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.4198150785 Aug 29 10:54:21 AM UTC 24 Aug 29 10:54:47 AM UTC 24 134286522 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.3347554239 Aug 29 10:54:21 AM UTC 24 Aug 29 10:54:47 AM UTC 24 220630322 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.465643289 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:48 AM UTC 24 1029549129 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1406400208 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:48 AM UTC 24 892989754 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.359850860 Aug 29 10:54:17 AM UTC 24 Aug 29 10:54:50 AM UTC 24 2204629011 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.2670583476 Aug 29 10:54:48 AM UTC 24 Aug 29 10:54:51 AM UTC 24 79125627 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.599925740 Aug 29 10:54:48 AM UTC 24 Aug 29 10:54:51 AM UTC 24 51963325 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.4144879615 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:51 AM UTC 24 30616677 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.3331145593 Aug 29 10:54:50 AM UTC 24 Aug 29 10:54:51 AM UTC 24 43586710 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.2992586529 Aug 29 10:54:48 AM UTC 24 Aug 29 10:54:51 AM UTC 24 112722343 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.3560031834 Aug 29 10:54:43 AM UTC 24 Aug 29 10:54:51 AM UTC 24 65433352 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.949618878 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:51 AM UTC 24 148791959 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.3108138475 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:51 AM UTC 24 307247268 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.3190870631 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:51 AM UTC 24 123680806 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.2536192426 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:51 AM UTC 24 50375041 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.4250061366 Aug 29 10:54:43 AM UTC 24 Aug 29 10:54:52 AM UTC 24 206994355 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.1795698731 Aug 29 10:54:47 AM UTC 24 Aug 29 10:54:52 AM UTC 24 56663466 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.2753621266 Aug 29 10:54:47 AM UTC 24 Aug 29 10:54:52 AM UTC 24 62231462 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.2874103595 Aug 29 10:54:20 AM UTC 24 Aug 29 10:54:52 AM UTC 24 237637417 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3587921956 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:52 AM UTC 24 1109697860 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.2577152325 Aug 29 10:54:20 AM UTC 24 Aug 29 10:54:53 AM UTC 24 264957836 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.518948816 Aug 29 10:54:47 AM UTC 24 Aug 29 10:54:53 AM UTC 24 291030525 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.1785270666 Aug 29 10:54:47 AM UTC 24 Aug 29 10:54:53 AM UTC 24 508328717 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1280594945 Aug 29 10:54:42 AM UTC 24 Aug 29 10:54:53 AM UTC 24 807033839 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.3543776130 Aug 29 10:54:53 AM UTC 24 Aug 29 10:54:56 AM UTC 24 67097730 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.1857542230 Aug 29 10:54:53 AM UTC 24 Aug 29 10:54:56 AM UTC 24 36659454 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.698316212 Aug 29 10:54:53 AM UTC 24 Aug 29 10:54:56 AM UTC 24 126710718 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.2123895334 Aug 29 10:54:54 AM UTC 24 Aug 29 10:54:56 AM UTC 24 172618842 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.1976143424 Aug 29 10:54:55 AM UTC 24 Aug 29 10:54:56 AM UTC 24 273987276 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.3900698956 Aug 29 10:54:54 AM UTC 24 Aug 29 10:54:56 AM UTC 24 414242168 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.2337154721 Aug 29 10:54:55 AM UTC 24 Aug 29 10:54:56 AM UTC 24 262245848 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.2497559085 Aug 29 10:54:28 AM UTC 24 Aug 29 10:54:57 AM UTC 24 51852544 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.1070110991 Aug 29 10:54:22 AM UTC 24 Aug 29 10:54:57 AM UTC 24 378024459 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.1663002068 Aug 29 10:54:18 AM UTC 24 Aug 29 10:54:57 AM UTC 24 591753541 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.1641721073 Aug 29 10:54:36 AM UTC 24 Aug 29 10:55:01 AM UTC 24 30201608 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.2652391337 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:01 AM UTC 24 28833447 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.4190034672 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:01 AM UTC 24 82501841 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.2940951150 Aug 29 10:54:53 AM UTC 24 Aug 29 10:55:01 AM UTC 24 1736665681 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.2801659290 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:01 AM UTC 24 32294296 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.999917508 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:01 AM UTC 24 79753243 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.4138462330 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:01 AM UTC 24 207258360 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.1958709090 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:01 AM UTC 24 68252295 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.1495704284 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:02 AM UTC 24 26311310 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3831405673 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:02 AM UTC 24 67458644 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.4285975359 Aug 29 10:54:53 AM UTC 24 Aug 29 10:55:03 AM UTC 24 7851666554 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.1595968493 Aug 29 10:55:01 AM UTC 24 Aug 29 10:55:06 AM UTC 24 57981737 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.1671015032 Aug 29 10:55:01 AM UTC 24 Aug 29 10:55:06 AM UTC 24 51270040 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.2474891369 Aug 29 10:55:05 AM UTC 24 Aug 29 10:55:06 AM UTC 24 31617885 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.667753103 Aug 29 10:55:05 AM UTC 24 Aug 29 10:55:06 AM UTC 24 53751473 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.69381817 Aug 29 10:54:22 AM UTC 24 Aug 29 10:55:06 AM UTC 24 48869879 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.1684739767 Aug 29 10:54:18 AM UTC 24 Aug 29 10:55:07 AM UTC 24 92472207 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.3349242668 Aug 29 10:54:58 AM UTC 24 Aug 29 10:55:07 AM UTC 24 53497737 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.1715895776 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:07 AM UTC 24 39510027 ps
T608 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.1513794271 Aug 29 10:54:58 AM UTC 24 Aug 29 10:55:07 AM UTC 24 145292247 ps
T609 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.907447191 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:07 AM UTC 24 30957803 ps
T610 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.2344677538 Aug 29 10:54:58 AM UTC 24 Aug 29 10:55:07 AM UTC 24 111288073 ps
T611 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.1075792096 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:07 AM UTC 24 399534159 ps
T612 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.3709887666 Aug 29 10:55:01 AM UTC 24 Aug 29 10:55:08 AM UTC 24 5032435756 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4247464234 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:08 AM UTC 24 2033342347 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.3689237617 Aug 29 10:54:34 AM UTC 24 Aug 29 10:55:09 AM UTC 24 1021875617 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.711628223 Aug 29 10:55:02 AM UTC 24 Aug 29 10:55:11 AM UTC 24 157918371 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.2285326791 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:11 AM UTC 24 82904872 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.4166468027 Aug 29 10:55:09 AM UTC 24 Aug 29 10:55:11 AM UTC 24 56785222 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.3878271338 Aug 29 10:55:09 AM UTC 24 Aug 29 10:55:11 AM UTC 24 91820653 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3059383195 Aug 29 10:55:02 AM UTC 24 Aug 29 10:55:11 AM UTC 24 1460498239 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.315378343 Aug 29 10:55:03 AM UTC 24 Aug 29 10:55:12 AM UTC 24 1100295422 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.1649607256 Aug 29 10:55:07 AM UTC 24 Aug 29 10:55:12 AM UTC 24 43726320 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.3619148463 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:12 AM UTC 24 81326059 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.3509578700 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:12 AM UTC 24 31687018 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.3651727406 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:12 AM UTC 24 29473878 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.2081872048 Aug 29 10:55:07 AM UTC 24 Aug 29 10:55:12 AM UTC 24 81570066 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.683612337 Aug 29 10:55:07 AM UTC 24 Aug 29 10:55:12 AM UTC 24 96462452 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.1208774128 Aug 29 10:55:07 AM UTC 24 Aug 29 10:55:12 AM UTC 24 179561602 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.1711779157 Aug 29 10:55:07 AM UTC 24 Aug 29 10:55:12 AM UTC 24 1542667259 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.2296402624 Aug 29 10:54:59 AM UTC 24 Aug 29 10:55:12 AM UTC 24 71374586 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1345952112 Aug 29 10:55:09 AM UTC 24 Aug 29 10:55:12 AM UTC 24 974758867 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1607466193 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:13 AM UTC 24 1386043871 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2399479211 Aug 29 10:54:57 AM UTC 24 Aug 29 10:55:13 AM UTC 24 997313970 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2138895250 Aug 29 10:55:10 AM UTC 24 Aug 29 10:55:15 AM UTC 24 881160983 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.738339875 Aug 29 10:55:14 AM UTC 24 Aug 29 10:55:16 AM UTC 24 46065591 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.139500999 Aug 29 10:55:14 AM UTC 24 Aug 29 10:55:16 AM UTC 24 350953955 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.891128091 Aug 29 10:55:11 AM UTC 24 Aug 29 10:55:16 AM UTC 24 28839133 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.2196692248 Aug 29 10:55:11 AM UTC 24 Aug 29 10:55:16 AM UTC 24 53738651 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.4290390489 Aug 29 10:55:14 AM UTC 24 Aug 29 10:55:17 AM UTC 24 42540487 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.463864720 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:17 AM UTC 24 32214831 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.571815492 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:17 AM UTC 24 106142241 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.3599460785 Aug 29 10:55:01 AM UTC 24 Aug 29 10:55:17 AM UTC 24 6528845364 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_wakeup_race.1008938856 Aug 29 10:55:58 AM UTC 24 Aug 29 10:56:06 AM UTC 24 141745204 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.3772478712 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:17 AM UTC 24 46932605 ps
T158 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1100756574 Aug 29 10:54:58 AM UTC 24 Aug 29 10:55:17 AM UTC 24 58149532 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.2521057175 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:17 AM UTC 24 292167494 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.1176088629 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:17 AM UTC 24 338526099 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.2620126091 Aug 29 10:54:38 AM UTC 24 Aug 29 10:55:17 AM UTC 24 126376324 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1095321491 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:17 AM UTC 24 53250334 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.897392507 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:20 AM UTC 24 28959619 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.4120727087 Aug 29 10:55:02 AM UTC 24 Aug 29 10:55:17 AM UTC 24 195418054 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.472933194 Aug 29 10:54:26 AM UTC 24 Aug 29 10:55:17 AM UTC 24 84762933 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.295931613 Aug 29 10:55:06 AM UTC 24 Aug 29 10:55:17 AM UTC 24 125693599 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3812436145 Aug 29 10:55:15 AM UTC 24 Aug 29 10:55:18 AM UTC 24 1006683447 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.3583752437 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:18 AM UTC 24 1065084010 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.667224963 Aug 29 10:55:14 AM UTC 24 Aug 29 10:55:19 AM UTC 24 778259946 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1956252775 Aug 29 10:54:52 AM UTC 24 Aug 29 10:55:19 AM UTC 24 802864948 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.3884024656 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:20 AM UTC 24 90822836 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.2697700809 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:21 AM UTC 24 58334176 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.2986448369 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:21 AM UTC 24 60464312 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.996185967 Aug 29 10:55:08 AM UTC 24 Aug 29 10:55:21 AM UTC 24 1298004719 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.2718033312 Aug 29 10:54:46 AM UTC 24 Aug 29 10:55:21 AM UTC 24 46697322 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.3600354542 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:21 AM UTC 24 126070670 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.2593108895 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:21 AM UTC 24 348747338 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.520536620 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:21 AM UTC 24 30691893 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.1266670932 Aug 29 10:55:18 AM UTC 24 Aug 29 10:55:21 AM UTC 24 68448502 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.1542094264 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:21 AM UTC 24 95933427 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.3588153200 Aug 29 10:55:48 AM UTC 24 Aug 29 10:55:53 AM UTC 24 637044181 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.2098489849 Aug 29 10:55:18 AM UTC 24 Aug 29 10:55:21 AM UTC 24 107919377 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.510119065 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:22 AM UTC 24 123623037 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.4278254512 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:22 AM UTC 24 43347808 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.3455441949 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:22 AM UTC 24 349419822 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.479543282 Aug 29 10:55:20 AM UTC 24 Aug 29 10:55:22 AM UTC 24 30219192 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.692274586 Aug 29 10:55:34 AM UTC 24 Aug 29 10:55:37 AM UTC 24 30380096 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.836441191 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:22 AM UTC 24 169620652 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all.3551669250 Aug 29 10:55:58 AM UTC 24 Aug 29 10:56:06 AM UTC 24 58424890 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.1183490367 Aug 29 10:55:20 AM UTC 24 Aug 29 10:55:22 AM UTC 24 62200529 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.2776964218 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:22 AM UTC 24 269635105 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.1505862111 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:22 AM UTC 24 850618651 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.3551333406 Aug 29 10:55:17 AM UTC 24 Aug 29 10:55:22 AM UTC 24 29617880 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.3639490855 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:22 AM UTC 24 54491683 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.424087971 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:22 AM UTC 24 61961235 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.1141380591 Aug 29 10:55:17 AM UTC 24 Aug 29 10:55:22 AM UTC 24 102615307 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.3665322231 Aug 29 10:54:47 AM UTC 24 Aug 29 10:55:22 AM UTC 24 73315279 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.4171119551 Aug 29 10:55:17 AM UTC 24 Aug 29 10:55:22 AM UTC 24 674941723 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.1824907688 Aug 29 10:55:17 AM UTC 24 Aug 29 10:55:22 AM UTC 24 295340371 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.2270902675 Aug 29 10:55:17 AM UTC 24 Aug 29 10:55:22 AM UTC 24 72806331 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.2884514803 Aug 29 10:55:17 AM UTC 24 Aug 29 10:55:22 AM UTC 24 34220957 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.2630556075 Aug 29 10:54:47 AM UTC 24 Aug 29 10:55:22 AM UTC 24 191453884 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.742683892 Aug 29 10:54:47 AM UTC 24 Aug 29 10:55:22 AM UTC 24 26783731 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.567147207 Aug 29 10:54:47 AM UTC 24 Aug 29 10:55:23 AM UTC 24 407573531 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.171038398 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:23 AM UTC 24 859102616 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.1335996394 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:23 AM UTC 24 2588402372 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2694868631 Aug 29 10:54:47 AM UTC 24 Aug 29 10:55:24 AM UTC 24 922209834 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2054627154 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:24 AM UTC 24 945347850 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.169975268 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:24 AM UTC 24 1997076152 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.3744160582 Aug 29 10:54:46 AM UTC 24 Aug 29 10:55:25 AM UTC 24 4261082362 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.2614407283 Aug 29 10:54:51 AM UTC 24 Aug 29 10:55:26 AM UTC 24 37031446 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.378131033 Aug 29 10:55:24 AM UTC 24 Aug 29 10:55:26 AM UTC 24 315714052 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.969690089 Aug 29 10:55:24 AM UTC 24 Aug 29 10:55:26 AM UTC 24 29490285 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.683314935 Aug 29 10:54:51 AM UTC 24 Aug 29 10:55:26 AM UTC 24 73240051 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.3902182829 Aug 29 10:55:24 AM UTC 24 Aug 29 10:55:27 AM UTC 24 209345655 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.3178825237 Aug 29 10:55:19 AM UTC 24 Aug 29 10:55:27 AM UTC 24 2269260373 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1441905390 Aug 29 10:55:24 AM UTC 24 Aug 29 10:55:27 AM UTC 24 1236803767 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3836653468 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:28 AM UTC 24 831111281 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.1922538518 Aug 29 10:54:51 AM UTC 24 Aug 29 10:55:30 AM UTC 24 3308077627 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3178760842 Aug 29 10:55:13 AM UTC 24 Aug 29 10:55:30 AM UTC 24 11295566589 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.3578935698 Aug 29 10:55:58 AM UTC 24 Aug 29 10:56:05 AM UTC 24 40295811 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.1336385354 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:31 AM UTC 24 90123820 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.2757711166 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:31 AM UTC 24 34708504 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.3007154243 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:31 AM UTC 24 58364318 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.2381251847 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:31 AM UTC 24 28911005 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.2315533101 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:31 AM UTC 24 65484109 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.1269133745 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:31 AM UTC 24 81013269 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.2353069640 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:31 AM UTC 24 153600840 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.328374285 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:31 AM UTC 24 304006686 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.1509933618 Aug 29 10:55:48 AM UTC 24 Aug 29 10:55:53 AM UTC 24 456957414 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.1684004690 Aug 29 10:55:26 AM UTC 24 Aug 29 10:55:32 AM UTC 24 64982133 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.2820181631 Aug 29 10:55:27 AM UTC 24 Aug 29 10:55:32 AM UTC 24 54386891 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.744554757 Aug 29 10:55:27 AM UTC 24 Aug 29 10:55:32 AM UTC 24 53573679 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.2749099631 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:32 AM UTC 24 54819091 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.1702367388 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:32 AM UTC 24 29331181 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.1409609519 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:32 AM UTC 24 145796802 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.3609298474 Aug 29 10:55:27 AM UTC 24 Aug 29 10:55:32 AM UTC 24 158019347 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.886594703 Aug 29 10:55:30 AM UTC 24 Aug 29 10:55:32 AM UTC 24 78636040 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.3930404957 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:32 AM UTC 24 206508077 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.1410180664 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:32 AM UTC 24 63490434 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.614952539 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:32 AM UTC 24 1482408065 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.1901948234 Aug 29 10:55:29 AM UTC 24 Aug 29 10:55:32 AM UTC 24 255146544 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.3201917471 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:33 AM UTC 24 700909346 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.1179269884 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:36 AM UTC 24 9580658011 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.2602297323 Aug 29 10:55:34 AM UTC 24 Aug 29 10:55:36 AM UTC 24 77698439 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.2585084138 Aug 29 10:55:28 AM UTC 24 Aug 29 10:55:36 AM UTC 24 58044972 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.4031484285 Aug 29 10:55:28 AM UTC 24 Aug 29 10:55:36 AM UTC 24 50950636 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.2649054032 Aug 29 10:55:34 AM UTC 24 Aug 29 10:55:37 AM UTC 24 200051556 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.2967085201 Aug 29 10:55:35 AM UTC 24 Aug 29 10:55:37 AM UTC 24 106689119 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.2389546802 Aug 29 10:55:27 AM UTC 24 Aug 29 10:55:37 AM UTC 24 1895969254 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.3168746385 Aug 29 10:55:28 AM UTC 24 Aug 29 10:55:38 AM UTC 24 999959827 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.977130120 Aug 29 10:55:24 AM UTC 24 Aug 29 10:55:38 AM UTC 24 799062389 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.809640650 Aug 29 10:55:32 AM UTC 24 Aug 29 10:55:40 AM UTC 24 62745148 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.1401169094 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:40 AM UTC 24 43796074 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.2540001738 Aug 29 10:55:32 AM UTC 24 Aug 29 10:55:40 AM UTC 24 292536006 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.2408924542 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:40 AM UTC 24 72372769 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.3336335975 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:40 AM UTC 24 51513781 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.3568287552 Aug 29 10:55:22 AM UTC 24 Aug 29 10:55:41 AM UTC 24 115329274 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.2479131447 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:41 AM UTC 24 359959567 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.916286847 Aug 29 10:55:32 AM UTC 24 Aug 29 10:55:41 AM UTC 24 55673460 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.431755697 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:41 AM UTC 24 51195220 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2420453355 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:41 AM UTC 24 52928899 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.1109519145 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:41 AM UTC 24 219275706 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.1839069776 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:41 AM UTC 24 77771985 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.2140269583 Aug 29 10:55:38 AM UTC 24 Aug 29 10:55:41 AM UTC 24 60552398 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.3942458748 Aug 29 10:55:38 AM UTC 24 Aug 29 10:55:41 AM UTC 24 124365264 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.2238995185 Aug 29 10:55:39 AM UTC 24 Aug 29 10:55:41 AM UTC 24 57844853 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3649405121 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:42 AM UTC 24 184413199 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.1497919490 Aug 29 10:55:37 AM UTC 24 Aug 29 10:55:42 AM UTC 24 93337697 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.3390435087 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:42 AM UTC 24 71446920 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.4006964139 Aug 29 10:55:37 AM UTC 24 Aug 29 10:55:42 AM UTC 24 41633339 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.3766290711 Aug 29 10:55:37 AM UTC 24 Aug 29 10:55:42 AM UTC 24 109907197 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.4283918959 Aug 29 10:55:37 AM UTC 24 Aug 29 10:55:42 AM UTC 24 42833663 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.2996035843 Aug 29 10:55:23 AM UTC 24 Aug 29 10:55:42 AM UTC 24 179211186 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2263567057 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:43 AM UTC 24 1010708009 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2279004751 Aug 29 10:55:33 AM UTC 24 Aug 29 10:55:43 AM UTC 24 1397162836 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.2127117991 Aug 29 10:55:31 AM UTC 24 Aug 29 10:55:46 AM UTC 24 125528105 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.3750521958 Aug 29 10:55:21 AM UTC 24 Aug 29 10:55:46 AM UTC 24 362944683 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.462944964 Aug 29 10:55:21 AM UTC 24 Aug 29 10:55:46 AM UTC 24 256047935 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.1176341599 Aug 29 10:55:31 AM UTC 24 Aug 29 10:55:46 AM UTC 24 202109350 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.640680697 Aug 29 10:55:43 AM UTC 24 Aug 29 10:55:46 AM UTC 24 437684781 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.1397118675 Aug 29 10:55:43 AM UTC 24 Aug 29 10:55:46 AM UTC 24 61941814 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.1656076233 Aug 29 10:55:43 AM UTC 24 Aug 29 10:55:46 AM UTC 24 303673256 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.4062428155 Aug 29 10:55:43 AM UTC 24 Aug 29 10:55:46 AM UTC 24 95956480 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1686246135 Aug 29 10:55:44 AM UTC 24 Aug 29 10:55:46 AM UTC 24 200820755 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.2763554398 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:46 AM UTC 24 45404115 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.1525654242 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:46 AM UTC 24 90914068 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.2028837856 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 92250672 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.3404949792 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 88293575 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.1150997352 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 80581137 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.1278963257 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 121741898 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.2490212782 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 149178726 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2462973560 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 719091466 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.164198484 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 204996292 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1131721856 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:47 AM UTC 24 242863034 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3036738221 Aug 29 10:55:43 AM UTC 24 Aug 29 10:55:47 AM UTC 24 1012275706 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.890831657 Aug 29 10:55:37 AM UTC 24 Aug 29 10:55:47 AM UTC 24 1973881314 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1674594990 Aug 29 10:55:43 AM UTC 24 Aug 29 10:55:48 AM UTC 24 844616684 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2804309829 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:49 AM UTC 24 863676358 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1730135709 Aug 29 10:55:42 AM UTC 24 Aug 29 10:55:49 AM UTC 24 860761370 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.1579849411 Aug 29 10:55:32 AM UTC 24 Aug 29 10:55:50 AM UTC 24 169698338 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.1816263057 Aug 29 10:55:48 AM UTC 24 Aug 29 10:55:53 AM UTC 24 111651071 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.2309625374 Aug 29 10:55:48 AM UTC 24 Aug 29 10:55:51 AM UTC 24 39636694 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.1182383601 Aug 29 10:55:36 AM UTC 24 Aug 29 10:55:51 AM UTC 24 23827227 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.603120886 Aug 29 10:55:16 AM UTC 24 Aug 29 10:55:51 AM UTC 24 134774178 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.2672089652 Aug 29 10:55:49 AM UTC 24 Aug 29 10:55:51 AM UTC 24 57337111 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.4132227877 Aug 29 10:55:49 AM UTC 24 Aug 29 10:55:51 AM UTC 24 54567631 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.2953424760 Aug 29 10:55:48 AM UTC 24 Aug 29 10:55:51 AM UTC 24 109545227 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.581567593 Aug 29 10:55:49 AM UTC 24 Aug 29 10:55:51 AM UTC 24 116680117 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.63250962 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:51 AM UTC 24 62183332 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.1721938268 Aug 29 10:55:46 AM UTC 24 Aug 29 10:55:51 AM UTC 24 30388306 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.2148029800 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:51 AM UTC 24 30292381 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.2430311343 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:51 AM UTC 24 295673758 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.3146576213 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:51 AM UTC 24 48473346 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.1206409911 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:51 AM UTC 24 95116269 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.2977737216 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:52 AM UTC 24 407473054 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_28/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.3370596657 Aug 29 10:55:47 AM UTC 24 Aug 29 10:55:52 AM UTC 24 63632297 ps
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