| T320 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.1242664210 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:43 AM UTC 24 |
79470839 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.3291018763 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:43 AM UTC 24 |
122133336 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.4071009832 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:43 AM UTC 24 |
58461204 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.1153197129 |
|
|
Sep 04 02:27:15 AM UTC 24 |
Sep 04 02:27:43 AM UTC 24 |
11957397823 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.1872006512 |
|
|
Sep 04 02:27:41 AM UTC 24 |
Sep 04 02:27:43 AM UTC 24 |
59549506 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.3874446034 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:43 AM UTC 24 |
191145570 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.2774769140 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
74856068 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.1973497068 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
282228333 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.753537234 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
274346221 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.657414846 |
|
|
Sep 04 02:27:41 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
635537958 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.2822919437 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
173247344 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.2336764859 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
65736336 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.1308674743 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
230595778 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_esc_clk_rst_malfunc.1699202857 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
30619347 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_global_esc.1329458583 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
47443304 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_glitch.2337301041 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
62515488 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_disable_rom_integrity_check.2642947947 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
119464167 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rstmgr_intersig_mubi.1317333848 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
53174959 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_escalation_timeout.1302333130 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
119626606 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.3819166924 |
|
|
Sep 04 02:27:25 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
250429483 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1504213517 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
1464731105 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3892262812 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
1411306803 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.3628952690 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
37659196 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.2003090655 |
|
|
Sep 04 02:27:32 AM UTC 24 |
Sep 04 02:27:44 AM UTC 24 |
57232626 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.992832368 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:45 AM UTC 24 |
28979011 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.2998556877 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:45 AM UTC 24 |
1850245471 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.465625324 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:45 AM UTC 24 |
64877526 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.2431824717 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:45 AM UTC 24 |
239746165 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.3757646919 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
186888073 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.396949553 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
101647954 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_global_esc.4105673946 |
|
|
Sep 04 02:26:37 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
40638700 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.3481102553 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
70760425 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.1540123732 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
387489770 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.1239369766 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
484436872 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.369023841 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
150897211 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.3982126301 |
|
|
Sep 04 02:26:47 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
68692965 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_lowpower_invalid.77875135 |
|
|
Sep 04 02:26:37 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
46695389 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.3052607197 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:46 AM UTC 24 |
1056635542 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.3015030506 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
44035159 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.1200121942 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
132075489 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.2345258979 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
125196035 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.1255257186 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
365270326 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.3021434032 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
109112955 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.3870132527 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
36729752 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.1660716731 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
61037087 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.562978374 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
107102120 ps |
| T28 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm.2445242731 |
|
|
Sep 04 02:26:37 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
897325601 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.3956679707 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
73311962 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.4266143475 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
144985197 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.4042027012 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
115980987 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.2937836336 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
315929187 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.1170054747 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
94975464 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3617933779 |
|
|
Sep 04 02:27:20 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
1190571619 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.3236196553 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
57588206 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4122417507 |
|
|
Sep 04 02:27:20 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
1178672996 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.462332198 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:48 AM UTC 24 |
2356980875 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.346626997 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
66883609 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.1988898179 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:47 AM UTC 24 |
326205926 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2674099536 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:48 AM UTC 24 |
1253900477 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.157180253 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:48 AM UTC 24 |
1048640262 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2110747984 |
|
|
Sep 04 02:27:37 AM UTC 24 |
Sep 04 02:27:48 AM UTC 24 |
861465393 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.2935199374 |
|
|
Sep 04 02:27:40 AM UTC 24 |
Sep 04 02:27:49 AM UTC 24 |
5589506674 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.632111754 |
|
|
Sep 04 02:27:29 AM UTC 24 |
Sep 04 02:27:49 AM UTC 24 |
9295883586 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.2750789616 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:50 AM UTC 24 |
2004596636 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.3061305865 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
86275329 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.4170175706 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
103158504 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.3265791277 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
68303347 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.192395135 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
24156802 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.960926937 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
60084635 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.2057597327 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
138183785 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.88966548 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
93453022 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.3909704313 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
691818336 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.3893610989 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
29357087 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.3670811479 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
76425114 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.3623138219 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
642219195 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.1023971891 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
42079253 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.3601507533 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
169384353 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.3896767632 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
53876499 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.3228999964 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:51 AM UTC 24 |
115404713 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.1285882149 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
81586526 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.1984266409 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
130014188 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.210981122 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
30508267 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.2318199693 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
75814758 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3290037045 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
1341376125 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.2724480410 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
339800554 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.2324245307 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
128190279 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.575068752 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
48972910 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.210820478 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
273890123 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.1471540922 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:52 AM UTC 24 |
57310330 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.3763394906 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:08 AM UTC 24 |
212801101 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.2192677384 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
36005141 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.481529415 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
156998183 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.4120588678 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
68825014 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.167641266 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
57178278 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.3123604224 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
226274675 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.1243729142 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
65481871 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.3651898515 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
184833770 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.3518595125 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
124273041 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.2839117857 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
817390006 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.629791040 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
37835971 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.2240174872 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
271625696 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.737707429 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
44893188 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.3421610150 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
9803562573 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.3941049491 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
101806493 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.304629829 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
102645055 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3861532 |
|
|
Sep 04 02:27:49 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
874643020 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.990119429 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
185911479 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.1420882210 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:53 AM UTC 24 |
254937260 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.783494149 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:54 AM UTC 24 |
299857928 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.379301478 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:54 AM UTC 24 |
1455404240 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.2196665016 |
|
|
Sep 04 02:27:34 AM UTC 24 |
Sep 04 02:27:54 AM UTC 24 |
8849916827 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1091170018 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:55 AM UTC 24 |
750591478 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1425155171 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:55 AM UTC 24 |
924512554 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1645471321 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:27:55 AM UTC 24 |
882229637 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.1820013653 |
|
|
Sep 04 02:27:45 AM UTC 24 |
Sep 04 02:27:57 AM UTC 24 |
9922574232 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.2744593233 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:28:00 AM UTC 24 |
2739954133 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1259204427 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:00 AM UTC 24 |
33461247 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.1082012471 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:00 AM UTC 24 |
62008807 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.1907967516 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:01 AM UTC 24 |
22640633 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3400367967 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:01 AM UTC 24 |
257963593 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.1463398240 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:01 AM UTC 24 |
431122570 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.1482731244 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:01 AM UTC 24 |
93356968 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.2264435506 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
135704657 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.3275532115 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:08 AM UTC 24 |
106495298 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.2191936271 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
30328376 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2378030436 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
39708205 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.4162178933 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
133470232 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.3695601417 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
38572966 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.945168205 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
412146569 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.1702801455 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
228647302 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.2302032428 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
67807857 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.210973158 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:02 AM UTC 24 |
54138328 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.457194195 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:03 AM UTC 24 |
814611447 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3749270603 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:05 AM UTC 24 |
900874246 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.4169490283 |
|
|
Sep 04 02:27:50 AM UTC 24 |
Sep 04 02:28:06 AM UTC 24 |
6429532892 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.2247192304 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
33947435 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.2639060265 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
29072095 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.4216279299 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
66626710 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.2550368735 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
33650040 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.4169044519 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
111198765 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.726941171 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
58408491 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.1228693824 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
73588669 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.1348139953 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
101397771 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.2850785931 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:13 AM UTC 24 |
265491953 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2721186854 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:14 AM UTC 24 |
1059489084 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1676350686 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:15 AM UTC 24 |
806055079 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.3707807167 |
|
|
Sep 04 02:28:09 AM UTC 24 |
Sep 04 02:28:17 AM UTC 24 |
38149041 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.2561222755 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:24 AM UTC 24 |
1797410828 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.2279287709 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
184791002 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.1986742503 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
75512783 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.683079472 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
37292457 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.3243379193 |
|
|
Sep 04 02:28:09 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
140141827 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.2661463204 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
42203484 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.213252223 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
77393141 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.3271417799 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:25 AM UTC 24 |
158526916 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.2301688579 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
57804243 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.166495865 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
73637374 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.651017791 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
57989053 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.3247642588 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
53431829 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.100676587 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:24 AM UTC 24 |
411883191 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.151802742 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:25 AM UTC 24 |
46105590 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.3272140995 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
421395959 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.3281317444 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
83134593 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.772899394 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
47129439 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.1776126678 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
118280167 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.3748795231 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
102301933 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.2266564876 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
54218239 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.1217635481 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:25 AM UTC 24 |
58174209 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.1992241085 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
45419651 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.1143299290 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
51710787 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.473967188 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
56733724 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.1675241915 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
186298511 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.3147789607 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
32898735 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.3725995554 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
98763531 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.25200900 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
146880529 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.2812645346 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
60474723 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.394111706 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
54038826 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.901920700 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
29757628 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.337567373 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
199369424 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.3554174664 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
59494119 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.1895629169 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:18 AM UTC 24 |
30447429 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.3644686499 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:19 AM UTC 24 |
152456325 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.3922339366 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:19 AM UTC 24 |
136351205 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.690475004 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:19 AM UTC 24 |
88795669 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.2393587353 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:19 AM UTC 24 |
183109766 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3662639935 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:19 AM UTC 24 |
2236794398 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.278088354 |
|
|
Sep 04 02:28:05 AM UTC 24 |
Sep 04 02:28:20 AM UTC 24 |
1155825941 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.2682118097 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:22 AM UTC 24 |
3396640457 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1714225488 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:25 AM UTC 24 |
852222718 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.1684906700 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
362293637 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3961083004 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
35521560 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.3403969119 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
42043837 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.2683590311 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
43893010 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.2941498510 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
54577163 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.454500321 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
61518997 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.875955988 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
1325802128 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.3198104442 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
107048929 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.1975072499 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
76161488 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.3313491637 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
62281042 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.1703073676 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
146892226 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.4138974890 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:23 AM UTC 24 |
223288201 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.4166291955 |
|
|
Sep 04 02:28:15 AM UTC 24 |
Sep 04 02:28:24 AM UTC 24 |
3211273364 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.447633909 |
|
|
Sep 04 02:28:20 AM UTC 24 |
Sep 04 02:28:25 AM UTC 24 |
887976447 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.2123568457 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
142717545 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.4234269381 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
42720003 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.3857874238 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
163372917 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.4096219226 |
|
|
Sep 04 02:28:17 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
77233219 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.24832149 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
4627240610 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.3740933502 |
|
|
Sep 04 02:28:17 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
72943829 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.3732847211 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
240556627 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.3045078498 |
|
|
Sep 04 02:28:17 AM UTC 24 |
Sep 04 02:28:26 AM UTC 24 |
281961828 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.1718679031 |
|
|
Sep 04 02:27:59 AM UTC 24 |
Sep 04 02:28:27 AM UTC 24 |
7175690795 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.884219100 |
|
|
Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:27 AM UTC 24 |
605762797 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1485184087 |
|
|
Sep 04 02:28:07 AM UTC 24 |
Sep 04 02:28:27 AM UTC 24 |
3543087151 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2946933995 |
|
|
Sep 04 02:28:07 AM UTC 24 |
Sep 04 02:28:27 AM UTC 24 |
1839995524 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.1398434764 |
|
|
Sep 04 02:28:06 AM UTC 24 |
Sep 04 02:28:28 AM UTC 24 |
3649285557 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.3267449037 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:30 AM UTC 24 |
39101167 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.2081091959 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:30 AM UTC 24 |
48507980 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.775163567 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
118828929 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.28996304 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
148483523 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.3758226083 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
29604247 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.2708125628 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
24357490 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.2046343901 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
57522731 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.2121150910 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
40691711 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.2082925062 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
231741465 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.218002753 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
135594095 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.2559082180 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
108108120 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.2377696015 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
503290258 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.705247763 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
102572986 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.314943365 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
218999482 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.64991330 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
108229560 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.2405238960 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
42806256 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.794837161 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:31 AM UTC 24 |
98512384 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1338238344 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:32 AM UTC 24 |
1401948554 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.2196100226 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:32 AM UTC 24 |
35877217 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.3100737757 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:32 AM UTC 24 |
100178726 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.3619719212 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:32 AM UTC 24 |
47978404 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.3829365385 |
|
|
Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:32 AM UTC 24 |
77013423 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.2534806530 |
|
|
Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
41772433 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.3879612426 |
|
|
Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
37695046 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.2370558498 |
|
|
Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
74891756 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.3719661515 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
512022715 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.1598902073 |
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Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
65511831 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.1855487586 |
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Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
382395244 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3987101576 |
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Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
749345961 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.1326811006 |
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Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
108924374 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.59061349 |
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Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:33 AM UTC 24 |
158170869 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.3827047166 |
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Sep 04 02:28:00 AM UTC 24 |
Sep 04 02:28:34 AM UTC 24 |
6955123006 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.656659196 |
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Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:34 AM UTC 24 |
825612304 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.3674301325 |
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Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:34 AM UTC 24 |
988934251 ps |