T556 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.4010177369 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:35 AM UTC 24 |
2156903536 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1994973044 |
|
|
Sep 04 02:28:30 AM UTC 24 |
Sep 04 02:28:35 AM UTC 24 |
850736571 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.1040078704 |
|
|
Sep 04 02:28:29 AM UTC 24 |
Sep 04 02:28:39 AM UTC 24 |
1978080692 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.3850088488 |
|
|
Sep 04 02:28:43 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
81034579 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.3129621705 |
|
|
Sep 04 02:28:43 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
64059397 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.2230214387 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
104264871 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.385448803 |
|
|
Sep 04 02:28:43 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
93634926 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.3136854695 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
42416138 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.3996742101 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
125499940 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.985279647 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:45 AM UTC 24 |
157310800 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.4270954323 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
312418331 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.1009901962 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
32632288 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2914574428 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
145881740 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.874992031 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
294718137 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.445639280 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
92166366 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.976407390 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
75388945 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.1190566485 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
382215032 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.728230366 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
183112966 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.1571256343 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
107881126 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.222892625 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
71688937 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.1392877077 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
112249574 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.1512253413 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
57151876 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.2834172406 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
31795105 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.3227421950 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
38239707 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.937387836 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
340781169 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.2806309069 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
25392152 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.2191321340 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
170947583 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.1375329546 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
39500734 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.3551037252 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
43694626 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.1143845589 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
34299567 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.2405265896 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:46 AM UTC 24 |
46458485 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.3769633747 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
58612460 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.4090865059 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
684542436 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.306076407 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
78713217 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1712678572 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
112329850 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.460013403 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
29394953 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.1744424710 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
227904613 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.3980638722 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
112166875 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.3521194647 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
27807898 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.1113614645 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
279206121 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.2771762341 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
47853924 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1170329534 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
73252417 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.9094339 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
591861313 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.3146238957 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
309101130 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.3020507649 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
304798019 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2378545777 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
793843712 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.1174753889 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
310714459 ps |
T80 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.1105700436 |
|
|
Sep 04 02:28:43 AM UTC 24 |
Sep 04 02:28:47 AM UTC 24 |
1960957334 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.3982362006 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:48 AM UTC 24 |
616990664 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2969862288 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:48 AM UTC 24 |
781712979 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4221219666 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:04 AM UTC 24 |
860474384 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3379349114 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:49 AM UTC 24 |
842385021 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.769727955 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:49 AM UTC 24 |
963808826 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.371409477 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:49 AM UTC 24 |
916072883 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.3959950708 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:49 AM UTC 24 |
1586589465 ps |
T51 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.3906853310 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:49 AM UTC 24 |
1673721572 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.1905511101 |
|
|
Sep 04 02:28:45 AM UTC 24 |
Sep 04 02:28:49 AM UTC 24 |
2519752711 ps |
T81 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.786706884 |
|
|
Sep 04 02:28:44 AM UTC 24 |
Sep 04 02:28:56 AM UTC 24 |
5030592675 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.104596517 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
50583877 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.1069849143 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
59373837 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.88816392 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:04 AM UTC 24 |
888004510 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.4066527833 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
102908226 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.2305351017 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
27203581 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.3653515004 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
43670188 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.3220626477 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
245933693 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1594722050 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:04 AM UTC 24 |
1250426074 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.2534012169 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
37738626 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.4276976559 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
27175238 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.110991525 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
113436489 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.3594609860 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
80876927 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.4172724460 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
94536596 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.331412671 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:04 AM UTC 24 |
1332340867 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1056973740 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
69533882 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.1794601850 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
249853964 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.2631939992 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
47090547 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.1728109977 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
376693617 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.1196973596 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:02 AM UTC 24 |
73096943 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.1824010235 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
48549675 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.4012469313 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
226704608 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.3215288201 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
275986173 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.102188395 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:07 AM UTC 24 |
1665071591 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.22671971 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
39184739 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.1920678718 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
91926064 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.2010455556 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
30405839 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.1781576301 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
22939570 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.3908285363 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
401647461 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.3046804231 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
64611472 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.3947474494 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
25408855 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.857662388 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
112490162 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.1908313415 |
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Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
104218377 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.1053601820 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
52807921 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.3486020268 |
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|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
245479153 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.956860094 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
232847209 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.4201698596 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
331637808 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.1649137085 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:03 AM UTC 24 |
304888191 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.892187582 |
|
|
Sep 04 02:29:00 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
2841265503 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.516405153 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
77540925 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.3383104387 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
124161540 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3518237890 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:22 AM UTC 24 |
624268590 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1636425751 |
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:23 AM UTC 24 |
832708112 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.4281628578 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
138294388 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.3652275923 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
62795887 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.2025645926 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
32041210 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.3777557561 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
27941251 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.2573146277 |
|
|
Sep 04 02:29:02 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
46445895 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.4172994683 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
31350597 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.3792506060 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:10 AM UTC 24 |
185802091 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3525699391 |
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|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:11 AM UTC 24 |
160278919 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.1107826774 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:11 AM UTC 24 |
262765434 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.3395527070 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:11 AM UTC 24 |
270473210 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.1147964955 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:11 AM UTC 24 |
6694579644 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.3059397386 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:11 AM UTC 24 |
1050017276 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2272822171 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:12 AM UTC 24 |
1111381787 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4000981030 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:12 AM UTC 24 |
985228978 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.985950631 |
|
|
Sep 04 02:29:01 AM UTC 24 |
Sep 04 02:29:13 AM UTC 24 |
1262798169 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.2740614612 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
75736790 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.2728794665 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:24 AM UTC 24 |
3580905296 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.3955562000 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
57885024 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.6079951 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
68071811 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.2284916522 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
119986915 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.1655830878 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
111154895 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.3219733076 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
30782965 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1382496694 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
1184710449 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1211501295 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:22 AM UTC 24 |
1794478812 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.205392853 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
21577130 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.1972159696 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
27818786 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.1993989493 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
52941047 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2146234258 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:23 AM UTC 24 |
823456991 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.712657970 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
28908545 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.591563773 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
85954933 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.1297567648 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
50791560 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.854087110 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
319523083 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.2062725169 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
157017569 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.2806048734 |
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|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
164110676 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.1371253135 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:22 AM UTC 24 |
2382137537 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.862772548 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
48525644 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.2225595115 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
122920150 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.3912761101 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
71186991 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.1746855434 |
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Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
69106852 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.143425924 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
175473760 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.1948609795 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:20 AM UTC 24 |
154582274 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.1067282017 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
30626486 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.3818107113 |
|
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Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
30398073 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.1913134099 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
67750744 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.1646408870 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
95664324 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.394187638 |
|
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Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
281490295 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.3515567893 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
72641632 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.37248374 |
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
29556728 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.940964976 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
43695851 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.2411595568 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
364817488 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.509145549 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
92995439 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.2893926357 |
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
53126698 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.3909231574 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
124239975 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.537861725 |
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:23 AM UTC 24 |
1491034156 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.587499868 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
273218049 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.1403530226 |
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|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
82974128 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.153933767 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
278215643 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.1189702925 |
|
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
183192879 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.1674670903 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
388329609 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.393063039 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
172832050 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.1787132925 |
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
48229332 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.1132489895 |
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Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
567059239 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.2791572793 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
479045002 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.762685941 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:21 AM UTC 24 |
1318459376 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.2994534330 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:22 AM UTC 24 |
249804595 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.435289969 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:22 AM UTC 24 |
1305333964 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.3429802905 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
31576195 ps |
T96 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.2629169609 |
|
|
Sep 04 02:29:18 AM UTC 24 |
Sep 04 02:29:25 AM UTC 24 |
2635186498 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.3716406694 |
|
|
Sep 04 02:29:19 AM UTC 24 |
Sep 04 02:29:29 AM UTC 24 |
6810255778 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.2290461845 |
|
|
Sep 04 02:29:38 AM UTC 24 |
Sep 04 02:29:40 AM UTC 24 |
42986699 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.130507634 |
|
|
Sep 04 02:29:38 AM UTC 24 |
Sep 04 02:29:40 AM UTC 24 |
74397876 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.99100477 |
|
|
Sep 04 02:29:38 AM UTC 24 |
Sep 04 02:29:40 AM UTC 24 |
65824187 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.4198172343 |
|
|
Sep 04 02:29:38 AM UTC 24 |
Sep 04 02:29:40 AM UTC 24 |
145456090 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.3310499975 |
|
|
Sep 04 02:29:38 AM UTC 24 |
Sep 04 02:29:40 AM UTC 24 |
385809202 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.2039628030 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:41 AM UTC 24 |
51541411 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.3082636102 |
|
|
Sep 04 02:29:39 AM UTC 24 |
Sep 04 02:29:41 AM UTC 24 |
151178995 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.1444575155 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:41 AM UTC 24 |
31446426 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.2856333278 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:41 AM UTC 24 |
55153153 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.4033022348 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
40801786 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.3896939457 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
82049438 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.1141915445 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
61151723 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.154148268 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
121152261 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.3127359111 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
40880841 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.2568469767 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
321541421 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.1275668489 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
44814011 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.352142047 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
41149871 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.1918010439 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
54475874 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.1518721356 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
208482154 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1367164925 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
245944842 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.4044155670 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
163287061 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.1722475906 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
104651242 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.3781178813 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
99484191 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.786439975 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
125248903 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.3911561798 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
102060995 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.4248134236 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
30796717 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.169610962 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
154227195 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.3369214193 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
199472129 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.3309625024 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
240301370 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.2616779489 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
147787756 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.2824711029 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
32064284 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.2877672854 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
61382444 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.3030200636 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
93031517 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.2612755889 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
91390847 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.4101513117 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
398239126 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.671442156 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
30481750 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.65086782 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
66755365 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.3345627235 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:42 AM UTC 24 |
82766221 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.4031922021 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
127034414 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.1323244939 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
211179080 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.2768178629 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
28616035 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.593410019 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
137357296 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2108679717 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
1319414853 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.4207858532 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
170311868 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.670167633 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
25427665 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.491916159 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
285386292 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.1561535542 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
125133516 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1317960214 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
1186186023 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.716804817 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
137001341 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.1026725678 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:43 AM UTC 24 |
203035359 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1242481775 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:44 AM UTC 24 |
2914610756 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1967793503 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:44 AM UTC 24 |
951329026 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.3668225888 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:44 AM UTC 24 |
2430237597 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.3678597892 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:44 AM UTC 24 |
901662413 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3408777113 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:44 AM UTC 24 |
802007462 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3710236598 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:45 AM UTC 24 |
943956065 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.3739703055 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:47 AM UTC 24 |
2027265105 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.1203861933 |
|
|
Sep 04 02:29:41 AM UTC 24 |
Sep 04 02:29:48 AM UTC 24 |
2061722966 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.3990967041 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:52 AM UTC 24 |
20988980704 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.3698795992 |
|
|
Sep 04 02:29:40 AM UTC 24 |
Sep 04 02:29:54 AM UTC 24 |
10003007816 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.2451668644 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:01 AM UTC 24 |
44270046 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.1695502673 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:01 AM UTC 24 |
56841487 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.2196362312 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:01 AM UTC 24 |
77142821 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.1566301694 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
44589253 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.1455112822 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
678647739 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.1667683349 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
46714380 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.655026246 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
112777962 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.2523213216 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
35521488 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.1397895644 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
118729869 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.1387373243 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
51718978 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.1007484476 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
227185600 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3268132147 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
38681932 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.1825289166 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
52560891 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.4213787963 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
42239410 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.1795225409 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
41836819 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.1963186647 |
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Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
192729997 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.1763702726 |
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Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
29121785 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.919236082 |
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Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
44604432 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.2499243518 |
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Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:02 AM UTC 24 |
44939448 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2205921155 |
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Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
109086356 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.3030991188 |
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Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
543042747 ps |