| T802 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.4291289284 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
519021920 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1469245187 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
58718608 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.588001665 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
77994665 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.4081583035 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
202718654 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.2937043694 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
195341159 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.3531894785 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
51290171 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.531366266 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
29785972 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.28148448 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
55114059 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.2952945359 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
125390193 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.2102590631 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
475979481 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.1366153657 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
52934272 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.2109884396 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
55585473 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3772767425 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
1538568978 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.3452054274 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
172715432 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.3767965432 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
656720449 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.1502319649 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
30690344 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.79178664 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
93468798 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.4053863140 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
66487057 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.549626892 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
101597729 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.2600536637 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
455021554 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.380287736 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
222835500 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.3999145123 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
67368661 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.655135315 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
267474541 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.3092110280 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:03 AM UTC 24 |
280942780 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.2239401121 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:04 AM UTC 24 |
246532605 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2349620807 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:04 AM UTC 24 |
1008745100 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.2513333639 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:04 AM UTC 24 |
1340722643 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.986721536 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:04 AM UTC 24 |
1019782891 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1373263149 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:05 AM UTC 24 |
1012268243 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.440943161 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:05 AM UTC 24 |
861966210 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3681805813 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:05 AM UTC 24 |
835388123 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.770174557 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:06 AM UTC 24 |
1502802069 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.4272267478 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:07 AM UTC 24 |
4019159507 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.1300654150 |
|
|
Sep 04 02:30:01 AM UTC 24 |
Sep 04 02:30:09 AM UTC 24 |
5036919963 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.1727300894 |
|
|
Sep 04 02:30:00 AM UTC 24 |
Sep 04 02:30:15 AM UTC 24 |
10703768214 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.1319979543 |
|
|
Sep 04 02:30:22 AM UTC 24 |
Sep 04 02:30:24 AM UTC 24 |
156294170 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.533615330 |
|
|
Sep 04 02:30:22 AM UTC 24 |
Sep 04 02:30:24 AM UTC 24 |
33055032 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.1588061008 |
|
|
Sep 04 02:30:22 AM UTC 24 |
Sep 04 02:30:24 AM UTC 24 |
82120030 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.1188560994 |
|
|
Sep 04 02:30:22 AM UTC 24 |
Sep 04 02:30:24 AM UTC 24 |
52176332 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.4153445886 |
|
|
Sep 04 02:30:22 AM UTC 24 |
Sep 04 02:30:24 AM UTC 24 |
384243690 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.1811605272 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
57570844 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.956740327 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
38708366 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.31057691 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
50067873 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.2007741491 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
71157373 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.1718281074 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
109358146 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.298317826 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
75199087 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.170223101 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
295285392 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.266880001 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
136788557 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.3954743274 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
145405457 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.944341750 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:25 AM UTC 24 |
29562092 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.1742988694 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
58283851 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.1704935819 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
34781224 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.211773858 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
57972493 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.1792132514 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
108076346 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.2184259555 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
152846004 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.261481675 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
137841308 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.3949778047 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
68692026 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.147548331 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
37477614 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.1526308029 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
221651961 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.638337980 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
30051840 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_global_esc.3971996479 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
21539448 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.3166190358 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
260423668 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.379602066 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
152415701 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.1958167220 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
77587975 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.1083473151 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
328469388 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.820586623 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
42218336 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.402342703 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
49182903 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.1810402969 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
429594489 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.2923522179 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
90204867 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.29154050 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
204764349 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.4241049960 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
270078117 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.4002523199 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
53476539 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.2652067616 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
91723342 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.3941600883 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
103988936 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.668193346 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
187095277 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.3467108038 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:26 AM UTC 24 |
116901794 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.3993256139 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
57965720 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.78379486 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
53101735 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.1422357346 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
259574463 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1511563725 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
856247355 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.1742631037 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
481705699 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.629116712 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
964588240 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.3939703149 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
3178024002 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4178222669 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:27 AM UTC 24 |
1221950795 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.987656180 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:28 AM UTC 24 |
1363629681 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2223185764 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:29 AM UTC 24 |
935843294 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.258510736 |
|
|
Sep 04 02:30:25 AM UTC 24 |
Sep 04 02:30:29 AM UTC 24 |
778122766 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.1886937721 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:29 AM UTC 24 |
3302689278 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all_with_rand_reset.1411785363 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:30 AM UTC 24 |
6550671069 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.3415191445 |
|
|
Sep 04 02:30:24 AM UTC 24 |
Sep 04 02:30:31 AM UTC 24 |
1704770440 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.1955745008 |
|
|
Sep 04 02:30:23 AM UTC 24 |
Sep 04 02:30:32 AM UTC 24 |
4658274477 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.3798243936 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
63009169 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.672265088 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:48 AM UTC 24 |
64613691 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.308388923 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:48 AM UTC 24 |
32391877 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.126728748 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:48 AM UTC 24 |
79499831 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.2096449342 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:48 AM UTC 24 |
71090077 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.131273438 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
93599613 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.2501600245 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
164553896 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.2340297752 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
391310820 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_smoke.3808572991 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
168371409 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.3966841976 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
264505295 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset.405800861 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
30005344 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.3527906666 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
119283586 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_aborted_low_power.2087827493 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
129692890 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup.677265660 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
270729695 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_wakeup_race.892167664 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
136180422 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.2984584055 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
31006266 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_global_esc.1166554617 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
43058225 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.1883117791 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
259809487 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.2939356954 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
73420133 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_glitch.3991679307 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
44683891 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_escalation_timeout.5741716 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
210586713 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_disable_rom_integrity_check.2420276979 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
65680721 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.3758250025 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
69414053 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.3884309630 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
32834589 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.3655706848 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
90069921 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup_reset.2961182099 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:49 AM UTC 24 |
312032901 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.798898553 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
30563286 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.1225234020 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
98124313 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.142248921 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
54787402 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.1297407338 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
59315977 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.4233525370 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
83340357 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all.1271128511 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
241135593 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.1382607001 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
39500145 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.3946777537 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
81223498 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.756458074 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
274168466 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.3460434364 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
101823263 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.1065696845 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
174766988 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.1458271298 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
112801555 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.2305055237 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
509686201 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4137785631 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
1076606171 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.3411072836 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
248402594 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.1314897409 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
165483196 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.503248333 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
66866333 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.3030288545 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
481598199 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1364179230 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:50 AM UTC 24 |
1791818453 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3584157969 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:51 AM UTC 24 |
1001113539 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1326842388 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:51 AM UTC 24 |
1808819887 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1549397926 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:51 AM UTC 24 |
1376402883 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3861489845 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:52 AM UTC 24 |
788312552 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.1820163844 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:30:52 AM UTC 24 |
944601861 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.3283540668 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:54 AM UTC 24 |
3851302020 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all_with_rand_reset.1993639941 |
|
|
Sep 04 02:30:47 AM UTC 24 |
Sep 04 02:30:59 AM UTC 24 |
11926838343 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all_with_rand_reset.2606909706 |
|
|
Sep 04 02:30:48 AM UTC 24 |
Sep 04 02:31:05 AM UTC 24 |
16252210325 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.3028511412 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:13 AM UTC 24 |
30133617 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.4206011291 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
77902355 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.131441555 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
64556543 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.1835484128 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
406312447 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.76475867 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
32867943 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.606858357 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
60811319 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.408634982 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
149477122 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.1774921954 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
130090729 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.3282374317 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
41368141 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.1418582546 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
261232894 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.1653192673 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
96764015 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.1886490963 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
169371750 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.621311275 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
154855864 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.2267863345 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
156008898 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.1887853667 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
31026948 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.618638103 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:14 AM UTC 24 |
36026284 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.398882830 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
50626501 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.1871150769 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
66366141 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.2628080916 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
391177013 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.1836890253 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
252957190 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup_reset.3028438541 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
69824142 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_invalid.256983114 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
40995891 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.1722959333 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
107311360 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.1233120768 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
55701835 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset.1652327626 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
150825772 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.2538630158 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
83782222 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_smoke.1134469874 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
28824360 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.1160461882 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
31199411 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.2154650633 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
64777535 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup.1380176603 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
154522543 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_aborted_low_power.2233958548 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
83386352 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_glitch.4255265095 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
65223753 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_global_esc.1195467816 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
51261450 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.2860525266 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
263611142 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_disable_rom_integrity_check.595387866 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
62558564 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_escalation_timeout.3425212098 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
200885727 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_wakeup_race.2585936936 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
298975124 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.1562275693 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:15 AM UTC 24 |
109029075 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4179395937 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:17 AM UTC 24 |
828344769 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3276720919 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:17 AM UTC 24 |
855565146 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.1235097583 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:17 AM UTC 24 |
2388162216 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2145107496 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:17 AM UTC 24 |
749265679 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all.4052428848 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:17 AM UTC 24 |
2312138235 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2701754291 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:18 AM UTC 24 |
925709801 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all_with_rand_reset.3324184445 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:18 AM UTC 24 |
2062179570 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.599760094 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:18 AM UTC 24 |
1168076457 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.1200549628 |
|
|
Sep 04 02:31:13 AM UTC 24 |
Sep 04 02:31:21 AM UTC 24 |
1924876197 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.35425023 |
|
|
Sep 04 02:31:12 AM UTC 24 |
Sep 04 02:31:23 AM UTC 24 |
7047218177 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_intr_test.686700183 |
|
|
Sep 04 01:58:31 AM UTC 24 |
Sep 04 01:58:33 AM UTC 24 |
47023342 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.2646043691 |
|
|
Sep 04 01:58:31 AM UTC 24 |
Sep 04 01:58:33 AM UTC 24 |
33147482 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_rw.1800702424 |
|
|
Sep 04 01:58:31 AM UTC 24 |
Sep 04 01:58:33 AM UTC 24 |
147090639 ps |
| T45 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.2559319229 |
|
|
Sep 04 01:58:31 AM UTC 24 |
Sep 04 01:58:34 AM UTC 24 |
337836582 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.1556326076 |
|
|
Sep 04 01:58:32 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
50792986 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_intr_test.3410868508 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
57462530 ps |
| T60 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.799456341 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
22606495 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.2993398165 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
20679869 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.1272975987 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
59289121 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.2682916885 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
103503489 ps |
| T46 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.3686061265 |
|
|
Sep 04 01:58:31 AM UTC 24 |
Sep 04 01:58:35 AM UTC 24 |
139843640 ps |
| T47 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.3369997888 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:36 AM UTC 24 |
146435097 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.416730602 |
|
|
Sep 04 01:58:32 AM UTC 24 |
Sep 04 01:58:36 AM UTC 24 |
118245387 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.2949141860 |
|
|
Sep 04 01:58:35 AM UTC 24 |
Sep 04 01:58:37 AM UTC 24 |
40985522 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.2037230891 |
|
|
Sep 04 01:58:35 AM UTC 24 |
Sep 04 01:58:37 AM UTC 24 |
69502015 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.1887607506 |
|
|
Sep 04 01:58:35 AM UTC 24 |
Sep 04 01:58:37 AM UTC 24 |
57240299 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_errors.2132845199 |
|
|
Sep 04 01:58:33 AM UTC 24 |
Sep 04 01:58:37 AM UTC 24 |
115162813 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.162930645 |
|
|
Sep 04 01:58:35 AM UTC 24 |
Sep 04 01:58:37 AM UTC 24 |
106967065 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.2931154386 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:38 AM UTC 24 |
28284093 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.905480907 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:38 AM UTC 24 |
27174129 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.1379815236 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:38 AM UTC 24 |
38617412 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.3013925772 |
|
|
Sep 04 01:58:35 AM UTC 24 |
Sep 04 01:58:38 AM UTC 24 |
44099557 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.886763463 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:39 AM UTC 24 |
56829633 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.1554337761 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:39 AM UTC 24 |
64776161 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.1606628547 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:39 AM UTC 24 |
126411931 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.2155372296 |
|
|
Sep 04 01:58:37 AM UTC 24 |
Sep 04 01:58:40 AM UTC 24 |
238803240 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.821549982 |
|
|
Sep 04 01:58:38 AM UTC 24 |
Sep 04 01:58:40 AM UTC 24 |
34886749 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.2468514379 |
|
|
Sep 04 01:58:38 AM UTC 24 |
Sep 04 01:58:40 AM UTC 24 |
28709622 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.2116423514 |
|
|
Sep 04 01:58:37 AM UTC 24 |
Sep 04 01:58:40 AM UTC 24 |
87481893 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2785760928 |
|
|
Sep 04 01:58:38 AM UTC 24 |
Sep 04 01:58:40 AM UTC 24 |
51430361 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.1407718630 |
|
|
Sep 04 01:58:35 AM UTC 24 |
Sep 04 01:58:40 AM UTC 24 |
556777073 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.2310595807 |
|
|
Sep 04 01:58:38 AM UTC 24 |
Sep 04 01:58:41 AM UTC 24 |
106970885 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.67063316 |
|
|
Sep 04 01:58:36 AM UTC 24 |
Sep 04 01:58:41 AM UTC 24 |
1269222004 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.1234401863 |
|
|
Sep 04 01:58:38 AM UTC 24 |
Sep 04 01:58:41 AM UTC 24 |
47594475 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.4048894651 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
26572689 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.1074295963 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
26669654 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.470937000 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
49687691 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.3225107748 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
201187421 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.1696131924 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
39833510 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.1962080187 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
107098544 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.978737773 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:42 AM UTC 24 |
181143791 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.1079482907 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:43 AM UTC 24 |
75559849 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_intr_test.1597330033 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:43 AM UTC 24 |
16524478 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.3213772523 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:43 AM UTC 24 |
94348452 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1614691960 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:43 AM UTC 24 |
56679221 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_rw.3946825637 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
50691582 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.209158261 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
133233148 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.2696016874 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
237438635 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_intr_test.3240894328 |
|
|
Sep 04 01:58:45 AM UTC 24 |
Sep 04 01:58:47 AM UTC 24 |
20523800 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_rw.3378594320 |
|
|
Sep 04 01:58:45 AM UTC 24 |
Sep 04 01:58:47 AM UTC 24 |
138143910 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_rw.4182694 |
|
|
Sep 04 01:58:43 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
59625200 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_intr_test.1609683188 |
|
|
Sep 04 01:58:43 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
19810362 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.3849004138 |
|
|
Sep 04 01:58:42 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
47641138 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_errors.3964140911 |
|
|
Sep 04 01:58:41 AM UTC 24 |
Sep 04 01:58:44 AM UTC 24 |
65639126 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.1515373941 |
|
|
Sep 04 01:58:43 AM UTC 24 |
Sep 04 01:58:45 AM UTC 24 |
36338085 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_intr_test.1141121260 |
|
|
Sep 04 01:58:43 AM UTC 24 |
Sep 04 01:58:45 AM UTC 24 |
16454408 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.2034604207 |
|
|
Sep 04 01:58:40 AM UTC 24 |
Sep 04 01:58:45 AM UTC 24 |
1513590482 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_09_03/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_intg_err.1187331960 |
|
|
Sep 04 01:58:42 AM UTC 24 |
Sep 04 01:58:45 AM UTC 24 |
352360726 ps |