| T147 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.4088541946 |
|
|
Sep 24 08:44:25 AM UTC 24 |
Sep 24 08:44:33 AM UTC 24 |
4057714595 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.1233384306 |
|
|
Sep 24 08:44:33 AM UTC 24 |
Sep 24 08:44:35 AM UTC 24 |
39415554 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.1484548117 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:35 AM UTC 24 |
26796254 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.840406808 |
|
|
Sep 24 08:44:33 AM UTC 24 |
Sep 24 08:44:35 AM UTC 24 |
83996892 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.1057323524 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:35 AM UTC 24 |
57006997 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.2127147463 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:35 AM UTC 24 |
440713330 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.3931982906 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
39597846 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.1624047965 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
54922559 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.3372572282 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
30424021 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.3656715212 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
119267955 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.2947717794 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
39953860 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.4198829044 |
|
|
Sep 24 08:44:33 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
302288071 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.3181264521 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
388895672 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.2932096941 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
106698238 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.3285441875 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
27687144 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.1410670249 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
48222922 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.245904460 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
119752786 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.1328794280 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:36 AM UTC 24 |
336689749 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2378688184 |
|
|
Sep 24 08:44:33 AM UTC 24 |
Sep 24 08:44:37 AM UTC 24 |
1526009780 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.2401350700 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:37 AM UTC 24 |
199520241 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2874234040 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:38 AM UTC 24 |
2190213439 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3511962357 |
|
|
Sep 24 08:44:33 AM UTC 24 |
Sep 24 08:44:38 AM UTC 24 |
876637471 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.3494989017 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:38 AM UTC 24 |
618548593 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2086751546 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:38 AM UTC 24 |
795544590 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.4200155691 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
39140264 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.3328845246 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
52330804 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.2907673862 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
34706958 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.1737083137 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
71247793 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.2424854859 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
38407887 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.1657098576 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:45:04 AM UTC 24 |
4605350190 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.3196551546 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
29234781 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.2394223558 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
20620175 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.839740073 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
43050272 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.975184346 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
157968892 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1518584456 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
66515644 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.2727792059 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
160732367 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.3383198091 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
66197481 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.516397656 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
259767533 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.4163477871 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
345427597 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.2366332824 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
96534117 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.4289099638 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
25072357 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.3915834936 |
|
|
Sep 24 08:44:56 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
57005815 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.2492640148 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:58 AM UTC 24 |
145679032 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3814746606 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:59 AM UTC 24 |
933066139 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.186128057 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:46 AM UTC 24 |
106695283 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.1967463740 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
71543763 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.3225477132 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
234366686 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.3065517363 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
177354682 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.712047775 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
38173203 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.2682550807 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
59672032 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.1007313470 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
334076976 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3925706309 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
65836019 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.1439084400 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
199383533 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.4010897604 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
211726530 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.381104048 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:47 AM UTC 24 |
1127041031 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.1947364706 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:48 AM UTC 24 |
758859764 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4040750950 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:48 AM UTC 24 |
1249968655 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4143374732 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:48 AM UTC 24 |
1044778136 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2597203704 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:49 AM UTC 24 |
890251906 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.982678736 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:49 AM UTC 24 |
680254682 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.2666944564 |
|
|
Sep 24 08:44:44 AM UTC 24 |
Sep 24 08:44:50 AM UTC 24 |
1140203806 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.3317288070 |
|
|
Sep 24 08:44:45 AM UTC 24 |
Sep 24 08:44:50 AM UTC 24 |
2407258322 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.742946806 |
|
|
Sep 24 08:44:34 AM UTC 24 |
Sep 24 08:44:52 AM UTC 24 |
10167770150 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.1322295677 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:45:07 AM UTC 24 |
6194120957 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.2974998267 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:56 AM UTC 24 |
82017289 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.4160039279 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:59 AM UTC 24 |
633456218 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.1263949341 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:45:02 AM UTC 24 |
1675107722 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.2891930627 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
33292762 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.1883541564 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
378259544 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.4160275060 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
118196417 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.412785929 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
49179987 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1096078697 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
66590810 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.1246981617 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
184834823 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.3791085435 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
59145130 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.2398172731 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
31146564 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.4011140745 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
83263066 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.1372454449 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
120254688 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3879543630 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:59 AM UTC 24 |
921754487 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.3971929395 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
126921840 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.2921776613 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
27654942 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.607763203 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
398842457 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.691775501 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
158912123 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.3107905974 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
54687012 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.514070878 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
64538760 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.3409785250 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
248794517 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.1600743430 |
|
|
Sep 24 08:44:55 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
314263151 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.602874386 |
|
|
Sep 24 08:44:56 AM UTC 24 |
Sep 24 08:44:57 AM UTC 24 |
125534661 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.1842190334 |
|
|
Sep 24 08:44:56 AM UTC 24 |
Sep 24 08:44:58 AM UTC 24 |
260632054 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.1020266237 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:08 AM UTC 24 |
76272705 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.715100701 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:08 AM UTC 24 |
40963167 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.1907008139 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:08 AM UTC 24 |
38864544 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3396321893 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:08 AM UTC 24 |
54885780 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.3655582213 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:08 AM UTC 24 |
58092177 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.3316828212 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:08 AM UTC 24 |
135428562 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2013753044 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
902562738 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.998738960 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:22 AM UTC 24 |
901560896 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.3137912450 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
65811008 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.183730436 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:24 AM UTC 24 |
801585380 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.259966341 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
51491177 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.941545568 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
31398444 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.1587836579 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:25 AM UTC 24 |
2962442823 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.2363313516 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
90478123 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.650336696 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
91335495 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.54294374 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
38917431 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.2275672553 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
22077870 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.2409391118 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
73172643 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.3577028619 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
124789644 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.2739534135 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
58316104 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.1456841702 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
99088243 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.1350441262 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
74764268 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.1169351688 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
85456533 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.292023265 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
446050420 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.1866480420 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
73820024 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.1832838065 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
52724035 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.2780853416 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
59953341 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.852770493 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
114169440 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.3322587989 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
120564103 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.1467823005 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
103207656 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.1360503232 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:09 AM UTC 24 |
112820419 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.3698730690 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:10 AM UTC 24 |
66698917 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2318533211 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:10 AM UTC 24 |
836930217 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.468446479 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:10 AM UTC 24 |
1009911371 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1753017395 |
|
|
Sep 24 08:45:06 AM UTC 24 |
Sep 24 08:45:11 AM UTC 24 |
860227251 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2441954992 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:11 AM UTC 24 |
755426710 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.4117131710 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:17 AM UTC 24 |
2939441397 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.3253627430 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
27064564 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.4267052620 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
397235447 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.1977039622 |
|
|
Sep 24 08:46:30 AM UTC 24 |
Sep 24 08:46:32 AM UTC 24 |
81237906 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.1812934319 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
77412496 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.2947257375 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
257233781 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.1421158900 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
66996537 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.1099529085 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
75844760 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.1464717648 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
42209030 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3526692057 |
|
|
Sep 24 08:45:07 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
3273316194 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.3501007050 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:20 AM UTC 24 |
180554696 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.2814606382 |
|
|
Sep 24 08:45:18 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
446509916 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.1639199223 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
113289952 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.295691044 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:28 AM UTC 24 |
4504748113 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.2378038830 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
116496432 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.1294740644 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
32718694 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.2292612326 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
135663758 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.142285963 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
65215608 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.2241649813 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
38431993 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1362438648 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
70651237 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.2006441934 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
139851067 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.2639009937 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
446793084 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.564339559 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
33878954 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.1110480831 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
31799824 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.2585711166 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
179131457 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.1390389291 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
37061159 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.2671404060 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
122263176 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.176184539 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
45189811 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.1913621684 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
103690782 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.2296993663 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
63079255 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.1612969875 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
72246654 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.3090863181 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
229032014 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.3058984667 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:21 AM UTC 24 |
107045422 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.3655587980 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:22 AM UTC 24 |
331666546 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3007243630 |
|
|
Sep 24 08:45:19 AM UTC 24 |
Sep 24 08:45:23 AM UTC 24 |
866639733 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.1212544144 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
89496443 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.1567979956 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
46232114 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.2757418288 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
39428242 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.3981244346 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:34 AM UTC 24 |
57568969 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.3049348177 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
113579852 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.4127910090 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
181628796 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.2020762599 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
168124552 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.111313912 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
161511413 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.3644095818 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
58335261 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.1275525558 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
60985920 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.4034459884 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
213923761 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.2706867598 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
181774733 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.2935977207 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
38880062 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.544610797 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
31387385 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.3399657842 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
60619371 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.1208960946 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
153042307 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.791737009 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
23645852 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.393003990 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
27943830 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.3795600293 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
76953182 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.3111030598 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
83757297 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.2470633793 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:35 AM UTC 24 |
111459031 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4269421420 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:36 AM UTC 24 |
1366329553 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2705893740 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:37 AM UTC 24 |
796692280 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3349662080 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:37 AM UTC 24 |
824725551 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1083565886 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:37 AM UTC 24 |
844829589 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.159520909 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:38 AM UTC 24 |
2600078540 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.1820499030 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:38 AM UTC 24 |
2890325109 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.1169349152 |
|
|
Sep 24 08:45:32 AM UTC 24 |
Sep 24 08:45:38 AM UTC 24 |
1363202925 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.721698125 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
36784893 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.1164873102 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
52997964 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2818118303 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
48035215 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.3520829796 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
117086278 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.3087672635 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
32556150 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.4161588147 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
104028533 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.186458833 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
352470080 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.555315356 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
30821694 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3689556923 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
69610152 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.3607251003 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:47 AM UTC 24 |
166612319 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.2104209391 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
26213195 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.4231727035 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
90733032 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.2738580881 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
39171102 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.3151674901 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
308584996 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.3942219661 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
58531632 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.1421132144 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
567799371 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1296702605 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
77638132 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.482497634 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
298971630 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.1605635224 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
199424305 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.551202260 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
89494973 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.3115103001 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
192957952 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.3875558684 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
22220689 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.3985704335 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
91122448 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.725878365 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
39626931 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.1891738902 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
312380686 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.4083809726 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
211310482 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.2834833387 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
397850518 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.981955424 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
88901919 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.1960753395 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:48 AM UTC 24 |
84224684 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1500851518 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:49 AM UTC 24 |
1084067256 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1369421760 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:49 AM UTC 24 |
991228646 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.4262636710 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:50 AM UTC 24 |
3034785490 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.862548738 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:50 AM UTC 24 |
887684771 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.814332928 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:50 AM UTC 24 |
902307201 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.2727629334 |
|
|
Sep 24 08:45:33 AM UTC 24 |
Sep 24 08:45:54 AM UTC 24 |
6117665046 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.3807174199 |
|
|
Sep 24 08:45:45 AM UTC 24 |
Sep 24 08:45:55 AM UTC 24 |
2159415393 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.2193950289 |
|
|
Sep 24 08:45:46 AM UTC 24 |
Sep 24 08:45:55 AM UTC 24 |
2165012869 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.108744743 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
23328609 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.3481704349 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
41911773 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.4136551910 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
176686412 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.1895793839 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
63741281 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2963662912 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
119032047 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.403376542 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
31679382 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.3725378343 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
124514844 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.896661193 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:01 AM UTC 24 |
54180101 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.1835553818 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
425862727 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.2010383390 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
83420271 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.3936493632 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
94264568 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.582791935 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
69555272 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.23280121 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
114484401 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.2312011571 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
579776376 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.2020965540 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
67980810 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.47705559 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
531415700 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.1719235453 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
24538031 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.363705243 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
67301778 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.3088444640 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
315123013 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.857126926 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:02 AM UTC 24 |
355564867 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.325992721 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:03 AM UTC 24 |
940122841 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4189421891 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:03 AM UTC 24 |
864209460 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.824158796 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:04 AM UTC 24 |
1115219031 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.389904387 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:05 AM UTC 24 |
826838073 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.4043033478 |
|
|
Sep 24 08:45:59 AM UTC 24 |
Sep 24 08:46:05 AM UTC 24 |
1689145740 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.241987467 |
|
|
Sep 24 08:46:00 AM UTC 24 |
Sep 24 08:46:06 AM UTC 24 |
4981129135 ps |