Unified Coverage Report :: Module :: prim_generic_xor2

Module : prim_generic_xor2

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/pwrmgr-sim-vcs/default/sim-vcs/../src/lowrisc_prim_generic_xor2_0/rtl/prim_generic_xor2.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_cdc.u_sync_rom_ctrl.gen_flops.gen_stable_chks.u_mubi_xor.gen_generic.u_impl_generic	100.00	100.00

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Module Instance : tb.dut.u_cdc.u_sync_rom_ctrl.gen_flops.gen_stable_chks.u_mubi_xor.gen_generic.u_impl_generic

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_flops.gen_stable_chks.u_mubi_xor

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

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Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : prim_generic_xor2

	Line No.	Total	Covered	Percent
TOTAL		1	1	100.00
CONT_ASSIGN	15	1	1	100.00

14                      
15         1/1            assign out_o = in0_i ^ in1_i;
           Tests:       T1 T2 T3