KEYMGR Simulation Results

Saturday April 20 2024 19:02:14 UTC

GitHub Revision: `d4aa482ae5`

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 4197540902

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_smoke	1.191m	3.886ms	50	50	100.00
V1	random	keymgr_random	53.600s	2.035ms	50	50	100.00
V1	csr_hw_reset	keymgr_csr_hw_reset	1.310s	49.161us	5	5	100.00
V1	csr_rw	keymgr_csr_rw	1.330s	75.042us	16	20	80.00
V1	csr_bit_bash	keymgr_csr_bit_bash	15.740s	884.439us	3	5	60.00
V1	csr_aliasing	keymgr_csr_aliasing	15.340s	840.105us	4	5	80.00
V1	csr_mem_rw_with_rand_reset	keymgr_csr_mem_rw_with_rand_reset	2.190s	30.010us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_csr_rw	1.330s	75.042us	16	20	80.00
		keymgr_csr_aliasing	15.340s	840.105us	4	5	80.00
V1		TOTAL			148	155	95.48
V2	cfgen_during_op	keymgr_cfg_regwen	2.169m	4.963ms	49	50	98.00
V2	sideload	keymgr_sideload	54.720s	5.072ms	50	50	100.00
		keymgr_sideload_kmac	1.541m	6.724ms	50	50	100.00
		keymgr_sideload_aes	1.483m	10.344ms	50	50	100.00
		keymgr_sideload_otbn	58.990s	1.758ms	50	50	100.00
V2	direct_to_disabled_state	keymgr_direct_to_disabled	35.470s	1.754ms	50	50	100.00
V2	lc_disable	keymgr_lc_disable	35.860s	6.277ms	48	50	96.00
V2	kmac_error_response	keymgr_kmac_rsp_err	46.690s	2.437ms	45	50	90.00
V2	invalid_sw_input	keymgr_sw_invalid_input	1.152m	10.913ms	50	50	100.00
V2	invalid_hw_input	keymgr_hwsw_invalid_input	1.207m	6.543ms	50	50	100.00
V2	sync_async_fault_cross	keymgr_sync_async_fault_cross	26.420s	10.392ms	49	50	98.00
V2	stress_all	keymgr_stress_all	3.488m	9.222ms	47	50	94.00
V2	intr_test	keymgr_intr_test	0.910s	51.352us	50	50	100.00
V2	alert_test	keymgr_alert_test	0.950s	17.552us	50	50	100.00
V2	tl_d_oob_addr_access	keymgr_tl_errors	5.390s	604.622us	20	20	100.00
V2	tl_d_illegal_access	keymgr_tl_errors	5.390s	604.622us	20	20	100.00
V2	tl_d_outstanding_access	keymgr_csr_hw_reset	1.310s	49.161us	5	5	100.00
		keymgr_csr_rw	1.330s	75.042us	16	20	80.00
		keymgr_csr_aliasing	15.340s	840.105us	4	5	80.00
		keymgr_same_csr_outstanding	2.460s	88.077us	12	20	60.00
V2	tl_d_partial_access	keymgr_csr_hw_reset	1.310s	49.161us	5	5	100.00
		keymgr_csr_rw	1.330s	75.042us	16	20	80.00
		keymgr_csr_aliasing	15.340s	840.105us	4	5	80.00
		keymgr_same_csr_outstanding	2.460s	88.077us	12	20	60.00
V2		TOTAL			720	740	97.30
V2S	sec_cm_additional_check	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	tl_intg_err	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
		keymgr_tl_intg_err	42.630s	1.415ms	14	20	70.00
V2S	shadow_reg_update_error	keymgr_shadow_reg_errors	1.441m	9.181ms	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_shadow_reg_errors	1.441m	9.181ms	20	20	100.00
V2S	shadow_reg_storage_error	keymgr_shadow_reg_errors	1.441m	9.181ms	20	20	100.00
V2S	shadowed_reset_glitch	keymgr_shadow_reg_errors	1.441m	9.181ms	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_shadow_reg_errors_with_csr_rw	17.530s	552.239us	15	20	75.00
V2S	prim_count_check	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	prim_fsm_check	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_bus_integrity	keymgr_tl_intg_err	42.630s	1.415ms	14	20	70.00
V2S	sec_cm_config_shadow	keymgr_shadow_reg_errors	1.441m	9.181ms	20	20	100.00
V2S	sec_cm_op_config_regwen	keymgr_cfg_regwen	2.169m	4.963ms	49	50	98.00
V2S	sec_cm_reseed_config_regwen	keymgr_random	53.600s	2.035ms	50	50	100.00
		keymgr_csr_rw	1.330s	75.042us	16	20	80.00
V2S	sec_cm_sw_binding_config_regwen	keymgr_random	53.600s	2.035ms	50	50	100.00
		keymgr_csr_rw	1.330s	75.042us	16	20	80.00
V2S	sec_cm_max_key_ver_config_regwen	keymgr_random	53.600s	2.035ms	50	50	100.00
		keymgr_csr_rw	1.330s	75.042us	16	20	80.00
V2S	sec_cm_lc_ctrl_intersig_mubi	keymgr_lc_disable	35.860s	6.277ms	48	50	96.00
V2S	sec_cm_constants_consistency	keymgr_hwsw_invalid_input	1.207m	6.543ms	50	50	100.00
V2S	sec_cm_intersig_consistency	keymgr_hwsw_invalid_input	1.207m	6.543ms	50	50	100.00
V2S	sec_cm_hw_key_sw_noaccess	keymgr_random	53.600s	2.035ms	50	50	100.00
V2S	sec_cm_output_keys_ctrl_redun	keymgr_sideload_protect	30.160s	1.245ms	50	50	100.00
V2S	sec_cm_ctrl_fsm_sparse	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_data_fsm_sparse	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_ctrl_fsm_local_esc	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_ctrl_fsm_consistency	keymgr_custom_cm	56.720s	2.001ms	50	50	100.00
V2S	sec_cm_ctrl_fsm_global_esc	keymgr_lc_disable	35.860s	6.277ms	48	50	96.00
V2S	sec_cm_ctrl_ctr_redun	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_kmac_if_fsm_sparse	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_kmac_if_ctr_redun	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_kmac_if_cmd_ctrl_consistency	keymgr_custom_cm	56.720s	2.001ms	50	50	100.00
V2S	sec_cm_kmac_if_done_ctrl_consistency	keymgr_custom_cm	56.720s	2.001ms	50	50	100.00
V2S	sec_cm_reseed_ctr_redun	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_side_load_sel_ctrl_consistency	keymgr_custom_cm	56.720s	2.001ms	50	50	100.00
V2S	sec_cm_sideload_ctrl_fsm_sparse	keymgr_sec_cm	2.794m	6.560ms	5	5	100.00
V2S	sec_cm_ctrl_key_integrity	keymgr_custom_cm	56.720s	2.001ms	50	50	100.00
V2S		TOTAL			154	165	93.33
V3	stress_all_with_rand_reset	keymgr_stress_all_with_rand_reset	20.860s	1.886ms	46	50	92.00
V3		TOTAL			46	50	92.00
		TOTAL			1068	1110	96.22

Testplan Progress

Items	Total	Written	Passing	Progress
V1	7	7	4	57.14
V2	16	16	10	62.50
V2S	6	6	4	66.67
V3	1	1	0	0.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.82	99.10	98.11	98.36	100.00	99.11	98.41	91.66

Failure Buckets

Offending '(d2h.d_error || ((d2h.d_data & *) == (exp_vals[*] & *)))' has 26 failures:

Test keymgr_csr_bit_bash has 2 failures.

0.keymgr_csr_bit_bash.2975467772
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/0.keymgr_csr_bit_bash/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[13] & 'hffffffff)))'
  UVM_ERROR @ 698200822 ps: (keymgr_csr_assert_fpv.sv:406) [ASSERT FAILED] attest_sw_binding_0_rd_A
  UVM_INFO @ 698200822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.keymgr_csr_bit_bash.2760208861
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/3.keymgr_csr_bit_bash/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[13] & 'hffffffff)))'
  UVM_ERROR @ 1569927216 ps: (keymgr_csr_assert_fpv.sv:406) [ASSERT FAILED] attest_sw_binding_0_rd_A
  UVM_INFO @ 1569927216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_same_csr_outstanding has 8 failures.

1.keymgr_same_csr_outstanding.1264751595
Line 254, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/1.keymgr_same_csr_outstanding/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[9] & 'hffffffff)))'
  UVM_ERROR @ 928299353 ps: (keymgr_csr_assert_fpv.sv:386) [ASSERT FAILED] sealing_sw_binding_4_rd_A
  UVM_INFO @ 928299353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.keymgr_same_csr_outstanding.722938872
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/5.keymgr_same_csr_outstanding/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[20] & 'hffffffff)))'
  UVM_ERROR @  69225023 ps: (keymgr_csr_assert_fpv.sv:441) [ASSERT FAILED] attest_sw_binding_7_rd_A
  UVM_INFO @  69225023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

Test keymgr_csr_aliasing has 1 failures.

2.keymgr_csr_aliasing.862437200
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/2.keymgr_csr_aliasing/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[11] & 'hffffffff)))'
  UVM_ERROR @ 834543619 ps: (keymgr_csr_assert_fpv.sv:396) [ASSERT FAILED] sealing_sw_binding_6_rd_A
  UVM_INFO @ 834543619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_shadow_reg_errors_with_csr_rw has 5 failures.

3.keymgr_shadow_reg_errors_with_csr_rw.1547069305
Line 258, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/3.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[20] & 'hffffffff)))'
  UVM_ERROR @  31971538 ps: (keymgr_csr_assert_fpv.sv:441) [ASSERT FAILED] attest_sw_binding_7_rd_A
  UVM_INFO @  31971538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

10.keymgr_shadow_reg_errors_with_csr_rw.2921245812
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/10.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[15] & 'hffffffff)))'
  UVM_ERROR @  31865030 ps: (keymgr_csr_assert_fpv.sv:416) [ASSERT FAILED] attest_sw_binding_2_rd_A
  UVM_INFO @  31865030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

Test keymgr_tl_intg_err has 6 failures.

4.keymgr_tl_intg_err.4213517009
Line 273, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/4.keymgr_tl_intg_err/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[10] & 'hffffffff)))'
  UVM_ERROR @  87842598 ps: (keymgr_csr_assert_fpv.sv:391) [ASSERT FAILED] sealing_sw_binding_5_rd_A
  UVM_INFO @  87842598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

7.keymgr_tl_intg_err.3906860995
Line 287, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/7.keymgr_tl_intg_err/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[13] & 'hffffffff)))'
  UVM_ERROR @  58754879 ps: (keymgr_csr_assert_fpv.sv:406) [ASSERT FAILED] attest_sw_binding_0_rd_A
  UVM_INFO @  58754879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 4 more failures.

... and 1 more tests.

UVM_ERROR (keymgr_scoreboard.sv:1019) [scoreboard] Check failed act != exp (* [*] vs * [*]) cdi_type: Attestation has 5 failures:

Test keymgr_kmac_rsp_err has 5 failures.

7.keymgr_kmac_rsp_err.3697005082
Line 442, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/7.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @ 106686704 ps: (keymgr_scoreboard.sv:1019) [uvm_test_top.env.scoreboard] Check failed act != exp (497888984775110093416648574717641554366238407869510720456238523966587699363344593480204458109427581991325030981536840675189800569316134171872578430842672704141786794163916940598634082964337860011709069132657349770850208559485394974244664771905766419538404712965008810568334177840472804514135152261060761940484444758704072346209159480912105993902718623396589111178777419830921759031632560597234338605641342676702751220498675255554156457619971892677049882857356807897151801574227451231055222985535791107 [0x9b67320bbbd726e5e93f4e4354d70ec677f9d5711abac401a14cb4481a05198c3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9967a833c90bf5e3f783c6ed59da1cc6da1e295f08ce229b071f11bbc66ee80e85b99e31ddd0d121997492ac621549f2223f3ad028a1a470a958c0a48fc1117e5760f6b5d152a913d987bbdf894871d6ddfa8c283358387124bd3b98d112a020eedc285796504ec5d8681df95a185350572c5046c80600f7814e81dc1224b6df09e1b28a268170956b58f4164b6682003] vs 497888984775110093416648574717641554366238407869510720456238523966587699363344593480204458109427581991325030981536840675189800569316134171872578430842672704141786794163916940598634082964337860011709069132657349770850208559485394974244664771905766419538404712965008810568334177840472804514135152261060761940484444758704072346209159480912105993902718623396589111178777419830921759031632560597234338605641342676702751220498675255554156457619971892677049882857356807897151801574227451231055222985535791107 [0x9b67320bbbd726e5e93f4e4354d70ec677f9d5711abac401a14cb4481a05198c3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9967a833c90bf5e3f783c6ed59da1cc6da1e295f08ce229b071f11bbc66ee80e85b99e31ddd0d121997492ac621549f2223f3ad028a1a470a958c0a48fc1117e5760f6b5d152a913d987bbdf894871d6ddfa8c283358387124bd3b98d112a020eedc285796504ec5d8681df95a185350572c5046c80600f7814e81dc1224b6df09e1b28a268170956b58f4164b6682003]) cdi_type: Attestation
  
   DiversificationKey act: 0x72c5046c80600f7814e81dc1224b6df09e1b28a268170956b58f4164b6682003, exp: 0x72c5046c80600f7814e81dc1224b6df09e1b28a268170956b58f4164b6682003
   RomDigests act: 0x23f3ad028a1a470a958c0a48fc1117e5760f6b5d152a913d987bbdf894871d6ddfa8c283358387124bd3b98d112a020eedc285796504ec5d8681df95a1853505, exp: 0x23f3ad028a1a470a958c0a48fc1117e5760f6b5d152a913d987bbdf894871d6ddfa8c283358387124bd3b98d112a020eedc285796504ec5d8681df95a1853505
   HealthMeasurement act: 0x5b99e31ddd0d121997492ac621549f22, exp: 0x5b99e31ddd0d121997492ac621549f22

29.keymgr_kmac_rsp_err.4063716377
Line 293, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/29.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @   9144764 ps: (keymgr_scoreboard.sv:1019) [uvm_test_top.env.scoreboard] Check failed act != exp (1605930754565491250042339328357387143542526556207941497641627338815315533913313089529527633267547022900761720476669882678780222178542386563586985982426830510152842862436777182831826401582623576884360907498049127111724089601158002376479477607239310021509175794728189794570491553077594207548948198371956490229385986283127080527448933769024633227622452094053556139903753465235032294055658474903502137393090670890612567788088184 [0x3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9000000000000000000000000000000000000000000000000000000000000f0f000000000000000005cfbd765ce33f34ea20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507fa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78] vs 1605930754565491250042339328357387143542526556207941497641627338815315533913313089529527633267547022900761720476669882678780222178542386563586985982426830510152842862436777182831826401582623576884360907498049127111724089601158002376479477607239310021509175794728189794570491553077594207548948198371956490229385986283127080527448933769024633227622452094053556139903753465235032294055658474903502137393090670890612567788088184 [0x3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9000000000000000000000000000000000000000000000000000000000000f0f000000000000000005cfbd765ce33f34ea20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507fa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78]) cdi_type: Attestation
  
   DiversificationKey act: 0xfa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78, exp: 0xfa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78
   RomDigests act: 0xa20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507, exp: 0xa20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507
   HealthMeasurement act: 0x5cfbd765ce33f34e, exp: 0x5cfbd765ce33f34e

... and 3 more failures.

UVM_ERROR (cip_base_scoreboard.sv:281) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:* has 4 failures:

Test keymgr_cfg_regwen has 1 failures.

9.keymgr_cfg_regwen.350246655
Line 339, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/9.keymgr_cfg_regwen/latest/run.log

  UVM_ERROR @  12809736 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @  12809736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_stress_all has 2 failures.

16.keymgr_stress_all.3647618383
Line 1987, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/16.keymgr_stress_all/latest/run.log

  UVM_ERROR @ 2915434606 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @ 2915434606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

34.keymgr_stress_all.2757286654
Line 543, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/34.keymgr_stress_all/latest/run.log

  UVM_ERROR @ 150208114 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @ 150208114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_sync_async_fault_cross has 1 failures.

17.keymgr_sync_async_fault_cross.143737857
Line 304, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/17.keymgr_sync_async_fault_cross/latest/run.log

  UVM_ERROR @  21885452 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @  21885452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (keymgr_scoreboard.sv:1017) [scoreboard] Check failed act == exp (* [*] vs * [*]) cdi_type: Attestation has 3 failures:

Test keymgr_stress_all_with_rand_reset has 3 failures.

12.keymgr_stress_all_with_rand_reset.491903902
Line 1707, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/12.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 305499934 ps: (keymgr_scoreboard.sv:1017) [uvm_test_top.env.scoreboard] Check failed act == exp (420394867870922973447070512737182870950366534110248533457091739957747108283289049223631643027256929283552445629338926373633771546706196179125759681971805840853359833436224821065690852661509203028755872391801381259315740697720014068465008203879078717365181870845735445566782496219416264984790286887571150237298383046071855454144171620460707617535975189903485884759348894813957071852753258010669877535638837193937728145316690190886359413835517892780000935930496485715004921370452521792404131574200314526 [0x8337200ba45a58cc000000000b88f425221b88ebb03902cc15897de13c483f353a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f959fabccb7a56396a2ee051f226af37a839c6958c51218b054674513df69786515f8540eb39ffa12ccf7b3d14e52e6d7997588e773cc9877ac1594b27284c81ede5ffb522023607d62b4b06899c2682e8f88e0d5660636ceb1ebe224d679f804af2eb509390822f646251d9e85d58a0004c5a79b5d382d92639cf0a4d800fbacd220f3cffc599aa4d50fc50b64fbaaa9e] vs 719663421452646490661634641588273626283517509767085253136361432891219245941241536168230726431875794253255537046972930623748280525155363870839217737097392674035560825869417578212582277897066001154468896756556923286424278903414896413852521641321553423565243978360638876139393433410162602355079105005622961397454608129090973227744665084357392339866145930060689668910918070795496282664686248441674377348089662030206322307610803501802998165227295478291837777924261680310287118072022826117912078426221214 [0x3980f94c2cfc4319db2d68673c13e558bfa0fc58cf01212fae896ad284ec723a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f959fabccb7a56396a2ee051f226af37a839c6958c51218b054674513df69786515f8540eb39ffa12ccf7b3d14e52e6d7997588e773cc9877ac1594b27284c81ede5ffb522023607d62b4b06899c2682e8f88e0d5660636ceb1ebe224d679f804af2eb509390822f646251d9e85d58a0004c5a79b5d382d92639cf0a4d800fbacd220f3cffc599aa4d50fc50b64fbaaa9e]) cdi_type: Attestation
  
   DiversificationKey act: 0x4c5a79b5d382d92639cf0a4d800fbacd220f3cffc599aa4d50fc50b64fbaaa9e, exp: 0x4c5a79b5d382d92639cf0a4d800fbacd220f3cffc599aa4d50fc50b64fbaaa9e
   RomDigests act: 0x97588e773cc9877ac1594b27284c81ede5ffb522023607d62b4b06899c2682e8f88e0d5660636ceb1ebe224d679f804af2eb509390822f646251d9e85d58a000, exp: 0x97588e773cc9877ac1594b27284c81ede5ffb522023607d62b4b06899c2682e8f88e0d5660636ceb1ebe224d679f804af2eb509390822f646251d9e85d58a000
   HealthMeasurement act: 0x5f8540eb39ffa12ccf7b3d14e52e6d79, exp: 0x5f8540eb39ffa12ccf7b3d14e52e6d79

26.keymgr_stress_all_with_rand_reset.4154526299
Line 1353, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/26.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 110526384 ps: (keymgr_scoreboard.sv:1017) [uvm_test_top.env.scoreboard] Check failed act == exp (533029186236677347221778935841077777415737178930030981383340196973046638927144100420040450859877432682529386086391257406699567361426047916092714043465962283807839458924460571083297445647122720141975083217206246817476315540650650103792731848491889075605227624055372758526213675684001961622010702532795720182717966538437246265605540308726317713098710952907002411637780941893315688607357653498007290113553976108987030309445662998242056688095696218244656569043140155434655526752704459292202759896450837260 [0xa65f077d941ab2d1da1754cddaccd4a430fc1a2200000000a0bb97600e350ae03a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f94fa4e46cc47887b565f04c812a3c7a8aed7d06d4332c255e3d86205d1ab996bd529c492b403bddef225c9f72ef035e082cd2d4221ea65c117c6176704fdee14a258352c900d30fa58a5b847c04d506b4cbd540a8ca8d2223ca7e13e4e48646698c110ed7398cb0fdbcf3efb7772716d5aa7e579719764d4a49daa10ef9148c22ef1f13801dd9317dc561eea80995ab0c] vs 583187328765312473621119189989280897627361663362528254734269782922406118749205371654625315647357749179401905532437639758191336518540081331555978377154837815764692416383735481609383040330581097071467400840929604961411253812304785489819127135679381419311708874615263799020598761850007047377831329617220255356841583371648915468759895890639926031249449161063916739983945607583497524644129157427005730133672626474126241054489082950956184164750873203482985037533789408042228569729204866765497078712274103052 [0xb606da50993a696184d533a03803e71e1739699044d40a329995b6d9776edbdd3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f94fa4e46cc47887b565f04c812a3c7a8aed7d06d4332c255e3d86205d1ab996bd529c492b403bddef225c9f72ef035e082cd2d4221ea65c117c6176704fdee14a258352c900d30fa58a5b847c04d506b4cbd540a8ca8d2223ca7e13e4e48646698c110ed7398cb0fdbcf3efb7772716d5aa7e579719764d4a49daa10ef9148c22ef1f13801dd9317dc561eea80995ab0c]) cdi_type: Attestation
  
   DiversificationKey act: 0xaa7e579719764d4a49daa10ef9148c22ef1f13801dd9317dc561eea80995ab0c, exp: 0xaa7e579719764d4a49daa10ef9148c22ef1f13801dd9317dc561eea80995ab0c
   RomDigests act: 0x2cd2d4221ea65c117c6176704fdee14a258352c900d30fa58a5b847c04d506b4cbd540a8ca8d2223ca7e13e4e48646698c110ed7398cb0fdbcf3efb7772716d5, exp: 0x2cd2d4221ea65c117c6176704fdee14a258352c900d30fa58a5b847c04d506b4cbd540a8ca8d2223ca7e13e4e48646698c110ed7398cb0fdbcf3efb7772716d5
   HealthMeasurement act: 0x529c492b403bddef225c9f72ef035e08, exp: 0x529c492b403bddef225c9f72ef035e08

... and 1 more failures.

UVM_ERROR (keymgr_scoreboard.sv:750) [scoreboard] Check failed item.d_data ==gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.sw_share1_output_*` has 2 failures:

Test keymgr_lc_disable has 1 failures.

23.keymgr_lc_disable.156808143
Line 438, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/23.keymgr_lc_disable/latest/run.log

  UVM_ERROR @ 136794075 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (3198972219 [0xbeac713b] vs 958813825 [0x39265681]) reg name: keymgr_reg_block.sw_share1_output_6
  UVM_INFO @ 136794075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_stress_all has 1 failures.

38.keymgr_stress_all.3305150041
Line 2021, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/38.keymgr_stress_all/latest/run.log

  UVM_ERROR @ 8251393519 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (3137640486 [0xbb049826] vs 33628125 [0x2011fdd]) reg name: keymgr_reg_block.sw_share1_output_1
  UVM_INFO @ 8251393519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (keymgr_scoreboard.sv:750) [scoreboard] Check failed item.d_data ==gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.sw_share0_output_*` has 1 failures:
- Test keymgr_lc_disable has 1 failures.
  - 10.keymgr_lc_disable.3368904492
    Line 342, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/10.keymgr_lc_disable/latest/run.log
```
  UVM_ERROR @  22768000 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (2715909262 [0xa1e17c8e] vs 0 [0x0]) reg name: keymgr_reg_block.sw_share0_output_3
  UVM_INFO @  22768000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (keymgr_scoreboard.sv:674) [scoreboard] Check failed item.d_data == addr_phase_op_status (* [*] vs * [*]) has 1 failures:
- Test keymgr_stress_all_with_rand_reset has 1 failures.
  - 23.keymgr_stress_all_with_rand_reset.3449355486
    Line 814, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/23.keymgr_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 480180998 ps: (keymgr_scoreboard.sv:674) [uvm_test_top.env.scoreboard] Check failed item.d_data == addr_phase_op_status (1 [0x1] vs 2 [0x2])
  UVM_INFO @ 480180998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```