KEYMGR Simulation Results

Saturday April 27 2024 19:02:11 UTC

GitHub Revision: `d4aa482ae5`

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 2436371151

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_smoke	1.035m	9.174ms	50	50	100.00
V1	random	keymgr_random	1.756m	6.145ms	50	50	100.00
V1	csr_hw_reset	keymgr_csr_hw_reset	1.430s	26.090us	5	5	100.00
V1	csr_rw	keymgr_csr_rw	1.690s	53.356us	19	20	95.00
V1	csr_bit_bash	keymgr_csr_bit_bash	14.960s	867.359us	2	5	40.00
V1	csr_aliasing	keymgr_csr_aliasing	17.200s	8.684ms	4	5	80.00
V1	csr_mem_rw_with_rand_reset	keymgr_csr_mem_rw_with_rand_reset	2.270s	61.991us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_csr_rw	1.690s	53.356us	19	20	95.00
		keymgr_csr_aliasing	17.200s	8.684ms	4	5	80.00
V1		TOTAL			150	155	96.77
V2	cfgen_during_op	keymgr_cfg_regwen	2.677m	35.059ms	50	50	100.00
V2	sideload	keymgr_sideload	1.032m	39.230ms	50	50	100.00
		keymgr_sideload_kmac	1.274m	24.055ms	50	50	100.00
		keymgr_sideload_aes	1.060m	1.744ms	49	50	98.00
		keymgr_sideload_otbn	1.152m	2.258ms	50	50	100.00
V2	direct_to_disabled_state	keymgr_direct_to_disabled	35.330s	24.087ms	50	50	100.00
V2	lc_disable	keymgr_lc_disable	15.200s	509.607us	48	50	96.00
V2	kmac_error_response	keymgr_kmac_rsp_err	1.440m	12.617ms	47	50	94.00
V2	invalid_sw_input	keymgr_sw_invalid_input	57.150s	8.666ms	50	50	100.00
V2	invalid_hw_input	keymgr_hwsw_invalid_input	1.762m	19.331ms	50	50	100.00
V2	sync_async_fault_cross	keymgr_sync_async_fault_cross	22.720s	1.787ms	50	50	100.00
V2	stress_all	keymgr_stress_all	16.736m	34.331ms	49	50	98.00
V2	intr_test	keymgr_intr_test	0.920s	30.419us	50	50	100.00
V2	alert_test	keymgr_alert_test	1.170s	120.381us	50	50	100.00
V2	tl_d_oob_addr_access	keymgr_tl_errors	5.540s	409.402us	20	20	100.00
V2	tl_d_illegal_access	keymgr_tl_errors	5.540s	409.402us	20	20	100.00
V2	tl_d_outstanding_access	keymgr_csr_hw_reset	1.430s	26.090us	5	5	100.00
		keymgr_csr_rw	1.690s	53.356us	19	20	95.00
		keymgr_csr_aliasing	17.200s	8.684ms	4	5	80.00
		keymgr_same_csr_outstanding	2.620s	39.440us	12	20	60.00
V2	tl_d_partial_access	keymgr_csr_hw_reset	1.430s	26.090us	5	5	100.00
		keymgr_csr_rw	1.690s	53.356us	19	20	95.00
		keymgr_csr_aliasing	17.200s	8.684ms	4	5	80.00
		keymgr_same_csr_outstanding	2.620s	39.440us	12	20	60.00
V2		TOTAL			725	740	97.97
V2S	sec_cm_additional_check	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	tl_intg_err	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
		keymgr_tl_intg_err	48.840s	4.748ms	17	20	85.00
V2S	shadow_reg_update_error	keymgr_shadow_reg_errors	31.420s	2.046ms	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_shadow_reg_errors	31.420s	2.046ms	20	20	100.00
V2S	shadow_reg_storage_error	keymgr_shadow_reg_errors	31.420s	2.046ms	20	20	100.00
V2S	shadowed_reset_glitch	keymgr_shadow_reg_errors	31.420s	2.046ms	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_shadow_reg_errors_with_csr_rw	12.070s	305.494us	12	20	60.00
V2S	prim_count_check	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	prim_fsm_check	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_bus_integrity	keymgr_tl_intg_err	48.840s	4.748ms	17	20	85.00
V2S	sec_cm_config_shadow	keymgr_shadow_reg_errors	31.420s	2.046ms	20	20	100.00
V2S	sec_cm_op_config_regwen	keymgr_cfg_regwen	2.677m	35.059ms	50	50	100.00
V2S	sec_cm_reseed_config_regwen	keymgr_random	1.756m	6.145ms	50	50	100.00
		keymgr_csr_rw	1.690s	53.356us	19	20	95.00
V2S	sec_cm_sw_binding_config_regwen	keymgr_random	1.756m	6.145ms	50	50	100.00
		keymgr_csr_rw	1.690s	53.356us	19	20	95.00
V2S	sec_cm_max_key_ver_config_regwen	keymgr_random	1.756m	6.145ms	50	50	100.00
		keymgr_csr_rw	1.690s	53.356us	19	20	95.00
V2S	sec_cm_lc_ctrl_intersig_mubi	keymgr_lc_disable	15.200s	509.607us	48	50	96.00
V2S	sec_cm_constants_consistency	keymgr_hwsw_invalid_input	1.762m	19.331ms	50	50	100.00
V2S	sec_cm_intersig_consistency	keymgr_hwsw_invalid_input	1.762m	19.331ms	50	50	100.00
V2S	sec_cm_hw_key_sw_noaccess	keymgr_random	1.756m	6.145ms	50	50	100.00
V2S	sec_cm_output_keys_ctrl_redun	keymgr_sideload_protect	13.510s	628.313us	50	50	100.00
V2S	sec_cm_ctrl_fsm_sparse	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_data_fsm_sparse	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_ctrl_fsm_local_esc	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_ctrl_fsm_consistency	keymgr_custom_cm	1.177m	2.190ms	50	50	100.00
V2S	sec_cm_ctrl_fsm_global_esc	keymgr_lc_disable	15.200s	509.607us	48	50	96.00
V2S	sec_cm_ctrl_ctr_redun	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_kmac_if_fsm_sparse	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_kmac_if_ctr_redun	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_kmac_if_cmd_ctrl_consistency	keymgr_custom_cm	1.177m	2.190ms	50	50	100.00
V2S	sec_cm_kmac_if_done_ctrl_consistency	keymgr_custom_cm	1.177m	2.190ms	50	50	100.00
V2S	sec_cm_reseed_ctr_redun	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_side_load_sel_ctrl_consistency	keymgr_custom_cm	1.177m	2.190ms	50	50	100.00
V2S	sec_cm_sideload_ctrl_fsm_sparse	keymgr_sec_cm	58.220s	10.071ms	5	5	100.00
V2S	sec_cm_ctrl_key_integrity	keymgr_custom_cm	1.177m	2.190ms	50	50	100.00
V2S		TOTAL			154	165	93.33
V3	stress_all_with_rand_reset	keymgr_stress_all_with_rand_reset	21.210s	326.064us	47	50	94.00
V3		TOTAL			47	50	94.00
		TOTAL			1076	1110	96.94

Testplan Progress

Items	Total	Written	Passing	Progress
V1	7	7	4	57.14
V2	16	16	11	68.75
V2S	6	6	4	66.67
V3	1	1	0	0.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.83	99.10	97.79	98.64	100.00	99.20	98.41	91.63

Failure Buckets

Offending '(d2h.d_error || ((d2h.d_data & *) == (exp_vals[*] & *)))' has 24 failures:

Test keymgr_shadow_reg_errors_with_csr_rw has 8 failures.

1.keymgr_shadow_reg_errors_with_csr_rw.28696048
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/1.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[17] & 'hffffffff)))'
  UVM_ERROR @  12941319 ps: (keymgr_csr_assert_fpv.sv:426) [ASSERT FAILED] attest_sw_binding_4_rd_A
  UVM_INFO @  12941319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.keymgr_shadow_reg_errors_with_csr_rw.2790912411
Line 258, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/5.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[18] & 'hffffffff)))'
  UVM_ERROR @   7225433 ps: (keymgr_csr_assert_fpv.sv:431) [ASSERT FAILED] attest_sw_binding_5_rd_A
  UVM_INFO @   7225433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

Test keymgr_csr_bit_bash has 3 failures.

2.keymgr_csr_bit_bash.2709826884
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/2.keymgr_csr_bit_bash/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[17] & 'hffffffff)))'
  UVM_ERROR @ 2564089768 ps: (keymgr_csr_assert_fpv.sv:426) [ASSERT FAILED] attest_sw_binding_4_rd_A
  UVM_INFO @ 2564089768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.keymgr_csr_bit_bash.3135360622
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/3.keymgr_csr_bit_bash/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[11] & 'hffffffff)))'
  UVM_ERROR @ 1987846791 ps: (keymgr_csr_assert_fpv.sv:396) [ASSERT FAILED] sealing_sw_binding_6_rd_A
  UVM_INFO @ 1987846791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

Test keymgr_same_csr_outstanding has 8 failures.

2.keymgr_same_csr_outstanding.2268746416
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/2.keymgr_same_csr_outstanding/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[10] & 'hffffffff)))'
  UVM_ERROR @  59333440 ps: (keymgr_csr_assert_fpv.sv:391) [ASSERT FAILED] sealing_sw_binding_5_rd_A
  UVM_INFO @  59333440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

8.keymgr_same_csr_outstanding.1083425280
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/8.keymgr_same_csr_outstanding/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[9] & 'hffffffff)))'
  UVM_ERROR @  68146731 ps: (keymgr_csr_assert_fpv.sv:386) [ASSERT FAILED] sealing_sw_binding_4_rd_A
  UVM_INFO @  68146731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

Test keymgr_csr_aliasing has 1 failures.

3.keymgr_csr_aliasing.1120514766
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/3.keymgr_csr_aliasing/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[7] & 'hffffffff)))'
  UVM_ERROR @ 194037081 ps: (keymgr_csr_assert_fpv.sv:376) [ASSERT FAILED] sealing_sw_binding_2_rd_A
  UVM_INFO @ 194037081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_csr_rw has 1 failures.

5.keymgr_csr_rw.1780750946
Line 255, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/5.keymgr_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[10] & 'hffffffff)))'
  UVM_ERROR @ 129097578 ps: (keymgr_csr_assert_fpv.sv:391) [ASSERT FAILED] sealing_sw_binding_5_rd_A
  UVM_INFO @ 129097578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more tests.

UVM_ERROR (cip_base_scoreboard.sv:281) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:* has 2 failures:

Test keymgr_sideload_aes has 1 failures.

2.keymgr_sideload_aes.3820642588
Line 269, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/2.keymgr_sideload_aes/latest/run.log

  UVM_ERROR @  23929939 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @  23929939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_kmac_rsp_err has 1 failures.

16.keymgr_kmac_rsp_err.3310722413
Line 718, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/16.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @ 132129687 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @ 132129687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (keymgr_scoreboard.sv:1019) [scoreboard] Check failed act != exp (* [*] vs * [*]) cdi_type: Attestation has 2 failures:

Test keymgr_kmac_rsp_err has 2 failures.

2.keymgr_kmac_rsp_err.4249956895
Line 265, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/2.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @  20989894 ps: (keymgr_scoreboard.sv:1019) [uvm_test_top.env.scoreboard] Check failed act != exp (1605930754565491250042339328357387143542526556207941497641627338815315533913313089529527633267547022900761720476669882678780222178542386563586985982426830510152842862436777182831826401582623576884360907498049127111724089601158002376479477607239310021509175794728189794570491553077594207548948198371956490229385986283127080527448933769024633227622452094053556139903753465235032294055658474903502137393090670890612567788088184 [0x3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9000000000000000000000000000000000000000000000000000000000000f0f000000000000000005cfbd765ce33f34ea20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507fa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78] vs 1605930754565491250042339328357387143542526556207941497641627338815315533913313089529527633267547022900761720476669882678780222178542386563586985982426830510152842862436777182831826401582623576884360907498049127111724089601158002376479477607239310021509175794728189794570491553077594207548948198371956490229385986283127080527448933769024633227622452094053556139903753465235032294055658474903502137393090670890612567788088184 [0x3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9000000000000000000000000000000000000000000000000000000000000f0f000000000000000005cfbd765ce33f34ea20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507fa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78]) cdi_type: Attestation
  
   DiversificationKey act: 0xfa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78, exp: 0xfa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78
   RomDigests act: 0xa20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507, exp: 0xa20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507a20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507
   HealthMeasurement act: 0x5cfbd765ce33f34e, exp: 0x5cfbd765ce33f34e

43.keymgr_kmac_rsp_err.1908591646
Line 459, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/43.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @  23662639 ps: (keymgr_scoreboard.sv:1019) [uvm_test_top.env.scoreboard] Check failed act != exp (247956913848874608198225638355447338207070682901715121379497491507046818645298217240386130886851506894385491186681435265395323703752097634792340076342739561145304745130305202190737694771713752312296110895546332203576655408919082202270045057688627859055826976028699177139806773087842216228656212063130267268794683436803886989190489704025353344409986266945306664983774950366509292249087393823639468949521711915459348095701172387567641570402373257524149654469193627670507897159647365989372677308540926812 [0x4d64afbfc6f8f4241b19b0e0525e4bfef89b408ae6971643922c55dc154bdc823a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9014de1e36ac631db545acde3ac2e34d9a58b8db6b67df4f38c4f47e2f28d97c7fc61464deef7577d11b62a2cd7d4dd1d6059250a9a8d9a06b40a1e33cbe1fd42962cd5a4c5658dadc50f6533fcf929d2e5e7fbfc024967d7e56ef8c38901abbce548f742ae919b98fe23e70b3bef0d5546812b485bf0ce209a1b3ba4398a0ddadf59991d4d20c9b7c38e4793f5e23b5c] vs 247956913848874608198225638355447338207070682901715121379497491507046818645298217240386130886851506894385491186681435265395323703752097634792340076342739561145304745130305202190737694771713752312296110895546332203576655408919082202270045057688627859055826976028699177139806773087842216228656212063130267268794683436803886989190489704025353344409986266945306664983774950366509292249087393823639468949521711915459348095701172387567641570402373257524149654469193627670507897159647365989372677308540926812 [0x4d64afbfc6f8f4241b19b0e0525e4bfef89b408ae6971643922c55dc154bdc823a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9014de1e36ac631db545acde3ac2e34d9a58b8db6b67df4f38c4f47e2f28d97c7fc61464deef7577d11b62a2cd7d4dd1d6059250a9a8d9a06b40a1e33cbe1fd42962cd5a4c5658dadc50f6533fcf929d2e5e7fbfc024967d7e56ef8c38901abbce548f742ae919b98fe23e70b3bef0d5546812b485bf0ce209a1b3ba4398a0ddadf59991d4d20c9b7c38e4793f5e23b5c]) cdi_type: Attestation
  
   DiversificationKey act: 0x46812b485bf0ce209a1b3ba4398a0ddadf59991d4d20c9b7c38e4793f5e23b5c, exp: 0x46812b485bf0ce209a1b3ba4398a0ddadf59991d4d20c9b7c38e4793f5e23b5c
   RomDigests act: 0x6059250a9a8d9a06b40a1e33cbe1fd42962cd5a4c5658dadc50f6533fcf929d2e5e7fbfc024967d7e56ef8c38901abbce548f742ae919b98fe23e70b3bef0d55, exp: 0x6059250a9a8d9a06b40a1e33cbe1fd42962cd5a4c5658dadc50f6533fcf929d2e5e7fbfc024967d7e56ef8c38901abbce548f742ae919b98fe23e70b3bef0d55
   HealthMeasurement act: 0xfc61464deef7577d11b62a2cd7d4dd1d, exp: 0xfc61464deef7577d11b62a2cd7d4dd1d

UVM_ERROR (keymgr_scoreboard.sv:750) [scoreboard] Check failed item.d_data ==gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.sw_share0_output_*` has 2 failures:

Test keymgr_lc_disable has 1 failures.

26.keymgr_lc_disable.2804798649
Line 300, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/26.keymgr_lc_disable/latest/run.log

  UVM_ERROR @  29269645 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (3499106045 [0xd0901efd] vs 0 [0x0]) reg name: keymgr_reg_block.sw_share0_output_5
  UVM_INFO @  29269645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_stress_all has 1 failures.

28.keymgr_stress_all.3081556784
Line 762, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/28.keymgr_stress_all/latest/run.log

  UVM_ERROR @ 107584614 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (298503282 [0x11cacc72] vs 154341346 [0x9330fe2]) reg name: keymgr_reg_block.sw_share0_output_3
  UVM_INFO @ 107584614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (keymgr_scoreboard.sv:1017) [scoreboard] Check failed act == exp (* [*] vs * [*]) cdi_type: Attestation has 2 failures:

Test keymgr_stress_all_with_rand_reset has 2 failures.

26.keymgr_stress_all_with_rand_reset.821494316
Line 738, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/26.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 245055864 ps: (keymgr_scoreboard.sv:1017) [uvm_test_top.env.scoreboard] Check failed act == exp (281559380572015680519626329698662959047174795254702636633890136517067754649108537331265636204581459505513748427979791323693370597846297730365466980371846499646398521325980810684490641450801666138100846480169500823092793058129240449058207017308987501039361156926629945196326055241057624965507134028097342655209777048156632652026731689534130830915347297755741820328234173488792147847198563820216400755322585047418077405304411934929363871876511278202947272176471642442911833390157331485431220100811219230 [0x57e1a647000000000000000000000000000000000000000000000000000000003a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9fbc3963f717bfb3bcf8248d5159c63e2fceb04f00e354415a1494a70a1752ad74ad119388265b3439b59097c8f95a723d7791ca02bc45dace47580cf1a87e1c1f8cd33eb545214acbe402782cbb07ddde646162dcb0cc83e2f3e697d0515260a11d0b25afa6b044a515b1b41892c0ee5828ff7ecd9d8fe335acd3d6310e486bc02b2b2d3405fa36077aa068e0730611e] vs 99755194091814367764205336489277004257934366029566554041122067920668237551551715168549438683806801841528236334699680074753738987006176085453956530753981914200978247170452229477015973139230188623354150433226700064826656709225210519869433957503000749089648908426419019602425227158451392032988894411099080528980189106035584433554517020639918211734581435667485284863953935653508247580655582585332218424375534161530437225772474579667742308837646622 [0xc3719bee000000003a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9fbc3963f717bfb3bcf8248d5159c63e2fceb04f00e354415a1494a70a1752ad74ad119388265b3439b59097c8f95a723d7791ca02bc45dace47580cf1a87e1c1f8cd33eb545214acbe402782cbb07ddde646162dcb0cc83e2f3e697d0515260a11d0b25afa6b044a515b1b41892c0ee5828ff7ecd9d8fe335acd3d6310e486bc02b2b2d3405fa36077aa068e0730611e]) cdi_type: Attestation
  
   DiversificationKey act: 0x828ff7ecd9d8fe335acd3d6310e486bc02b2b2d3405fa36077aa068e0730611e, exp: 0x828ff7ecd9d8fe335acd3d6310e486bc02b2b2d3405fa36077aa068e0730611e
   RomDigests act: 0xd7791ca02bc45dace47580cf1a87e1c1f8cd33eb545214acbe402782cbb07ddde646162dcb0cc83e2f3e697d0515260a11d0b25afa6b044a515b1b41892c0ee5, exp: 0xd7791ca02bc45dace47580cf1a87e1c1f8cd33eb545214acbe402782cbb07ddde646162dcb0cc83e2f3e697d0515260a11d0b25afa6b044a515b1b41892c0ee5
   HealthMeasurement act: 0x4ad119388265b3439b59097c8f95a723, exp: 0x4ad119388265b3439b59097c8f95a723

41.keymgr_stress_all_with_rand_reset.65993356
Line 483, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/41.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 341921599 ps: (keymgr_scoreboard.sv:1017) [uvm_test_top.env.scoreboard] Check failed act == exp (604002163950270274888420234189611344622582391917262361523213064871534808950399551267878121244758706826404417271905957429022957865029291481756144495321144109287363549697060124177764326748438502613686745257389510430364703876320740954175209229572936594742989932546827257759203729090632520866084789205730510485928886753382049785514111722744826746143831998759992721849113243378825974183335384439594388685847879632373677320610368016596209522528961231778789531306072314649410457761725264912917081048013332057 [0xbc86093f000000000000000000000000fde6c08cac025dc50000000001361f543a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f92c69988a206192e6cff6764d32a0ae0f20e37dc40112847b34455791f57e7c1203e22dcaa94d861c73e122b705ddc276d182827f6a17880c2f9890198ba3b969d091cf74ba06740490d51c4225525f6cd9890a43b994373491b64820cb8ee1f7bb21be68a3fe7df82884596d20ebb0f8fe6374e00883f0e873abfac6ed44e1f36fcbc8b4768eba102b2904337753de59] vs 224123660211014696436224851145919000717291137554184940684046839538821997183797908710107561053618000926642895932430082460660193499690870220232069871781596254803840211631178388811148609743750570487490736077014340004463895521684938051586459825214713344145114607407766971428320305799512375090839419781329531004699426221135498662936238087195022897512438091818145708648596105436929456792521041935889654917936564430372162314733159692294066730191375062462094937 [0x663d0a1400000000000000003a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f92c69988a206192e6cff6764d32a0ae0f20e37dc40112847b34455791f57e7c1203e22dcaa94d861c73e122b705ddc276d182827f6a17880c2f9890198ba3b969d091cf74ba06740490d51c4225525f6cd9890a43b994373491b64820cb8ee1f7bb21be68a3fe7df82884596d20ebb0f8fe6374e00883f0e873abfac6ed44e1f36fcbc8b4768eba102b2904337753de59]) cdi_type: Attestation
  
   DiversificationKey act: 0xfe6374e00883f0e873abfac6ed44e1f36fcbc8b4768eba102b2904337753de59, exp: 0xfe6374e00883f0e873abfac6ed44e1f36fcbc8b4768eba102b2904337753de59
   RomDigests act: 0xd182827f6a17880c2f9890198ba3b969d091cf74ba06740490d51c4225525f6cd9890a43b994373491b64820cb8ee1f7bb21be68a3fe7df82884596d20ebb0f8, exp: 0xd182827f6a17880c2f9890198ba3b969d091cf74ba06740490d51c4225525f6cd9890a43b994373491b64820cb8ee1f7bb21be68a3fe7df82884596d20ebb0f8
   HealthMeasurement act: 0x3e22dcaa94d861c73e122b705ddc276, exp: 0x3e22dcaa94d861c73e122b705ddc276

UVM_ERROR (keymgr_scoreboard.sv:674) [scoreboard] Check failed item.d_data == addr_phase_op_status (* [*] vs * [*]) has 1 failures:
- Test keymgr_stress_all_with_rand_reset has 1 failures.
  - 4.keymgr_stress_all_with_rand_reset.2674310934
    Line 582, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/4.keymgr_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 250770797 ps: (keymgr_scoreboard.sv:674) [uvm_test_top.env.scoreboard] Check failed item.d_data == addr_phase_op_status (1 [0x1] vs 2 [0x2])
  UVM_INFO @ 250770797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (keymgr_scoreboard.sv:750) [scoreboard] Check failed item.d_data ==gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.sw_share1_output_*` has 1 failures:
- Test keymgr_lc_disable has 1 failures.
  - 10.keymgr_lc_disable.1400115109
    Line 329, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/10.keymgr_lc_disable/latest/run.log
```
  UVM_ERROR @ 226624014 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (3096637663 [0xb892f0df] vs 2423434332 [0x9072ac5c]) reg name: keymgr_reg_block.sw_share1_output_4
  UVM_INFO @ 226624014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```