ENTROPY_SRC Simulation Results

Saturday July 06 2024 23:02:28 UTC

GitHub Revision: c42c47ec2d

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 3200059823452722292543998130245428086525417237473114929151723951411399280153

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 18.000s 28.508us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 4.000s 20.150us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 3.000s 22.137us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 15.000s 796.105us 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 6.000s 147.709us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 3.000s 21.406us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 3.000s 22.137us 20 20 100.00
entropy_src_csr_aliasing 6.000s 147.709us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 18.000s 28.508us 50 50 100.00
entropy_src_rng 4.533m 10.018ms 299 300 99.67
entropy_src_fw_ov 2.417m 5.090ms 289 300 96.33
V2 firmware_mode entropy_src_fw_ov 2.417m 5.090ms 289 300 96.33
V2 rng_mode entropy_src_rng 4.533m 10.018ms 299 300 99.67
V2 rng_max_rate entropy_src_rng_max_rate 8.983m 10.038ms 393 400 98.25
V2 health_checks entropy_src_rng 4.533m 10.018ms 299 300 99.67
V2 conditioning entropy_src_rng 4.533m 10.018ms 299 300 99.67
V2 interrupts entropy_src_rng 4.533m 10.018ms 299 300 99.67
entropy_src_intr 30.000s 514.334us 50 50 100.00
V2 alerts entropy_src_rng 4.533m 10.018ms 299 300 99.67
entropy_src_functional_alerts 14.000s 230.364us 50 50 100.00
V2 stress_all entropy_src_stress_all 17.000s 235.959us 50 50 100.00
V2 functional_errors entropy_src_functional_errors 9.833m 10.012ms 970 1000 97.00
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 32.000s 3.010ms 50 50 100.00
V2 intr_test entropy_src_intr_test 8.000s 92.736us 50 50 100.00
V2 alert_test entropy_src_alert_test 9.000s 68.711us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 7.000s 200.381us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 7.000s 200.381us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 4.000s 20.150us 5 5 100.00
entropy_src_csr_rw 3.000s 22.137us 20 20 100.00
entropy_src_csr_aliasing 6.000s 147.709us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 84.557us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 4.000s 20.150us 5 5 100.00
entropy_src_csr_rw 3.000s 22.137us 20 20 100.00
entropy_src_csr_aliasing 6.000s 147.709us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 84.557us 20 20 100.00
V2 TOTAL 2291 2340 97.91
V2S tl_intg_err entropy_src_sec_cm 8.000s 268.241us 5 5 100.00
entropy_src_tl_intg_err 7.000s 1.461ms 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 4.533m 10.018ms 299 300 99.67
entropy_src_cfg_regwen 14.000s 20.465us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 4.533m 10.018ms 299 300 99.67
V2S sec_cm_config_redun entropy_src_rng 4.533m 10.018ms 299 300 99.67
V2S sec_cm_intersig_mubi entropy_src_rng 4.533m 10.018ms 299 300 99.67
entropy_src_fw_ov 2.417m 5.090ms 289 300 96.33
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 9.833m 10.012ms 970 1000 97.00
entropy_src_sec_cm 8.000s 268.241us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 9.833m 10.012ms 970 1000 97.00
entropy_src_sec_cm 8.000s 268.241us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 4.533m 10.018ms 299 300 99.67
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 9.833m 10.012ms 970 1000 97.00
entropy_src_sec_cm 8.000s 268.241us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 9.833m 10.012ms 970 1000 97.00
entropy_src_sec_cm 8.000s 268.241us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 9.833m 10.012ms 970 1000 97.00
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 14.000s 230.364us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 7.000s 1.461ms 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 4.550m 10.046ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2521 2570 98.09

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 8 66.67
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.13 98.15 95.32 98.33 95.79 96.53 96.88 90.48 96.00

Failure Buckets

Past Results