Unified Coverage Report :: Module :: flash_ctrl_arb

Module : flash_ctrl_arb

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_arb.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_ctrl_arb	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.u_ctrl_arb

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
16.65	0.00	0.00	66.62		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_state_regs	0.00	0.00				0.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : flash_ctrl_arb

	Line No.	Total	Covered	Percent
TOTAL		66	0	0.00
CONT_ASSIGN	120	1	0	0.00
ALWAYS	123	3	0	0.00
ALWAYS	127	22	0	0.00
ALWAYS	194	25	0	0.00
ALWAYS	240	13	0	0.00
CONT_ASSIGN	275	1	0	0.00
CONT_ASSIGN	278	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_arb.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_arb.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
120	0	1
123	0	3
127	0	1
128	0	1
129	0	1
130	0	1
132	0	1
136	0	1
139	0	1
			==> MISSING_ELSE
144	0	1
146	0	1
147	0	1
			==> MISSING_ELSE
153	0	1
155	0	1
158	0	1
159	0	1
162	0	1
163	0	1
164	0	1
165	0	1
			==> MISSING_ELSE
170	0	1
174	0	1
175	0	1
			==> MISSING_ELSE
180	0	1
194	0	1
195	0	1
196	0	1
197	0	1
198	0	1
199	0	1
200	0	1
202	0	1
203	0	1
204	0	1
206	0	1
209	0	1
210	0	1
211	0	1
212	0	1
215	0	1
216	0	1
217	0	1
223	0	1
224	0	1
225	0	1
226	0	1
229	0	1
230	0	1
231	0	1
240	0	1
241	0	1
242	0	1
244	0	1
246	0	1
247	0	1
248	0	1
252	0	1
253	0	1
254	0	1
258	0	1
259	0	1
260	0	1
			MISSING_ELSE
275	0	1
278	0	1

---

Cond Coverage for Module : flash_ctrl_arb

	Total	Covered	Percent
Conditions	8	0	0.00
Logical	8	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       174
 EXPRESSION (prog_ack_i || rd_ack_i || erase_ack_i)
             -----1----    ----2---    -----3-----

-1-	-2-	-3-	Status	Tests
0	0	0	Not Covered
0	0	1	Not Covered
0	1	0	Not Covered
1	0	0	Not Covered

 LINE       278
 EXPRESSION ((func_sel == SwSel) ? PhaseInvalid : hw_phase_i)
             ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       278
 SUB-EXPRESSION (func_sel == SwSel)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

---

FSM Coverage for Module : flash_ctrl_arb

Summary for FSM :: state_q

	Total	Covered	Percent
States	5	0	0.00	(Not included in score)
Transitions	6	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
StDisabled	158	Not Covered
StHw	139	Not Covered
StReset	133	Not Covered
StSwActive	165	Not Covered
StSwIdle	147	Not Covered

transitions	Line No.	Covered	Tests
StHw->StSwIdle	147	Not Covered
StReset->StHw	139	Not Covered
StSwActive->StSwIdle	175	Not Covered
StSwIdle->StDisabled	158	Not Covered
StSwIdle->StHw	163	Not Covered
StSwIdle->StSwActive	165	Not Covered

---

Branch Coverage for Module : flash_ctrl_arb

	Line No.	Total	Covered	Percent
Branches		24	0	0.00
TERNARY	278	2	0	0.00
IF	123	2	0	0.00
CASE	132	12	0	0.00
CASE	206	3	0	0.00
CASE	244	5	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_arb.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_arb.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	278	((func_sel == SwSel)) ? 

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	123	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	132	case (state_q)
-2-:	136	if ((!flash_phy_busy_i))
-3-:	146	if ((!hw_req_i))
-4-:	155	if (prim_mubi_pkg::mubi4_test_true_loose(disable_i))
-5-:	159	if (hw_req_i)
-6-:	164	if (sw_req)
-7-:	174	if (((prog_ack_i || rd_ack_i) || erase_ack_i))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	Status	Tests
StReset	1	-	-	-	-	-	Not Covered
StReset	0	-	-	-	-	-	Not Covered
StHw	-	1	-	-	-	-	Not Covered
StHw	-	0	-	-	-	-	Not Covered
StSwIdle	-	-	1	-	-	-	Not Covered
StSwIdle	-	-	0	1	-	-	Not Covered
StSwIdle	-	-	0	0	1	-	Not Covered
StSwIdle	-	-	0	0	0	-	Not Covered
StSwActive	-	-	-	-	-	1	Not Covered
StSwActive	-	-	-	-	-	0	Not Covered
StDisabled	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	206	case (func_sel)

Branches:

-1-	Status	Tests
HwSel	Not Covered
SwSel	Not Covered
default	Not Covered

	LineNo.	Expression
-1-:	244	case (muxed_ctrl_o.op.q)
-2-:	266	if (muxed_ctrl_o.start)

Branches:

-1-	-2-	Status	Tests
FlashOpProgram	-	Not Covered
FlashOpErase	-	Not Covered
FlashOpRead	-	Not Covered
default	1	Not Covered
default	0	Not Covered